same70j21b.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70J21B_
36 #define _SAME70J21B_
37 
46 
47 #ifdef __cplusplus
48  extern "C" {
49 #endif
50 
51 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
52 #include <stdint.h>
53 #endif
54 
55 /* ************************************************************************** */
56 /* CMSIS DEFINITIONS FOR SAME70J21B */
57 /* ************************************************************************** */
60 
62 typedef enum IRQn
63 {
64 /****** Cortex-M7 Processor Exceptions Numbers ******************************/
65  NonMaskableInt_IRQn = -14,
66  HardFault_IRQn = -13,
67  MemoryManagement_IRQn = -12,
68  BusFault_IRQn = -11,
69  UsageFault_IRQn = -10,
70  SVCall_IRQn = -5,
71  DebugMonitor_IRQn = -4,
72  PendSV_IRQn = -2,
73  SysTick_IRQn = -1,
74 /****** SAME70J21B specific Interrupt Numbers *********************************/
75 
76  SUPC_IRQn = 0,
77  RSTC_IRQn = 1,
78  RTC_IRQn = 2,
79  RTT_IRQn = 3,
80  WDT_IRQn = 4,
81  PMC_IRQn = 5,
82  EFC_IRQn = 6,
83  UART0_IRQn = 7,
84  UART1_IRQn = 8,
85  PIOA_IRQn = 10,
86  PIOB_IRQn = 11,
87  USART0_IRQn = 13,
88  USART1_IRQn = 14,
89  PIOD_IRQn = 16,
90  TWIHS0_IRQn = 19,
91  TWIHS1_IRQn = 20,
92  SSC_IRQn = 22,
93  TC0_IRQn = 23,
94  TC1_IRQn = 24,
95  TC2_IRQn = 25,
96  AFEC0_IRQn = 29,
97  DACC_IRQn = 30,
98  PWM0_IRQn = 31,
99  ICM_IRQn = 32,
100  ACC_IRQn = 33,
101  USBHS_IRQn = 34,
102  MCAN0_INT0_IRQn = 35,
103  MCAN0_INT1_IRQn = 36,
104  GMAC_IRQn = 39,
105  AFEC1_IRQn = 40,
106  QSPI_IRQn = 43,
107  UART2_IRQn = 44,
108  TC9_IRQn = 50,
109  TC10_IRQn = 51,
110  TC11_IRQn = 52,
111  AES_IRQn = 56,
112  TRNG_IRQn = 57,
113  XDMAC_IRQn = 58,
114  ISI_IRQn = 59,
115  PWM1_IRQn = 60,
116  FPU_IRQn = 61,
117  RSWDT_IRQn = 63,
118  CCW_IRQn = 64,
119  CCF_IRQn = 65,
120  GMAC_Q1_IRQn = 66,
121  GMAC_Q2_IRQn = 67,
122  IXC_IRQn = 68,
123  GMAC_Q3_IRQn = 71,
124  GMAC_Q4_IRQn = 72,
125  GMAC_Q5_IRQn = 73,
127  PERIPH_COUNT_IRQn = 74
128 } IRQn_Type;
129 
130 typedef struct _DeviceVectors
131 {
132  /* Stack pointer */
133  void* pvStack;
134 
135  /* Cortex-M handlers */
136  void* pfnReset_Handler;
137  void* pfnNMI_Handler;
138  void* pfnHardFault_Handler;
139  void* pfnMemManage_Handler;
140  void* pfnBusFault_Handler;
141  void* pfnUsageFault_Handler;
142  void* pfnReserved1_Handler;
143  void* pfnReserved2_Handler;
144  void* pfnReserved3_Handler;
145  void* pfnReserved4_Handler;
146  void* pfnSVC_Handler;
147  void* pfnDebugMon_Handler;
148  void* pfnReserved5_Handler;
149  void* pfnPendSV_Handler;
150  void* pfnSysTick_Handler;
151 
152  /* Peripheral handlers */
153  void* pfnSUPC_Handler; /* 0 Supply Controller */
154  void* pfnRSTC_Handler; /* 1 Reset Controller */
155  void* pfnRTC_Handler; /* 2 Real Time Clock */
156  void* pfnRTT_Handler; /* 3 Real Time Timer */
157  void* pfnWDT_Handler; /* 4 Watchdog Timer */
158  void* pfnPMC_Handler; /* 5 Power Management Controller */
159  void* pfnEFC_Handler; /* 6 Enhanced Embedded Flash Controller */
160  void* pfnUART0_Handler; /* 7 UART 0 */
161  void* pfnUART1_Handler; /* 8 UART 1 */
162  void* pvReserved9;
163  void* pfnPIOA_Handler; /* 10 Parallel I/O Controller A */
164  void* pfnPIOB_Handler; /* 11 Parallel I/O Controller B */
165  void* pvReserved12;
166  void* pfnUSART0_Handler; /* 13 USART 0 */
167  void* pfnUSART1_Handler; /* 14 USART 1 */
168  void* pvReserved15;
169  void* pfnPIOD_Handler; /* 16 Parallel I/O Controller D */
170  void* pvReserved17;
171  void* pvReserved18;
172  void* pfnTWIHS0_Handler; /* 19 Two Wire Interface 0 HS */
173  void* pfnTWIHS1_Handler; /* 20 Two Wire Interface 1 HS */
174  void* pvReserved21;
175  void* pfnSSC_Handler; /* 22 Synchronous Serial Controller */
176  void* pfnTC0_Handler; /* 23 Timer/Counter 0 */
177  void* pfnTC1_Handler; /* 24 Timer/Counter 1 */
178  void* pfnTC2_Handler; /* 25 Timer/Counter 2 */
179  void* pvReserved26;
180  void* pvReserved27;
181  void* pvReserved28;
182  void* pfnAFEC0_Handler; /* 29 Analog Front End 0 */
183  void* pfnDACC_Handler; /* 30 Digital To Analog Converter */
184  void* pfnPWM0_Handler; /* 31 Pulse Width Modulation 0 */
185  void* pfnICM_Handler; /* 32 Integrity Check Monitor */
186  void* pfnACC_Handler; /* 33 Analog Comparator */
187  void* pfnUSBHS_Handler; /* 34 USB Host / Device Controller */
188  void* pfnMCAN0_INT0_Handler; /* 35 Controller Area Network (MCAN0) */
189  void* pfnMCAN0_INT1_Handler; /* 36 Controller Area Network (MCAN0) */
190  void* pvReserved37;
191  void* pvReserved38;
192  void* pfnGMAC_Handler; /* 39 Ethernet MAC */
193  void* pfnAFEC1_Handler; /* 40 Analog Front End 1 */
194  void* pvReserved41;
195  void* pvReserved42;
196  void* pfnQSPI_Handler; /* 43 Quad I/O Serial Peripheral Interface */
197  void* pfnUART2_Handler; /* 44 UART 2 */
198  void* pvReserved45;
199  void* pvReserved46;
200  void* pvReserved47;
201  void* pvReserved48;
202  void* pvReserved49;
203  void* pfnTC9_Handler; /* 50 Timer/Counter 9 */
204  void* pfnTC10_Handler; /* 51 Timer/Counter 10 */
205  void* pfnTC11_Handler; /* 52 Timer/Counter 11 */
206  void* pvReserved53;
207  void* pvReserved54;
208  void* pvReserved55;
209  void* pfnAES_Handler; /* 56 AES */
210  void* pfnTRNG_Handler; /* 57 True Random Generator */
211  void* pfnXDMAC_Handler; /* 58 DMA */
212  void* pfnISI_Handler; /* 59 Camera Interface */
213  void* pfnPWM1_Handler; /* 60 Pulse Width Modulation 1 */
214  void* pfnFPU_Handler; /* 61 Floating Point Unit Registers (FPU) */
215  void* pvReserved62;
216  void* pfnRSWDT_Handler; /* 63 Reinforced Secure Watchdog Timer */
217  void* pfnCCW_Handler; /* 64 System Control Registers (SystemControl) */
218  void* pfnCCF_Handler; /* 65 System Control Registers (SystemControl) */
219  void* pfnGMAC_Q1_Handler;/* 66 Gigabit Ethernet MAC (GMAC) */
220  void* pfnGMAC_Q2_Handler;/* 67 Gigabit Ethernet MAC (GMAC) */
221  void* pfnIXC_Handler; /* 68 Floating Point Unit Registers (FPU) */
222  void* pvReserved69;
223  void* pvReserved70;
224  void* pfnGMAC_Q3_Handler;/* 71 Gigabit Ethernet MAC (GMAC) */
225  void* pfnGMAC_Q4_Handler;/* 72 Gigabit Ethernet MAC (GMAC) */
226  void* pfnGMAC_Q5_Handler;/* 73 Gigabit Ethernet MAC (GMAC) */
227 } DeviceVectors;
228 
229 /* Cortex-M7 core handlers */
230 void Reset_Handler ( void );
231 void NMI_Handler ( void );
232 void HardFault_Handler ( void );
233 void MemManage_Handler ( void );
234 void BusFault_Handler ( void );
235 void UsageFault_Handler ( void );
236 void SVC_Handler ( void );
237 void DebugMon_Handler ( void );
238 void PendSV_Handler ( void );
239 void SysTick_Handler ( void );
240 
241 /* Peripherals handlers */
242 void ACC_Handler ( void );
243 void AES_Handler ( void );
244 void AFEC0_Handler ( void );
245 void AFEC1_Handler ( void );
246 void CCF_Handler ( void );
247 void CCW_Handler ( void );
248 void DACC_Handler ( void );
249 void EFC_Handler ( void );
250 void FPU_Handler ( void );
251 void GMAC_Handler ( void );
252 void ICM_Handler ( void );
253 void ISI_Handler ( void );
254 void IXC_Handler ( void );
255 void MCAN0_INT0_Handler ( void );
256 void MCAN0_INT1_Handler ( void );
257 void PIOA_Handler ( void );
258 void PIOB_Handler ( void );
259 void PIOD_Handler ( void );
260 void PMC_Handler ( void );
261 void PWM0_Handler ( void );
262 void PWM1_Handler ( void );
263 void GMAC_Q1_Handler ( void );
264 void GMAC_Q2_Handler ( void );
265 void GMAC_Q3_Handler ( void );
266 void GMAC_Q4_Handler ( void );
267 void GMAC_Q5_Handler ( void );
268 void QSPI_Handler ( void );
269 void RSTC_Handler ( void );
270 void RSWDT_Handler ( void );
271 void RTC_Handler ( void );
272 void RTT_Handler ( void );
273 void SSC_Handler ( void );
274 void SUPC_Handler ( void );
275 void TC0_Handler ( void );
276 void TC1_Handler ( void );
277 void TC2_Handler ( void );
278 void TC9_Handler ( void );
279 void TC10_Handler ( void );
280 void TC11_Handler ( void );
281 void TRNG_Handler ( void );
282 void TWIHS0_Handler ( void );
283 void TWIHS1_Handler ( void );
284 void UART0_Handler ( void );
285 void UART1_Handler ( void );
286 void UART2_Handler ( void );
287 void USART0_Handler ( void );
288 void USART1_Handler ( void );
289 void USBHS_Handler ( void );
290 void WDT_Handler ( void );
291 void XDMAC_Handler ( void );
292 
297 #define __CM7_REV 0x0000
298 #define __MPU_PRESENT 1
299 #define __NVIC_PRIO_BITS 3
300 #define __FPU_PRESENT 1
301 #define __FPU_DP 1
302 #define __ICACHE_PRESENT 1
303 #define __DCACHE_PRESENT 1
304 #define __DTCM_PRESENT 1
305 #define __ITCM_PRESENT 1
306 #define __Vendor_SysTickConfig 0
307 #define __SAM_M7_REVB 1
309 /*
310  * \brief CMSIS includes
311  */
312 
313 #include <core_cm7.h>
314 #if !defined DONT_USE_CMSIS_INIT
315 #include "system_same70.h"
316 #endif /* DONT_USE_CMSIS_INIT */
317 
320 /* ************************************************************************** */
322 /* ************************************************************************** */
325 
326 #include "component/acc.h"
327 #include "component/aes.h"
328 #include "component/afec.h"
329 #include "component/chipid.h"
330 #include "component/efc.h"
331 #include "component/gmac.h"
332 #include "component/gpbr.h"
333 #include "component/dacc.h"
334 #include "component/icm.h"
335 #include "component/isi.h"
336 #include "component/matrix.h"
337 #include "component/mcan.h"
338 #include "component/pio.h"
339 #include "component/pmc.h"
340 #include "component/pwm.h"
341 #include "component/qspi.h"
342 #include "component/rstc.h"
343 #include "component/rswdt.h"
344 #include "component/rtc.h"
345 #include "component/rtt.h"
346 #include "component/ssc.h"
347 #include "component/supc.h"
348 #include "component/tc.h"
349 #include "component/trng.h"
350 #include "component/twihs.h"
351 #include "component/uart.h"
352 #include "component/usart.h"
353 #include "component/usbhs.h"
354 #include "component/utmi.h"
355 #include "component/wdt.h"
356 #include "component/xdmac.h"
359 /* ************************************************************************** */
360 /* REGISTER ACCESS DEFINITIONS FOR SAME70J21B */
361 /* ************************************************************************** */
364 
365 #include "instance/ssc.h"
366 #include "instance/tc0.h"
367 #include "instance/twihs0.h"
368 #include "instance/twihs1.h"
369 #include "instance/pwm0.h"
370 #include "instance/usart0.h"
371 #include "instance/usart1.h"
372 #include "instance/mcan0.h"
373 #include "instance/usbhs.h"
374 #include "instance/afec0.h"
375 #include "instance/dacc.h"
376 #include "instance/acc.h"
377 #include "instance/icm.h"
378 #include "instance/isi.h"
379 #include "instance/gmac.h"
380 #include "instance/tc3.h"
381 #include "instance/pwm1.h"
382 #include "instance/afec1.h"
383 #include "instance/aes.h"
384 #include "instance/trng.h"
385 #include "instance/xdmac.h"
386 #include "instance/qspi.h"
387 #include "instance/matrix.h"
388 #include "instance/utmi.h"
389 #include "instance/pmc.h"
390 #include "instance/uart0.h"
391 #include "instance/chipid.h"
392 #include "instance/uart1.h"
393 #include "instance/efc.h"
394 #include "instance/pioa.h"
395 #include "instance/piob.h"
396 #include "instance/piod.h"
397 #include "instance/rstc.h"
398 #include "instance/supc.h"
399 #include "instance/rtt.h"
400 #include "instance/wdt.h"
401 #include "instance/rtc.h"
402 #include "instance/gpbr.h"
403 #include "instance/rswdt.h"
404 #include "instance/uart2.h"
407 /* ************************************************************************** */
408 /* PERIPHERAL ID DEFINITIONS FOR SAME70J21B */
409 /* ************************************************************************** */
412 
413 #define ID_SUPC ( 0)
414 #define ID_RSTC ( 1)
415 #define ID_RTC ( 2)
416 #define ID_RTT ( 3)
417 #define ID_WDT ( 4)
418 #define ID_PMC ( 5)
419 #define ID_EFC ( 6)
420 #define ID_UART0 ( 7)
421 #define ID_UART1 ( 8)
422 #define ID_PIOA (10)
423 #define ID_PIOB (11)
424 #define ID_USART0 (13)
425 #define ID_USART1 (14)
426 #define ID_PIOD (16)
427 #define ID_TWIHS0 (19)
428 #define ID_TWIHS1 (20)
429 #define ID_SSC (22)
430 #define ID_TC0 (23)
431 #define ID_TC1 (24)
432 #define ID_TC2 (25)
433 #define ID_AFEC0 (29)
434 #define ID_DACC (30)
435 #define ID_PWM0 (31)
436 #define ID_ICM (32)
437 #define ID_ACC (33)
438 #define ID_USBHS (34)
439 #define ID_MCAN0 (35)
440 #define ID_MCAN1 (37)
441 #define ID_GMAC (39)
442 #define ID_AFEC1 (40)
443 #define ID_QSPI (43)
444 #define ID_UART2 (44)
445 #define ID_TC9 (50)
446 #define ID_TC10 (51)
447 #define ID_TC11 (52)
448 #define ID_AES (56)
449 #define ID_TRNG (57)
450 #define ID_XDMAC (58)
451 #define ID_ISI (59)
452 #define ID_PWM1 (60)
453 #define ID_RSWDT (63)
454 #define ID_IXC (68)
456 #define ID_PERIPH_COUNT (74)
458 
459 /* ************************************************************************** */
460 /* BASE ADDRESS DEFINITIONS FOR SAME70J21B */
461 /* ************************************************************************** */
464 
465 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
466 #define SSC (0x40004000U)
467 #define TC0 (0x4000C000U)
468 #define TWIHS0 (0x40018000U)
469 #define TWIHS1 (0x4001C000U)
470 #define PWM0 (0x40020000U)
471 #define USART0 (0x40024000U)
472 #define USART1 (0x40028000U)
473 #define MCAN0 (0x40030000U)
474 #define MCAN1 (0x40034000U)
475 #define USBHS (0x40038000U)
476 #define AFEC0 (0x4003C000U)
477 #define DACC (0x40040000U)
478 #define ACC (0x40044000U)
479 #define ICM (0x40048000U)
480 #define ISI (0x4004C000U)
481 #define GMAC (0x40050000U)
482 #define TC3 (0x40054000U)
483 #define PWM1 (0x4005C000U)
484 #define AFEC1 (0x40064000U)
485 #define AES (0x4006C000U)
486 #define TRNG (0x40070000U)
487 #define XDMAC (0x40078000U)
488 #define QSPI (0x4007C000U)
489 #define MATRIX (0x40088000U)
490 #define UTMI (0x400E0400U)
491 #define PMC (0x400E0600U)
492 #define UART0 (0x400E0800U)
493 #define CHIPID (0x400E0940U)
494 #define UART1 (0x400E0A00U)
495 #define EFC (0x400E0C00U)
496 #define PIOA (0x400E0E00U)
497 #define PIOB (0x400E1000U)
498 #define PIOD (0x400E1400U)
499 #define RSTC (0x400E1800U)
500 #define SUPC (0x400E1810U)
501 #define RTT (0x400E1830U)
502 #define WDT (0x400E1850U)
503 #define RTC (0x400E1860U)
504 #define GPBR (0x400E1890U)
505 #define RSWDT (0x400E1900U)
506 #define UART2 (0x400E1A00U)
507 #else
508 #define SSC ((Ssc *)0x40004000U)
509 #define TC0 ((Tc *)0x4000C000U)
510 #define TWIHS0 ((Twihs *)0x40018000U)
511 #define TWIHS1 ((Twihs *)0x4001C000U)
512 #define PWM0 ((Pwm *)0x40020000U)
513 #define USART0 ((Usart *)0x40024000U)
514 #define USART1 ((Usart *)0x40028000U)
515 #define MCAN0 ((Mcan *)0x40030000U)
516 #define MCAN1 ((Mcan *)0x40034000U)
517 #define USBHS ((Usbhs *)0x40038000U)
518 #define AFEC0 ((Afec *)0x4003C000U)
519 #define DACC ((Dacc *)0x40040000U)
520 #define ACC ((Acc *)0x40044000U)
521 #define ICM ((Icm *)0x40048000U)
522 #define ISI ((Isi *)0x4004C000U)
523 #define GMAC ((Gmac *)0x40050000U)
524 #define TC3 ((Tc *)0x40054000U)
525 #define PWM1 ((Pwm *)0x4005C000U)
526 #define AFEC1 ((Afec *)0x40064000U)
527 #define AES ((Aes *)0x4006C000U)
528 #define TRNG ((Trng *)0x40070000U)
529 #define XDMAC ((Xdmac *)0x40078000U)
530 #define QSPI ((Qspi *)0x4007C000U)
531 #define MATRIX ((Matrix *)0x40088000U)
532 #define UTMI ((Utmi *)0x400E0400U)
533 #define PMC ((Pmc *)0x400E0600U)
534 #define UART0 ((Uart *)0x400E0800U)
535 #define CHIPID ((Chipid *)0x400E0940U)
536 #define UART1 ((Uart *)0x400E0A00U)
537 #define EFC ((Efc *)0x400E0C00U)
538 #define PIOA ((Pio *)0x400E0E00U)
539 #define PIOB ((Pio *)0x400E1000U)
540 #define PIOD ((Pio *)0x400E1400U)
541 #define RSTC ((Rstc *)0x400E1800U)
542 #define SUPC ((Supc *)0x400E1810U)
543 #define RTT ((Rtt *)0x400E1830U)
544 #define WDT ((Wdt *)0x400E1850U)
545 #define RTC ((Rtc *)0x400E1860U)
546 #define GPBR ((Gpbr *)0x400E1890U)
547 #define RSWDT ((Rswdt *)0x400E1900U)
548 #define UART2 ((Uart *)0x400E1A00U)
549 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
550 
552 /* ************************************************************************** */
553 /* PIO DEFINITIONS FOR SAME70J21B */
554 /* ************************************************************************** */
557 
558 #include "pio/same70j21b.h"
561 /* ************************************************************************** */
562 /* MEMORY MAPPING DEFINITIONS FOR SAME70J21B */
563 /* ************************************************************************** */
564 
565 #define IFLASH_SIZE (0x200000u)
566 #define IFLASH_PAGE_SIZE (512u)
567 #define IFLASH_LOCK_REGION_SIZE (8192u)
568 #define IFLASH_NB_OF_PAGES (4096u)
569 #define IFLASH_NB_OF_LOCK_BITS (128u)
570 #define IRAM_SIZE (0x60000u)
571 
572 #define QSPIMEM_ADDR (0x80000000u)
573 #define AXIMX_ADDR (0xA0000000u)
574 #define ITCM_ADDR (0x00000000u)
575 #define IFLASH_ADDR (0x00400000u)
576 #define IROM_ADDR (0x00800000u)
577 #define DTCM_ADDR (0x20000000u)
578 #define IRAM_ADDR (0x20400000u)
579 #define EBI_CS0_ADDR (0x60000000u)
580 #define EBI_CS1_ADDR (0x61000000u)
581 #define EBI_CS2_ADDR (0x62000000u)
582 #define EBI_CS3_ADDR (0x63000000u)
583 #define SDRAM_CS_ADDR (0x70000000u)
585 /* ************************************************************************** */
586 /* MISCELLANEOUS DEFINITIONS FOR SAME70J21B */
587 /* ************************************************************************** */
588 
589 #define CHIP_JTAGID (0x05B3D03FUL)
590 #define CHIP_CIDR (0xA1020E01UL)
591 #define CHIP_EXID (0x00000000UL)
592 
593 /* ************************************************************************** */
594 /* ELECTRICAL DEFINITIONS FOR SAME70J21B */
595 /* ************************************************************************** */
596 
597 /* %ATMEL_ELECTRICAL% */
598 
599 /* Device characteristics */
600 #define CHIP_FREQ_SLCK_RC_MIN (20000UL)
601 #define CHIP_FREQ_SLCK_RC (32000UL)
602 #define CHIP_FREQ_SLCK_RC_MAX (44000UL)
603 #define CHIP_FREQ_MAINCK_RC_4MHZ (4000000UL)
604 #define CHIP_FREQ_MAINCK_RC_8MHZ (8000000UL)
605 #define CHIP_FREQ_MAINCK_RC_12MHZ (12000000UL)
606 #define CHIP_FREQ_CPU_MAX (300000000UL)
607 #define CHIP_FREQ_XTAL_32K (32768UL)
608 #define CHIP_FREQ_XTAL_12M (12000000UL)
609 
610 /* Embedded Flash Read Wait State (for Worst-Case Conditions) */
611 #define CHIP_FREQ_FWS_0 (23000000UL)
612 #define CHIP_FREQ_FWS_1 (46000000UL)
613 #define CHIP_FREQ_FWS_2 (69000000UL)
614 #define CHIP_FREQ_FWS_3 (92000000UL)
615 #define CHIP_FREQ_FWS_4 (115000000UL)
616 #define CHIP_FREQ_FWS_5 (138000000UL)
617 #define CHIP_FREQ_FWS_6 (150000000UL)
619 #ifdef __cplusplus
620 }
621 #endif
622 
625 #endif /* _SAME70J21B_ */
SysTick_IRQn
Definition: same70j21b.h:73
_DeviceVectors::pvReserved62
void * pvReserved62
Definition: same70j19.h:212
_DeviceVectors::pfnAFEC1_Handler
void * pfnAFEC1_Handler
Definition: same70j19.h:190
RTC_Handler
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Definition: same70j21b.h:80
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Definition: same70j19.h:208
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Definition: same70j21b.h:83
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Definition: same70j21b.h:116
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Definition: same70j19.h:210
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Definition: same70j21b.h:110
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void HardFault_Handler(void)
Definition: rtos.c:248
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Definition: same70j21b.h:118
_DeviceVectors::pfnBusFault_Handler
void * pfnBusFault_Handler
Definition: same70j19.h:137
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Definition: same70j19.h:170
GMAC_Q1_IRQn
Definition: same70j21b.h:120
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void * pvReserved55
Definition: same70j19.h:205
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void * pfnPIOB_Handler
Definition: same70j19.h:161
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Definition: same70j21b.h:123
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void EFC_Handler(void)
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Definition: same70j19b.h:226
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Definition: same70j21b.h:101
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Definition: same70j19.h:179
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void * pvReserved45
Definition: same70j19.h:195
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Definition: same70j19.h:202
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void DACC_Handler(void)
IRQn_Type
enum IRQn IRQn_Type
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Definition: same70j21b.h:88
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QSPI_Handler
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NMI_Handler
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Definition: same70j21b.h:95
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Definition: same70j21b.h:68
TWIHS0_IRQn
Definition: same70j21b.h:90
PIOA_Handler
void PIOA_Handler(void)
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Definition: same70j19.h:194
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Definition: d_usartDMA.c:1647
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Definition: same70j19.h:172
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Definition: same70j21b.h:102
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Definition: d_time.c:22
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Definition: same70j19.h:209
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Definition: same70j21b.h:92
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Definition: d_usartDMA.c:1643
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Definition: same70j21b.h:65
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Definition: same70j19.h:135
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void SSC_Handler(void)
_DeviceVectors::pfnSVC_Handler
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Definition: same70j19.h:143
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void TWIHS0_Handler(void)
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Definition: same70j21b.h:84
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Definition: same70j19b.h:224
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Definition: same70j21b.h:69
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Definition: same70j19.h:130
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Definition: same70j19.h:213
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Definition: same70j21b.h:82
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Definition: same70j19.h:184
QSPI_IRQn
Definition: same70j21b.h:106
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Definition: same70j21b.h:89
system_same70.h
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Definition: same70j21b.h:103
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Definition: same70j19.h:215
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Definition: d_usartDMA.c:1642
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void * pvReserved48
Definition: same70j19.h:198
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Definition: same70j19.h:163
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void CCW_Handler(void)
UsageFault_Handler
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Definition: rtos.c:226
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Definition: same70j19.h:181
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void TC2_Handler(void)
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Definition: same70j19.h:189
PWM1_IRQn
Definition: same70j21b.h:115
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Definition: same70j19.h:159
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Definition: same70j21b.h:66
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void SysTick_Handler(void)
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Definition: same70j19.h:136
PendSV_IRQn
Definition: same70j21b.h:72
TC9_IRQn
Definition: same70j21b.h:108
PIOA_IRQn
Definition: same70j21b.h:85
RTC_IRQn
Definition: same70j21b.h:78
DebugMonitor_IRQn
Definition: same70j21b.h:71
TC1_Handler
void TC1_Handler(void)
_DeviceVectors::pfnDebugMon_Handler
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Definition: same70j19.h:144
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Definition: d_usartDMA.c:1646
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void * pvReserved26
Definition: same70j19.h:176
SVCall_IRQn
Definition: same70j21b.h:70
GMAC_Q3_Handler
void GMAC_Q3_Handler(void)
_DeviceVectors::pfnPIOD_Handler
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Definition: same70j19.h:166
AFEC1_IRQn
Definition: same70j21b.h:105
TC0_IRQn
Definition: same70j21b.h:93
_DeviceVectors::pfnGMAC_Q4_Handler
void * pfnGMAC_Q4_Handler
Definition: same70j19b.h:225
_DeviceVectors::pfnTC2_Handler
void * pfnTC2_Handler
Definition: same70j19.h:175
BusFault_Handler
void BusFault_Handler(void)
Definition: rtos.c:211
TC1_IRQn
Definition: same70j21b.h:94
core_cm7.h
CMSIS Cortex-M7 Core Peripheral Access Layer Header File.
_DeviceVectors::pfnReset_Handler
void * pfnReset_Handler
Definition: same70j19.h:133
_DeviceVectors::pvReserved42
void * pvReserved42
Definition: same70j19.h:192
_DeviceVectors::pvReserved21
void * pvReserved21
Definition: same70j19.h:171
_DeviceVectors::pfnUART1_Handler
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Definition: same70j19.h:158
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SUPC_Handler
void SUPC_Handler(void)
_DeviceVectors::pfnSysTick_Handler
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Definition: same70j19.h:147
_DeviceVectors::pfnACC_Handler
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Definition: same70j19.h:183
_DeviceVectors::pfnWDT_Handler
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Definition: same70j19.h:154
USART0_IRQn
Definition: same70j21b.h:87
_DeviceVectors::pfnICM_Handler
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Definition: same70j19.h:182
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Definition: same70j21b.h:77
MCAN0_INT1_Handler
void MCAN0_INT1_Handler(void)
_DeviceVectors::pfnCCW_Handler
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Definition: same70j19.h:214
RSWDT_IRQn
Definition: same70j21b.h:117
TWIHS1_IRQn
Definition: same70j21b.h:91
MemManage_Handler
void MemManage_Handler(void)
Definition: rtos.c:196
_DeviceVectors::pfnFPU_Handler
void * pfnFPU_Handler
Definition: same70j19.h:211
_DeviceVectors
Definition: same70j19.h:127
_DeviceVectors::pfnIXC_Handler
void * pfnIXC_Handler
Definition: same70j19.h:218
_DeviceVectors::pfnReserved2_Handler
void * pfnReserved2_Handler
Definition: same70j19.h:140
UART0_Handler
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Definition: d_usartDMA.c:1641
ACC_Handler
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PIOB_IRQn
Definition: same70j21b.h:86
TRNG_Handler
void TRNG_Handler(void)
_DeviceVectors::pfnReserved4_Handler
void * pfnReserved4_Handler
Definition: same70j19.h:142
_DeviceVectors::pvReserved47
void * pvReserved47
Definition: same70j19.h:197
UART2_IRQn
Definition: same70j21b.h:107
_DeviceVectors::pfnRTT_Handler
void * pfnRTT_Handler
Definition: same70j19.h:153
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Definition: same70j21b.h:124
FPU_Handler
void FPU_Handler(void)
GMAC_Q4_Handler
void GMAC_Q4_Handler(void)
AFEC0_Handler
void AFEC0_Handler(void)
XDMAC_Handler
void XDMAC_Handler(void)
Definition: d_usartDMA.c:704
_DeviceVectors::pfnUSART1_Handler
void * pfnUSART1_Handler
Definition: same70j19.h:164
ISI_IRQn
Definition: same70j21b.h:114
AES_IRQn
Definition: same70j21b.h:111
CCF_IRQn
Definition: same70j21b.h:119
_DeviceVectors::pfnAES_Handler
void * pfnAES_Handler
Definition: same70j19.h:206
PWM0_Handler
void PWM0_Handler(void)
_DeviceVectors::pvReserved27
void * pvReserved27
Definition: same70j19.h:177
TC10_IRQn
Definition: same70j21b.h:109
AFEC1_Handler
void AFEC1_Handler(void)
AFEC0_IRQn
Definition: same70j21b.h:96
PIOB_Handler
void PIOB_Handler(void)
_DeviceVectors::pfnPendSV_Handler
void * pfnPendSV_Handler
Definition: same70j19.h:146
_DeviceVectors::pvReserved69
void * pvReserved69
Definition: same70j19.h:219
_DeviceVectors::pvReserved54
void * pvReserved54
Definition: same70j19.h:204
_DeviceVectors::pvReserved53
void * pvReserved53
Definition: same70j19.h:203
SUPC_IRQn
Definition: same70j21b.h:76
_DeviceVectors::pfnTC0_Handler
void * pfnTC0_Handler
Definition: same70j19.h:173
_DeviceVectors::pvReserved18
void * pvReserved18
Definition: same70j19.h:168
GMAC_Q5_Handler
void GMAC_Q5_Handler(void)
_DeviceVectors::pfnTWIHS0_Handler
void * pfnTWIHS0_Handler
Definition: same70j19.h:169
ISI_Handler
void ISI_Handler(void)
SVC_Handler
void SVC_Handler(void)
_DeviceVectors::pfnGMAC_Q1_Handler
void * pfnGMAC_Q1_Handler
Definition: same70j19.h:216
_DeviceVectors::pfnDACC_Handler
void * pfnDACC_Handler
Definition: same70j19.h:180
_DeviceVectors::pfnUART0_Handler
void * pfnUART0_Handler
Definition: same70j19.h:157
_DeviceVectors::pfnNMI_Handler
void * pfnNMI_Handler
Definition: same70j19.h:134
_DeviceVectors::pfnTC9_Handler
void * pfnTC9_Handler
Definition: same70j19.h:200
RSTC_Handler
void RSTC_Handler(void)
CCF_Handler
void CCF_Handler(void)
_DeviceVectors::pfnUsageFault_Handler
void * pfnUsageFault_Handler
Definition: same70j19.h:138
PIOD_Handler
void PIOD_Handler(void)
ICM_Handler
void ICM_Handler(void)
_DeviceVectors::pvReserved41
void * pvReserved41
Definition: same70j19.h:191
_DeviceVectors::pfnTC10_Handler
void * pfnTC10_Handler
Definition: same70j19.h:201
TC11_Handler
void TC11_Handler(void)
TWIHS1_Handler
void TWIHS1_Handler(void)
ICM_IRQn
Definition: same70j21b.h:99
IXC_Handler
void IXC_Handler(void)
ACC_IRQn
Definition: same70j21b.h:100
_DeviceVectors::pfnPIOA_Handler
void * pfnPIOA_Handler
Definition: same70j19.h:160
IRQn
IRQn
Definition: same70j19.h:62
_DeviceVectors::pfnEFC_Handler
void * pfnEFC_Handler
Definition: same70j19.h:156
_DeviceVectors::pfnTRNG_Handler
void * pfnTRNG_Handler
Definition: same70j19.h:207
TC9_Handler
void TC9_Handler(void)
_DeviceVectors::pvReserved46
void * pvReserved46
Definition: same70j19.h:196
GMAC_Q2_IRQn
Definition: same70j21b.h:121
_DeviceVectors::pvReserved38
void * pvReserved38
Definition: same70j19.h:188
_DeviceVectors::pvReserved17
void * pvReserved17
Definition: same70j19.h:167
MCAN0_INT0_Handler
void MCAN0_INT0_Handler(void)
_DeviceVectors::pfnGMAC_Q2_Handler
void * pfnGMAC_Q2_Handler
Definition: same70j19.h:217
_DeviceVectors::pfnMCAN0_INT0_Handler
void * pfnMCAN0_INT0_Handler
Definition: same70j19.h:185
PWM0_IRQn
Definition: same70j21b.h:98
MemoryManagement_IRQn
Definition: same70j21b.h:67
GMAC_IRQn
Definition: same70j21b.h:104
USBHS_Handler
void USBHS_Handler(void)
Definition: USBD_HAL.c:1008
_DeviceVectors::pfnMCAN0_INT1_Handler
void * pfnMCAN0_INT1_Handler
Definition: same70j19.h:186
DeviceVectors
struct _DeviceVectors DeviceVectors
_DeviceVectors::pfnRTC_Handler
void * pfnRTC_Handler
Definition: same70j19.h:152
WDT_Handler
void WDT_Handler(void)
GMAC_Q5_IRQn
Definition: same70j21b.h:125
PWM1_Handler
void PWM1_Handler(void)
_DeviceVectors::pfnReserved3_Handler
void * pfnReserved3_Handler
Definition: same70j19.h:141
TRNG_IRQn
Definition: same70j21b.h:112
_DeviceVectors::pvReserved15
void * pvReserved15
Definition: same70j19.h:165
_DeviceVectors::pfnReserved5_Handler
void * pfnReserved5_Handler
Definition: same70j19.h:145
_DeviceVectors::pvReserved49
void * pvReserved49
Definition: same70j19.h:199
_DeviceVectors::pfnTC1_Handler
void * pfnTC1_Handler
Definition: same70j19.h:174
GMAC_Q2_Handler
void GMAC_Q2_Handler(void)
PERIPH_COUNT_IRQn
Definition: same70j21b.h:127
_DeviceVectors::pvReserved70
void * pvReserved70
Definition: same70j19.h:220
_DeviceVectors::pvReserved12
void * pvReserved12
Definition: same70j19.h:162
Reset_Handler
void Reset_Handler(void)
This is the code that gets called on processor reset. To initialize the device, and call the main() r...
Definition: startup_same70.c:388
XDMAC_IRQn
Definition: same70j21b.h:113
RTT_IRQn
Definition: same70j21b.h:79
_DeviceVectors::pfnPMC_Handler
void * pfnPMC_Handler
Definition: same70j19.h:155
GMAC_Q1_Handler
void GMAC_Q1_Handler(void)
_DeviceVectors::pfnQSPI_Handler
void * pfnQSPI_Handler
Definition: same70j19.h:193
_DeviceVectors::pfnRSTC_Handler
void * pfnRSTC_Handler
Definition: same70j19.h:151
_DeviceVectors::pfnSUPC_Handler
void * pfnSUPC_Handler
Definition: same70j19.h:150
_DeviceVectors::pfnReserved1_Handler
void * pfnReserved1_Handler
Definition: same70j19.h:139
usbhs.h
IXC_IRQn
Definition: same70j21b.h:122
PendSV_Handler
void PendSV_Handler(void)
PMC_IRQn
Definition: same70j21b.h:81
_DeviceVectors::pvReserved37
void * pvReserved37
Definition: same70j19.h:187
_DeviceVectors::pvReserved28
void * pvReserved28
Definition: same70j19.h:178
DACC_IRQn
Definition: same70j21b.h:97

inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:05