Macros
Peripheral Base Address Definitions
Collaboration diagram for Peripheral Base Address Definitions:

Macros

#define ACC   ((Acc *)0x40044000U)
 (ACC ) Base Address More...
 
#define AES   ((Aes *)0x4006C000U)
 (AES ) Base Address More...
 
#define AFEC0   ((Afec *)0x4003C000U)
 (AFEC0 ) Base Address More...
 
#define AFEC1   ((Afec *)0x40064000U)
 (AFEC1 ) Base Address More...
 
#define CHIPID   ((Chipid *)0x400E0940U)
 (CHIPID) Base Address More...
 
#define DACC   ((Dacc *)0x40040000U)
 (DACC ) Base Address More...
 
#define EFC   ((Efc *)0x400E0C00U)
 (EFC ) Base Address More...
 
#define GMAC   ((Gmac *)0x40050000U)
 (GMAC ) Base Address More...
 
#define GPBR   ((Gpbr *)0x400E1890U)
 (GPBR ) Base Address More...
 
#define ICM   ((Icm *)0x40048000U)
 (ICM ) Base Address More...
 
#define ISI   ((Isi *)0x4004C000U)
 (ISI ) Base Address More...
 
#define MATRIX   ((Matrix *)0x40088000U)
 (MATRIX) Base Address More...
 
#define MCAN0   ((Mcan *)0x40030000U)
 (MCAN0 ) Base Address More...
 
#define PIOA   ((Pio *)0x400E0E00U)
 (PIOA ) Base Address More...
 
#define PIOB   ((Pio *)0x400E1000U)
 (PIOB ) Base Address More...
 
#define PIOD   ((Pio *)0x400E1400U)
 (PIOD ) Base Address More...
 
#define PMC   ((Pmc *)0x400E0600U)
 (PMC ) Base Address More...
 
#define PWM0   ((Pwm *)0x40020000U)
 (PWM0 ) Base Address More...
 
#define PWM1   ((Pwm *)0x4005C000U)
 (PWM1 ) Base Address More...
 
#define QSPI   ((Qspi *)0x4007C000U)
 (QSPI ) Base Address More...
 
#define RSTC   ((Rstc *)0x400E1800U)
 (RSTC ) Base Address More...
 
#define RSWDT   ((Rswdt *)0x400E1900U)
 (RSWDT ) Base Address More...
 
#define RTC   ((Rtc *)0x400E1860U)
 (RTC ) Base Address More...
 
#define RTT   ((Rtt *)0x400E1830U)
 (RTT ) Base Address More...
 
#define SSC   ((Ssc *)0x40004000U)
 (SSC ) Base Address More...
 
#define SUPC   ((Supc *)0x400E1810U)
 (SUPC ) Base Address More...
 
#define TC0   ((Tc *)0x4000C000U)
 (TC0 ) Base Address More...
 
#define TC3   ((Tc *)0x40054000U)
 (TC3 ) Base Address More...
 
#define TRNG   ((Trng *)0x40070000U)
 (TRNG ) Base Address More...
 
#define TWIHS0   ((Twihs *)0x40018000U)
 (TWIHS0) Base Address More...
 
#define TWIHS1   ((Twihs *)0x4001C000U)
 (TWIHS1) Base Address More...
 
#define UART0   ((Uart *)0x400E0800U)
 (UART0 ) Base Address More...
 
#define UART1   ((Uart *)0x400E0A00U)
 (UART1 ) Base Address More...
 
#define UART2   ((Uart *)0x400E1A00U)
 (UART2 ) Base Address More...
 
#define USART0   ((Usart *)0x40024000U)
 (USART0) Base Address More...
 
#define USART1   ((Usart *)0x40028000U)
 (USART1) Base Address More...
 
#define USBHS   ((Usbhs *)0x40038000U)
 (USBHS ) Base Address More...
 
#define UTMI   ((Utmi *)0x400E0400U)
 (UTMI ) Base Address More...
 
#define WDT   ((Wdt *)0x400E1850U)
 (WDT ) Base Address More...
 
#define XDMAC   ((Xdmac *)0x40078000U)
 (XDMAC ) Base Address More...
 

Detailed Description

Macro Definition Documentation

◆ ACC

#define ACC   ((Acc *)0x40044000U)

(ACC ) Base Address

Definition at line 511 of file same70j19.h.

◆ AES

#define AES   ((Aes *)0x4006C000U)

(AES ) Base Address

Definition at line 518 of file same70j19.h.

◆ AFEC0

#define AFEC0   ((Afec *)0x4003C000U)

(AFEC0 ) Base Address

Definition at line 509 of file same70j19.h.

◆ AFEC1

#define AFEC1   ((Afec *)0x40064000U)

(AFEC1 ) Base Address

Definition at line 517 of file same70j19.h.

◆ CHIPID

#define CHIPID   ((Chipid *)0x400E0940U)

(CHIPID) Base Address

Definition at line 526 of file same70j19.h.

◆ DACC

#define DACC   ((Dacc *)0x40040000U)

(DACC ) Base Address

Definition at line 510 of file same70j19.h.

◆ EFC

#define EFC   ((Efc *)0x400E0C00U)

(EFC ) Base Address

Definition at line 528 of file same70j19.h.

◆ GMAC

#define GMAC   ((Gmac *)0x40050000U)

(GMAC ) Base Address

Definition at line 514 of file same70j19.h.

◆ GPBR

#define GPBR   ((Gpbr *)0x400E1890U)

(GPBR ) Base Address

Definition at line 537 of file same70j19.h.

◆ ICM

#define ICM   ((Icm *)0x40048000U)

(ICM ) Base Address

Definition at line 512 of file same70j19.h.

◆ ISI

#define ISI   ((Isi *)0x4004C000U)

(ISI ) Base Address

Definition at line 513 of file same70j19.h.

◆ MATRIX

#define MATRIX   ((Matrix *)0x40088000U)

(MATRIX) Base Address

Definition at line 522 of file same70j19.h.

◆ MCAN0

#define MCAN0   ((Mcan *)0x40030000U)

(MCAN0 ) Base Address

Definition at line 507 of file same70j19.h.

◆ PIOA

#define PIOA   ((Pio *)0x400E0E00U)

(PIOA ) Base Address

Definition at line 529 of file same70j19.h.

◆ PIOB

#define PIOB   ((Pio *)0x400E1000U)

(PIOB ) Base Address

Definition at line 530 of file same70j19.h.

◆ PIOD

#define PIOD   ((Pio *)0x400E1400U)

(PIOD ) Base Address

Definition at line 531 of file same70j19.h.

◆ PMC

#define PMC   ((Pmc *)0x400E0600U)

(PMC ) Base Address

Definition at line 524 of file same70j19.h.

◆ PWM0

#define PWM0   ((Pwm *)0x40020000U)

(PWM0 ) Base Address

Definition at line 504 of file same70j19.h.

◆ PWM1

#define PWM1   ((Pwm *)0x4005C000U)

(PWM1 ) Base Address

Definition at line 516 of file same70j19.h.

◆ QSPI

#define QSPI   ((Qspi *)0x4007C000U)

(QSPI ) Base Address

Definition at line 521 of file same70j19.h.

◆ RSTC

#define RSTC   ((Rstc *)0x400E1800U)

(RSTC ) Base Address

Definition at line 532 of file same70j19.h.

◆ RSWDT

#define RSWDT   ((Rswdt *)0x400E1900U)

(RSWDT ) Base Address

Definition at line 538 of file same70j19.h.

◆ RTC

#define RTC   ((Rtc *)0x400E1860U)

(RTC ) Base Address

Definition at line 536 of file same70j19.h.

◆ RTT

#define RTT   ((Rtt *)0x400E1830U)

(RTT ) Base Address

Definition at line 534 of file same70j19.h.

◆ SSC

#define SSC   ((Ssc *)0x40004000U)

(SSC ) Base Address

Definition at line 500 of file same70j19.h.

◆ SUPC

#define SUPC   ((Supc *)0x400E1810U)

(SUPC ) Base Address

Definition at line 533 of file same70j19.h.

◆ TC0

#define TC0   ((Tc *)0x4000C000U)

(TC0 ) Base Address

Definition at line 501 of file same70j19.h.

◆ TC3

#define TC3   ((Tc *)0x40054000U)

(TC3 ) Base Address

Definition at line 515 of file same70j19.h.

◆ TRNG

#define TRNG   ((Trng *)0x40070000U)

(TRNG ) Base Address

Definition at line 519 of file same70j19.h.

◆ TWIHS0

#define TWIHS0   ((Twihs *)0x40018000U)

(TWIHS0) Base Address

Definition at line 502 of file same70j19.h.

◆ TWIHS1

#define TWIHS1   ((Twihs *)0x4001C000U)

(TWIHS1) Base Address

Definition at line 503 of file same70j19.h.

◆ UART0

#define UART0   ((Uart *)0x400E0800U)

(UART0 ) Base Address

Definition at line 525 of file same70j19.h.

◆ UART1

#define UART1   ((Uart *)0x400E0A00U)

(UART1 ) Base Address

Definition at line 527 of file same70j19.h.

◆ UART2

#define UART2   ((Uart *)0x400E1A00U)

(UART2 ) Base Address

Definition at line 539 of file same70j19.h.

◆ USART0

#define USART0   ((Usart *)0x40024000U)

(USART0) Base Address

Definition at line 505 of file same70j19.h.

◆ USART1

#define USART1   ((Usart *)0x40028000U)

(USART1) Base Address

Definition at line 506 of file same70j19.h.

◆ USBHS

#define USBHS   ((Usbhs *)0x40038000U)

(USBHS ) Base Address

Definition at line 508 of file same70j19.h.

◆ UTMI

#define UTMI   ((Utmi *)0x400E0400U)

(UTMI ) Base Address

Definition at line 523 of file same70j19.h.

◆ WDT

#define WDT   ((Wdt *)0x400E1850U)

(WDT ) Base Address

Definition at line 535 of file same70j19.h.

◆ XDMAC

#define XDMAC   ((Xdmac *)0x40078000U)

(XDMAC ) Base Address

Definition at line 520 of file same70j19.h.



inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:18:02