Tc Struct Reference

#include <tc.h>

Public Attributes
__I uint32_t	Reserved1 [2]
__I uint32_t	Reserved2 [5]
__O uint32_t	TC_BCR
	(Tc Offset: 0xC0) Block Control Register More...
__IO uint32_t	TC_BMR
	(Tc Offset: 0xC4) Block Mode Register More...
TcChannel	TC_CHANNEL [TCCHANNEL_NUMBER]
	(Tc Offset: 0x0) channel = 0 .. 2 More...
__IO uint32_t	TC_FMR
	(Tc Offset: 0xD8) Fault Mode Register More...
__O uint32_t	TC_QIDR
	(Tc Offset: 0xCC) QDEC Interrupt Disable Register More...
__O uint32_t	TC_QIER
	(Tc Offset: 0xC8) QDEC Interrupt Enable Register More...
__I uint32_t	TC_QIMR
	(Tc Offset: 0xD0) QDEC Interrupt Mask Register More...
__I uint32_t	TC_QISR
	(Tc Offset: 0xD4) QDEC Interrupt Status Register More...
__I uint32_t	TC_VER
	(Tc Offset: 0xFC) Version Register More...
__IO uint32_t	TC_WPMR
	(Tc Offset: 0xE4) Write Protection Mode Register More...

Detailed Description

Definition at line 64 of file utils/cmsis/same70/include/component/tc.h.

Member Data Documentation

Reserved1

__I uint32_t Tc::Reserved1[2]

Definition at line 73 of file utils/cmsis/same70/include/component/tc.h.

Reserved2

__I uint32_t Tc::Reserved2[5]

Definition at line 75 of file utils/cmsis/same70/include/component/tc.h.

TC_BCR

__O uint32_t Tc::TC_BCR

(Tc Offset: 0xC0) Block Control Register

Definition at line 66 of file utils/cmsis/same70/include/component/tc.h.

TC_BMR

__IO uint32_t Tc::TC_BMR

(Tc Offset: 0xC4) Block Mode Register

Definition at line 67 of file utils/cmsis/same70/include/component/tc.h.

TC_CHANNEL

TcChannel Tc::TC_CHANNEL[TCCHANNEL_NUMBER]

(Tc Offset: 0x0) channel = 0 .. 2

Definition at line 65 of file utils/cmsis/same70/include/component/tc.h.

TC_FMR

__IO uint32_t Tc::TC_FMR

(Tc Offset: 0xD8) Fault Mode Register

Definition at line 72 of file utils/cmsis/same70/include/component/tc.h.

TC_QIDR

__O uint32_t Tc::TC_QIDR

(Tc Offset: 0xCC) QDEC Interrupt Disable Register

Definition at line 69 of file utils/cmsis/same70/include/component/tc.h.

TC_QIER

__O uint32_t Tc::TC_QIER

(Tc Offset: 0xC8) QDEC Interrupt Enable Register

Definition at line 68 of file utils/cmsis/same70/include/component/tc.h.

TC_QIMR

__I uint32_t Tc::TC_QIMR

(Tc Offset: 0xD0) QDEC Interrupt Mask Register

Definition at line 70 of file utils/cmsis/same70/include/component/tc.h.

TC_QISR

__I uint32_t Tc::TC_QISR

(Tc Offset: 0xD4) QDEC Interrupt Status Register

Definition at line 71 of file utils/cmsis/same70/include/component/tc.h.

TC_VER

__I uint32_t Tc::TC_VER

(Tc Offset: 0xFC) Version Register

Definition at line 76 of file utils/cmsis/same70/include/component/tc.h.

TC_WPMR

__IO uint32_t Tc::TC_WPMR

(Tc Offset: 0xE4) Write Protection Mode Register

Definition at line 74 of file utils/cmsis/same70/include/component/tc.h.

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The documentation for this struct was generated from the following file:

• utils/cmsis/same70/include/component/tc.h