Pio hardware registers. More...
#include <pio.h>
Public Attributes | |
| __IO uint32_t | PIO_ABCDSR [2] |
| (Pio Offset: 0x0070) Peripheral Select Register More... | |
| __O uint32_t | PIO_AIMDR |
| (Pio Offset: 0x00B4) Additional Interrupt Modes Disable Register More... | |
| __O uint32_t | PIO_AIMER |
| (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register More... | |
| __I uint32_t | PIO_AIMMR |
| (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register More... | |
| __O uint32_t | PIO_CODR |
| (Pio Offset: 0x0034) Clear Output Data Register More... | |
| __IO uint32_t | PIO_DRIVER |
| (Pio Offset: 0x0118) I/O Drive Register More... | |
| __I uint32_t | PIO_ELSR |
| (Pio Offset: 0x00C8) Edge/Level Status Register More... | |
| __O uint32_t | PIO_ESR |
| (Pio Offset: 0x00C0) Edge Select Register More... | |
| __O uint32_t | PIO_FELLSR |
| (Pio Offset: 0x00D0) Falling Edge/Low-Level Select Register More... | |
| __I uint32_t | PIO_FRLHSR |
| (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register More... | |
| __O uint32_t | PIO_IDR |
| (Pio Offset: 0x0044) Interrupt Disable Register More... | |
| __O uint32_t | PIO_IER |
| (Pio Offset: 0x0040) Interrupt Enable Register More... | |
| __O uint32_t | PIO_IFDR |
| (Pio Offset: 0x0024) Glitch Input Filter Disable Register More... | |
| __O uint32_t | PIO_IFER |
| (Pio Offset: 0x0020) Glitch Input Filter Enable Register More... | |
| __O uint32_t | PIO_IFSCDR |
| (Pio Offset: 0x0080) Input Filter Slow Clock Disable Register More... | |
| __O uint32_t | PIO_IFSCER |
| (Pio Offset: 0x0084) Input Filter Slow Clock Enable Register More... | |
| __I uint32_t | PIO_IFSCSR |
| (Pio Offset: 0x0088) Input Filter Slow Clock Status Register More... | |
| __I uint32_t | PIO_IFSR |
| (Pio Offset: 0x0028) Glitch Input Filter Status Register More... | |
| __I uint32_t | PIO_IMR |
| (Pio Offset: 0x0048) Interrupt Mask Register More... | |
| __I uint32_t | PIO_ISR |
| (Pio Offset: 0x004C) Interrupt Status Register More... | |
| __I uint32_t | PIO_LOCKSR |
| (Pio Offset: 0x00E0) Lock Status More... | |
| __O uint32_t | PIO_LSR |
| (Pio Offset: 0x00C4) Level Select Register More... | |
| __O uint32_t | PIO_MDDR |
| (Pio Offset: 0x0054) Multi-driver Disable Register More... | |
| __O uint32_t | PIO_MDER |
| (Pio Offset: 0x0050) Multi-driver Enable Register More... | |
| __I uint32_t | PIO_MDSR |
| (Pio Offset: 0x0058) Multi-driver Status Register More... | |
| __O uint32_t | PIO_ODR |
| (Pio Offset: 0x0014) Output Disable Register More... | |
| __IO uint32_t | PIO_ODSR |
| (Pio Offset: 0x0038) Output Data Status Register More... | |
| __O uint32_t | PIO_OER |
| (Pio Offset: 0x0010) Output Enable Register More... | |
| __I uint32_t | PIO_OSR |
| (Pio Offset: 0x0018) Output Status Register More... | |
| __O uint32_t | PIO_OWDR |
| (Pio Offset: 0x00A4) Output Write Disable More... | |
| __O uint32_t | PIO_OWER |
| (Pio Offset: 0x00A0) Output Write Enable More... | |
| __I uint32_t | PIO_OWSR |
| (Pio Offset: 0x00A8) Output Write Status Register More... | |
| __O uint32_t | PIO_PCIDR |
| (Pio Offset: 0x0158) Parallel Capture Interrupt Disable Register More... | |
| __O uint32_t | PIO_PCIER |
| (Pio Offset: 0x0154) Parallel Capture Interrupt Enable Register More... | |
| __I uint32_t | PIO_PCIMR |
| (Pio Offset: 0x015C) Parallel Capture Interrupt Mask Register More... | |
| __I uint32_t | PIO_PCISR |
| (Pio Offset: 0x0160) Parallel Capture Interrupt Status Register More... | |
| __IO uint32_t | PIO_PCMR |
| (Pio Offset: 0x0150) Parallel Capture Mode Register More... | |
| __I uint32_t | PIO_PCRHR |
| (Pio Offset: 0x0164) Parallel Capture Reception Holding Register More... | |
| __O uint32_t | PIO_PDR |
| (Pio Offset: 0x0004) PIO Disable Register More... | |
| __I uint32_t | PIO_PDSR |
| (Pio Offset: 0x003C) Pin Data Status Register More... | |
| __O uint32_t | PIO_PER |
| (Pio Offset: 0x0000) PIO Enable Register More... | |
| __O uint32_t | PIO_PPDDR |
| (Pio Offset: 0x0090) Pad Pull-down Disable Register More... | |
| __O uint32_t | PIO_PPDER |
| (Pio Offset: 0x0094) Pad Pull-down Enable Register More... | |
| __I uint32_t | PIO_PPDSR |
| (Pio Offset: 0x0098) Pad Pull-down Status Register More... | |
| __I uint32_t | PIO_PSR |
| (Pio Offset: 0x0008) PIO Status Register More... | |
| __O uint32_t | PIO_PUDR |
| (Pio Offset: 0x0060) Pull-up Disable Register More... | |
| __O uint32_t | PIO_PUER |
| (Pio Offset: 0x0064) Pull-up Enable Register More... | |
| __I uint32_t | PIO_PUSR |
| (Pio Offset: 0x0068) Pad Pull-up Status Register More... | |
| __O uint32_t | PIO_REHLSR |
| (Pio Offset: 0x00D4) Rising Edge/High-Level Select Register More... | |
| __IO uint32_t | PIO_SCDR |
| (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register More... | |
| __IO uint32_t | PIO_SCHMITT |
| (Pio Offset: 0x0100) Schmitt Trigger Register More... | |
| __O uint32_t | PIO_SODR |
| (Pio Offset: 0x0030) Set Output Data Register More... | |
| __I uint32_t | PIO_VERSION |
| (Pio Offset: 0x00FC) Version Register More... | |
| __IO uint32_t | PIO_WPMR |
| (Pio Offset: 0x00E4) Write Protection Mode Register More... | |
| __I uint32_t | PIO_WPSR |
| (Pio Offset: 0x00E8) Write Protection Status Register More... | |
| __I uint32_t | Reserved1 [1] |
| __I uint32_t | Reserved10 [1] |
| __I uint32_t | Reserved11 [1] |
| __I uint32_t | Reserved12 [4] |
| __I uint32_t | Reserved13 [5] |
| __I uint32_t | Reserved14 [13] |
| __I uint32_t | Reserved2 [1] |
| __I uint32_t | Reserved3 [1] |
| __I uint32_t | Reserved4 [1] |
| __I uint32_t | Reserved5 [1] |
| __I uint32_t | Reserved6 [2] |
| __I uint32_t | Reserved7 [1] |
| __I uint32_t | Reserved8 [1] |
| __I uint32_t | Reserved9 [1] |
Pio hardware registers.
Definition at line 46 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_ABCDSR[2] |
(Pio Offset: 0x0070) Peripheral Select Register
Definition at line 75 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_AIMDR |
(Pio Offset: 0x00B4) Additional Interrupt Modes Disable Register
Definition at line 90 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_AIMER |
(Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register
Definition at line 89 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_AIMMR |
(Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register
Definition at line 91 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_CODR |
(Pio Offset: 0x0034) Clear Output Data Register
Definition at line 60 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_DRIVER |
(Pio Offset: 0x0118) I/O Drive Register
Definition at line 108 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_ELSR |
(Pio Offset: 0x00C8) Edge/Level Status Register
Definition at line 95 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_ESR |
(Pio Offset: 0x00C0) Edge Select Register
Definition at line 93 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_FELLSR |
(Pio Offset: 0x00D0) Falling Edge/Low-Level Select Register
Definition at line 97 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_FRLHSR |
(Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register
Definition at line 99 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IDR |
(Pio Offset: 0x0044) Interrupt Disable Register
Definition at line 64 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IER |
(Pio Offset: 0x0040) Interrupt Enable Register
Definition at line 63 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IFDR |
(Pio Offset: 0x0024) Glitch Input Filter Disable Register
Definition at line 56 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IFER |
(Pio Offset: 0x0020) Glitch Input Filter Enable Register
Definition at line 55 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IFSCDR |
(Pio Offset: 0x0080) Input Filter Slow Clock Disable Register
Definition at line 77 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_IFSCER |
(Pio Offset: 0x0084) Input Filter Slow Clock Enable Register
Definition at line 78 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_IFSCSR |
(Pio Offset: 0x0088) Input Filter Slow Clock Status Register
Definition at line 79 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_IFSR |
(Pio Offset: 0x0028) Glitch Input Filter Status Register
Definition at line 57 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_IMR |
(Pio Offset: 0x0048) Interrupt Mask Register
Definition at line 65 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_ISR |
(Pio Offset: 0x004C) Interrupt Status Register
Definition at line 66 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_LOCKSR |
(Pio Offset: 0x00E0) Lock Status
Definition at line 101 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_LSR |
(Pio Offset: 0x00C4) Level Select Register
Definition at line 94 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_MDDR |
(Pio Offset: 0x0054) Multi-driver Disable Register
Definition at line 68 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_MDER |
(Pio Offset: 0x0050) Multi-driver Enable Register
Definition at line 67 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_MDSR |
(Pio Offset: 0x0058) Multi-driver Status Register
Definition at line 69 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_ODR |
(Pio Offset: 0x0014) Output Disable Register
Definition at line 52 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_ODSR |
(Pio Offset: 0x0038) Output Data Status Register
Definition at line 61 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_OER |
(Pio Offset: 0x0010) Output Enable Register
Definition at line 51 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_OSR |
(Pio Offset: 0x0018) Output Status Register
Definition at line 53 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_OWDR |
(Pio Offset: 0x00A4) Output Write Disable
Definition at line 86 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_OWER |
(Pio Offset: 0x00A0) Output Write Enable
Definition at line 85 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_OWSR |
(Pio Offset: 0x00A8) Output Write Status Register
Definition at line 87 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PCIDR |
(Pio Offset: 0x0158) Parallel Capture Interrupt Disable Register
Definition at line 112 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PCIER |
(Pio Offset: 0x0154) Parallel Capture Interrupt Enable Register
Definition at line 111 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PCIMR |
(Pio Offset: 0x015C) Parallel Capture Interrupt Mask Register
Definition at line 113 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PCISR |
(Pio Offset: 0x0160) Parallel Capture Interrupt Status Register
Definition at line 114 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_PCMR |
(Pio Offset: 0x0150) Parallel Capture Mode Register
Definition at line 110 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PCRHR |
(Pio Offset: 0x0164) Parallel Capture Reception Holding Register
Definition at line 115 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PDR |
(Pio Offset: 0x0004) PIO Disable Register
Definition at line 48 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PDSR |
(Pio Offset: 0x003C) Pin Data Status Register
Definition at line 62 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PER |
(Pio Offset: 0x0000) PIO Enable Register
Definition at line 47 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PPDDR |
(Pio Offset: 0x0090) Pad Pull-down Disable Register
Definition at line 81 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PPDER |
(Pio Offset: 0x0094) Pad Pull-down Enable Register
Definition at line 82 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PPDSR |
(Pio Offset: 0x0098) Pad Pull-down Status Register
Definition at line 83 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PSR |
(Pio Offset: 0x0008) PIO Status Register
Definition at line 49 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PUDR |
(Pio Offset: 0x0060) Pull-up Disable Register
Definition at line 71 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_PUER |
(Pio Offset: 0x0064) Pull-up Enable Register
Definition at line 72 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_PUSR |
(Pio Offset: 0x0068) Pad Pull-up Status Register
Definition at line 73 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_REHLSR |
(Pio Offset: 0x00D4) Rising Edge/High-Level Select Register
Definition at line 98 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_SCDR |
(Pio Offset: 0x008C) Slow Clock Divider Debouncing Register
Definition at line 80 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_SCHMITT |
(Pio Offset: 0x0100) Schmitt Trigger Register
Definition at line 106 of file utils/cmsis/same70/include/component/pio.h.
| __O uint32_t Pio::PIO_SODR |
(Pio Offset: 0x0030) Set Output Data Register
Definition at line 59 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_VERSION |
(Pio Offset: 0x00FC) Version Register
Definition at line 105 of file utils/cmsis/same70/include/component/pio.h.
| __IO uint32_t Pio::PIO_WPMR |
(Pio Offset: 0x00E4) Write Protection Mode Register
Definition at line 102 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::PIO_WPSR |
(Pio Offset: 0x00E8) Write Protection Status Register
Definition at line 103 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved1[1] |
Definition at line 50 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved10[1] |
Definition at line 96 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved11[1] |
Definition at line 100 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved12[4] |
Definition at line 104 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved13[5] |
Definition at line 107 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved14[13] |
Definition at line 109 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved2[1] |
Definition at line 54 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved3[1] |
Definition at line 58 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved4[1] |
Definition at line 70 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved5[1] |
Definition at line 74 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved6[2] |
Definition at line 76 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved7[1] |
Definition at line 84 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved8[1] |
Definition at line 88 of file utils/cmsis/same70/include/component/pio.h.
| __I uint32_t Pio::Reserved9[1] |
Definition at line 92 of file utils/cmsis/same70/include/component/pio.h.