Twihs Struct Reference

Twihs hardware registers. More...

#include <twihs.h>

Public Attributes
__I uint32_t	Reserved1 [3]
__I uint32_t	Reserved2 [2]
__I uint32_t	Reserved3 [1]
__I uint32_t	Reserved4 [32]
__I uint32_t	Reserved5 [4]
__I uint32_t	Reserved6 [4]
__O uint32_t	TWIHS_CR
	(Twihs Offset: 0x00) Control Register More...
__IO uint32_t	TWIHS_CWGR
	(Twihs Offset: 0x10) Clock Waveform Generator Register More...
__I uint32_t	TWIHS_DR
	(Twihs Offset: 0xD0) Debug Register More...
__IO uint32_t	TWIHS_FILTR
	(Twihs Offset: 0x44) Filter Register More...
__IO uint32_t	TWIHS_IADR
	(Twihs Offset: 0x0C) Internal Address Register More...
__O uint32_t	TWIHS_IDR
	(Twihs Offset: 0x28) Interrupt Disable Register More...
__O uint32_t	TWIHS_IER
	(Twihs Offset: 0x24) Interrupt Enable Register More...
__I uint32_t	TWIHS_IMR
	(Twihs Offset: 0x2C) Interrupt Mask Register More...
__IO uint32_t	TWIHS_MMR
	(Twihs Offset: 0x04) Master Mode Register More...
__I uint32_t	TWIHS_RHR
	(Twihs Offset: 0x30) Receive Holding Register More...
__IO uint32_t	TWIHS_SMBTR
	(Twihs Offset: 0x38) SMBus Timing Register More...
__IO uint32_t	TWIHS_SMR
	(Twihs Offset: 0x08) Slave Mode Register More...
__I uint32_t	TWIHS_SR
	(Twihs Offset: 0x20) Status Register More...
__IO uint32_t	TWIHS_SWMR
	(Twihs Offset: 0x4C) SleepWalking Matching Register More...
__O uint32_t	TWIHS_THR
	(Twihs Offset: 0x34) Transmit Holding Register More...
__I uint32_t	TWIHS_VER
	(Twihs Offset: 0xFC) Version Register More...
__IO uint32_t	TWIHS_WPMR
	(Twihs Offset: 0xE4) Write Protection Mode Register More...
__I uint32_t	TWIHS_WPSR
	(Twihs Offset: 0xE8) Write Protection Status Register More...

Detailed Description

Twihs hardware registers.

Definition at line 46 of file utils/cmsis/same70/include/component/twihs.h.

Member Data Documentation

Reserved1

__I uint32_t Twihs::Reserved1[3]

Definition at line 52 of file utils/cmsis/same70/include/component/twihs.h.

Reserved2

__I uint32_t Twihs::Reserved2[2]

Definition at line 60 of file utils/cmsis/same70/include/component/twihs.h.

Reserved3

__I uint32_t Twihs::Reserved3[1]

Definition at line 62 of file utils/cmsis/same70/include/component/twihs.h.

Reserved4

__I uint32_t Twihs::Reserved4[32]

Definition at line 64 of file utils/cmsis/same70/include/component/twihs.h.

Reserved5

__I uint32_t Twihs::Reserved5[4]

Definition at line 66 of file utils/cmsis/same70/include/component/twihs.h.

Reserved6

__I uint32_t Twihs::Reserved6[4]

Definition at line 69 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_CR

__O uint32_t Twihs::TWIHS_CR

(Twihs Offset: 0x00) Control Register

Definition at line 47 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_CWGR

__IO uint32_t Twihs::TWIHS_CWGR

(Twihs Offset: 0x10) Clock Waveform Generator Register

Definition at line 51 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_DR

__I uint32_t Twihs::TWIHS_DR

(Twihs Offset: 0xD0) Debug Register

Definition at line 65 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_FILTR

__IO uint32_t Twihs::TWIHS_FILTR

(Twihs Offset: 0x44) Filter Register

Definition at line 61 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_IADR

__IO uint32_t Twihs::TWIHS_IADR

(Twihs Offset: 0x0C) Internal Address Register

Definition at line 50 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_IDR

__O uint32_t Twihs::TWIHS_IDR

(Twihs Offset: 0x28) Interrupt Disable Register

Definition at line 55 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_IER

__O uint32_t Twihs::TWIHS_IER

(Twihs Offset: 0x24) Interrupt Enable Register

Definition at line 54 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_IMR

__I uint32_t Twihs::TWIHS_IMR

(Twihs Offset: 0x2C) Interrupt Mask Register

Definition at line 56 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_MMR

__IO uint32_t Twihs::TWIHS_MMR

(Twihs Offset: 0x04) Master Mode Register

Definition at line 48 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_RHR

__I uint32_t Twihs::TWIHS_RHR

(Twihs Offset: 0x30) Receive Holding Register

Definition at line 57 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_SMBTR

__IO uint32_t Twihs::TWIHS_SMBTR

(Twihs Offset: 0x38) SMBus Timing Register

Definition at line 59 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_SMR

__IO uint32_t Twihs::TWIHS_SMR

(Twihs Offset: 0x08) Slave Mode Register

Definition at line 49 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_SR

__I uint32_t Twihs::TWIHS_SR

(Twihs Offset: 0x20) Status Register

Definition at line 53 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_SWMR

__IO uint32_t Twihs::TWIHS_SWMR

(Twihs Offset: 0x4C) SleepWalking Matching Register

Definition at line 63 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_THR

__O uint32_t Twihs::TWIHS_THR

(Twihs Offset: 0x34) Transmit Holding Register

Definition at line 58 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_VER

__I uint32_t Twihs::TWIHS_VER

(Twihs Offset: 0xFC) Version Register

Definition at line 70 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_WPMR

__IO uint32_t Twihs::TWIHS_WPMR

(Twihs Offset: 0xE4) Write Protection Mode Register

Definition at line 67 of file utils/cmsis/same70/include/component/twihs.h.

TWIHS_WPSR

__I uint32_t Twihs::TWIHS_WPSR

(Twihs Offset: 0xE8) Write Protection Status Register

Definition at line 68 of file utils/cmsis/same70/include/component/twihs.h.

---

The documentation for this struct was generated from the following file:

• utils/cmsis/same70/include/component/twihs.h