#include <usbhs.h>
Public Attributes | |
| __I uint32_t | Reserved1 [55] |
| __I uint32_t | Reserved10 [52] |
| __I uint32_t | Reserved11 [2] |
| __I uint32_t | Reserved12 [2] |
| __I uint32_t | Reserved13 [2] |
| __I uint32_t | Reserved14 [2] |
| __I uint32_t | Reserved15 [2] |
| __I uint32_t | Reserved16 [2] |
| __I uint32_t | Reserved17 [2] |
| __I uint32_t | Reserved18 [2] |
| __I uint32_t | Reserved19 [26] |
| __I uint32_t | Reserved2 [2] |
| __I uint32_t | Reserved20 [32] |
| __I uint32_t | Reserved21 [4] |
| __I uint32_t | Reserved3 [2] |
| __I uint32_t | Reserved4 [2] |
| __I uint32_t | Reserved5 [2] |
| __I uint32_t | Reserved6 [2] |
| __I uint32_t | Reserved7 [2] |
| __I uint32_t | Reserved8 [50] |
| __I uint32_t | Reserved9 [32] |
| __IO uint32_t | USBHS_CTRL |
| (Usbhs Offset: 0x0800) General Control Register More... | |
| __IO uint32_t | USBHS_DEVCTRL |
| (Usbhs Offset: 0x0000) Device General Control Register More... | |
| UsbhsDevdma | USBHS_DEVDMA [USBHSDEVDMA_NUMBER] |
| (Usbhs Offset: 0x310) n = 1 .. 7 More... | |
| __IO uint32_t | USBHS_DEVEPT |
| (Usbhs Offset: 0x001C) Device Endpoint Register More... | |
| __IO uint32_t | USBHS_DEVEPTCFG [10] |
| (Usbhs Offset: 0x100) Device Endpoint Configuration Register (n = 0) More... | |
| __O uint32_t | USBHS_DEVEPTICR [10] |
| (Usbhs Offset: 0x160) Device Endpoint Clear Register (n = 0) More... | |
| __O uint32_t | USBHS_DEVEPTIDR [10] |
| (Usbhs Offset: 0x220) Device Endpoint Disable Register (n = 0) More... | |
| __O uint32_t | USBHS_DEVEPTIER [10] |
| (Usbhs Offset: 0x1F0) Device Endpoint Enable Register (n = 0) More... | |
| __O uint32_t | USBHS_DEVEPTIFR [10] |
| (Usbhs Offset: 0x190) Device Endpoint Set Register (n = 0) More... | |
| __I uint32_t | USBHS_DEVEPTIMR [10] |
| (Usbhs Offset: 0x1C0) Device Endpoint Mask Register (n = 0) More... | |
| __I uint32_t | USBHS_DEVEPTISR [10] |
| (Usbhs Offset: 0x130) Device Endpoint Status Register (n = 0) More... | |
| __I uint32_t | USBHS_DEVFNUM |
| (Usbhs Offset: 0x0020) Device Frame Number Register More... | |
| __O uint32_t | USBHS_DEVICR |
| (Usbhs Offset: 0x0008) Device Global Interrupt Clear Register More... | |
| __O uint32_t | USBHS_DEVIDR |
| (Usbhs Offset: 0x0014) Device Global Interrupt Disable Register More... | |
| __O uint32_t | USBHS_DEVIER |
| (Usbhs Offset: 0x0018) Device Global Interrupt Enable Register More... | |
| __O uint32_t | USBHS_DEVIFR |
| (Usbhs Offset: 0x000C) Device Global Interrupt Set Register More... | |
| __I uint32_t | USBHS_DEVIMR |
| (Usbhs Offset: 0x0010) Device Global Interrupt Mask Register More... | |
| __I uint32_t | USBHS_DEVISR |
| (Usbhs Offset: 0x0004) Device Global Interrupt Status Register More... | |
| __I uint32_t | USBHS_FSM |
| (Usbhs Offset: 0x082C) General Finite State Machine Register More... | |
| __IO uint32_t | USBHS_HSTADDR1 |
| (Usbhs Offset: 0x0424) Host Address 1 Register More... | |
| __IO uint32_t | USBHS_HSTADDR2 |
| (Usbhs Offset: 0x0428) Host Address 2 Register More... | |
| __IO uint32_t | USBHS_HSTADDR3 |
| (Usbhs Offset: 0x042C) Host Address 3 Register More... | |
| __IO uint32_t | USBHS_HSTCTRL |
| (Usbhs Offset: 0x0400) Host General Control Register More... | |
| UsbhsHstdma | USBHS_HSTDMA [USBHSHSTDMA_NUMBER] |
| (Usbhs Offset: 0x710) n = 1 .. 7 More... | |
| __IO uint32_t | USBHS_HSTFNUM |
| (Usbhs Offset: 0x0420) Host Frame Number Register More... | |
| __O uint32_t | USBHS_HSTICR |
| (Usbhs Offset: 0x0408) Host Global Interrupt Clear Register More... | |
| __O uint32_t | USBHS_HSTIDR |
| (Usbhs Offset: 0x0414) Host Global Interrupt Disable Register More... | |
| __O uint32_t | USBHS_HSTIER |
| (Usbhs Offset: 0x0418) Host Global Interrupt Enable Register More... | |
| __O uint32_t | USBHS_HSTIFR |
| (Usbhs Offset: 0x040C) Host Global Interrupt Set Register More... | |
| __I uint32_t | USBHS_HSTIMR |
| (Usbhs Offset: 0x0410) Host Global Interrupt Mask Register More... | |
| __I uint32_t | USBHS_HSTISR |
| (Usbhs Offset: 0x0404) Host Global Interrupt Status Register More... | |
| __IO uint32_t | USBHS_HSTPIP |
| (Usbhs Offset: 0x0041C) Host Pipe Register More... | |
| __IO uint32_t | USBHS_HSTPIPCFG [10] |
| (Usbhs Offset: 0x500) Host Pipe Configuration Register (n = 0) More... | |
| __IO uint32_t | USBHS_HSTPIPERR [10] |
| (Usbhs Offset: 0x680) Host Pipe Error Register (n = 0) More... | |
| __O uint32_t | USBHS_HSTPIPICR [10] |
| (Usbhs Offset: 0x560) Host Pipe Clear Register (n = 0) More... | |
| __O uint32_t | USBHS_HSTPIPIDR [10] |
| (Usbhs Offset: 0x620) Host Pipe Disable Register (n = 0) More... | |
| __O uint32_t | USBHS_HSTPIPIER [10] |
| (Usbhs Offset: 0x5F0) Host Pipe Enable Register (n = 0) More... | |
| __O uint32_t | USBHS_HSTPIPIFR [10] |
| (Usbhs Offset: 0x590) Host Pipe Set Register (n = 0) More... | |
| __I uint32_t | USBHS_HSTPIPIMR [10] |
| (Usbhs Offset: 0x5C0) Host Pipe Mask Register (n = 0) More... | |
| __IO uint32_t | USBHS_HSTPIPINRQ [10] |
| (Usbhs Offset: 0x650) Host Pipe IN Request Register (n = 0) More... | |
| __I uint32_t | USBHS_HSTPIPISR [10] |
| (Usbhs Offset: 0x530) Host Pipe Status Register (n = 0) More... | |
| __O uint32_t | USBHS_SCR |
| (Usbhs Offset: 0x0808) General Status Clear Register More... | |
| __O uint32_t | USBHS_SFR |
| (Usbhs Offset: 0x080C) General Status Set Register More... | |
| __I uint32_t | USBHS_SR |
| (Usbhs Offset: 0x0804) General Status Register More... | |
| __IO uint32_t | USBHS_TSTA1 |
| (Usbhs Offset: 0x0810) General Test A1 Register More... | |
| __IO uint32_t | USBHS_TSTA2 |
| (Usbhs Offset: 0x0814) General Test A2 Register More... | |
| __I uint32_t | USBHS_VERSION |
| (Usbhs Offset: 0x0818) General Version Register More... | |
Definition at line 62 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved1[55] |
Definition at line 72 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved10[52] |
Definition at line 101 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved11[2] |
Definition at line 103 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved12[2] |
Definition at line 105 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved13[2] |
Definition at line 107 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved14[2] |
Definition at line 109 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved15[2] |
Definition at line 111 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved16[2] |
Definition at line 113 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved17[2] |
Definition at line 115 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved18[2] |
Definition at line 117 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved19[26] |
Definition at line 119 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved2[2] |
Definition at line 74 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved20[32] |
Definition at line 121 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved21[4] |
Definition at line 129 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved3[2] |
Definition at line 76 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved4[2] |
Definition at line 78 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved5[2] |
Definition at line 80 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved6[2] |
Definition at line 82 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved7[2] |
Definition at line 84 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved8[50] |
Definition at line 86 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::Reserved9[32] |
Definition at line 88 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_CTRL |
(Usbhs Offset: 0x0800) General Control Register
Definition at line 122 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_DEVCTRL |
(Usbhs Offset: 0x0000) Device General Control Register
Definition at line 63 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| UsbhsDevdma Usbhs::USBHS_DEVDMA[USBHSDEVDMA_NUMBER] |
(Usbhs Offset: 0x310) n = 1 .. 7
Definition at line 87 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_DEVEPT |
(Usbhs Offset: 0x001C) Device Endpoint Register
Definition at line 70 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_DEVEPTCFG[10] |
(Usbhs Offset: 0x100) Device Endpoint Configuration Register (n = 0)
Definition at line 73 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVEPTICR[10] |
(Usbhs Offset: 0x160) Device Endpoint Clear Register (n = 0)
Definition at line 77 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVEPTIDR[10] |
(Usbhs Offset: 0x220) Device Endpoint Disable Register (n = 0)
Definition at line 85 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVEPTIER[10] |
(Usbhs Offset: 0x1F0) Device Endpoint Enable Register (n = 0)
Definition at line 83 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVEPTIFR[10] |
(Usbhs Offset: 0x190) Device Endpoint Set Register (n = 0)
Definition at line 79 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_DEVEPTIMR[10] |
(Usbhs Offset: 0x1C0) Device Endpoint Mask Register (n = 0)
Definition at line 81 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_DEVEPTISR[10] |
(Usbhs Offset: 0x130) Device Endpoint Status Register (n = 0)
Definition at line 75 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_DEVFNUM |
(Usbhs Offset: 0x0020) Device Frame Number Register
Definition at line 71 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVICR |
(Usbhs Offset: 0x0008) Device Global Interrupt Clear Register
Definition at line 65 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVIDR |
(Usbhs Offset: 0x0014) Device Global Interrupt Disable Register
Definition at line 68 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVIER |
(Usbhs Offset: 0x0018) Device Global Interrupt Enable Register
Definition at line 69 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_DEVIFR |
(Usbhs Offset: 0x000C) Device Global Interrupt Set Register
Definition at line 66 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_DEVIMR |
(Usbhs Offset: 0x0010) Device Global Interrupt Mask Register
Definition at line 67 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_DEVISR |
(Usbhs Offset: 0x0004) Device Global Interrupt Status Register
Definition at line 64 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_FSM |
(Usbhs Offset: 0x082C) General Finite State Machine Register
Definition at line 130 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTADDR1 |
(Usbhs Offset: 0x0424) Host Address 1 Register
Definition at line 98 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTADDR2 |
(Usbhs Offset: 0x0428) Host Address 2 Register
Definition at line 99 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTADDR3 |
(Usbhs Offset: 0x042C) Host Address 3 Register
Definition at line 100 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTCTRL |
(Usbhs Offset: 0x0400) Host General Control Register
Definition at line 89 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| UsbhsHstdma Usbhs::USBHS_HSTDMA[USBHSHSTDMA_NUMBER] |
(Usbhs Offset: 0x710) n = 1 .. 7
Definition at line 120 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTFNUM |
(Usbhs Offset: 0x0420) Host Frame Number Register
Definition at line 97 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTICR |
(Usbhs Offset: 0x0408) Host Global Interrupt Clear Register
Definition at line 91 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTIDR |
(Usbhs Offset: 0x0414) Host Global Interrupt Disable Register
Definition at line 94 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTIER |
(Usbhs Offset: 0x0418) Host Global Interrupt Enable Register
Definition at line 95 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTIFR |
(Usbhs Offset: 0x040C) Host Global Interrupt Set Register
Definition at line 92 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_HSTIMR |
(Usbhs Offset: 0x0410) Host Global Interrupt Mask Register
Definition at line 93 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_HSTISR |
(Usbhs Offset: 0x0404) Host Global Interrupt Status Register
Definition at line 90 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTPIP |
(Usbhs Offset: 0x0041C) Host Pipe Register
Definition at line 96 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTPIPCFG[10] |
(Usbhs Offset: 0x500) Host Pipe Configuration Register (n = 0)
Definition at line 102 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTPIPERR[10] |
(Usbhs Offset: 0x680) Host Pipe Error Register (n = 0)
Definition at line 118 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTPIPICR[10] |
(Usbhs Offset: 0x560) Host Pipe Clear Register (n = 0)
Definition at line 106 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTPIPIDR[10] |
(Usbhs Offset: 0x620) Host Pipe Disable Register (n = 0)
Definition at line 114 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTPIPIER[10] |
(Usbhs Offset: 0x5F0) Host Pipe Enable Register (n = 0)
Definition at line 112 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_HSTPIPIFR[10] |
(Usbhs Offset: 0x590) Host Pipe Set Register (n = 0)
Definition at line 108 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_HSTPIPIMR[10] |
(Usbhs Offset: 0x5C0) Host Pipe Mask Register (n = 0)
Definition at line 110 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_HSTPIPINRQ[10] |
(Usbhs Offset: 0x650) Host Pipe IN Request Register (n = 0)
Definition at line 116 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_HSTPIPISR[10] |
(Usbhs Offset: 0x530) Host Pipe Status Register (n = 0)
Definition at line 104 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_SCR |
(Usbhs Offset: 0x0808) General Status Clear Register
Definition at line 124 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __O uint32_t Usbhs::USBHS_SFR |
(Usbhs Offset: 0x080C) General Status Set Register
Definition at line 125 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_SR |
(Usbhs Offset: 0x0804) General Status Register
Definition at line 123 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_TSTA1 |
(Usbhs Offset: 0x0810) General Test A1 Register
Definition at line 126 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __IO uint32_t Usbhs::USBHS_TSTA2 |
(Usbhs Offset: 0x0814) General Test A2 Register
Definition at line 127 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.
| __I uint32_t Usbhs::USBHS_VERSION |
(Usbhs Offset: 0x0818) General Version Register
Definition at line 128 of file EVB-2/IS_EVB-2/src/ASF/sam/utils/cmsis/same70/include/component/usbhs.h.