vl53l1_register_funcs.c
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1 /*
2 * Copyright (c) 2017, STMicroelectronics - All Rights Reserved
3 *
4 * This file is part of VL53L1 Core and is dual licensed,
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6 * Proprietary license'
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11 * 'STMicroelectronics Proprietary license'
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22 *
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25 * Alternatively, VL53L1 Core may be distributed under the terms of
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62 
68 #include "vl53l1_ll_def.h"
69 #include "vl53l1_platform.h"
70 #include "vl53l1_platform_log.h"
71 #include "vl53l1_core.h"
72 #include "vl53l1_register_map.h"
73 #include "vl53l1_register_structs.h"
74 #include "vl53l1_register_funcs.h"
75 
76 #define LOG_FUNCTION_START(fmt, ...) \
77  _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_REGISTERS, fmt, ##__VA_ARGS__)
78 #define LOG_FUNCTION_END(status, ...) \
79  _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_REGISTERS, status, ##__VA_ARGS__)
80 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
81  _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_REGISTERS, status, fmt, ##__VA_ARGS__)
82 
83 
84 VL53L1_Error VL53L1_i2c_encode_static_nvm_managed(
85  VL53L1_static_nvm_managed_t *pdata,
86  uint16_t buf_size,
87  uint8_t *pbuffer)
88 {
94  VL53L1_Error status = VL53L1_ERROR_NONE;
95 
96  LOG_FUNCTION_START("");
97 
98  if (VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES > buf_size)
99  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
100 
101  *(pbuffer + 0) =
102  pdata->i2c_slave__device_address & 0x7F;
103  *(pbuffer + 1) =
104  pdata->ana_config__vhv_ref_sel_vddpix & 0xF;
105  *(pbuffer + 2) =
106  pdata->ana_config__vhv_ref_sel_vquench & 0x7F;
107  *(pbuffer + 3) =
108  pdata->ana_config__reg_avdd1v2_sel & 0x3;
109  *(pbuffer + 4) =
110  pdata->ana_config__fast_osc__trim & 0x7F;
111  VL53L1_i2c_encode_uint16_t(
112  pdata->osc_measured__fast_osc__frequency,
113  2,
114  pbuffer + 5);
115  *(pbuffer + 7) =
116  pdata->vhv_config__timeout_macrop_loop_bound;
117  *(pbuffer + 8) =
118  pdata->vhv_config__count_thresh;
119  *(pbuffer + 9) =
120  pdata->vhv_config__offset & 0x3F;
121  *(pbuffer + 10) =
122  pdata->vhv_config__init;
123  LOG_FUNCTION_END(status);
124 
125 
126  return status;
127 }
128 
129 
130 VL53L1_Error VL53L1_i2c_decode_static_nvm_managed(
131  uint16_t buf_size,
132  uint8_t *pbuffer,
133  VL53L1_static_nvm_managed_t *pdata)
134 {
140  VL53L1_Error status = VL53L1_ERROR_NONE;
141 
142  LOG_FUNCTION_START("");
143 
144  if (VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES > buf_size)
145  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
146 
147  pdata->i2c_slave__device_address =
148  (*(pbuffer + 0)) & 0x7F;
149  pdata->ana_config__vhv_ref_sel_vddpix =
150  (*(pbuffer + 1)) & 0xF;
151  pdata->ana_config__vhv_ref_sel_vquench =
152  (*(pbuffer + 2)) & 0x7F;
153  pdata->ana_config__reg_avdd1v2_sel =
154  (*(pbuffer + 3)) & 0x3;
155  pdata->ana_config__fast_osc__trim =
156  (*(pbuffer + 4)) & 0x7F;
157  pdata->osc_measured__fast_osc__frequency =
158  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 5));
159  pdata->vhv_config__timeout_macrop_loop_bound =
160  (*(pbuffer + 7));
161  pdata->vhv_config__count_thresh =
162  (*(pbuffer + 8));
163  pdata->vhv_config__offset =
164  (*(pbuffer + 9)) & 0x3F;
165  pdata->vhv_config__init =
166  (*(pbuffer + 10));
167 
168  LOG_FUNCTION_END(status);
169 
170  return status;
171 }
172 
173 
174 VL53L1_Error VL53L1_set_static_nvm_managed(
175  VL53L1_DEV Dev,
176  VL53L1_static_nvm_managed_t *pdata)
177 {
183  VL53L1_Error status = VL53L1_ERROR_NONE;
184  uint8_t comms_buffer[VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES];
185 
186  LOG_FUNCTION_START("");
187 
188  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
189  status = VL53L1_i2c_encode_static_nvm_managed(
190  pdata,
191  VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
192  comms_buffer);
193 
194  if (status == VL53L1_ERROR_NONE)
195  status = VL53L1_WriteMulti(
196  Dev,
197  VL53L1_I2C_SLAVE__DEVICE_ADDRESS,
198  comms_buffer,
199  VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES);
200 
201  LOG_FUNCTION_END(status);
202 
203  return status;
204 }
205 
206 
207 VL53L1_Error VL53L1_get_static_nvm_managed(
208  VL53L1_DEV Dev,
209  VL53L1_static_nvm_managed_t *pdata)
210 {
216  VL53L1_Error status = VL53L1_ERROR_NONE;
217  uint8_t comms_buffer[VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES];
218 
219  LOG_FUNCTION_START("");
220 
221  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
222  status = VL53L1_ReadMulti(
223  Dev,
224  VL53L1_I2C_SLAVE__DEVICE_ADDRESS,
225  comms_buffer,
226  VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES);
227 
228  if (status == VL53L1_ERROR_NONE)
229  status = VL53L1_i2c_decode_static_nvm_managed(
230  VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
231  comms_buffer,
232  pdata);
233 
234  LOG_FUNCTION_END(status);
235 
236  return status;
237 }
238 
239 
240 VL53L1_Error VL53L1_i2c_encode_customer_nvm_managed(
241  VL53L1_customer_nvm_managed_t *pdata,
242  uint16_t buf_size,
243  uint8_t *pbuffer)
244 {
250  VL53L1_Error status = VL53L1_ERROR_NONE;
251 
252  LOG_FUNCTION_START("");
253 
254  if (VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES > buf_size)
255  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
256 
257  *(pbuffer + 0) =
258  pdata->global_config__spad_enables_ref_0;
259  *(pbuffer + 1) =
260  pdata->global_config__spad_enables_ref_1;
261  *(pbuffer + 2) =
262  pdata->global_config__spad_enables_ref_2;
263  *(pbuffer + 3) =
264  pdata->global_config__spad_enables_ref_3;
265  *(pbuffer + 4) =
266  pdata->global_config__spad_enables_ref_4;
267  *(pbuffer + 5) =
268  pdata->global_config__spad_enables_ref_5 & 0xF;
269  *(pbuffer + 6) =
270  pdata->global_config__ref_en_start_select;
271  *(pbuffer + 7) =
272  pdata->ref_spad_man__num_requested_ref_spads & 0x3F;
273  *(pbuffer + 8) =
274  pdata->ref_spad_man__ref_location & 0x3;
275  VL53L1_i2c_encode_uint16_t(
276  pdata->algo__crosstalk_compensation_plane_offset_kcps,
277  2,
278  pbuffer + 9);
279  VL53L1_i2c_encode_int16_t(
280  pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
281  2,
282  pbuffer + 11);
283  VL53L1_i2c_encode_int16_t(
284  pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
285  2,
286  pbuffer + 13);
287  VL53L1_i2c_encode_uint16_t(
288  pdata->ref_spad_char__total_rate_target_mcps,
289  2,
290  pbuffer + 15);
291  VL53L1_i2c_encode_int16_t(
292  pdata->algo__part_to_part_range_offset_mm & 0x1FFF,
293  2,
294  pbuffer + 17);
295  VL53L1_i2c_encode_int16_t(
296  pdata->mm_config__inner_offset_mm,
297  2,
298  pbuffer + 19);
299  VL53L1_i2c_encode_int16_t(
300  pdata->mm_config__outer_offset_mm,
301  2,
302  pbuffer + 21);
303  LOG_FUNCTION_END(status);
304 
305 
306  return status;
307 }
308 
309 
310 VL53L1_Error VL53L1_i2c_decode_customer_nvm_managed(
311  uint16_t buf_size,
312  uint8_t *pbuffer,
313  VL53L1_customer_nvm_managed_t *pdata)
314 {
320  VL53L1_Error status = VL53L1_ERROR_NONE;
321 
322  LOG_FUNCTION_START("");
323 
324  if (VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES > buf_size)
325  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
326 
327  pdata->global_config__spad_enables_ref_0 =
328  (*(pbuffer + 0));
329  pdata->global_config__spad_enables_ref_1 =
330  (*(pbuffer + 1));
331  pdata->global_config__spad_enables_ref_2 =
332  (*(pbuffer + 2));
333  pdata->global_config__spad_enables_ref_3 =
334  (*(pbuffer + 3));
335  pdata->global_config__spad_enables_ref_4 =
336  (*(pbuffer + 4));
337  pdata->global_config__spad_enables_ref_5 =
338  (*(pbuffer + 5)) & 0xF;
339  pdata->global_config__ref_en_start_select =
340  (*(pbuffer + 6));
341  pdata->ref_spad_man__num_requested_ref_spads =
342  (*(pbuffer + 7)) & 0x3F;
343  pdata->ref_spad_man__ref_location =
344  (*(pbuffer + 8)) & 0x3;
345  pdata->algo__crosstalk_compensation_plane_offset_kcps =
346  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 9));
347  pdata->algo__crosstalk_compensation_x_plane_gradient_kcps =
348  (VL53L1_i2c_decode_int16_t(2, pbuffer + 11));
349  pdata->algo__crosstalk_compensation_y_plane_gradient_kcps =
350  (VL53L1_i2c_decode_int16_t(2, pbuffer + 13));
351  pdata->ref_spad_char__total_rate_target_mcps =
352  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 15));
353  pdata->algo__part_to_part_range_offset_mm =
354  (VL53L1_i2c_decode_int16_t(2, pbuffer + 17)) & 0x1FFF;
355  pdata->mm_config__inner_offset_mm =
356  (VL53L1_i2c_decode_int16_t(2, pbuffer + 19));
357  pdata->mm_config__outer_offset_mm =
358  (VL53L1_i2c_decode_int16_t(2, pbuffer + 21));
359 
360  LOG_FUNCTION_END(status);
361 
362  return status;
363 }
364 
365 
366 VL53L1_Error VL53L1_set_customer_nvm_managed(
367  VL53L1_DEV Dev,
368  VL53L1_customer_nvm_managed_t *pdata)
369 {
375  VL53L1_Error status = VL53L1_ERROR_NONE;
376  uint8_t comms_buffer[VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES];
377 
378  LOG_FUNCTION_START("");
379 
380  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
381  status = VL53L1_i2c_encode_customer_nvm_managed(
382  pdata,
383  VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
384  comms_buffer);
385 
386  if (status == VL53L1_ERROR_NONE)
387  status = VL53L1_WriteMulti(
388  Dev,
389  VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0,
390  comms_buffer,
391  VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES);
392 
393  LOG_FUNCTION_END(status);
394 
395  return status;
396 }
397 
398 
399 VL53L1_Error VL53L1_get_customer_nvm_managed(
400  VL53L1_DEV Dev,
401  VL53L1_customer_nvm_managed_t *pdata)
402 {
408  VL53L1_Error status = VL53L1_ERROR_NONE;
409  uint8_t comms_buffer[VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES];
410 
411  LOG_FUNCTION_START("");
412 
413  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
414  status = VL53L1_ReadMulti(
415  Dev,
416  VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0,
417  comms_buffer,
418  VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES);
419 
420  if (status == VL53L1_ERROR_NONE)
421  status = VL53L1_i2c_decode_customer_nvm_managed(
422  VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
423  comms_buffer,
424  pdata);
425 
426  LOG_FUNCTION_END(status);
427 
428  return status;
429 }
430 
431 
432 VL53L1_Error VL53L1_i2c_encode_static_config(
433  VL53L1_static_config_t *pdata,
434  uint16_t buf_size,
435  uint8_t *pbuffer)
436 {
442  VL53L1_Error status = VL53L1_ERROR_NONE;
443 
444  LOG_FUNCTION_START("");
445 
446  if (VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES > buf_size)
447  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
448 
449  VL53L1_i2c_encode_uint16_t(
450  pdata->dss_config__target_total_rate_mcps,
451  2,
452  pbuffer + 0);
453  *(pbuffer + 2) =
454  pdata->debug__ctrl & 0x1;
455  *(pbuffer + 3) =
456  pdata->test_mode__ctrl & 0xF;
457  *(pbuffer + 4) =
458  pdata->clk_gating__ctrl & 0xF;
459  *(pbuffer + 5) =
460  pdata->nvm_bist__ctrl & 0x1F;
461  *(pbuffer + 6) =
462  pdata->nvm_bist__num_nvm_words & 0x7F;
463  *(pbuffer + 7) =
464  pdata->nvm_bist__start_address & 0x7F;
465  *(pbuffer + 8) =
466  pdata->host_if__status & 0x1;
467  *(pbuffer + 9) =
468  pdata->pad_i2c_hv__config;
469  *(pbuffer + 10) =
470  pdata->pad_i2c_hv__extsup_config & 0x1;
471  *(pbuffer + 11) =
472  pdata->gpio_hv_pad__ctrl & 0x3;
473  *(pbuffer + 12) =
474  pdata->gpio_hv_mux__ctrl & 0x1F;
475  *(pbuffer + 13) =
476  pdata->gpio__tio_hv_status & 0x3;
477  *(pbuffer + 14) =
478  pdata->gpio__fio_hv_status & 0x3;
479  *(pbuffer + 15) =
480  pdata->ana_config__spad_sel_pswidth & 0x7;
481  *(pbuffer + 16) =
482  pdata->ana_config__vcsel_pulse_width_offset & 0x1F;
483  *(pbuffer + 17) =
484  pdata->ana_config__fast_osc__config_ctrl & 0x1;
485  *(pbuffer + 18) =
486  pdata->sigma_estimator__effective_pulse_width_ns;
487  *(pbuffer + 19) =
488  pdata->sigma_estimator__effective_ambient_width_ns;
489  *(pbuffer + 20) =
490  pdata->sigma_estimator__sigma_ref_mm;
491  *(pbuffer + 21) =
492  pdata->algo__crosstalk_compensation_valid_height_mm;
493  *(pbuffer + 22) =
494  pdata->spare_host_config__static_config_spare_0;
495  *(pbuffer + 23) =
496  pdata->spare_host_config__static_config_spare_1;
497  VL53L1_i2c_encode_uint16_t(
498  pdata->algo__range_ignore_threshold_mcps,
499  2,
500  pbuffer + 24);
501  *(pbuffer + 26) =
502  pdata->algo__range_ignore_valid_height_mm;
503  *(pbuffer + 27) =
504  pdata->algo__range_min_clip;
505  *(pbuffer + 28) =
506  pdata->algo__consistency_check__tolerance & 0xF;
507  *(pbuffer + 29) =
508  pdata->spare_host_config__static_config_spare_2;
509  *(pbuffer + 30) =
510  pdata->sd_config__reset_stages_msb & 0xF;
511  *(pbuffer + 31) =
512  pdata->sd_config__reset_stages_lsb;
513  LOG_FUNCTION_END(status);
514 
515 
516  return status;
517 }
518 
519 
520 VL53L1_Error VL53L1_i2c_decode_static_config(
521  uint16_t buf_size,
522  uint8_t *pbuffer,
523  VL53L1_static_config_t *pdata)
524 {
530  VL53L1_Error status = VL53L1_ERROR_NONE;
531 
532  LOG_FUNCTION_START("");
533 
534  if (VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES > buf_size)
535  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
536 
537  pdata->dss_config__target_total_rate_mcps =
538  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 0));
539  pdata->debug__ctrl =
540  (*(pbuffer + 2)) & 0x1;
541  pdata->test_mode__ctrl =
542  (*(pbuffer + 3)) & 0xF;
543  pdata->clk_gating__ctrl =
544  (*(pbuffer + 4)) & 0xF;
545  pdata->nvm_bist__ctrl =
546  (*(pbuffer + 5)) & 0x1F;
547  pdata->nvm_bist__num_nvm_words =
548  (*(pbuffer + 6)) & 0x7F;
549  pdata->nvm_bist__start_address =
550  (*(pbuffer + 7)) & 0x7F;
551  pdata->host_if__status =
552  (*(pbuffer + 8)) & 0x1;
553  pdata->pad_i2c_hv__config =
554  (*(pbuffer + 9));
555  pdata->pad_i2c_hv__extsup_config =
556  (*(pbuffer + 10)) & 0x1;
557  pdata->gpio_hv_pad__ctrl =
558  (*(pbuffer + 11)) & 0x3;
559  pdata->gpio_hv_mux__ctrl =
560  (*(pbuffer + 12)) & 0x1F;
561  pdata->gpio__tio_hv_status =
562  (*(pbuffer + 13)) & 0x3;
563  pdata->gpio__fio_hv_status =
564  (*(pbuffer + 14)) & 0x3;
565  pdata->ana_config__spad_sel_pswidth =
566  (*(pbuffer + 15)) & 0x7;
567  pdata->ana_config__vcsel_pulse_width_offset =
568  (*(pbuffer + 16)) & 0x1F;
569  pdata->ana_config__fast_osc__config_ctrl =
570  (*(pbuffer + 17)) & 0x1;
571  pdata->sigma_estimator__effective_pulse_width_ns =
572  (*(pbuffer + 18));
573  pdata->sigma_estimator__effective_ambient_width_ns =
574  (*(pbuffer + 19));
575  pdata->sigma_estimator__sigma_ref_mm =
576  (*(pbuffer + 20));
577  pdata->algo__crosstalk_compensation_valid_height_mm =
578  (*(pbuffer + 21));
579  pdata->spare_host_config__static_config_spare_0 =
580  (*(pbuffer + 22));
581  pdata->spare_host_config__static_config_spare_1 =
582  (*(pbuffer + 23));
583  pdata->algo__range_ignore_threshold_mcps =
584  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 24));
585  pdata->algo__range_ignore_valid_height_mm =
586  (*(pbuffer + 26));
587  pdata->algo__range_min_clip =
588  (*(pbuffer + 27));
589  pdata->algo__consistency_check__tolerance =
590  (*(pbuffer + 28)) & 0xF;
591  pdata->spare_host_config__static_config_spare_2 =
592  (*(pbuffer + 29));
593  pdata->sd_config__reset_stages_msb =
594  (*(pbuffer + 30)) & 0xF;
595  pdata->sd_config__reset_stages_lsb =
596  (*(pbuffer + 31));
597 
598  LOG_FUNCTION_END(status);
599 
600  return status;
601 }
602 
603 
604 VL53L1_Error VL53L1_set_static_config(
605  VL53L1_DEV Dev,
606  VL53L1_static_config_t *pdata)
607 {
613  VL53L1_Error status = VL53L1_ERROR_NONE;
614  uint8_t comms_buffer[VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES];
615 
616  LOG_FUNCTION_START("");
617 
618  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
619  status = VL53L1_i2c_encode_static_config(
620  pdata,
621  VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES,
622  comms_buffer);
623 
624  if (status == VL53L1_ERROR_NONE)
625  status = VL53L1_WriteMulti(
626  Dev,
627  VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS,
628  comms_buffer,
629  VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES);
630 
631  LOG_FUNCTION_END(status);
632 
633  return status;
634 }
635 
636 
637 #ifdef VL53L1_DEBUG
638 VL53L1_Error VL53L1_get_static_config(
639  VL53L1_DEV Dev,
640  VL53L1_static_config_t *pdata)
641 {
647  VL53L1_Error status = VL53L1_ERROR_NONE;
648  uint8_t comms_buffer[VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES];
649 
650  LOG_FUNCTION_START("");
651 
652  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
653  status = VL53L1_ReadMulti(
654  Dev,
655  VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS,
656  comms_buffer,
657  VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES);
658 
659  if (status == VL53L1_ERROR_NONE)
660  status = VL53L1_i2c_decode_static_config(
661  VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES,
662  comms_buffer,
663  pdata);
664 
665  LOG_FUNCTION_END(status);
666 
667  return status;
668 }
669 #endif
670 
671 
672 VL53L1_Error VL53L1_i2c_encode_general_config(
673  VL53L1_general_config_t *pdata,
674  uint16_t buf_size,
675  uint8_t *pbuffer)
676 {
682  VL53L1_Error status = VL53L1_ERROR_NONE;
683 
684  LOG_FUNCTION_START("");
685 
686  if (VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES > buf_size)
687  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
688 
689  *(pbuffer + 0) =
690  pdata->gph_config__stream_count_update_value;
691  *(pbuffer + 1) =
692  pdata->global_config__stream_divider;
693  *(pbuffer + 2) =
694  pdata->system__interrupt_config_gpio;
695  *(pbuffer + 3) =
696  pdata->cal_config__vcsel_start & 0x7F;
697  VL53L1_i2c_encode_uint16_t(
698  pdata->cal_config__repeat_rate & 0xFFF,
699  2,
700  pbuffer + 4);
701  *(pbuffer + 6) =
702  pdata->global_config__vcsel_width & 0x7F;
703  *(pbuffer + 7) =
704  pdata->phasecal_config__timeout_macrop;
705  *(pbuffer + 8) =
706  pdata->phasecal_config__target;
707  *(pbuffer + 9) =
708  pdata->phasecal_config__override & 0x1;
709  *(pbuffer + 11) =
710  pdata->dss_config__roi_mode_control & 0x7;
711  VL53L1_i2c_encode_uint16_t(
712  pdata->system__thresh_rate_high,
713  2,
714  pbuffer + 12);
715  VL53L1_i2c_encode_uint16_t(
716  pdata->system__thresh_rate_low,
717  2,
718  pbuffer + 14);
719  VL53L1_i2c_encode_uint16_t(
720  pdata->dss_config__manual_effective_spads_select,
721  2,
722  pbuffer + 16);
723  *(pbuffer + 18) =
724  pdata->dss_config__manual_block_select;
725  *(pbuffer + 19) =
726  pdata->dss_config__aperture_attenuation;
727  *(pbuffer + 20) =
728  pdata->dss_config__max_spads_limit;
729  *(pbuffer + 21) =
730  pdata->dss_config__min_spads_limit;
731  LOG_FUNCTION_END(status);
732 
733 
734  return status;
735 }
736 
737 
738 VL53L1_Error VL53L1_i2c_decode_general_config(
739  uint16_t buf_size,
740  uint8_t *pbuffer,
741  VL53L1_general_config_t *pdata)
742 {
748  VL53L1_Error status = VL53L1_ERROR_NONE;
749 
750  LOG_FUNCTION_START("");
751 
752  if (VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES > buf_size)
753  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
754 
755  pdata->gph_config__stream_count_update_value =
756  (*(pbuffer + 0));
757  pdata->global_config__stream_divider =
758  (*(pbuffer + 1));
759  pdata->system__interrupt_config_gpio =
760  (*(pbuffer + 2));
761  pdata->cal_config__vcsel_start =
762  (*(pbuffer + 3)) & 0x7F;
763  pdata->cal_config__repeat_rate =
764  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 4)) & 0xFFF;
765  pdata->global_config__vcsel_width =
766  (*(pbuffer + 6)) & 0x7F;
767  pdata->phasecal_config__timeout_macrop =
768  (*(pbuffer + 7));
769  pdata->phasecal_config__target =
770  (*(pbuffer + 8));
771  pdata->phasecal_config__override =
772  (*(pbuffer + 9)) & 0x1;
773  pdata->dss_config__roi_mode_control =
774  (*(pbuffer + 11)) & 0x7;
775  pdata->system__thresh_rate_high =
776  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
777  pdata->system__thresh_rate_low =
778  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 14));
779  pdata->dss_config__manual_effective_spads_select =
780  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 16));
781  pdata->dss_config__manual_block_select =
782  (*(pbuffer + 18));
783  pdata->dss_config__aperture_attenuation =
784  (*(pbuffer + 19));
785  pdata->dss_config__max_spads_limit =
786  (*(pbuffer + 20));
787  pdata->dss_config__min_spads_limit =
788  (*(pbuffer + 21));
789 
790  LOG_FUNCTION_END(status);
791 
792  return status;
793 }
794 
795 
796 VL53L1_Error VL53L1_set_general_config(
797  VL53L1_DEV Dev,
798  VL53L1_general_config_t *pdata)
799 {
805  VL53L1_Error status = VL53L1_ERROR_NONE;
806  uint8_t comms_buffer[VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES];
807 
808  LOG_FUNCTION_START("");
809 
810  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
811  status = VL53L1_i2c_encode_general_config(
812  pdata,
813  VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES,
814  comms_buffer);
815 
816  if (status == VL53L1_ERROR_NONE)
817  status = VL53L1_WriteMulti(
818  Dev,
819  VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE,
820  comms_buffer,
821  VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES);
822 
823  LOG_FUNCTION_END(status);
824 
825  return status;
826 }
827 
828 
829 #ifdef VL53L1_DEBUG
830 VL53L1_Error VL53L1_get_general_config(
831  VL53L1_DEV Dev,
832  VL53L1_general_config_t *pdata)
833 {
839  VL53L1_Error status = VL53L1_ERROR_NONE;
840  uint8_t comms_buffer[VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES];
841 
842  LOG_FUNCTION_START("");
843 
844  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
845  status = VL53L1_ReadMulti(
846  Dev,
847  VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE,
848  comms_buffer,
849  VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES);
850 
851  if (status == VL53L1_ERROR_NONE)
852  status = VL53L1_i2c_decode_general_config(
853  VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES,
854  comms_buffer,
855  pdata);
856 
857  LOG_FUNCTION_END(status);
858 
859  return status;
860 }
861 #endif
862 
863 
864 VL53L1_Error VL53L1_i2c_encode_timing_config(
865  VL53L1_timing_config_t *pdata,
866  uint16_t buf_size,
867  uint8_t *pbuffer)
868 {
874  VL53L1_Error status = VL53L1_ERROR_NONE;
875 
876  LOG_FUNCTION_START("");
877 
878  if (VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES > buf_size)
879  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
880 
881  *(pbuffer + 0) =
882  pdata->mm_config__timeout_macrop_a_hi & 0xF;
883  *(pbuffer + 1) =
884  pdata->mm_config__timeout_macrop_a_lo;
885  *(pbuffer + 2) =
886  pdata->mm_config__timeout_macrop_b_hi & 0xF;
887  *(pbuffer + 3) =
888  pdata->mm_config__timeout_macrop_b_lo;
889  *(pbuffer + 4) =
890  pdata->range_config__timeout_macrop_a_hi & 0xF;
891  *(pbuffer + 5) =
892  pdata->range_config__timeout_macrop_a_lo;
893  *(pbuffer + 6) =
894  pdata->range_config__vcsel_period_a & 0x3F;
895  *(pbuffer + 7) =
896  pdata->range_config__timeout_macrop_b_hi & 0xF;
897  *(pbuffer + 8) =
898  pdata->range_config__timeout_macrop_b_lo;
899  *(pbuffer + 9) =
900  pdata->range_config__vcsel_period_b & 0x3F;
901  VL53L1_i2c_encode_uint16_t(
902  pdata->range_config__sigma_thresh,
903  2,
904  pbuffer + 10);
905  VL53L1_i2c_encode_uint16_t(
906  pdata->range_config__min_count_rate_rtn_limit_mcps,
907  2,
908  pbuffer + 12);
909  *(pbuffer + 14) =
910  pdata->range_config__valid_phase_low;
911  *(pbuffer + 15) =
912  pdata->range_config__valid_phase_high;
913  VL53L1_i2c_encode_uint32_t(
914  pdata->system__intermeasurement_period,
915  4,
916  pbuffer + 18);
917  *(pbuffer + 22) =
918  pdata->system__fractional_enable & 0x1;
919  LOG_FUNCTION_END(status);
920 
921 
922  return status;
923 }
924 
925 
926 #ifdef PAL_EXTENDED
927 VL53L1_Error VL53L1_i2c_decode_timing_config(
928  uint16_t buf_size,
929  uint8_t *pbuffer,
930  VL53L1_timing_config_t *pdata)
931 {
937  VL53L1_Error status = VL53L1_ERROR_NONE;
938 
939  LOG_FUNCTION_START("");
940 
941  if (VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES > buf_size)
942  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
943 
944  pdata->mm_config__timeout_macrop_a_hi =
945  (*(pbuffer + 0)) & 0xF;
946  pdata->mm_config__timeout_macrop_a_lo =
947  (*(pbuffer + 1));
948  pdata->mm_config__timeout_macrop_b_hi =
949  (*(pbuffer + 2)) & 0xF;
950  pdata->mm_config__timeout_macrop_b_lo =
951  (*(pbuffer + 3));
952  pdata->range_config__timeout_macrop_a_hi =
953  (*(pbuffer + 4)) & 0xF;
954  pdata->range_config__timeout_macrop_a_lo =
955  (*(pbuffer + 5));
956  pdata->range_config__vcsel_period_a =
957  (*(pbuffer + 6)) & 0x3F;
958  pdata->range_config__timeout_macrop_b_hi =
959  (*(pbuffer + 7)) & 0xF;
960  pdata->range_config__timeout_macrop_b_lo =
961  (*(pbuffer + 8));
962  pdata->range_config__vcsel_period_b =
963  (*(pbuffer + 9)) & 0x3F;
964  pdata->range_config__sigma_thresh =
965  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 10));
966  pdata->range_config__min_count_rate_rtn_limit_mcps =
967  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
968  pdata->range_config__valid_phase_low =
969  (*(pbuffer + 14));
970  pdata->range_config__valid_phase_high =
971  (*(pbuffer + 15));
972  pdata->system__intermeasurement_period =
973  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 18));
974  pdata->system__fractional_enable =
975  (*(pbuffer + 22)) & 0x1;
976 
977  LOG_FUNCTION_END(status);
978 
979  return status;
980 }
981 #endif
982 
983 
984 #ifdef PAL_EXTENDED
985 VL53L1_Error VL53L1_set_timing_config(
986  VL53L1_DEV Dev,
987  VL53L1_timing_config_t *pdata)
988 {
994  VL53L1_Error status = VL53L1_ERROR_NONE;
995  uint8_t comms_buffer[VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES];
996 
997  LOG_FUNCTION_START("");
998 
999  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1000  status = VL53L1_i2c_encode_timing_config(
1001  pdata,
1002  VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES,
1003  comms_buffer);
1004 
1005  if (status == VL53L1_ERROR_NONE)
1006  status = VL53L1_WriteMulti(
1007  Dev,
1008  VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI,
1009  comms_buffer,
1010  VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES);
1011 
1012  LOG_FUNCTION_END(status);
1013 
1014  return status;
1015 }
1016 #endif
1017 
1018 
1019 #ifdef VL53L1_DEBUG
1020 VL53L1_Error VL53L1_get_timing_config(
1021  VL53L1_DEV Dev,
1022  VL53L1_timing_config_t *pdata)
1023 {
1029  VL53L1_Error status = VL53L1_ERROR_NONE;
1030  uint8_t comms_buffer[VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES];
1031 
1032  LOG_FUNCTION_START("");
1033 
1034  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1035  status = VL53L1_ReadMulti(
1036  Dev,
1037  VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI,
1038  comms_buffer,
1039  VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES);
1040 
1041  if (status == VL53L1_ERROR_NONE)
1042  status = VL53L1_i2c_decode_timing_config(
1043  VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES,
1044  comms_buffer,
1045  pdata);
1046 
1047  LOG_FUNCTION_END(status);
1048 
1049  return status;
1050 }
1051 #endif
1052 
1053 
1054 VL53L1_Error VL53L1_i2c_encode_dynamic_config(
1055  VL53L1_dynamic_config_t *pdata,
1056  uint16_t buf_size,
1057  uint8_t *pbuffer)
1058 {
1064  VL53L1_Error status = VL53L1_ERROR_NONE;
1065 
1066  LOG_FUNCTION_START("");
1067 
1068  if (VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES > buf_size)
1069  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1070 
1071  *(pbuffer + 0) =
1072  pdata->system__grouped_parameter_hold_0 & 0x3;
1073  VL53L1_i2c_encode_uint16_t(
1074  pdata->system__thresh_high,
1075  2,
1076  pbuffer + 1);
1077  VL53L1_i2c_encode_uint16_t(
1078  pdata->system__thresh_low,
1079  2,
1080  pbuffer + 3);
1081  *(pbuffer + 5) =
1082  pdata->system__enable_xtalk_per_quadrant & 0x1;
1083  *(pbuffer + 6) =
1084  pdata->system__seed_config & 0x7;
1085  *(pbuffer + 7) =
1086  pdata->sd_config__woi_sd0;
1087  *(pbuffer + 8) =
1088  pdata->sd_config__woi_sd1;
1089  *(pbuffer + 9) =
1090  pdata->sd_config__initial_phase_sd0 & 0x7F;
1091  *(pbuffer + 10) =
1092  pdata->sd_config__initial_phase_sd1 & 0x7F;
1093  *(pbuffer + 11) =
1094  pdata->system__grouped_parameter_hold_1 & 0x3;
1095  *(pbuffer + 12) =
1096  pdata->sd_config__first_order_select & 0x3;
1097  *(pbuffer + 13) =
1098  pdata->sd_config__quantifier & 0xF;
1099  *(pbuffer + 14) =
1100  pdata->roi_config__user_roi_centre_spad;
1101  *(pbuffer + 15) =
1102  pdata->roi_config__user_roi_requested_global_xy_size;
1103  *(pbuffer + 16) =
1104  pdata->system__sequence_config;
1105  *(pbuffer + 17) =
1106  pdata->system__grouped_parameter_hold & 0x3;
1107  LOG_FUNCTION_END(status);
1108 
1109 
1110  return status;
1111 }
1112 
1113 #ifdef PAL_EXTENDED
1114 VL53L1_Error VL53L1_i2c_decode_dynamic_config(
1115  uint16_t buf_size,
1116  uint8_t *pbuffer,
1117  VL53L1_dynamic_config_t *pdata)
1118 {
1124  VL53L1_Error status = VL53L1_ERROR_NONE;
1125 
1126  LOG_FUNCTION_START("");
1127 
1128  if (VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES > buf_size)
1129  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1130 
1131  pdata->system__grouped_parameter_hold_0 =
1132  (*(pbuffer + 0)) & 0x3;
1133  pdata->system__thresh_high =
1134  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 1));
1135  pdata->system__thresh_low =
1136  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 3));
1137  pdata->system__enable_xtalk_per_quadrant =
1138  (*(pbuffer + 5)) & 0x1;
1139  pdata->system__seed_config =
1140  (*(pbuffer + 6)) & 0x7;
1141  pdata->sd_config__woi_sd0 =
1142  (*(pbuffer + 7));
1143  pdata->sd_config__woi_sd1 =
1144  (*(pbuffer + 8));
1145  pdata->sd_config__initial_phase_sd0 =
1146  (*(pbuffer + 9)) & 0x7F;
1147  pdata->sd_config__initial_phase_sd1 =
1148  (*(pbuffer + 10)) & 0x7F;
1149  pdata->system__grouped_parameter_hold_1 =
1150  (*(pbuffer + 11)) & 0x3;
1151  pdata->sd_config__first_order_select =
1152  (*(pbuffer + 12)) & 0x3;
1153  pdata->sd_config__quantifier =
1154  (*(pbuffer + 13)) & 0xF;
1155  pdata->roi_config__user_roi_centre_spad =
1156  (*(pbuffer + 14));
1157  pdata->roi_config__user_roi_requested_global_xy_size =
1158  (*(pbuffer + 15));
1159  pdata->system__sequence_config =
1160  (*(pbuffer + 16));
1161  pdata->system__grouped_parameter_hold =
1162  (*(pbuffer + 17)) & 0x3;
1163 
1164  LOG_FUNCTION_END(status);
1165 
1166  return status;
1167 }
1168 #endif
1169 
1170 
1171 VL53L1_Error VL53L1_set_dynamic_config(
1172  VL53L1_DEV Dev,
1173  VL53L1_dynamic_config_t *pdata)
1174 {
1180  VL53L1_Error status = VL53L1_ERROR_NONE;
1181  uint8_t comms_buffer[VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES];
1182 
1183  LOG_FUNCTION_START("");
1184 
1185  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1186  status = VL53L1_i2c_encode_dynamic_config(
1187  pdata,
1188  VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
1189  comms_buffer);
1190 
1191  if (status == VL53L1_ERROR_NONE)
1192  status = VL53L1_WriteMulti(
1193  Dev,
1194  VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0,
1195  comms_buffer,
1196  VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES);
1197 
1198  LOG_FUNCTION_END(status);
1199 
1200  return status;
1201 }
1202 
1203 
1204 #ifdef VL53L1_DEBUG
1205 VL53L1_Error VL53L1_get_dynamic_config(
1206  VL53L1_DEV Dev,
1207  VL53L1_dynamic_config_t *pdata)
1208 {
1214  VL53L1_Error status = VL53L1_ERROR_NONE;
1215  uint8_t comms_buffer[VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES];
1216 
1217  LOG_FUNCTION_START("");
1218 
1219  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1220  status = VL53L1_ReadMulti(
1221  Dev,
1222  VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0,
1223  comms_buffer,
1224  VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES);
1225 
1226  if (status == VL53L1_ERROR_NONE)
1227  status = VL53L1_i2c_decode_dynamic_config(
1228  VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
1229  comms_buffer,
1230  pdata);
1231 
1232  LOG_FUNCTION_END(status);
1233 
1234  return status;
1235 }
1236 #endif
1237 
1238 
1239 VL53L1_Error VL53L1_i2c_encode_system_control(
1240  VL53L1_system_control_t *pdata,
1241  uint16_t buf_size,
1242  uint8_t *pbuffer)
1243 {
1249  VL53L1_Error status = VL53L1_ERROR_NONE;
1250 
1251  LOG_FUNCTION_START("");
1252 
1253  if (VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES > buf_size)
1254  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1255 
1256  *(pbuffer + 0) =
1257  pdata->power_management__go1_power_force & 0x1;
1258  *(pbuffer + 1) =
1259  pdata->system__stream_count_ctrl & 0x1;
1260  *(pbuffer + 2) =
1261  pdata->firmware__enable & 0x1;
1262  *(pbuffer + 3) =
1263  pdata->system__interrupt_clear & 0x3;
1264  *(pbuffer + 4) =
1265  pdata->system__mode_start;
1266  LOG_FUNCTION_END(status);
1267 
1268 
1269  return status;
1270 }
1271 
1272 
1273 #ifdef PAL_EXTENDED
1274 VL53L1_Error VL53L1_i2c_decode_system_control(
1275  uint16_t buf_size,
1276  uint8_t *pbuffer,
1277  VL53L1_system_control_t *pdata)
1278 {
1284  VL53L1_Error status = VL53L1_ERROR_NONE;
1285 
1286  LOG_FUNCTION_START("");
1287 
1288  if (VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES > buf_size)
1289  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1290 
1291  pdata->power_management__go1_power_force =
1292  (*(pbuffer + 0)) & 0x1;
1293  pdata->system__stream_count_ctrl =
1294  (*(pbuffer + 1)) & 0x1;
1295  pdata->firmware__enable =
1296  (*(pbuffer + 2)) & 0x1;
1297  pdata->system__interrupt_clear =
1298  (*(pbuffer + 3)) & 0x3;
1299  pdata->system__mode_start =
1300  (*(pbuffer + 4));
1301 
1302  LOG_FUNCTION_END(status);
1303 
1304  return status;
1305 }
1306 #endif
1307 
1308 
1309 VL53L1_Error VL53L1_set_system_control(
1310  VL53L1_DEV Dev,
1311  VL53L1_system_control_t *pdata)
1312 {
1318  VL53L1_Error status = VL53L1_ERROR_NONE;
1319  uint8_t comms_buffer[VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES];
1320 
1321  LOG_FUNCTION_START("");
1322 
1323  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1324  status = VL53L1_i2c_encode_system_control(
1325  pdata,
1326  VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES,
1327  comms_buffer);
1328 
1329  if (status == VL53L1_ERROR_NONE)
1330  status = VL53L1_WriteMulti(
1331  Dev,
1332  VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE,
1333  comms_buffer,
1334  VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES);
1335 
1336  LOG_FUNCTION_END(status);
1337 
1338  return status;
1339 }
1340 
1341 
1342 #ifdef VL53L1_DEBUG
1343 VL53L1_Error VL53L1_get_system_control(
1344  VL53L1_DEV Dev,
1345  VL53L1_system_control_t *pdata)
1346 {
1352  VL53L1_Error status = VL53L1_ERROR_NONE;
1353  uint8_t comms_buffer[VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES];
1354 
1355  LOG_FUNCTION_START("");
1356 
1357  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1358  status = VL53L1_ReadMulti(
1359  Dev,
1360  VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE,
1361  comms_buffer,
1362  VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES);
1363 
1364  if (status == VL53L1_ERROR_NONE)
1365  status = VL53L1_i2c_decode_system_control(
1366  VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES,
1367  comms_buffer,
1368  pdata);
1369 
1370  LOG_FUNCTION_END(status);
1371 
1372  return status;
1373 }
1374 #endif
1375 
1376 
1377 #ifdef PAL_EXTENDED
1378 VL53L1_Error VL53L1_i2c_encode_system_results(
1379  VL53L1_system_results_t *pdata,
1380  uint16_t buf_size,
1381  uint8_t *pbuffer)
1382 {
1388  VL53L1_Error status = VL53L1_ERROR_NONE;
1389 
1390  LOG_FUNCTION_START("");
1391 
1392  if (VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
1393  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1394 
1395  *(pbuffer + 0) =
1396  pdata->result__interrupt_status & 0x3F;
1397  *(pbuffer + 1) =
1398  pdata->result__range_status;
1399  *(pbuffer + 2) =
1400  pdata->result__report_status & 0xF;
1401  *(pbuffer + 3) =
1402  pdata->result__stream_count;
1403  VL53L1_i2c_encode_uint16_t(
1404  pdata->result__dss_actual_effective_spads_sd0,
1405  2,
1406  pbuffer + 4);
1407  VL53L1_i2c_encode_uint16_t(
1408  pdata->result__peak_signal_count_rate_mcps_sd0,
1409  2,
1410  pbuffer + 6);
1411  VL53L1_i2c_encode_uint16_t(
1412  pdata->result__ambient_count_rate_mcps_sd0,
1413  2,
1414  pbuffer + 8);
1415  VL53L1_i2c_encode_uint16_t(
1416  pdata->result__sigma_sd0,
1417  2,
1418  pbuffer + 10);
1419  VL53L1_i2c_encode_uint16_t(
1420  pdata->result__phase_sd0,
1421  2,
1422  pbuffer + 12);
1423  VL53L1_i2c_encode_uint16_t(
1424  pdata->result__final_crosstalk_corrected_range_mm_sd0,
1425  2,
1426  pbuffer + 14);
1427  VL53L1_i2c_encode_uint16_t(
1428  pdata->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
1429  2,
1430  pbuffer + 16);
1431  VL53L1_i2c_encode_uint16_t(
1432  pdata->result__mm_inner_actual_effective_spads_sd0,
1433  2,
1434  pbuffer + 18);
1435  VL53L1_i2c_encode_uint16_t(
1436  pdata->result__mm_outer_actual_effective_spads_sd0,
1437  2,
1438  pbuffer + 20);
1439  VL53L1_i2c_encode_uint16_t(
1440  pdata->result__avg_signal_count_rate_mcps_sd0,
1441  2,
1442  pbuffer + 22);
1443  VL53L1_i2c_encode_uint16_t(
1444  pdata->result__dss_actual_effective_spads_sd1,
1445  2,
1446  pbuffer + 24);
1447  VL53L1_i2c_encode_uint16_t(
1448  pdata->result__peak_signal_count_rate_mcps_sd1,
1449  2,
1450  pbuffer + 26);
1451  VL53L1_i2c_encode_uint16_t(
1452  pdata->result__ambient_count_rate_mcps_sd1,
1453  2,
1454  pbuffer + 28);
1455  VL53L1_i2c_encode_uint16_t(
1456  pdata->result__sigma_sd1,
1457  2,
1458  pbuffer + 30);
1459  VL53L1_i2c_encode_uint16_t(
1460  pdata->result__phase_sd1,
1461  2,
1462  pbuffer + 32);
1463  VL53L1_i2c_encode_uint16_t(
1464  pdata->result__final_crosstalk_corrected_range_mm_sd1,
1465  2,
1466  pbuffer + 34);
1467  VL53L1_i2c_encode_uint16_t(
1468  pdata->result__spare_0_sd1,
1469  2,
1470  pbuffer + 36);
1471  VL53L1_i2c_encode_uint16_t(
1472  pdata->result__spare_1_sd1,
1473  2,
1474  pbuffer + 38);
1475  VL53L1_i2c_encode_uint16_t(
1476  pdata->result__spare_2_sd1,
1477  2,
1478  pbuffer + 40);
1479  *(pbuffer + 42) =
1480  pdata->result__spare_3_sd1;
1481  *(pbuffer + 43) =
1482  pdata->result__thresh_info;
1483  LOG_FUNCTION_END(status);
1484 
1485 
1486  return status;
1487 }
1488 #endif
1489 
1490 
1491 VL53L1_Error VL53L1_i2c_decode_system_results(
1492  uint16_t buf_size,
1493  uint8_t *pbuffer,
1494  VL53L1_system_results_t *pdata)
1495 {
1501  VL53L1_Error status = VL53L1_ERROR_NONE;
1502 
1503  LOG_FUNCTION_START("");
1504 
1505  if (VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
1506  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1507 
1508  pdata->result__interrupt_status =
1509  (*(pbuffer + 0)) & 0x3F;
1510  pdata->result__range_status =
1511  (*(pbuffer + 1));
1512  pdata->result__report_status =
1513  (*(pbuffer + 2)) & 0xF;
1514  pdata->result__stream_count =
1515  (*(pbuffer + 3));
1516  pdata->result__dss_actual_effective_spads_sd0 =
1517  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 4));
1518  pdata->result__peak_signal_count_rate_mcps_sd0 =
1519  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 6));
1520  pdata->result__ambient_count_rate_mcps_sd0 =
1521  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 8));
1522  pdata->result__sigma_sd0 =
1523  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 10));
1524  pdata->result__phase_sd0 =
1525  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
1526  pdata->result__final_crosstalk_corrected_range_mm_sd0 =
1527  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 14));
1528  pdata->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
1529  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 16));
1530  pdata->result__mm_inner_actual_effective_spads_sd0 =
1531  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 18));
1532  pdata->result__mm_outer_actual_effective_spads_sd0 =
1533  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 20));
1534  pdata->result__avg_signal_count_rate_mcps_sd0 =
1535  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 22));
1536  pdata->result__dss_actual_effective_spads_sd1 =
1537  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 24));
1538  pdata->result__peak_signal_count_rate_mcps_sd1 =
1539  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 26));
1540  pdata->result__ambient_count_rate_mcps_sd1 =
1541  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 28));
1542  pdata->result__sigma_sd1 =
1543  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 30));
1544  pdata->result__phase_sd1 =
1545  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 32));
1546  pdata->result__final_crosstalk_corrected_range_mm_sd1 =
1547  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 34));
1548  pdata->result__spare_0_sd1 =
1549  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 36));
1550  pdata->result__spare_1_sd1 =
1551  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 38));
1552  pdata->result__spare_2_sd1 =
1553  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 40));
1554  pdata->result__spare_3_sd1 =
1555  (*(pbuffer + 42));
1556  pdata->result__thresh_info =
1557  (*(pbuffer + 43));
1558 
1559  LOG_FUNCTION_END(status);
1560 
1561  return status;
1562 }
1563 
1564 
1565 #ifdef PAL_EXTENDED
1566 VL53L1_Error VL53L1_set_system_results(
1567  VL53L1_DEV Dev,
1568  VL53L1_system_results_t *pdata)
1569 {
1575  VL53L1_Error status = VL53L1_ERROR_NONE;
1576  uint8_t comms_buffer[VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES];
1577 
1578  LOG_FUNCTION_START("");
1579 
1580  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1581  status = VL53L1_i2c_encode_system_results(
1582  pdata,
1583  VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES,
1584  comms_buffer);
1585 
1586  if (status == VL53L1_ERROR_NONE)
1587  status = VL53L1_WriteMulti(
1588  Dev,
1589  VL53L1_RESULT__INTERRUPT_STATUS,
1590  comms_buffer,
1591  VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES);
1592 
1593  LOG_FUNCTION_END(status);
1594 
1595  return status;
1596 }
1597 #endif
1598 
1599 
1600 VL53L1_Error VL53L1_get_system_results(
1601  VL53L1_DEV Dev,
1602  VL53L1_system_results_t *pdata)
1603 {
1609  VL53L1_Error status = VL53L1_ERROR_NONE;
1610  uint8_t comms_buffer[VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES];
1611 
1612  LOG_FUNCTION_START("");
1613 
1614  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1615  status = VL53L1_ReadMulti(
1616  Dev,
1617  VL53L1_RESULT__INTERRUPT_STATUS,
1618  comms_buffer,
1619  VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES);
1620 
1621  if (status == VL53L1_ERROR_NONE)
1622  status = VL53L1_i2c_decode_system_results(
1623  VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES,
1624  comms_buffer,
1625  pdata);
1626 
1627  LOG_FUNCTION_END(status);
1628 
1629  return status;
1630 }
1631 
1632 
1633 #ifdef PAL_EXTENDED
1634 VL53L1_Error VL53L1_i2c_encode_core_results(
1635  VL53L1_core_results_t *pdata,
1636  uint16_t buf_size,
1637  uint8_t *pbuffer)
1638 {
1644  VL53L1_Error status = VL53L1_ERROR_NONE;
1645 
1646  LOG_FUNCTION_START("");
1647 
1648  if (VL53L1_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
1649  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1650 
1651  VL53L1_i2c_encode_uint32_t(
1652  pdata->result_core__ambient_window_events_sd0,
1653  4,
1654  pbuffer + 0);
1655  VL53L1_i2c_encode_uint32_t(
1656  pdata->result_core__ranging_total_events_sd0,
1657  4,
1658  pbuffer + 4);
1659  VL53L1_i2c_encode_int32_t(
1660  pdata->result_core__signal_total_events_sd0,
1661  4,
1662  pbuffer + 8);
1663  VL53L1_i2c_encode_uint32_t(
1664  pdata->result_core__total_periods_elapsed_sd0,
1665  4,
1666  pbuffer + 12);
1667  VL53L1_i2c_encode_uint32_t(
1668  pdata->result_core__ambient_window_events_sd1,
1669  4,
1670  pbuffer + 16);
1671  VL53L1_i2c_encode_uint32_t(
1672  pdata->result_core__ranging_total_events_sd1,
1673  4,
1674  pbuffer + 20);
1675  VL53L1_i2c_encode_int32_t(
1676  pdata->result_core__signal_total_events_sd1,
1677  4,
1678  pbuffer + 24);
1679  VL53L1_i2c_encode_uint32_t(
1680  pdata->result_core__total_periods_elapsed_sd1,
1681  4,
1682  pbuffer + 28);
1683  *(pbuffer + 32) =
1684  pdata->result_core__spare_0;
1685  LOG_FUNCTION_END(status);
1686 
1687 
1688  return status;
1689 }
1690 #endif
1691 
1692 
1693 VL53L1_Error VL53L1_i2c_decode_core_results(
1694  uint16_t buf_size,
1695  uint8_t *pbuffer,
1696  VL53L1_core_results_t *pdata)
1697 {
1703  VL53L1_Error status = VL53L1_ERROR_NONE;
1704 
1705  LOG_FUNCTION_START("");
1706 
1707  if (VL53L1_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
1708  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1709 
1710  pdata->result_core__ambient_window_events_sd0 =
1711  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 0));
1712  pdata->result_core__ranging_total_events_sd0 =
1713  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 4));
1714  pdata->result_core__signal_total_events_sd0 =
1715  (VL53L1_i2c_decode_int32_t(4, pbuffer + 8));
1716  pdata->result_core__total_periods_elapsed_sd0 =
1717  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 12));
1718  pdata->result_core__ambient_window_events_sd1 =
1719  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 16));
1720  pdata->result_core__ranging_total_events_sd1 =
1721  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 20));
1722  pdata->result_core__signal_total_events_sd1 =
1723  (VL53L1_i2c_decode_int32_t(4, pbuffer + 24));
1724  pdata->result_core__total_periods_elapsed_sd1 =
1725  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 28));
1726  pdata->result_core__spare_0 =
1727  (*(pbuffer + 32));
1728 
1729  LOG_FUNCTION_END(status);
1730 
1731  return status;
1732 }
1733 
1734 
1735 #ifdef VL53L1_DEBUG
1736 VL53L1_Error VL53L1_set_core_results(
1737  VL53L1_DEV Dev,
1738  VL53L1_core_results_t *pdata)
1739 {
1745  VL53L1_Error status = VL53L1_ERROR_NONE;
1746  uint8_t comms_buffer[VL53L1_CORE_RESULTS_I2C_SIZE_BYTES];
1747 
1748  LOG_FUNCTION_START("");
1749 
1750  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1751  status = VL53L1_i2c_encode_core_results(
1752  pdata,
1753  VL53L1_CORE_RESULTS_I2C_SIZE_BYTES,
1754  comms_buffer);
1755 
1756  if (status == VL53L1_ERROR_NONE)
1757  status = VL53L1_disable_firmware(Dev);
1758 
1759  if (status == VL53L1_ERROR_NONE)
1760  status = VL53L1_WriteMulti(
1761  Dev,
1762  VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
1763  comms_buffer,
1764  VL53L1_CORE_RESULTS_I2C_SIZE_BYTES);
1765 
1766  if (status == VL53L1_ERROR_NONE)
1767  status = VL53L1_enable_firmware(Dev);
1768 
1769  LOG_FUNCTION_END(status);
1770 
1771  return status;
1772 }
1773 #endif
1774 
1775 
1776 #ifdef PAL_EXTENDED
1777 VL53L1_Error VL53L1_get_core_results(
1778  VL53L1_DEV Dev,
1779  VL53L1_core_results_t *pdata)
1780 {
1786  VL53L1_Error status = VL53L1_ERROR_NONE;
1787  uint8_t comms_buffer[VL53L1_CORE_RESULTS_I2C_SIZE_BYTES];
1788 
1789  LOG_FUNCTION_START("");
1790 
1791  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
1792  status = VL53L1_ReadMulti(
1793  Dev,
1794  VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
1795  comms_buffer,
1796  VL53L1_CORE_RESULTS_I2C_SIZE_BYTES);
1797 
1798  if (status == VL53L1_ERROR_NONE)
1799  status = VL53L1_i2c_decode_core_results(
1800  VL53L1_CORE_RESULTS_I2C_SIZE_BYTES,
1801  comms_buffer,
1802  pdata);
1803 
1804  LOG_FUNCTION_END(status);
1805 
1806  return status;
1807 }
1808 #endif
1809 
1810 
1811 #ifdef VL53L1_DEBUG
1812 VL53L1_Error VL53L1_i2c_encode_debug_results(
1813  VL53L1_debug_results_t *pdata,
1814  uint16_t buf_size,
1815  uint8_t *pbuffer)
1816 {
1822  VL53L1_Error status = VL53L1_ERROR_NONE;
1823 
1824  LOG_FUNCTION_START("");
1825 
1826  if (VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES > buf_size)
1827  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1828 
1829  VL53L1_i2c_encode_uint16_t(
1830  pdata->phasecal_result__reference_phase,
1831  2,
1832  pbuffer + 0);
1833  *(pbuffer + 2) =
1834  pdata->phasecal_result__vcsel_start & 0x7F;
1835  *(pbuffer + 3) =
1836  pdata->ref_spad_char_result__num_actual_ref_spads & 0x3F;
1837  *(pbuffer + 4) =
1838  pdata->ref_spad_char_result__ref_location & 0x3;
1839  *(pbuffer + 5) =
1840  pdata->vhv_result__coldboot_status & 0x1;
1841  *(pbuffer + 6) =
1842  pdata->vhv_result__search_result & 0x3F;
1843  *(pbuffer + 7) =
1844  pdata->vhv_result__latest_setting & 0x3F;
1845  VL53L1_i2c_encode_uint16_t(
1846  pdata->result__osc_calibrate_val & 0x3FF,
1847  2,
1848  pbuffer + 8);
1849  *(pbuffer + 10) =
1850  pdata->ana_config__powerdown_go1 & 0x3;
1851  *(pbuffer + 11) =
1852  pdata->ana_config__ref_bg_ctrl & 0x3;
1853  *(pbuffer + 12) =
1854  pdata->ana_config__regdvdd1v2_ctrl & 0xF;
1855  *(pbuffer + 13) =
1856  pdata->ana_config__osc_slow_ctrl & 0x7;
1857  *(pbuffer + 14) =
1858  pdata->test_mode__status & 0x1;
1859  *(pbuffer + 15) =
1860  pdata->firmware__system_status & 0x3;
1861  *(pbuffer + 16) =
1862  pdata->firmware__mode_status;
1863  *(pbuffer + 17) =
1864  pdata->firmware__secondary_mode_status;
1865  VL53L1_i2c_encode_uint16_t(
1866  pdata->firmware__cal_repeat_rate_counter & 0xFFF,
1867  2,
1868  pbuffer + 18);
1869  VL53L1_i2c_encode_uint16_t(
1870  pdata->gph__system__thresh_high,
1871  2,
1872  pbuffer + 22);
1873  VL53L1_i2c_encode_uint16_t(
1874  pdata->gph__system__thresh_low,
1875  2,
1876  pbuffer + 24);
1877  *(pbuffer + 26) =
1878  pdata->gph__system__enable_xtalk_per_quadrant & 0x1;
1879  *(pbuffer + 27) =
1880  pdata->gph__spare_0 & 0x7;
1881  *(pbuffer + 28) =
1882  pdata->gph__sd_config__woi_sd0;
1883  *(pbuffer + 29) =
1884  pdata->gph__sd_config__woi_sd1;
1885  *(pbuffer + 30) =
1886  pdata->gph__sd_config__initial_phase_sd0 & 0x7F;
1887  *(pbuffer + 31) =
1888  pdata->gph__sd_config__initial_phase_sd1 & 0x7F;
1889  *(pbuffer + 32) =
1890  pdata->gph__sd_config__first_order_select & 0x3;
1891  *(pbuffer + 33) =
1892  pdata->gph__sd_config__quantifier & 0xF;
1893  *(pbuffer + 34) =
1894  pdata->gph__roi_config__user_roi_centre_spad;
1895  *(pbuffer + 35) =
1896  pdata->gph__roi_config__user_roi_requested_global_xy_size;
1897  *(pbuffer + 36) =
1898  pdata->gph__system__sequence_config;
1899  *(pbuffer + 37) =
1900  pdata->gph__gph_id & 0x1;
1901  *(pbuffer + 38) =
1902  pdata->system__interrupt_set & 0x3;
1903  *(pbuffer + 39) =
1904  pdata->interrupt_manager__enables & 0x1F;
1905  *(pbuffer + 40) =
1906  pdata->interrupt_manager__clear & 0x1F;
1907  *(pbuffer + 41) =
1908  pdata->interrupt_manager__status & 0x1F;
1909  *(pbuffer + 42) =
1910  pdata->mcu_to_host_bank__wr_access_en & 0x1;
1911  *(pbuffer + 43) =
1912  pdata->power_management__go1_reset_status & 0x1;
1913  *(pbuffer + 44) =
1914  pdata->pad_startup_mode__value_ro & 0x3;
1915  *(pbuffer + 45) =
1916  pdata->pad_startup_mode__value_ctrl & 0x3F;
1917  VL53L1_i2c_encode_uint32_t(
1918  pdata->pll_period_us & 0x3FFFF,
1919  4,
1920  pbuffer + 46);
1921  VL53L1_i2c_encode_uint32_t(
1922  pdata->interrupt_scheduler__data_out,
1923  4,
1924  pbuffer + 50);
1925  *(pbuffer + 54) =
1926  pdata->nvm_bist__complete & 0x1;
1927  *(pbuffer + 55) =
1928  pdata->nvm_bist__status & 0x1;
1929  LOG_FUNCTION_END(status);
1930 
1931 
1932  return status;
1933 }
1934 #endif
1935 
1936 
1937 VL53L1_Error VL53L1_i2c_decode_debug_results(
1938  uint16_t buf_size,
1939  uint8_t *pbuffer,
1940  VL53L1_debug_results_t *pdata)
1941 {
1947  VL53L1_Error status = VL53L1_ERROR_NONE;
1948 
1949  LOG_FUNCTION_START("");
1950 
1951  if (VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES > buf_size)
1952  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
1953 
1954  pdata->phasecal_result__reference_phase =
1955  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 0));
1956  pdata->phasecal_result__vcsel_start =
1957  (*(pbuffer + 2)) & 0x7F;
1958  pdata->ref_spad_char_result__num_actual_ref_spads =
1959  (*(pbuffer + 3)) & 0x3F;
1960  pdata->ref_spad_char_result__ref_location =
1961  (*(pbuffer + 4)) & 0x3;
1962  pdata->vhv_result__coldboot_status =
1963  (*(pbuffer + 5)) & 0x1;
1964  pdata->vhv_result__search_result =
1965  (*(pbuffer + 6)) & 0x3F;
1966  pdata->vhv_result__latest_setting =
1967  (*(pbuffer + 7)) & 0x3F;
1968  pdata->result__osc_calibrate_val =
1969  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 8)) & 0x3FF;
1970  pdata->ana_config__powerdown_go1 =
1971  (*(pbuffer + 10)) & 0x3;
1972  pdata->ana_config__ref_bg_ctrl =
1973  (*(pbuffer + 11)) & 0x3;
1974  pdata->ana_config__regdvdd1v2_ctrl =
1975  (*(pbuffer + 12)) & 0xF;
1976  pdata->ana_config__osc_slow_ctrl =
1977  (*(pbuffer + 13)) & 0x7;
1978  pdata->test_mode__status =
1979  (*(pbuffer + 14)) & 0x1;
1980  pdata->firmware__system_status =
1981  (*(pbuffer + 15)) & 0x3;
1982  pdata->firmware__mode_status =
1983  (*(pbuffer + 16));
1984  pdata->firmware__secondary_mode_status =
1985  (*(pbuffer + 17));
1986  pdata->firmware__cal_repeat_rate_counter =
1987  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 18)) & 0xFFF;
1988  pdata->gph__system__thresh_high =
1989  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 22));
1990  pdata->gph__system__thresh_low =
1991  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 24));
1992  pdata->gph__system__enable_xtalk_per_quadrant =
1993  (*(pbuffer + 26)) & 0x1;
1994  pdata->gph__spare_0 =
1995  (*(pbuffer + 27)) & 0x7;
1996  pdata->gph__sd_config__woi_sd0 =
1997  (*(pbuffer + 28));
1998  pdata->gph__sd_config__woi_sd1 =
1999  (*(pbuffer + 29));
2000  pdata->gph__sd_config__initial_phase_sd0 =
2001  (*(pbuffer + 30)) & 0x7F;
2002  pdata->gph__sd_config__initial_phase_sd1 =
2003  (*(pbuffer + 31)) & 0x7F;
2004  pdata->gph__sd_config__first_order_select =
2005  (*(pbuffer + 32)) & 0x3;
2006  pdata->gph__sd_config__quantifier =
2007  (*(pbuffer + 33)) & 0xF;
2008  pdata->gph__roi_config__user_roi_centre_spad =
2009  (*(pbuffer + 34));
2010  pdata->gph__roi_config__user_roi_requested_global_xy_size =
2011  (*(pbuffer + 35));
2012  pdata->gph__system__sequence_config =
2013  (*(pbuffer + 36));
2014  pdata->gph__gph_id =
2015  (*(pbuffer + 37)) & 0x1;
2016  pdata->system__interrupt_set =
2017  (*(pbuffer + 38)) & 0x3;
2018  pdata->interrupt_manager__enables =
2019  (*(pbuffer + 39)) & 0x1F;
2020  pdata->interrupt_manager__clear =
2021  (*(pbuffer + 40)) & 0x1F;
2022  pdata->interrupt_manager__status =
2023  (*(pbuffer + 41)) & 0x1F;
2024  pdata->mcu_to_host_bank__wr_access_en =
2025  (*(pbuffer + 42)) & 0x1;
2026  pdata->power_management__go1_reset_status =
2027  (*(pbuffer + 43)) & 0x1;
2028  pdata->pad_startup_mode__value_ro =
2029  (*(pbuffer + 44)) & 0x3;
2030  pdata->pad_startup_mode__value_ctrl =
2031  (*(pbuffer + 45)) & 0x3F;
2032  pdata->pll_period_us =
2033  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 46)) & 0x3FFFF;
2034  pdata->interrupt_scheduler__data_out =
2035  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 50));
2036  pdata->nvm_bist__complete =
2037  (*(pbuffer + 54)) & 0x1;
2038  pdata->nvm_bist__status =
2039  (*(pbuffer + 55)) & 0x1;
2040 
2041  LOG_FUNCTION_END(status);
2042 
2043  return status;
2044 }
2045 
2046 
2047 #ifdef VL53L1_DEBUG
2048 VL53L1_Error VL53L1_set_debug_results(
2049  VL53L1_DEV Dev,
2050  VL53L1_debug_results_t *pdata)
2051 {
2057  VL53L1_Error status = VL53L1_ERROR_NONE;
2058  uint8_t comms_buffer[VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES];
2059 
2060  LOG_FUNCTION_START("");
2061 
2062  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2063  status = VL53L1_i2c_encode_debug_results(
2064  pdata,
2065  VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES,
2066  comms_buffer);
2067 
2068  if (status == VL53L1_ERROR_NONE)
2069  status = VL53L1_disable_firmware(Dev);
2070 
2071  if (status == VL53L1_ERROR_NONE)
2072  status = VL53L1_WriteMulti(
2073  Dev,
2074  VL53L1_PHASECAL_RESULT__REFERENCE_PHASE,
2075  comms_buffer,
2076  VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES);
2077 
2078  if (status == VL53L1_ERROR_NONE)
2079  status = VL53L1_enable_firmware(Dev);
2080 
2081  LOG_FUNCTION_END(status);
2082 
2083  return status;
2084 }
2085 
2086 
2087 VL53L1_Error VL53L1_get_debug_results(
2088  VL53L1_DEV Dev,
2089  VL53L1_debug_results_t *pdata)
2090 {
2096  VL53L1_Error status = VL53L1_ERROR_NONE;
2097  uint8_t comms_buffer[VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES];
2098 
2099  LOG_FUNCTION_START("");
2100 
2101  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2102  status = VL53L1_ReadMulti(
2103  Dev,
2104  VL53L1_PHASECAL_RESULT__REFERENCE_PHASE,
2105  comms_buffer,
2106  VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES);
2107 
2108  if (status == VL53L1_ERROR_NONE)
2109  status = VL53L1_i2c_decode_debug_results(
2110  VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES,
2111  comms_buffer,
2112  pdata);
2113 
2114  LOG_FUNCTION_END(status);
2115 
2116  return status;
2117 }
2118 #endif
2119 
2120 
2121 #ifdef PAL_EXTENDED
2122 VL53L1_Error VL53L1_i2c_encode_nvm_copy_data(
2123  VL53L1_nvm_copy_data_t *pdata,
2124  uint16_t buf_size,
2125  uint8_t *pbuffer)
2126 {
2132  VL53L1_Error status = VL53L1_ERROR_NONE;
2133 
2134  LOG_FUNCTION_START("");
2135 
2136  if (VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES > buf_size)
2137  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2138 
2139  *(pbuffer + 0) =
2140  pdata->identification__model_id;
2141  *(pbuffer + 1) =
2142  pdata->identification__module_type;
2143  *(pbuffer + 2) =
2144  pdata->identification__revision_id;
2145  VL53L1_i2c_encode_uint16_t(
2146  pdata->identification__module_id,
2147  2,
2148  pbuffer + 3);
2149  *(pbuffer + 5) =
2150  pdata->ana_config__fast_osc__trim_max & 0x7F;
2151  *(pbuffer + 6) =
2152  pdata->ana_config__fast_osc__freq_set & 0x7;
2153  *(pbuffer + 7) =
2154  pdata->ana_config__vcsel_trim & 0x7;
2155  *(pbuffer + 8) =
2156  pdata->ana_config__vcsel_selion & 0x3F;
2157  *(pbuffer + 9) =
2158  pdata->ana_config__vcsel_selion_max & 0x3F;
2159  *(pbuffer + 10) =
2160  pdata->protected_laser_safety__lock_bit & 0x1;
2161  *(pbuffer + 11) =
2162  pdata->laser_safety__key & 0x7F;
2163  *(pbuffer + 12) =
2164  pdata->laser_safety__key_ro & 0x1;
2165  *(pbuffer + 13) =
2166  pdata->laser_safety__clip & 0x3F;
2167  *(pbuffer + 14) =
2168  pdata->laser_safety__mult & 0x3F;
2169  *(pbuffer + 15) =
2170  pdata->global_config__spad_enables_rtn_0;
2171  *(pbuffer + 16) =
2172  pdata->global_config__spad_enables_rtn_1;
2173  *(pbuffer + 17) =
2174  pdata->global_config__spad_enables_rtn_2;
2175  *(pbuffer + 18) =
2176  pdata->global_config__spad_enables_rtn_3;
2177  *(pbuffer + 19) =
2178  pdata->global_config__spad_enables_rtn_4;
2179  *(pbuffer + 20) =
2180  pdata->global_config__spad_enables_rtn_5;
2181  *(pbuffer + 21) =
2182  pdata->global_config__spad_enables_rtn_6;
2183  *(pbuffer + 22) =
2184  pdata->global_config__spad_enables_rtn_7;
2185  *(pbuffer + 23) =
2186  pdata->global_config__spad_enables_rtn_8;
2187  *(pbuffer + 24) =
2188  pdata->global_config__spad_enables_rtn_9;
2189  *(pbuffer + 25) =
2190  pdata->global_config__spad_enables_rtn_10;
2191  *(pbuffer + 26) =
2192  pdata->global_config__spad_enables_rtn_11;
2193  *(pbuffer + 27) =
2194  pdata->global_config__spad_enables_rtn_12;
2195  *(pbuffer + 28) =
2196  pdata->global_config__spad_enables_rtn_13;
2197  *(pbuffer + 29) =
2198  pdata->global_config__spad_enables_rtn_14;
2199  *(pbuffer + 30) =
2200  pdata->global_config__spad_enables_rtn_15;
2201  *(pbuffer + 31) =
2202  pdata->global_config__spad_enables_rtn_16;
2203  *(pbuffer + 32) =
2204  pdata->global_config__spad_enables_rtn_17;
2205  *(pbuffer + 33) =
2206  pdata->global_config__spad_enables_rtn_18;
2207  *(pbuffer + 34) =
2208  pdata->global_config__spad_enables_rtn_19;
2209  *(pbuffer + 35) =
2210  pdata->global_config__spad_enables_rtn_20;
2211  *(pbuffer + 36) =
2212  pdata->global_config__spad_enables_rtn_21;
2213  *(pbuffer + 37) =
2214  pdata->global_config__spad_enables_rtn_22;
2215  *(pbuffer + 38) =
2216  pdata->global_config__spad_enables_rtn_23;
2217  *(pbuffer + 39) =
2218  pdata->global_config__spad_enables_rtn_24;
2219  *(pbuffer + 40) =
2220  pdata->global_config__spad_enables_rtn_25;
2221  *(pbuffer + 41) =
2222  pdata->global_config__spad_enables_rtn_26;
2223  *(pbuffer + 42) =
2224  pdata->global_config__spad_enables_rtn_27;
2225  *(pbuffer + 43) =
2226  pdata->global_config__spad_enables_rtn_28;
2227  *(pbuffer + 44) =
2228  pdata->global_config__spad_enables_rtn_29;
2229  *(pbuffer + 45) =
2230  pdata->global_config__spad_enables_rtn_30;
2231  *(pbuffer + 46) =
2232  pdata->global_config__spad_enables_rtn_31;
2233  *(pbuffer + 47) =
2234  pdata->roi_config__mode_roi_centre_spad;
2235  *(pbuffer + 48) =
2236  pdata->roi_config__mode_roi_xy_size;
2237  LOG_FUNCTION_END(status);
2238 
2239 
2240  return status;
2241 }
2242 #endif
2243 
2244 
2245 VL53L1_Error VL53L1_i2c_decode_nvm_copy_data(
2246  uint16_t buf_size,
2247  uint8_t *pbuffer,
2248  VL53L1_nvm_copy_data_t *pdata)
2249 {
2255  VL53L1_Error status = VL53L1_ERROR_NONE;
2256 
2257  LOG_FUNCTION_START("");
2258 
2259  if (VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES > buf_size)
2260  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2261 
2262  pdata->identification__model_id =
2263  (*(pbuffer + 0));
2264  pdata->identification__module_type =
2265  (*(pbuffer + 1));
2266  pdata->identification__revision_id =
2267  (*(pbuffer + 2));
2268  pdata->identification__module_id =
2269  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 3));
2270  pdata->ana_config__fast_osc__trim_max =
2271  (*(pbuffer + 5)) & 0x7F;
2272  pdata->ana_config__fast_osc__freq_set =
2273  (*(pbuffer + 6)) & 0x7;
2274  pdata->ana_config__vcsel_trim =
2275  (*(pbuffer + 7)) & 0x7;
2276  pdata->ana_config__vcsel_selion =
2277  (*(pbuffer + 8)) & 0x3F;
2278  pdata->ana_config__vcsel_selion_max =
2279  (*(pbuffer + 9)) & 0x3F;
2280  pdata->protected_laser_safety__lock_bit =
2281  (*(pbuffer + 10)) & 0x1;
2282  pdata->laser_safety__key =
2283  (*(pbuffer + 11)) & 0x7F;
2284  pdata->laser_safety__key_ro =
2285  (*(pbuffer + 12)) & 0x1;
2286  pdata->laser_safety__clip =
2287  (*(pbuffer + 13)) & 0x3F;
2288  pdata->laser_safety__mult =
2289  (*(pbuffer + 14)) & 0x3F;
2290  pdata->global_config__spad_enables_rtn_0 =
2291  (*(pbuffer + 15));
2292  pdata->global_config__spad_enables_rtn_1 =
2293  (*(pbuffer + 16));
2294  pdata->global_config__spad_enables_rtn_2 =
2295  (*(pbuffer + 17));
2296  pdata->global_config__spad_enables_rtn_3 =
2297  (*(pbuffer + 18));
2298  pdata->global_config__spad_enables_rtn_4 =
2299  (*(pbuffer + 19));
2300  pdata->global_config__spad_enables_rtn_5 =
2301  (*(pbuffer + 20));
2302  pdata->global_config__spad_enables_rtn_6 =
2303  (*(pbuffer + 21));
2304  pdata->global_config__spad_enables_rtn_7 =
2305  (*(pbuffer + 22));
2306  pdata->global_config__spad_enables_rtn_8 =
2307  (*(pbuffer + 23));
2308  pdata->global_config__spad_enables_rtn_9 =
2309  (*(pbuffer + 24));
2310  pdata->global_config__spad_enables_rtn_10 =
2311  (*(pbuffer + 25));
2312  pdata->global_config__spad_enables_rtn_11 =
2313  (*(pbuffer + 26));
2314  pdata->global_config__spad_enables_rtn_12 =
2315  (*(pbuffer + 27));
2316  pdata->global_config__spad_enables_rtn_13 =
2317  (*(pbuffer + 28));
2318  pdata->global_config__spad_enables_rtn_14 =
2319  (*(pbuffer + 29));
2320  pdata->global_config__spad_enables_rtn_15 =
2321  (*(pbuffer + 30));
2322  pdata->global_config__spad_enables_rtn_16 =
2323  (*(pbuffer + 31));
2324  pdata->global_config__spad_enables_rtn_17 =
2325  (*(pbuffer + 32));
2326  pdata->global_config__spad_enables_rtn_18 =
2327  (*(pbuffer + 33));
2328  pdata->global_config__spad_enables_rtn_19 =
2329  (*(pbuffer + 34));
2330  pdata->global_config__spad_enables_rtn_20 =
2331  (*(pbuffer + 35));
2332  pdata->global_config__spad_enables_rtn_21 =
2333  (*(pbuffer + 36));
2334  pdata->global_config__spad_enables_rtn_22 =
2335  (*(pbuffer + 37));
2336  pdata->global_config__spad_enables_rtn_23 =
2337  (*(pbuffer + 38));
2338  pdata->global_config__spad_enables_rtn_24 =
2339  (*(pbuffer + 39));
2340  pdata->global_config__spad_enables_rtn_25 =
2341  (*(pbuffer + 40));
2342  pdata->global_config__spad_enables_rtn_26 =
2343  (*(pbuffer + 41));
2344  pdata->global_config__spad_enables_rtn_27 =
2345  (*(pbuffer + 42));
2346  pdata->global_config__spad_enables_rtn_28 =
2347  (*(pbuffer + 43));
2348  pdata->global_config__spad_enables_rtn_29 =
2349  (*(pbuffer + 44));
2350  pdata->global_config__spad_enables_rtn_30 =
2351  (*(pbuffer + 45));
2352  pdata->global_config__spad_enables_rtn_31 =
2353  (*(pbuffer + 46));
2354  pdata->roi_config__mode_roi_centre_spad =
2355  (*(pbuffer + 47));
2356  pdata->roi_config__mode_roi_xy_size =
2357  (*(pbuffer + 48));
2358 
2359  LOG_FUNCTION_END(status);
2360 
2361  return status;
2362 }
2363 
2364 #ifdef PAL_EXTENDED
2365 VL53L1_Error VL53L1_set_nvm_copy_data(
2366  VL53L1_DEV Dev,
2367  VL53L1_nvm_copy_data_t *pdata)
2368 {
2374  VL53L1_Error status = VL53L1_ERROR_NONE;
2375  uint8_t comms_buffer[VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES];
2376 
2377  LOG_FUNCTION_START("");
2378 
2379  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2380  status = VL53L1_i2c_encode_nvm_copy_data(
2381  pdata,
2382  VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES,
2383  comms_buffer);
2384 
2385  if (status == VL53L1_ERROR_NONE)
2386  status = VL53L1_disable_firmware(Dev);
2387 
2388  if (status == VL53L1_ERROR_NONE)
2389  status = VL53L1_WriteMulti(
2390  Dev,
2391  VL53L1_IDENTIFICATION__MODEL_ID,
2392  comms_buffer,
2393  VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES);
2394 
2395  if (status == VL53L1_ERROR_NONE)
2396  status = VL53L1_enable_firmware(Dev);
2397 
2398  LOG_FUNCTION_END(status);
2399 
2400  return status;
2401 }
2402 #endif
2403 
2404 
2405 VL53L1_Error VL53L1_get_nvm_copy_data(
2406  VL53L1_DEV Dev,
2407  VL53L1_nvm_copy_data_t *pdata)
2408 {
2414  VL53L1_Error status = VL53L1_ERROR_NONE;
2415  uint8_t comms_buffer[VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES];
2416 
2417  LOG_FUNCTION_START("");
2418 
2419  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2420  status = VL53L1_ReadMulti(
2421  Dev,
2422  VL53L1_IDENTIFICATION__MODEL_ID,
2423  comms_buffer,
2424  VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES);
2425 
2426  if (status == VL53L1_ERROR_NONE)
2427  status = VL53L1_i2c_decode_nvm_copy_data(
2428  VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES,
2429  comms_buffer,
2430  pdata);
2431 
2432  LOG_FUNCTION_END(status);
2433 
2434  return status;
2435 }
2436 
2437 
2438 #ifdef VL53L1_DEBUG
2439 VL53L1_Error VL53L1_i2c_encode_prev_shadow_system_results(
2440  VL53L1_prev_shadow_system_results_t *pdata,
2441  uint16_t buf_size,
2442  uint8_t *pbuffer)
2443 {
2449  VL53L1_Error status = VL53L1_ERROR_NONE;
2450 
2451  LOG_FUNCTION_START("");
2452 
2453  if (VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
2454  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2455 
2456  *(pbuffer + 0) =
2457  pdata->prev_shadow_result__interrupt_status & 0x3F;
2458  *(pbuffer + 1) =
2459  pdata->prev_shadow_result__range_status;
2460  *(pbuffer + 2) =
2461  pdata->prev_shadow_result__report_status & 0xF;
2462  *(pbuffer + 3) =
2463  pdata->prev_shadow_result__stream_count;
2464  VL53L1_i2c_encode_uint16_t(
2465  pdata->prev_shadow_result__dss_actual_effective_spads_sd0,
2466  2,
2467  pbuffer + 4);
2468  VL53L1_i2c_encode_uint16_t(
2469  pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd0,
2470  2,
2471  pbuffer + 6);
2472  VL53L1_i2c_encode_uint16_t(
2473  pdata->prev_shadow_result__ambient_count_rate_mcps_sd0,
2474  2,
2475  pbuffer + 8);
2476  VL53L1_i2c_encode_uint16_t(
2477  pdata->prev_shadow_result__sigma_sd0,
2478  2,
2479  pbuffer + 10);
2480  VL53L1_i2c_encode_uint16_t(
2481  pdata->prev_shadow_result__phase_sd0,
2482  2,
2483  pbuffer + 12);
2484  VL53L1_i2c_encode_uint16_t(
2485  pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd0,
2486  2,
2487  pbuffer + 14);
2488  VL53L1_i2c_encode_uint16_t(
2489  pdata->prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
2490  2,
2491  pbuffer + 16);
2492  VL53L1_i2c_encode_uint16_t(
2493  pdata->prev_shadow_result__mm_inner_actual_effective_spads_sd0,
2494  2,
2495  pbuffer + 18);
2496  VL53L1_i2c_encode_uint16_t(
2497  pdata->prev_shadow_result__mm_outer_actual_effective_spads_sd0,
2498  2,
2499  pbuffer + 20);
2500  VL53L1_i2c_encode_uint16_t(
2501  pdata->prev_shadow_result__avg_signal_count_rate_mcps_sd0,
2502  2,
2503  pbuffer + 22);
2504  VL53L1_i2c_encode_uint16_t(
2505  pdata->prev_shadow_result__dss_actual_effective_spads_sd1,
2506  2,
2507  pbuffer + 24);
2508  VL53L1_i2c_encode_uint16_t(
2509  pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd1,
2510  2,
2511  pbuffer + 26);
2512  VL53L1_i2c_encode_uint16_t(
2513  pdata->prev_shadow_result__ambient_count_rate_mcps_sd1,
2514  2,
2515  pbuffer + 28);
2516  VL53L1_i2c_encode_uint16_t(
2517  pdata->prev_shadow_result__sigma_sd1,
2518  2,
2519  pbuffer + 30);
2520  VL53L1_i2c_encode_uint16_t(
2521  pdata->prev_shadow_result__phase_sd1,
2522  2,
2523  pbuffer + 32);
2524  VL53L1_i2c_encode_uint16_t(
2525  pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd1,
2526  2,
2527  pbuffer + 34);
2528  VL53L1_i2c_encode_uint16_t(
2529  pdata->prev_shadow_result__spare_0_sd1,
2530  2,
2531  pbuffer + 36);
2532  VL53L1_i2c_encode_uint16_t(
2533  pdata->prev_shadow_result__spare_1_sd1,
2534  2,
2535  pbuffer + 38);
2536  VL53L1_i2c_encode_uint16_t(
2537  pdata->prev_shadow_result__spare_2_sd1,
2538  2,
2539  pbuffer + 40);
2540  VL53L1_i2c_encode_uint16_t(
2541  pdata->prev_shadow_result__spare_3_sd1,
2542  2,
2543  pbuffer + 42);
2544  LOG_FUNCTION_END(status);
2545 
2546 
2547  return status;
2548 }
2549 
2550 
2551 VL53L1_Error VL53L1_i2c_decode_prev_shadow_system_results(
2552  uint16_t buf_size,
2553  uint8_t *pbuffer,
2554  VL53L1_prev_shadow_system_results_t *pdata)
2555 {
2561  VL53L1_Error status = VL53L1_ERROR_NONE;
2562 
2563  LOG_FUNCTION_START("");
2564 
2565  if (VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
2566  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2567 
2568  pdata->prev_shadow_result__interrupt_status =
2569  (*(pbuffer + 0)) & 0x3F;
2570  pdata->prev_shadow_result__range_status =
2571  (*(pbuffer + 1));
2572  pdata->prev_shadow_result__report_status =
2573  (*(pbuffer + 2)) & 0xF;
2574  pdata->prev_shadow_result__stream_count =
2575  (*(pbuffer + 3));
2576  pdata->prev_shadow_result__dss_actual_effective_spads_sd0 =
2577  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 4));
2578  pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd0 =
2579  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 6));
2580  pdata->prev_shadow_result__ambient_count_rate_mcps_sd0 =
2581  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 8));
2582  pdata->prev_shadow_result__sigma_sd0 =
2583  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 10));
2584  pdata->prev_shadow_result__phase_sd0 =
2585  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
2586  pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd0 =
2587  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 14));
2588  pdata->prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
2589  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 16));
2590  pdata->prev_shadow_result__mm_inner_actual_effective_spads_sd0 =
2591  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 18));
2592  pdata->prev_shadow_result__mm_outer_actual_effective_spads_sd0 =
2593  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 20));
2594  pdata->prev_shadow_result__avg_signal_count_rate_mcps_sd0 =
2595  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 22));
2596  pdata->prev_shadow_result__dss_actual_effective_spads_sd1 =
2597  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 24));
2598  pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd1 =
2599  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 26));
2600  pdata->prev_shadow_result__ambient_count_rate_mcps_sd1 =
2601  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 28));
2602  pdata->prev_shadow_result__sigma_sd1 =
2603  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 30));
2604  pdata->prev_shadow_result__phase_sd1 =
2605  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 32));
2606  pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd1 =
2607  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 34));
2608  pdata->prev_shadow_result__spare_0_sd1 =
2609  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 36));
2610  pdata->prev_shadow_result__spare_1_sd1 =
2611  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 38));
2612  pdata->prev_shadow_result__spare_2_sd1 =
2613  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 40));
2614  pdata->prev_shadow_result__spare_3_sd1 =
2615  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 42));
2616 
2617  LOG_FUNCTION_END(status);
2618 
2619  return status;
2620 }
2621 
2622 
2623 VL53L1_Error VL53L1_set_prev_shadow_system_results(
2624  VL53L1_DEV Dev,
2625  VL53L1_prev_shadow_system_results_t *pdata)
2626 {
2632  VL53L1_Error status = VL53L1_ERROR_NONE;
2633  uint8_t comms_buffer[VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
2634 
2635  LOG_FUNCTION_START("");
2636 
2637  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2638  status = VL53L1_i2c_encode_prev_shadow_system_results(
2639  pdata,
2640  VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
2641  comms_buffer);
2642 
2643  if (status == VL53L1_ERROR_NONE)
2644  status = VL53L1_disable_firmware(Dev);
2645 
2646  if (status == VL53L1_ERROR_NONE)
2647  status = VL53L1_WriteMulti(
2648  Dev,
2649  VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS,
2650  comms_buffer,
2651  VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
2652 
2653  if (status == VL53L1_ERROR_NONE)
2654  status = VL53L1_enable_firmware(Dev);
2655 
2656  LOG_FUNCTION_END(status);
2657 
2658  return status;
2659 }
2660 
2661 
2662 VL53L1_Error VL53L1_get_prev_shadow_system_results(
2663  VL53L1_DEV Dev,
2664  VL53L1_prev_shadow_system_results_t *pdata)
2665 {
2671  VL53L1_Error status = VL53L1_ERROR_NONE;
2672  uint8_t comms_buffer[VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
2673 
2674  LOG_FUNCTION_START("");
2675 
2676  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2677  status = VL53L1_disable_firmware(Dev);
2678 
2679  if (status == VL53L1_ERROR_NONE)
2680  status = VL53L1_ReadMulti(
2681  Dev,
2682  VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS,
2683  comms_buffer,
2684  VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
2685 
2686  if (status == VL53L1_ERROR_NONE)
2687  status = VL53L1_enable_firmware(Dev);
2688 
2689  if (status == VL53L1_ERROR_NONE)
2690  status = VL53L1_i2c_decode_prev_shadow_system_results(
2691  VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
2692  comms_buffer,
2693  pdata);
2694 
2695  LOG_FUNCTION_END(status);
2696 
2697  return status;
2698 }
2699 
2700 
2701 VL53L1_Error VL53L1_i2c_encode_prev_shadow_core_results(
2702  VL53L1_prev_shadow_core_results_t *pdata,
2703  uint16_t buf_size,
2704  uint8_t *pbuffer)
2705 {
2711  VL53L1_Error status = VL53L1_ERROR_NONE;
2712 
2713  LOG_FUNCTION_START("");
2714 
2715  if (VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
2716  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2717 
2718  VL53L1_i2c_encode_uint32_t(
2719  pdata->prev_shadow_result_core__ambient_window_events_sd0,
2720  4,
2721  pbuffer + 0);
2722  VL53L1_i2c_encode_uint32_t(
2723  pdata->prev_shadow_result_core__ranging_total_events_sd0,
2724  4,
2725  pbuffer + 4);
2726  VL53L1_i2c_encode_int32_t(
2727  pdata->prev_shadow_result_core__signal_total_events_sd0,
2728  4,
2729  pbuffer + 8);
2730  VL53L1_i2c_encode_uint32_t(
2731  pdata->prev_shadow_result_core__total_periods_elapsed_sd0,
2732  4,
2733  pbuffer + 12);
2734  VL53L1_i2c_encode_uint32_t(
2735  pdata->prev_shadow_result_core__ambient_window_events_sd1,
2736  4,
2737  pbuffer + 16);
2738  VL53L1_i2c_encode_uint32_t(
2739  pdata->prev_shadow_result_core__ranging_total_events_sd1,
2740  4,
2741  pbuffer + 20);
2742  VL53L1_i2c_encode_int32_t(
2743  pdata->prev_shadow_result_core__signal_total_events_sd1,
2744  4,
2745  pbuffer + 24);
2746  VL53L1_i2c_encode_uint32_t(
2747  pdata->prev_shadow_result_core__total_periods_elapsed_sd1,
2748  4,
2749  pbuffer + 28);
2750  *(pbuffer + 32) =
2751  pdata->prev_shadow_result_core__spare_0;
2752  LOG_FUNCTION_END(status);
2753 
2754 
2755  return status;
2756 }
2757 
2758 
2759 VL53L1_Error VL53L1_i2c_decode_prev_shadow_core_results(
2760  uint16_t buf_size,
2761  uint8_t *pbuffer,
2762  VL53L1_prev_shadow_core_results_t *pdata)
2763 {
2769  VL53L1_Error status = VL53L1_ERROR_NONE;
2770 
2771  LOG_FUNCTION_START("");
2772 
2773  if (VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
2774  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2775 
2776  pdata->prev_shadow_result_core__ambient_window_events_sd0 =
2777  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 0));
2778  pdata->prev_shadow_result_core__ranging_total_events_sd0 =
2779  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 4));
2780  pdata->prev_shadow_result_core__signal_total_events_sd0 =
2781  (VL53L1_i2c_decode_int32_t(4, pbuffer + 8));
2782  pdata->prev_shadow_result_core__total_periods_elapsed_sd0 =
2783  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 12));
2784  pdata->prev_shadow_result_core__ambient_window_events_sd1 =
2785  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 16));
2786  pdata->prev_shadow_result_core__ranging_total_events_sd1 =
2787  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 20));
2788  pdata->prev_shadow_result_core__signal_total_events_sd1 =
2789  (VL53L1_i2c_decode_int32_t(4, pbuffer + 24));
2790  pdata->prev_shadow_result_core__total_periods_elapsed_sd1 =
2791  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 28));
2792  pdata->prev_shadow_result_core__spare_0 =
2793  (*(pbuffer + 32));
2794 
2795  LOG_FUNCTION_END(status);
2796 
2797  return status;
2798 }
2799 
2800 
2801 VL53L1_Error VL53L1_set_prev_shadow_core_results(
2802  VL53L1_DEV Dev,
2803  VL53L1_prev_shadow_core_results_t *pdata)
2804 {
2810  VL53L1_Error status = VL53L1_ERROR_NONE;
2811  uint8_t comms_buffer[VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
2812 
2813  LOG_FUNCTION_START("");
2814 
2815  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2816  status = VL53L1_i2c_encode_prev_shadow_core_results(
2817  pdata,
2818  VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
2819  comms_buffer);
2820 
2821  if (status == VL53L1_ERROR_NONE)
2822  status = VL53L1_disable_firmware(Dev);
2823 
2824  if (status == VL53L1_ERROR_NONE)
2825  status = VL53L1_WriteMulti(
2826  Dev,
2827  VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
2828  comms_buffer,
2829  VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
2830 
2831  if (status == VL53L1_ERROR_NONE)
2832  status = VL53L1_enable_firmware(Dev);
2833 
2834  LOG_FUNCTION_END(status);
2835 
2836  return status;
2837 }
2838 
2839 
2840 VL53L1_Error VL53L1_get_prev_shadow_core_results(
2841  VL53L1_DEV Dev,
2842  VL53L1_prev_shadow_core_results_t *pdata)
2843 {
2849  VL53L1_Error status = VL53L1_ERROR_NONE;
2850  uint8_t comms_buffer[VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
2851 
2852  LOG_FUNCTION_START("");
2853 
2854  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2855  status = VL53L1_disable_firmware(Dev);
2856 
2857  if (status == VL53L1_ERROR_NONE)
2858  status = VL53L1_ReadMulti(
2859  Dev,
2860  VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
2861  comms_buffer,
2862  VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
2863 
2864  if (status == VL53L1_ERROR_NONE)
2865  status = VL53L1_enable_firmware(Dev);
2866 
2867  if (status == VL53L1_ERROR_NONE)
2868  status = VL53L1_i2c_decode_prev_shadow_core_results(
2869  VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
2870  comms_buffer,
2871  pdata);
2872 
2873  LOG_FUNCTION_END(status);
2874 
2875  return status;
2876 }
2877 
2878 
2879 VL53L1_Error VL53L1_i2c_encode_patch_debug(
2880  VL53L1_patch_debug_t *pdata,
2881  uint16_t buf_size,
2882  uint8_t *pbuffer)
2883 {
2889  VL53L1_Error status = VL53L1_ERROR_NONE;
2890 
2891  LOG_FUNCTION_START("");
2892 
2893  if (VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES > buf_size)
2894  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2895 
2896  *(pbuffer + 0) =
2897  pdata->result__debug_status;
2898  *(pbuffer + 1) =
2899  pdata->result__debug_stage;
2900  LOG_FUNCTION_END(status);
2901 
2902 
2903  return status;
2904 }
2905 
2906 VL53L1_Error VL53L1_i2c_decode_patch_debug(
2907  uint16_t buf_size,
2908  uint8_t *pbuffer,
2909  VL53L1_patch_debug_t *pdata)
2910 {
2916  VL53L1_Error status = VL53L1_ERROR_NONE;
2917 
2918  LOG_FUNCTION_START("");
2919 
2920  if (VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES > buf_size)
2921  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
2922 
2923  pdata->result__debug_status =
2924  (*(pbuffer + 0));
2925  pdata->result__debug_stage =
2926  (*(pbuffer + 1));
2927 
2928  LOG_FUNCTION_END(status);
2929 
2930  return status;
2931 }
2932 
2933 
2934 VL53L1_Error VL53L1_set_patch_debug(
2935  VL53L1_DEV Dev,
2936  VL53L1_patch_debug_t *pdata)
2937 {
2943  VL53L1_Error status = VL53L1_ERROR_NONE;
2944  uint8_t comms_buffer[VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES];
2945 
2946  LOG_FUNCTION_START("");
2947 
2948  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2949  status = VL53L1_i2c_encode_patch_debug(
2950  pdata,
2951  VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES,
2952  comms_buffer);
2953 
2954  if (status == VL53L1_ERROR_NONE)
2955  status = VL53L1_disable_firmware(Dev);
2956 
2957  if (status == VL53L1_ERROR_NONE)
2958  status = VL53L1_WriteMulti(
2959  Dev,
2960  VL53L1_RESULT__DEBUG_STATUS,
2961  comms_buffer,
2962  VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES);
2963 
2964  if (status == VL53L1_ERROR_NONE)
2965  status = VL53L1_enable_firmware(Dev);
2966 
2967  LOG_FUNCTION_END(status);
2968 
2969  return status;
2970 }
2971 
2972 
2973 VL53L1_Error VL53L1_get_patch_debug(
2974  VL53L1_DEV Dev,
2975  VL53L1_patch_debug_t *pdata)
2976 {
2982  VL53L1_Error status = VL53L1_ERROR_NONE;
2983  uint8_t comms_buffer[VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES];
2984 
2985  LOG_FUNCTION_START("");
2986 
2987  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
2988  status = VL53L1_disable_firmware(Dev);
2989 
2990  if (status == VL53L1_ERROR_NONE)
2991  status = VL53L1_ReadMulti(
2992  Dev,
2993  VL53L1_RESULT__DEBUG_STATUS,
2994  comms_buffer,
2995  VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES);
2996 
2997  if (status == VL53L1_ERROR_NONE)
2998  status = VL53L1_enable_firmware(Dev);
2999 
3000  if (status == VL53L1_ERROR_NONE)
3001  status = VL53L1_i2c_decode_patch_debug(
3002  VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES,
3003  comms_buffer,
3004  pdata);
3005 
3006  LOG_FUNCTION_END(status);
3007 
3008  return status;
3009 }
3010 #endif
3011 
3012 #ifdef PAL_EXTENDED
3013 VL53L1_Error VL53L1_i2c_encode_gph_general_config(
3014  VL53L1_gph_general_config_t *pdata,
3015  uint16_t buf_size,
3016  uint8_t *pbuffer)
3017 {
3023  VL53L1_Error status = VL53L1_ERROR_NONE;
3024 
3025  LOG_FUNCTION_START("");
3026 
3027  if (VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES > buf_size)
3028  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3029 
3030  VL53L1_i2c_encode_uint16_t(
3031  pdata->gph__system__thresh_rate_high,
3032  2,
3033  pbuffer + 0);
3034  VL53L1_i2c_encode_uint16_t(
3035  pdata->gph__system__thresh_rate_low,
3036  2,
3037  pbuffer + 2);
3038  *(pbuffer + 4) =
3039  pdata->gph__system__interrupt_config_gpio;
3040  LOG_FUNCTION_END(status);
3041 
3042 
3043  return status;
3044 }
3045 #endif
3046 
3047 
3048 #ifdef PAL_EXTENDED
3049 VL53L1_Error VL53L1_i2c_decode_gph_general_config(
3050  uint16_t buf_size,
3051  uint8_t *pbuffer,
3052  VL53L1_gph_general_config_t *pdata)
3053 {
3059  VL53L1_Error status = VL53L1_ERROR_NONE;
3060 
3061  LOG_FUNCTION_START("");
3062 
3063  if (VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES > buf_size)
3064  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3065 
3066  pdata->gph__system__thresh_rate_high =
3067  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 0));
3068  pdata->gph__system__thresh_rate_low =
3069  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 2));
3070  pdata->gph__system__interrupt_config_gpio =
3071  (*(pbuffer + 4));
3072 
3073  LOG_FUNCTION_END(status);
3074 
3075  return status;
3076 }
3077 #endif
3078 
3079 
3080 #ifdef PAL_EXTENDED
3081 VL53L1_Error VL53L1_set_gph_general_config(
3082  VL53L1_DEV Dev,
3083  VL53L1_gph_general_config_t *pdata)
3084 {
3090  VL53L1_Error status = VL53L1_ERROR_NONE;
3091  uint8_t comms_buffer[VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES];
3092 
3093  LOG_FUNCTION_START("");
3094 
3095  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3096  status = VL53L1_i2c_encode_gph_general_config(
3097  pdata,
3098  VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES,
3099  comms_buffer);
3100 
3101  if (status == VL53L1_ERROR_NONE)
3102  status = VL53L1_disable_firmware(Dev);
3103 
3104  if (status == VL53L1_ERROR_NONE)
3105  status = VL53L1_WriteMulti(
3106  Dev,
3107  VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH,
3108  comms_buffer,
3109  VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES);
3110 
3111  if (status == VL53L1_ERROR_NONE)
3112  status = VL53L1_enable_firmware(Dev);
3113 
3114  LOG_FUNCTION_END(status);
3115 
3116  return status;
3117 }
3118 #endif
3119 
3120 
3121 #ifdef PAL_EXTENDED
3122 VL53L1_Error VL53L1_get_gph_general_config(
3123  VL53L1_DEV Dev,
3124  VL53L1_gph_general_config_t *pdata)
3125 {
3131  VL53L1_Error status = VL53L1_ERROR_NONE;
3132  uint8_t comms_buffer[VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES];
3133 
3134  LOG_FUNCTION_START("");
3135 
3136  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3137  status = VL53L1_disable_firmware(Dev);
3138 
3139  if (status == VL53L1_ERROR_NONE)
3140  status = VL53L1_ReadMulti(
3141  Dev,
3142  VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH,
3143  comms_buffer,
3144  VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES);
3145 
3146  if (status == VL53L1_ERROR_NONE)
3147  status = VL53L1_enable_firmware(Dev);
3148 
3149  if (status == VL53L1_ERROR_NONE)
3150  status = VL53L1_i2c_decode_gph_general_config(
3151  VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES,
3152  comms_buffer,
3153  pdata);
3154 
3155  LOG_FUNCTION_END(status);
3156 
3157  return status;
3158 }
3159 #endif
3160 
3161 
3162 #ifdef PAL_EXTENDED
3163 VL53L1_Error VL53L1_i2c_encode_gph_static_config(
3164  VL53L1_gph_static_config_t *pdata,
3165  uint16_t buf_size,
3166  uint8_t *pbuffer)
3167 {
3173  VL53L1_Error status = VL53L1_ERROR_NONE;
3174 
3175  LOG_FUNCTION_START("");
3176 
3177  if (VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES > buf_size)
3178  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3179 
3180  *(pbuffer + 0) =
3181  pdata->gph__dss_config__roi_mode_control & 0x7;
3182  VL53L1_i2c_encode_uint16_t(
3183  pdata->gph__dss_config__manual_effective_spads_select,
3184  2,
3185  pbuffer + 1);
3186  *(pbuffer + 3) =
3187  pdata->gph__dss_config__manual_block_select;
3188  *(pbuffer + 4) =
3189  pdata->gph__dss_config__max_spads_limit;
3190  *(pbuffer + 5) =
3191  pdata->gph__dss_config__min_spads_limit;
3192  LOG_FUNCTION_END(status);
3193 
3194 
3195  return status;
3196 }
3197 #endif
3198 
3199 #ifdef PAL_EXTENDED
3200 VL53L1_Error VL53L1_i2c_decode_gph_static_config(
3201  uint16_t buf_size,
3202  uint8_t *pbuffer,
3203  VL53L1_gph_static_config_t *pdata)
3204 {
3210  VL53L1_Error status = VL53L1_ERROR_NONE;
3211 
3212  LOG_FUNCTION_START("");
3213 
3214  if (VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES > buf_size)
3215  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3216 
3217  pdata->gph__dss_config__roi_mode_control =
3218  (*(pbuffer + 0)) & 0x7;
3219  pdata->gph__dss_config__manual_effective_spads_select =
3220  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 1));
3221  pdata->gph__dss_config__manual_block_select =
3222  (*(pbuffer + 3));
3223  pdata->gph__dss_config__max_spads_limit =
3224  (*(pbuffer + 4));
3225  pdata->gph__dss_config__min_spads_limit =
3226  (*(pbuffer + 5));
3227 
3228  LOG_FUNCTION_END(status);
3229 
3230  return status;
3231 }
3232 #endif
3233 
3234 
3235 #ifdef PAL_EXTENDED
3236 VL53L1_Error VL53L1_set_gph_static_config(
3237  VL53L1_DEV Dev,
3238  VL53L1_gph_static_config_t *pdata)
3239 {
3245  VL53L1_Error status = VL53L1_ERROR_NONE;
3246  uint8_t comms_buffer[VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES];
3247 
3248  LOG_FUNCTION_START("");
3249 
3250  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3251  status = VL53L1_i2c_encode_gph_static_config(
3252  pdata,
3253  VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES,
3254  comms_buffer);
3255 
3256  if (status == VL53L1_ERROR_NONE)
3257  status = VL53L1_disable_firmware(Dev);
3258 
3259  if (status == VL53L1_ERROR_NONE)
3260  status = VL53L1_WriteMulti(
3261  Dev,
3262  VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL,
3263  comms_buffer,
3264  VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES);
3265 
3266  if (status == VL53L1_ERROR_NONE)
3267  status = VL53L1_enable_firmware(Dev);
3268 
3269  LOG_FUNCTION_END(status);
3270 
3271  return status;
3272 }
3273 #endif
3274 
3275 
3276 #ifdef PAL_EXTENDED
3277 VL53L1_Error VL53L1_get_gph_static_config(
3278  VL53L1_DEV Dev,
3279  VL53L1_gph_static_config_t *pdata)
3280 {
3286  VL53L1_Error status = VL53L1_ERROR_NONE;
3287  uint8_t comms_buffer[VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES];
3288 
3289  LOG_FUNCTION_START("");
3290 
3291  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3292  status = VL53L1_disable_firmware(Dev);
3293 
3294  if (status == VL53L1_ERROR_NONE)
3295  status = VL53L1_ReadMulti(
3296  Dev,
3297  VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL,
3298  comms_buffer,
3299  VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES);
3300 
3301  if (status == VL53L1_ERROR_NONE)
3302  status = VL53L1_enable_firmware(Dev);
3303 
3304  if (status == VL53L1_ERROR_NONE)
3305  status = VL53L1_i2c_decode_gph_static_config(
3306  VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES,
3307  comms_buffer,
3308  pdata);
3309 
3310  LOG_FUNCTION_END(status);
3311 
3312  return status;
3313 }
3314 #endif
3315 
3316 
3317 #ifdef PAL_EXTENDED
3318 VL53L1_Error VL53L1_i2c_encode_gph_timing_config(
3319  VL53L1_gph_timing_config_t *pdata,
3320  uint16_t buf_size,
3321  uint8_t *pbuffer)
3322 {
3328  VL53L1_Error status = VL53L1_ERROR_NONE;
3329 
3330  LOG_FUNCTION_START("");
3331 
3332  if (VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES > buf_size)
3333  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3334 
3335  *(pbuffer + 0) =
3336  pdata->gph__mm_config__timeout_macrop_a_hi & 0xF;
3337  *(pbuffer + 1) =
3338  pdata->gph__mm_config__timeout_macrop_a_lo;
3339  *(pbuffer + 2) =
3340  pdata->gph__mm_config__timeout_macrop_b_hi & 0xF;
3341  *(pbuffer + 3) =
3342  pdata->gph__mm_config__timeout_macrop_b_lo;
3343  *(pbuffer + 4) =
3344  pdata->gph__range_config__timeout_macrop_a_hi & 0xF;
3345  *(pbuffer + 5) =
3346  pdata->gph__range_config__timeout_macrop_a_lo;
3347  *(pbuffer + 6) =
3348  pdata->gph__range_config__vcsel_period_a & 0x3F;
3349  *(pbuffer + 7) =
3350  pdata->gph__range_config__vcsel_period_b & 0x3F;
3351  *(pbuffer + 8) =
3352  pdata->gph__range_config__timeout_macrop_b_hi & 0xF;
3353  *(pbuffer + 9) =
3354  pdata->gph__range_config__timeout_macrop_b_lo;
3355  VL53L1_i2c_encode_uint16_t(
3356  pdata->gph__range_config__sigma_thresh,
3357  2,
3358  pbuffer + 10);
3359  VL53L1_i2c_encode_uint16_t(
3360  pdata->gph__range_config__min_count_rate_rtn_limit_mcps,
3361  2,
3362  pbuffer + 12);
3363  *(pbuffer + 14) =
3364  pdata->gph__range_config__valid_phase_low;
3365  *(pbuffer + 15) =
3366  pdata->gph__range_config__valid_phase_high;
3367  LOG_FUNCTION_END(status);
3368 
3369 
3370  return status;
3371 }
3372 #endif
3373 
3374 
3375 #ifdef PAL_EXTENDED
3376 VL53L1_Error VL53L1_i2c_decode_gph_timing_config(
3377  uint16_t buf_size,
3378  uint8_t *pbuffer,
3379  VL53L1_gph_timing_config_t *pdata)
3380 {
3386  VL53L1_Error status = VL53L1_ERROR_NONE;
3387 
3388  LOG_FUNCTION_START("");
3389 
3390  if (VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES > buf_size)
3391  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3392 
3393  pdata->gph__mm_config__timeout_macrop_a_hi =
3394  (*(pbuffer + 0)) & 0xF;
3395  pdata->gph__mm_config__timeout_macrop_a_lo =
3396  (*(pbuffer + 1));
3397  pdata->gph__mm_config__timeout_macrop_b_hi =
3398  (*(pbuffer + 2)) & 0xF;
3399  pdata->gph__mm_config__timeout_macrop_b_lo =
3400  (*(pbuffer + 3));
3401  pdata->gph__range_config__timeout_macrop_a_hi =
3402  (*(pbuffer + 4)) & 0xF;
3403  pdata->gph__range_config__timeout_macrop_a_lo =
3404  (*(pbuffer + 5));
3405  pdata->gph__range_config__vcsel_period_a =
3406  (*(pbuffer + 6)) & 0x3F;
3407  pdata->gph__range_config__vcsel_period_b =
3408  (*(pbuffer + 7)) & 0x3F;
3409  pdata->gph__range_config__timeout_macrop_b_hi =
3410  (*(pbuffer + 8)) & 0xF;
3411  pdata->gph__range_config__timeout_macrop_b_lo =
3412  (*(pbuffer + 9));
3413  pdata->gph__range_config__sigma_thresh =
3414  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 10));
3415  pdata->gph__range_config__min_count_rate_rtn_limit_mcps =
3416  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
3417  pdata->gph__range_config__valid_phase_low =
3418  (*(pbuffer + 14));
3419  pdata->gph__range_config__valid_phase_high =
3420  (*(pbuffer + 15));
3421 
3422  LOG_FUNCTION_END(status);
3423 
3424  return status;
3425 }
3426 #endif
3427 
3428 
3429 #ifdef VL53L1_DEBUG
3430 VL53L1_Error VL53L1_set_gph_timing_config(
3431  VL53L1_DEV Dev,
3432  VL53L1_gph_timing_config_t *pdata)
3433 {
3439  VL53L1_Error status = VL53L1_ERROR_NONE;
3440  uint8_t comms_buffer[VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES];
3441 
3442  LOG_FUNCTION_START("");
3443 
3444  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3445  status = VL53L1_i2c_encode_gph_timing_config(
3446  pdata,
3447  VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES,
3448  comms_buffer);
3449 
3450  if (status == VL53L1_ERROR_NONE)
3451  status = VL53L1_disable_firmware(Dev);
3452 
3453  if (status == VL53L1_ERROR_NONE)
3454  status = VL53L1_WriteMulti(
3455  Dev,
3456  VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI,
3457  comms_buffer,
3458  VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES);
3459 
3460  if (status == VL53L1_ERROR_NONE)
3461  status = VL53L1_enable_firmware(Dev);
3462 
3463  LOG_FUNCTION_END(status);
3464 
3465  return status;
3466 }
3467 #endif
3468 
3469 
3470 #ifdef PAL_EXTENDED
3471 VL53L1_Error VL53L1_get_gph_timing_config(
3472  VL53L1_DEV Dev,
3473  VL53L1_gph_timing_config_t *pdata)
3474 {
3480  VL53L1_Error status = VL53L1_ERROR_NONE;
3481  uint8_t comms_buffer[VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES];
3482 
3483  LOG_FUNCTION_START("");
3484 
3485  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3486  status = VL53L1_disable_firmware(Dev);
3487 
3488  if (status == VL53L1_ERROR_NONE)
3489  status = VL53L1_ReadMulti(
3490  Dev,
3491  VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI,
3492  comms_buffer,
3493  VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES);
3494 
3495  if (status == VL53L1_ERROR_NONE)
3496  status = VL53L1_enable_firmware(Dev);
3497 
3498  if (status == VL53L1_ERROR_NONE)
3499  status = VL53L1_i2c_decode_gph_timing_config(
3500  VL53L1_GPH_TIMING_CONFIG_I2C_SIZE_BYTES,
3501  comms_buffer,
3502  pdata);
3503 
3504  LOG_FUNCTION_END(status);
3505 
3506  return status;
3507 }
3508 #endif
3509 
3510 
3511 #ifdef VL53L1_DEBUG
3512 VL53L1_Error VL53L1_i2c_encode_fw_internal(
3513  VL53L1_fw_internal_t *pdata,
3514  uint16_t buf_size,
3515  uint8_t *pbuffer)
3516 {
3522  VL53L1_Error status = VL53L1_ERROR_NONE;
3523 
3524  LOG_FUNCTION_START("");
3525 
3526  if (VL53L1_FW_INTERNAL_I2C_SIZE_BYTES > buf_size)
3527  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3528 
3529  *(pbuffer + 0) =
3530  pdata->firmware__internal_stream_count_div;
3531  *(pbuffer + 1) =
3532  pdata->firmware__internal_stream_counter_val;
3533  LOG_FUNCTION_END(status);
3534 
3535 
3536  return status;
3537 }
3538 
3539 
3540 VL53L1_Error VL53L1_i2c_decode_fw_internal(
3541  uint16_t buf_size,
3542  uint8_t *pbuffer,
3543  VL53L1_fw_internal_t *pdata)
3544 {
3550  VL53L1_Error status = VL53L1_ERROR_NONE;
3551 
3552  LOG_FUNCTION_START("");
3553 
3554  if (VL53L1_FW_INTERNAL_I2C_SIZE_BYTES > buf_size)
3555  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3556 
3557  pdata->firmware__internal_stream_count_div =
3558  (*(pbuffer + 0));
3559  pdata->firmware__internal_stream_counter_val =
3560  (*(pbuffer + 1));
3561 
3562  LOG_FUNCTION_END(status);
3563 
3564  return status;
3565 }
3566 
3567 
3568 VL53L1_Error VL53L1_set_fw_internal(
3569  VL53L1_DEV Dev,
3570  VL53L1_fw_internal_t *pdata)
3571 {
3577  VL53L1_Error status = VL53L1_ERROR_NONE;
3578  uint8_t comms_buffer[VL53L1_FW_INTERNAL_I2C_SIZE_BYTES];
3579 
3580  LOG_FUNCTION_START("");
3581 
3582  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3583  status = VL53L1_i2c_encode_fw_internal(
3584  pdata,
3585  VL53L1_FW_INTERNAL_I2C_SIZE_BYTES,
3586  comms_buffer);
3587 
3588  if (status == VL53L1_ERROR_NONE)
3589  status = VL53L1_disable_firmware(Dev);
3590 
3591  if (status == VL53L1_ERROR_NONE)
3592  status = VL53L1_WriteMulti(
3593  Dev,
3594  VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV,
3595  comms_buffer,
3596  VL53L1_FW_INTERNAL_I2C_SIZE_BYTES);
3597 
3598  if (status == VL53L1_ERROR_NONE)
3599  status = VL53L1_enable_firmware(Dev);
3600 
3601  LOG_FUNCTION_END(status);
3602 
3603  return status;
3604 }
3605 
3606 VL53L1_Error VL53L1_get_fw_internal(
3607  VL53L1_DEV Dev,
3608  VL53L1_fw_internal_t *pdata)
3609 {
3615  VL53L1_Error status = VL53L1_ERROR_NONE;
3616  uint8_t comms_buffer[VL53L1_FW_INTERNAL_I2C_SIZE_BYTES];
3617 
3618  LOG_FUNCTION_START("");
3619 
3620  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3621  status = VL53L1_disable_firmware(Dev);
3622 
3623  if (status == VL53L1_ERROR_NONE)
3624  status = VL53L1_ReadMulti(
3625  Dev,
3626  VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV,
3627  comms_buffer,
3628  VL53L1_FW_INTERNAL_I2C_SIZE_BYTES);
3629 
3630  if (status == VL53L1_ERROR_NONE)
3631  status = VL53L1_enable_firmware(Dev);
3632 
3633  if (status == VL53L1_ERROR_NONE)
3634  status = VL53L1_i2c_decode_fw_internal(
3635  VL53L1_FW_INTERNAL_I2C_SIZE_BYTES,
3636  comms_buffer,
3637  pdata);
3638 
3639  LOG_FUNCTION_END(status);
3640 
3641  return status;
3642 }
3643 
3644 
3645 VL53L1_Error VL53L1_i2c_encode_patch_results(
3646  VL53L1_patch_results_t *pdata,
3647  uint16_t buf_size,
3648  uint8_t *pbuffer)
3649 {
3655  VL53L1_Error status = VL53L1_ERROR_NONE;
3656 
3657  LOG_FUNCTION_START("");
3658 
3659  if (VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES > buf_size)
3660  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3661 
3662  *(pbuffer + 0) =
3663  pdata->dss_calc__roi_ctrl & 0x3;
3664  *(pbuffer + 1) =
3665  pdata->dss_calc__spare_1;
3666  *(pbuffer + 2) =
3667  pdata->dss_calc__spare_2;
3668  *(pbuffer + 3) =
3669  pdata->dss_calc__spare_3;
3670  *(pbuffer + 4) =
3671  pdata->dss_calc__spare_4;
3672  *(pbuffer + 5) =
3673  pdata->dss_calc__spare_5;
3674  *(pbuffer + 6) =
3675  pdata->dss_calc__spare_6;
3676  *(pbuffer + 7) =
3677  pdata->dss_calc__spare_7;
3678  *(pbuffer + 8) =
3679  pdata->dss_calc__user_roi_spad_en_0;
3680  *(pbuffer + 9) =
3681  pdata->dss_calc__user_roi_spad_en_1;
3682  *(pbuffer + 10) =
3683  pdata->dss_calc__user_roi_spad_en_2;
3684  *(pbuffer + 11) =
3685  pdata->dss_calc__user_roi_spad_en_3;
3686  *(pbuffer + 12) =
3687  pdata->dss_calc__user_roi_spad_en_4;
3688  *(pbuffer + 13) =
3689  pdata->dss_calc__user_roi_spad_en_5;
3690  *(pbuffer + 14) =
3691  pdata->dss_calc__user_roi_spad_en_6;
3692  *(pbuffer + 15) =
3693  pdata->dss_calc__user_roi_spad_en_7;
3694  *(pbuffer + 16) =
3695  pdata->dss_calc__user_roi_spad_en_8;
3696  *(pbuffer + 17) =
3697  pdata->dss_calc__user_roi_spad_en_9;
3698  *(pbuffer + 18) =
3699  pdata->dss_calc__user_roi_spad_en_10;
3700  *(pbuffer + 19) =
3701  pdata->dss_calc__user_roi_spad_en_11;
3702  *(pbuffer + 20) =
3703  pdata->dss_calc__user_roi_spad_en_12;
3704  *(pbuffer + 21) =
3705  pdata->dss_calc__user_roi_spad_en_13;
3706  *(pbuffer + 22) =
3707  pdata->dss_calc__user_roi_spad_en_14;
3708  *(pbuffer + 23) =
3709  pdata->dss_calc__user_roi_spad_en_15;
3710  *(pbuffer + 24) =
3711  pdata->dss_calc__user_roi_spad_en_16;
3712  *(pbuffer + 25) =
3713  pdata->dss_calc__user_roi_spad_en_17;
3714  *(pbuffer + 26) =
3715  pdata->dss_calc__user_roi_spad_en_18;
3716  *(pbuffer + 27) =
3717  pdata->dss_calc__user_roi_spad_en_19;
3718  *(pbuffer + 28) =
3719  pdata->dss_calc__user_roi_spad_en_20;
3720  *(pbuffer + 29) =
3721  pdata->dss_calc__user_roi_spad_en_21;
3722  *(pbuffer + 30) =
3723  pdata->dss_calc__user_roi_spad_en_22;
3724  *(pbuffer + 31) =
3725  pdata->dss_calc__user_roi_spad_en_23;
3726  *(pbuffer + 32) =
3727  pdata->dss_calc__user_roi_spad_en_24;
3728  *(pbuffer + 33) =
3729  pdata->dss_calc__user_roi_spad_en_25;
3730  *(pbuffer + 34) =
3731  pdata->dss_calc__user_roi_spad_en_26;
3732  *(pbuffer + 35) =
3733  pdata->dss_calc__user_roi_spad_en_27;
3734  *(pbuffer + 36) =
3735  pdata->dss_calc__user_roi_spad_en_28;
3736  *(pbuffer + 37) =
3737  pdata->dss_calc__user_roi_spad_en_29;
3738  *(pbuffer + 38) =
3739  pdata->dss_calc__user_roi_spad_en_30;
3740  *(pbuffer + 39) =
3741  pdata->dss_calc__user_roi_spad_en_31;
3742  *(pbuffer + 40) =
3743  pdata->dss_calc__user_roi_0;
3744  *(pbuffer + 41) =
3745  pdata->dss_calc__user_roi_1;
3746  *(pbuffer + 42) =
3747  pdata->dss_calc__mode_roi_0;
3748  *(pbuffer + 43) =
3749  pdata->dss_calc__mode_roi_1;
3750  *(pbuffer + 44) =
3751  pdata->sigma_estimator_calc__spare_0;
3752  VL53L1_i2c_encode_uint16_t(
3753  pdata->vhv_result__peak_signal_rate_mcps,
3754  2,
3755  pbuffer + 46);
3756  VL53L1_i2c_encode_uint32_t(
3757  pdata->vhv_result__signal_total_events_ref,
3758  4,
3759  pbuffer + 48);
3760  VL53L1_i2c_encode_uint16_t(
3761  pdata->phasecal_result__phase_output_ref,
3762  2,
3763  pbuffer + 52);
3764  VL53L1_i2c_encode_uint16_t(
3765  pdata->dss_result__total_rate_per_spad,
3766  2,
3767  pbuffer + 54);
3768  *(pbuffer + 56) =
3769  pdata->dss_result__enabled_blocks;
3770  VL53L1_i2c_encode_uint16_t(
3771  pdata->dss_result__num_requested_spads,
3772  2,
3773  pbuffer + 58);
3774  VL53L1_i2c_encode_uint16_t(
3775  pdata->mm_result__inner_intersection_rate,
3776  2,
3777  pbuffer + 62);
3778  VL53L1_i2c_encode_uint16_t(
3779  pdata->mm_result__outer_complement_rate,
3780  2,
3781  pbuffer + 64);
3782  VL53L1_i2c_encode_uint16_t(
3783  pdata->mm_result__total_offset,
3784  2,
3785  pbuffer + 66);
3786  VL53L1_i2c_encode_uint32_t(
3787  pdata->xtalk_calc__xtalk_for_enabled_spads & 0xFFFFFF,
3788  4,
3789  pbuffer + 68);
3790  VL53L1_i2c_encode_uint32_t(
3791  pdata->xtalk_result__avg_xtalk_user_roi_kcps & 0xFFFFFF,
3792  4,
3793  pbuffer + 72);
3794  VL53L1_i2c_encode_uint32_t(
3795  pdata->xtalk_result__avg_xtalk_mm_inner_roi_kcps & 0xFFFFFF,
3796  4,
3797  pbuffer + 76);
3798  VL53L1_i2c_encode_uint32_t(
3799  pdata->xtalk_result__avg_xtalk_mm_outer_roi_kcps & 0xFFFFFF,
3800  4,
3801  pbuffer + 80);
3802  VL53L1_i2c_encode_uint32_t(
3803  pdata->range_result__accum_phase,
3804  4,
3805  pbuffer + 84);
3806  VL53L1_i2c_encode_uint16_t(
3807  pdata->range_result__offset_corrected_range,
3808  2,
3809  pbuffer + 88);
3810  LOG_FUNCTION_END(status);
3811 
3812 
3813  return status;
3814 }
3815 
3816 
3817 VL53L1_Error VL53L1_i2c_decode_patch_results(
3818  uint16_t buf_size,
3819  uint8_t *pbuffer,
3820  VL53L1_patch_results_t *pdata)
3821 {
3827  VL53L1_Error status = VL53L1_ERROR_NONE;
3828 
3829  LOG_FUNCTION_START("");
3830 
3831  if (VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES > buf_size)
3832  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
3833 
3834  pdata->dss_calc__roi_ctrl =
3835  (*(pbuffer + 0)) & 0x3;
3836  pdata->dss_calc__spare_1 =
3837  (*(pbuffer + 1));
3838  pdata->dss_calc__spare_2 =
3839  (*(pbuffer + 2));
3840  pdata->dss_calc__spare_3 =
3841  (*(pbuffer + 3));
3842  pdata->dss_calc__spare_4 =
3843  (*(pbuffer + 4));
3844  pdata->dss_calc__spare_5 =
3845  (*(pbuffer + 5));
3846  pdata->dss_calc__spare_6 =
3847  (*(pbuffer + 6));
3848  pdata->dss_calc__spare_7 =
3849  (*(pbuffer + 7));
3850  pdata->dss_calc__user_roi_spad_en_0 =
3851  (*(pbuffer + 8));
3852  pdata->dss_calc__user_roi_spad_en_1 =
3853  (*(pbuffer + 9));
3854  pdata->dss_calc__user_roi_spad_en_2 =
3855  (*(pbuffer + 10));
3856  pdata->dss_calc__user_roi_spad_en_3 =
3857  (*(pbuffer + 11));
3858  pdata->dss_calc__user_roi_spad_en_4 =
3859  (*(pbuffer + 12));
3860  pdata->dss_calc__user_roi_spad_en_5 =
3861  (*(pbuffer + 13));
3862  pdata->dss_calc__user_roi_spad_en_6 =
3863  (*(pbuffer + 14));
3864  pdata->dss_calc__user_roi_spad_en_7 =
3865  (*(pbuffer + 15));
3866  pdata->dss_calc__user_roi_spad_en_8 =
3867  (*(pbuffer + 16));
3868  pdata->dss_calc__user_roi_spad_en_9 =
3869  (*(pbuffer + 17));
3870  pdata->dss_calc__user_roi_spad_en_10 =
3871  (*(pbuffer + 18));
3872  pdata->dss_calc__user_roi_spad_en_11 =
3873  (*(pbuffer + 19));
3874  pdata->dss_calc__user_roi_spad_en_12 =
3875  (*(pbuffer + 20));
3876  pdata->dss_calc__user_roi_spad_en_13 =
3877  (*(pbuffer + 21));
3878  pdata->dss_calc__user_roi_spad_en_14 =
3879  (*(pbuffer + 22));
3880  pdata->dss_calc__user_roi_spad_en_15 =
3881  (*(pbuffer + 23));
3882  pdata->dss_calc__user_roi_spad_en_16 =
3883  (*(pbuffer + 24));
3884  pdata->dss_calc__user_roi_spad_en_17 =
3885  (*(pbuffer + 25));
3886  pdata->dss_calc__user_roi_spad_en_18 =
3887  (*(pbuffer + 26));
3888  pdata->dss_calc__user_roi_spad_en_19 =
3889  (*(pbuffer + 27));
3890  pdata->dss_calc__user_roi_spad_en_20 =
3891  (*(pbuffer + 28));
3892  pdata->dss_calc__user_roi_spad_en_21 =
3893  (*(pbuffer + 29));
3894  pdata->dss_calc__user_roi_spad_en_22 =
3895  (*(pbuffer + 30));
3896  pdata->dss_calc__user_roi_spad_en_23 =
3897  (*(pbuffer + 31));
3898  pdata->dss_calc__user_roi_spad_en_24 =
3899  (*(pbuffer + 32));
3900  pdata->dss_calc__user_roi_spad_en_25 =
3901  (*(pbuffer + 33));
3902  pdata->dss_calc__user_roi_spad_en_26 =
3903  (*(pbuffer + 34));
3904  pdata->dss_calc__user_roi_spad_en_27 =
3905  (*(pbuffer + 35));
3906  pdata->dss_calc__user_roi_spad_en_28 =
3907  (*(pbuffer + 36));
3908  pdata->dss_calc__user_roi_spad_en_29 =
3909  (*(pbuffer + 37));
3910  pdata->dss_calc__user_roi_spad_en_30 =
3911  (*(pbuffer + 38));
3912  pdata->dss_calc__user_roi_spad_en_31 =
3913  (*(pbuffer + 39));
3914  pdata->dss_calc__user_roi_0 =
3915  (*(pbuffer + 40));
3916  pdata->dss_calc__user_roi_1 =
3917  (*(pbuffer + 41));
3918  pdata->dss_calc__mode_roi_0 =
3919  (*(pbuffer + 42));
3920  pdata->dss_calc__mode_roi_1 =
3921  (*(pbuffer + 43));
3922  pdata->sigma_estimator_calc__spare_0 =
3923  (*(pbuffer + 44));
3924  pdata->vhv_result__peak_signal_rate_mcps =
3925  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 46));
3926  pdata->vhv_result__signal_total_events_ref =
3927  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 48));
3928  pdata->phasecal_result__phase_output_ref =
3929  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 52));
3930  pdata->dss_result__total_rate_per_spad =
3931  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 54));
3932  pdata->dss_result__enabled_blocks =
3933  (*(pbuffer + 56));
3934  pdata->dss_result__num_requested_spads =
3935  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 58));
3936  pdata->mm_result__inner_intersection_rate =
3937  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 62));
3938  pdata->mm_result__outer_complement_rate =
3939  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 64));
3940  pdata->mm_result__total_offset =
3941  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 66));
3942  pdata->xtalk_calc__xtalk_for_enabled_spads =
3943  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 68)) & 0xFFFFFF;
3944  pdata->xtalk_result__avg_xtalk_user_roi_kcps =
3945  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 72)) & 0xFFFFFF;
3946  pdata->xtalk_result__avg_xtalk_mm_inner_roi_kcps =
3947  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 76)) & 0xFFFFFF;
3948  pdata->xtalk_result__avg_xtalk_mm_outer_roi_kcps =
3949  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 80)) & 0xFFFFFF;
3950  pdata->range_result__accum_phase =
3951  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 84));
3952  pdata->range_result__offset_corrected_range =
3953  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 88));
3954 
3955  LOG_FUNCTION_END(status);
3956 
3957  return status;
3958 }
3959 
3960 
3961 VL53L1_Error VL53L1_set_patch_results(
3962  VL53L1_DEV Dev,
3963  VL53L1_patch_results_t *pdata)
3964 {
3970  VL53L1_Error status = VL53L1_ERROR_NONE;
3971  uint8_t comms_buffer[VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES];
3972 
3973  LOG_FUNCTION_START("");
3974 
3975  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
3976  status = VL53L1_i2c_encode_patch_results(
3977  pdata,
3978  VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES,
3979  comms_buffer);
3980 
3981  if (status == VL53L1_ERROR_NONE)
3982  status = VL53L1_disable_firmware(Dev);
3983 
3984  if (status == VL53L1_ERROR_NONE)
3985  status = VL53L1_WriteMulti(
3986  Dev,
3987  VL53L1_DSS_CALC__ROI_CTRL,
3988  comms_buffer,
3989  VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES);
3990 
3991  if (status == VL53L1_ERROR_NONE)
3992  status = VL53L1_enable_firmware(Dev);
3993 
3994  LOG_FUNCTION_END(status);
3995 
3996  return status;
3997 }
3998 
3999 VL53L1_Error VL53L1_get_patch_results(
4000  VL53L1_DEV Dev,
4001  VL53L1_patch_results_t *pdata)
4002 {
4008  VL53L1_Error status = VL53L1_ERROR_NONE;
4009  uint8_t comms_buffer[VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES];
4010 
4011  LOG_FUNCTION_START("");
4012 
4013  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
4014  status = VL53L1_disable_firmware(Dev);
4015 
4016  if (status == VL53L1_ERROR_NONE)
4017  status = VL53L1_ReadMulti(
4018  Dev,
4019  VL53L1_DSS_CALC__ROI_CTRL,
4020  comms_buffer,
4021  VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES);
4022 
4023  if (status == VL53L1_ERROR_NONE)
4024  status = VL53L1_enable_firmware(Dev);
4025 
4026  if (status == VL53L1_ERROR_NONE)
4027  status = VL53L1_i2c_decode_patch_results(
4028  VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES,
4029  comms_buffer,
4030  pdata);
4031 
4032  LOG_FUNCTION_END(status);
4033 
4034  return status;
4035 }
4036 
4037 
4038 VL53L1_Error VL53L1_i2c_encode_shadow_system_results(
4039  VL53L1_shadow_system_results_t *pdata,
4040  uint16_t buf_size,
4041  uint8_t *pbuffer)
4042 {
4048  VL53L1_Error status = VL53L1_ERROR_NONE;
4049 
4050  LOG_FUNCTION_START("");
4051 
4052  if (VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
4053  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
4054 
4055  *(pbuffer + 0) =
4056  pdata->shadow_phasecal_result__vcsel_start;
4057  *(pbuffer + 2) =
4058  pdata->shadow_result__interrupt_status & 0x3F;
4059  *(pbuffer + 3) =
4060  pdata->shadow_result__range_status;
4061  *(pbuffer + 4) =
4062  pdata->shadow_result__report_status & 0xF;
4063  *(pbuffer + 5) =
4064  pdata->shadow_result__stream_count;
4065  VL53L1_i2c_encode_uint16_t(
4066  pdata->shadow_result__dss_actual_effective_spads_sd0,
4067  2,
4068  pbuffer + 6);
4069  VL53L1_i2c_encode_uint16_t(
4070  pdata->shadow_result__peak_signal_count_rate_mcps_sd0,
4071  2,
4072  pbuffer + 8);
4073  VL53L1_i2c_encode_uint16_t(
4074  pdata->shadow_result__ambient_count_rate_mcps_sd0,
4075  2,
4076  pbuffer + 10);
4077  VL53L1_i2c_encode_uint16_t(
4078  pdata->shadow_result__sigma_sd0,
4079  2,
4080  pbuffer + 12);
4081  VL53L1_i2c_encode_uint16_t(
4082  pdata->shadow_result__phase_sd0,
4083  2,
4084  pbuffer + 14);
4085  VL53L1_i2c_encode_uint16_t(
4086  pdata->shadow_result__final_crosstalk_corrected_range_mm_sd0,
4087  2,
4088  pbuffer + 16);
4089  VL53L1_i2c_encode_uint16_t(
4090  pdata->shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
4091  2,
4092  pbuffer + 18);
4093  VL53L1_i2c_encode_uint16_t(
4094  pdata->shadow_result__mm_inner_actual_effective_spads_sd0,
4095  2,
4096  pbuffer + 20);
4097  VL53L1_i2c_encode_uint16_t(
4098  pdata->shadow_result__mm_outer_actual_effective_spads_sd0,
4099  2,
4100  pbuffer + 22);
4101  VL53L1_i2c_encode_uint16_t(
4102  pdata->shadow_result__avg_signal_count_rate_mcps_sd0,
4103  2,
4104  pbuffer + 24);
4105  VL53L1_i2c_encode_uint16_t(
4106  pdata->shadow_result__dss_actual_effective_spads_sd1,
4107  2,
4108  pbuffer + 26);
4109  VL53L1_i2c_encode_uint16_t(
4110  pdata->shadow_result__peak_signal_count_rate_mcps_sd1,
4111  2,
4112  pbuffer + 28);
4113  VL53L1_i2c_encode_uint16_t(
4114  pdata->shadow_result__ambient_count_rate_mcps_sd1,
4115  2,
4116  pbuffer + 30);
4117  VL53L1_i2c_encode_uint16_t(
4118  pdata->shadow_result__sigma_sd1,
4119  2,
4120  pbuffer + 32);
4121  VL53L1_i2c_encode_uint16_t(
4122  pdata->shadow_result__phase_sd1,
4123  2,
4124  pbuffer + 34);
4125  VL53L1_i2c_encode_uint16_t(
4126  pdata->shadow_result__final_crosstalk_corrected_range_mm_sd1,
4127  2,
4128  pbuffer + 36);
4129  VL53L1_i2c_encode_uint16_t(
4130  pdata->shadow_result__spare_0_sd1,
4131  2,
4132  pbuffer + 38);
4133  VL53L1_i2c_encode_uint16_t(
4134  pdata->shadow_result__spare_1_sd1,
4135  2,
4136  pbuffer + 40);
4137  VL53L1_i2c_encode_uint16_t(
4138  pdata->shadow_result__spare_2_sd1,
4139  2,
4140  pbuffer + 42);
4141  *(pbuffer + 44) =
4142  pdata->shadow_result__spare_3_sd1;
4143  *(pbuffer + 45) =
4144  pdata->shadow_result__thresh_info;
4145  *(pbuffer + 80) =
4146  pdata->shadow_phasecal_result__reference_phase_hi;
4147  *(pbuffer + 81) =
4148  pdata->shadow_phasecal_result__reference_phase_lo;
4149  LOG_FUNCTION_END(status);
4150 
4151 
4152  return status;
4153 }
4154 
4155 
4156 VL53L1_Error VL53L1_i2c_decode_shadow_system_results(
4157  uint16_t buf_size,
4158  uint8_t *pbuffer,
4159  VL53L1_shadow_system_results_t *pdata)
4160 {
4166  VL53L1_Error status = VL53L1_ERROR_NONE;
4167 
4168  LOG_FUNCTION_START("");
4169 
4170  if (VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES > buf_size)
4171  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
4172 
4173  pdata->shadow_phasecal_result__vcsel_start =
4174  (*(pbuffer + 0));
4175  pdata->shadow_result__interrupt_status =
4176  (*(pbuffer + 2)) & 0x3F;
4177  pdata->shadow_result__range_status =
4178  (*(pbuffer + 3));
4179  pdata->shadow_result__report_status =
4180  (*(pbuffer + 4)) & 0xF;
4181  pdata->shadow_result__stream_count =
4182  (*(pbuffer + 5));
4183  pdata->shadow_result__dss_actual_effective_spads_sd0 =
4184  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 6));
4185  pdata->shadow_result__peak_signal_count_rate_mcps_sd0 =
4186  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 8));
4187  pdata->shadow_result__ambient_count_rate_mcps_sd0 =
4188  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 10));
4189  pdata->shadow_result__sigma_sd0 =
4190  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 12));
4191  pdata->shadow_result__phase_sd0 =
4192  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 14));
4193  pdata->shadow_result__final_crosstalk_corrected_range_mm_sd0 =
4194  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 16));
4195  pdata->shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
4196  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 18));
4197  pdata->shadow_result__mm_inner_actual_effective_spads_sd0 =
4198  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 20));
4199  pdata->shadow_result__mm_outer_actual_effective_spads_sd0 =
4200  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 22));
4201  pdata->shadow_result__avg_signal_count_rate_mcps_sd0 =
4202  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 24));
4203  pdata->shadow_result__dss_actual_effective_spads_sd1 =
4204  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 26));
4205  pdata->shadow_result__peak_signal_count_rate_mcps_sd1 =
4206  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 28));
4207  pdata->shadow_result__ambient_count_rate_mcps_sd1 =
4208  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 30));
4209  pdata->shadow_result__sigma_sd1 =
4210  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 32));
4211  pdata->shadow_result__phase_sd1 =
4212  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 34));
4213  pdata->shadow_result__final_crosstalk_corrected_range_mm_sd1 =
4214  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 36));
4215  pdata->shadow_result__spare_0_sd1 =
4216  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 38));
4217  pdata->shadow_result__spare_1_sd1 =
4218  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 40));
4219  pdata->shadow_result__spare_2_sd1 =
4220  (VL53L1_i2c_decode_uint16_t(2, pbuffer + 42));
4221  pdata->shadow_result__spare_3_sd1 =
4222  (*(pbuffer + 44));
4223  pdata->shadow_result__thresh_info =
4224  (*(pbuffer + 45));
4225  pdata->shadow_phasecal_result__reference_phase_hi =
4226  (*(pbuffer + 80));
4227  pdata->shadow_phasecal_result__reference_phase_lo =
4228  (*(pbuffer + 81));
4229 
4230  LOG_FUNCTION_END(status);
4231 
4232  return status;
4233 }
4234 
4235 
4236 VL53L1_Error VL53L1_set_shadow_system_results(
4237  VL53L1_DEV Dev,
4238  VL53L1_shadow_system_results_t *pdata)
4239 {
4245  VL53L1_Error status = VL53L1_ERROR_NONE;
4246  uint8_t comms_buffer[VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
4247 
4248  LOG_FUNCTION_START("");
4249 
4250  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
4251  status = VL53L1_i2c_encode_shadow_system_results(
4252  pdata,
4253  VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
4254  comms_buffer);
4255 
4256  if (status == VL53L1_ERROR_NONE)
4257  status = VL53L1_disable_firmware(Dev);
4258 
4259  if (status == VL53L1_ERROR_NONE)
4260  status = VL53L1_WriteMulti(
4261  Dev,
4262  VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START,
4263  comms_buffer,
4264  VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
4265 
4266  if (status == VL53L1_ERROR_NONE)
4267  status = VL53L1_enable_firmware(Dev);
4268 
4269  LOG_FUNCTION_END(status);
4270 
4271  return status;
4272 }
4273 
4274 VL53L1_Error VL53L1_get_shadow_system_results(
4275  VL53L1_DEV Dev,
4276  VL53L1_shadow_system_results_t *pdata)
4277 {
4283  VL53L1_Error status = VL53L1_ERROR_NONE;
4284  uint8_t comms_buffer[VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
4285 
4286  LOG_FUNCTION_START("");
4287 
4288  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
4289  status = VL53L1_disable_firmware(Dev);
4290 
4291  if (status == VL53L1_ERROR_NONE)
4292  status = VL53L1_ReadMulti(
4293  Dev,
4294  VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START,
4295  comms_buffer,
4296  VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
4297 
4298  if (status == VL53L1_ERROR_NONE)
4299  status = VL53L1_enable_firmware(Dev);
4300 
4301  if (status == VL53L1_ERROR_NONE)
4302  status = VL53L1_i2c_decode_shadow_system_results(
4303  VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
4304  comms_buffer,
4305  pdata);
4306 
4307  LOG_FUNCTION_END(status);
4308 
4309  return status;
4310 }
4311 
4312 
4313 VL53L1_Error VL53L1_i2c_encode_shadow_core_results(
4314  VL53L1_shadow_core_results_t *pdata,
4315  uint16_t buf_size,
4316  uint8_t *pbuffer)
4317 {
4323  VL53L1_Error status = VL53L1_ERROR_NONE;
4324 
4325  LOG_FUNCTION_START("");
4326 
4327  if (VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
4328  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
4329 
4330  VL53L1_i2c_encode_uint32_t(
4331  pdata->shadow_result_core__ambient_window_events_sd0,
4332  4,
4333  pbuffer + 0);
4334  VL53L1_i2c_encode_uint32_t(
4335  pdata->shadow_result_core__ranging_total_events_sd0,
4336  4,
4337  pbuffer + 4);
4338  VL53L1_i2c_encode_int32_t(
4339  pdata->shadow_result_core__signal_total_events_sd0,
4340  4,
4341  pbuffer + 8);
4342  VL53L1_i2c_encode_uint32_t(
4343  pdata->shadow_result_core__total_periods_elapsed_sd0,
4344  4,
4345  pbuffer + 12);
4346  VL53L1_i2c_encode_uint32_t(
4347  pdata->shadow_result_core__ambient_window_events_sd1,
4348  4,
4349  pbuffer + 16);
4350  VL53L1_i2c_encode_uint32_t(
4351  pdata->shadow_result_core__ranging_total_events_sd1,
4352  4,
4353  pbuffer + 20);
4354  VL53L1_i2c_encode_int32_t(
4355  pdata->shadow_result_core__signal_total_events_sd1,
4356  4,
4357  pbuffer + 24);
4358  VL53L1_i2c_encode_uint32_t(
4359  pdata->shadow_result_core__total_periods_elapsed_sd1,
4360  4,
4361  pbuffer + 28);
4362  *(pbuffer + 32) =
4363  pdata->shadow_result_core__spare_0;
4364  LOG_FUNCTION_END(status);
4365 
4366 
4367  return status;
4368 }
4369 
4370 
4371 VL53L1_Error VL53L1_i2c_decode_shadow_core_results(
4372  uint16_t buf_size,
4373  uint8_t *pbuffer,
4374  VL53L1_shadow_core_results_t *pdata)
4375 {
4381  VL53L1_Error status = VL53L1_ERROR_NONE;
4382 
4383  LOG_FUNCTION_START("");
4384 
4385  if (VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES > buf_size)
4386  return VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL;
4387 
4388  pdata->shadow_result_core__ambient_window_events_sd0 =
4389  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 0));
4390  pdata->shadow_result_core__ranging_total_events_sd0 =
4391  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 4));
4392  pdata->shadow_result_core__signal_total_events_sd0 =
4393  (VL53L1_i2c_decode_int32_t(4, pbuffer + 8));
4394  pdata->shadow_result_core__total_periods_elapsed_sd0 =
4395  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 12));
4396  pdata->shadow_result_core__ambient_window_events_sd1 =
4397  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 16));
4398  pdata->shadow_result_core__ranging_total_events_sd1 =
4399  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 20));
4400  pdata->shadow_result_core__signal_total_events_sd1 =
4401  (VL53L1_i2c_decode_int32_t(4, pbuffer + 24));
4402  pdata->shadow_result_core__total_periods_elapsed_sd1 =
4403  (VL53L1_i2c_decode_uint32_t(4, pbuffer + 28));
4404  pdata->shadow_result_core__spare_0 =
4405  (*(pbuffer + 32));
4406 
4407  LOG_FUNCTION_END(status);
4408 
4409  return status;
4410 }
4411 
4412 
4413 VL53L1_Error VL53L1_set_shadow_core_results(
4414  VL53L1_DEV Dev,
4415  VL53L1_shadow_core_results_t *pdata)
4416 {
4422  VL53L1_Error status = VL53L1_ERROR_NONE;
4423  uint8_t comms_buffer[VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
4424 
4425  LOG_FUNCTION_START("");
4426 
4427  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
4428  status = VL53L1_i2c_encode_shadow_core_results(
4429  pdata,
4430  VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
4431  comms_buffer);
4432 
4433  if (status == VL53L1_ERROR_NONE)
4434  status = VL53L1_disable_firmware(Dev);
4435 
4436  if (status == VL53L1_ERROR_NONE)
4437  status = VL53L1_WriteMulti(
4438  Dev,
4439  VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
4440  comms_buffer,
4441  VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
4442 
4443  if (status == VL53L1_ERROR_NONE)
4444  status = VL53L1_enable_firmware(Dev);
4445 
4446  LOG_FUNCTION_END(status);
4447 
4448  return status;
4449 }
4450 
4451 
4452 VL53L1_Error VL53L1_get_shadow_core_results(
4453  VL53L1_DEV Dev,
4454  VL53L1_shadow_core_results_t *pdata)
4455 {
4461  VL53L1_Error status = VL53L1_ERROR_NONE;
4462  uint8_t comms_buffer[VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
4463 
4464  LOG_FUNCTION_START("");
4465 
4466  if (status == VL53L1_ERROR_NONE) /*lint !e774 always true*/
4467  status = VL53L1_disable_firmware(Dev);
4468 
4469  if (status == VL53L1_ERROR_NONE)
4470  status = VL53L1_ReadMulti(
4471  Dev,
4472  VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
4473  comms_buffer,
4474  VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
4475 
4476  if (status == VL53L1_ERROR_NONE)
4477  status = VL53L1_enable_firmware(Dev);
4478 
4479  if (status == VL53L1_ERROR_NONE)
4480  status = VL53L1_i2c_decode_shadow_core_results(
4481  VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
4482  comms_buffer,
4483  pdata);
4484 
4485  LOG_FUNCTION_END(status);
4486 
4487  return status;
4488 }
4489 #endif
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_20
uint8_t global_config__spad_enables_rtn_20
Definition: vl53l1_register_structs.h:2550
VL53L1_system_results_t
Definition: vl53l1_register_structs.h:1359
VL53L1_system_control_t::system__stream_count_ctrl
uint8_t system__stream_count_ctrl
Definition: vl53l1_register_structs.h:1301
VL53L1_general_config_t::system__thresh_rate_high
uint16_t system__thresh_rate_high
Definition: vl53l1_register_structs.h:850
VL53L1_shadow_system_results_t::shadow_result__interrupt_status
uint8_t shadow_result__interrupt_status
Definition: vl53l1_register_structs.h:4019
VL53L1_prev_shadow_system_results_t::prev_shadow_result__interrupt_status
uint8_t prev_shadow_result__interrupt_status
Definition: vl53l1_register_structs.h:2703
VL53L1_customer_nvm_managed_t::ref_spad_man__ref_location
uint8_t ref_spad_man__ref_location
Definition: vl53l1_register_structs.h:324
VL53L1_system_control_t::firmware__enable
uint8_t firmware__enable
Definition: vl53l1_register_structs.h:1311
VL53L1_system_results_t::result__dss_actual_effective_spads_sd1
uint16_t result__dss_actual_effective_spads_sd1
Definition: vl53l1_register_structs.h:1505
VL53L1_shadow_system_results_t::shadow_result__sigma_sd1
uint16_t shadow_result__sigma_sd1
Definition: vl53l1_register_structs.h:4194
VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES
#define VL53L1_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:107
VL53L1_debug_results_t::interrupt_manager__enables
uint8_t interrupt_manager__enables
Definition: vl53l1_register_structs.h:2070
VL53L1_timing_config_t
Definition: vl53l1_register_structs.h:932
VL53L1_timing_config_t::mm_config__timeout_macrop_b_lo
uint8_t mm_config__timeout_macrop_b_lo
Definition: vl53l1_register_structs.h:963
VL53L1_debug_results_t::gph__sd_config__first_order_select
uint8_t gph__sd_config__first_order_select
Definition: vl53l1_register_structs.h:1991
vl53l1_ll_def.h
Type definitions for VL53L1 LL Driver.
VL53L1_dynamic_config_t::system__thresh_low
uint16_t system__thresh_low
Definition: vl53l1_register_structs.h:1127
VL53L1_core_results_t::result_core__spare_0
uint8_t result_core__spare_0
Definition: vl53l1_register_structs.h:1709
VL53L1_patch_results_t::dss_calc__spare_4
uint8_t dss_calc__spare_4
Definition: vl53l1_register_structs.h:3436
VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES
#define VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:103
VL53L1_gph_timing_config_t::gph__range_config__vcsel_period_a
uint8_t gph__range_config__vcsel_period_a
Definition: vl53l1_register_structs.h:3269
uint8_t
unsigned char uint8_t
Typedef defining 8 bit unsigned char type. The developer should modify this to suit the platform bein...
Definition: vl53l1_types.h:133
VL53L1_gph_timing_config_t::gph__range_config__valid_phase_high
uint8_t gph__range_config__valid_phase_high
Definition: vl53l1_register_structs.h:3339
VL53L1_i2c_encode_system_control
VL53L1_Error VL53L1_i2c_encode_system_control(VL53L1_system_control_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Gets dynamic_config register group.
Definition: vl53l1_register_funcs.c:1239
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uint8_t shadow_phasecal_result__reference_phase_lo
Definition: vl53l1_register_structs.h:4285
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uint16_t shadow_result__sigma_sd0
Definition: vl53l1_register_structs.h:4094
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Definition: vl53l1_register_structs.h:1629
VL53L1_debug_results_t::result__osc_calibrate_val
uint16_t result__osc_calibrate_val
Definition: vl53l1_register_structs.h:1802
VL53L1_timing_config_t::mm_config__timeout_macrop_a_lo
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Definition: vl53l1_register_structs.h:943
VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0
#define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0
Definition: vl53l1_register_map.h:8833
VL53L1_gph_timing_config_t::gph__range_config__timeout_macrop_b_lo
uint8_t gph__range_config__timeout_macrop_b_lo
Definition: vl53l1_register_structs.h:3299
vl53l1_platform_log.h
EwokPlus25 platform logging function definition.
VL53L1_debug_results_t::vhv_result__search_result
uint8_t vhv_result__search_result
Definition: vl53l1_register_structs.h:1782
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__signal_total_events_sd1
int32_t prev_shadow_result_core__signal_total_events_sd1
Definition: vl53l1_register_structs.h:3021
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_5
uint8_t global_config__spad_enables_rtn_5
Definition: vl53l1_register_structs.h:2400
VL53L1_dynamic_config_t::sd_config__woi_sd1
uint8_t sd_config__woi_sd1
Definition: vl53l1_register_structs.h:1168
VL53L1_i2c_decode_system_results
VL53L1_Error VL53L1_i2c_decode_system_results(uint16_t buf_size, uint8_t *pbuffer, VL53L1_system_results_t *pdata)
Gets system_control register group.
Definition: vl53l1_register_funcs.c:1491
VL53L1_static_config_t::ana_config__vcsel_pulse_width_offset
uint8_t ana_config__vcsel_pulse_width_offset
Definition: vl53l1_register_structs.h:579
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Definition: vl53l1_register_structs.h:2888
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_19
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Definition: vl53l1_register_structs.h:3666
VL53L1_core_results_t
Definition: vl53l1_register_structs.h:1628
VL53L1_system_results_t::result__phase_sd1
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Definition: vl53l1_register_structs.h:1545
VL53L1_i2c_encode_uint32_t
void VL53L1_i2c_encode_uint32_t(uint32_t ip_value, uint16_t count, uint8_t *pbuffer)
Encodes a uint32_t register value into an I2C write buffer.
Definition: vl53l1_core.c:603
VL53L1_prev_shadow_system_results_t::prev_shadow_result__avg_signal_count_rate_mcps_sd0
uint16_t prev_shadow_result__avg_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:2838
VL53L1_system_results_t::result__final_crosstalk_corrected_range_mm_sd0
uint16_t result__final_crosstalk_corrected_range_mm_sd0
Definition: vl53l1_register_structs.h:1455
VL53L1_prev_shadow_system_results_t::prev_shadow_result__dss_actual_effective_spads_sd0
uint16_t prev_shadow_result__dss_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:2748
VL53L1_system_control_t::power_management__go1_power_force
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Definition: vl53l1_register_structs.h:1291
VL53L1_gph_timing_config_t::gph__range_config__sigma_thresh
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Definition: vl53l1_register_structs.h:3309
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int32_t result_core__signal_total_events_sd0
Definition: vl53l1_register_structs.h:1649
VL53L1_i2c_encode_static_config
VL53L1_Error VL53L1_i2c_encode_static_config(VL53L1_static_config_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Encodes data structure VL53L1_static_config_t into a I2C write buffer.
Definition: vl53l1_register_funcs.c:432
VL53L1_PHASECAL_RESULT__REFERENCE_PHASE
#define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE
Definition: vl53l1_register_map.h:3058
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Definition: vl53l1_register_structs.h:3966
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Definition: vl53l1_register_structs.h:1230
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Definition: vl53l1_register_structs.h:1752
VL53L1_i2c_encode_uint16_t
void VL53L1_i2c_encode_uint16_t(uint16_t ip_value, uint16_t count, uint8_t *pbuffer)
Encodes a uint16_t register value into an I2C write buffer.
Definition: vl53l1_core.c:519
VL53L1_static_config_t::sigma_estimator__effective_pulse_width_ns
uint8_t sigma_estimator__effective_pulse_width_ns
Definition: vl53l1_register_structs.h:599
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Definition: vl53l1_register_structs.h:501
VL53L1_gph_static_config_t::gph__dss_config__manual_block_select
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Definition: vl53l1_register_structs.h:3166
VL53L1_customer_nvm_managed_t::global_config__ref_en_start_select
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Definition: vl53l1_register_structs.h:304
VL53L1_dynamic_config_t::system__thresh_high
uint16_t system__thresh_high
Definition: vl53l1_register_structs.h:1117
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Definition: vl53l1_register_structs.h:3466
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uint16_t prev_shadow_result__spare_0_sd1
Definition: vl53l1_register_structs.h:2908
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__total_periods_elapsed_sd1
uint32_t prev_shadow_result_core__total_periods_elapsed_sd1
Definition: vl53l1_register_structs.h:3031
VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS
#define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS
Definition: vl53l1_register_map.h:586
VL53L1_timing_config_t::range_config__sigma_thresh
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Definition: vl53l1_register_structs.h:1033
VL53L1_system_control_t::system__mode_start
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Definition: vl53l1_register_structs.h:1332
VL53L1_timing_config_t::range_config__vcsel_period_a
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Definition: vl53l1_register_structs.h:993
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Definition: vl53l1_register_structs.h:1178
VL53L1_patch_results_t::phasecal_result__phase_output_ref
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Definition: vl53l1_register_structs.h:3866
VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES
#define VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:97
VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0
#define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0
Definition: vl53l1_register_map.h:1691
VL53L1_gph_timing_config_t::gph__mm_config__timeout_macrop_a_lo
uint8_t gph__mm_config__timeout_macrop_a_lo
Definition: vl53l1_register_structs.h:3219
VL53L1_debug_results_t::vhv_result__latest_setting
uint8_t vhv_result__latest_setting
Definition: vl53l1_register_structs.h:1792
VL53L1_shadow_core_results_t::shadow_result_core__signal_total_events_sd0
int32_t shadow_result_core__signal_total_events_sd0
Definition: vl53l1_register_structs.h:4328
VL53L1_debug_results_t::gph__sd_config__quantifier
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Definition: vl53l1_register_structs.h:2002
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_17
uint8_t global_config__spad_enables_rtn_17
Definition: vl53l1_register_structs.h:2520
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_28
uint8_t dss_calc__user_roi_spad_en_28
Definition: vl53l1_register_structs.h:3756
VL53L1_gph_general_config_t::gph__system__interrupt_config_gpio
uint8_t gph__system__interrupt_config_gpio
Definition: vl53l1_register_structs.h:3117
VL53L1_prev_shadow_system_results_t::prev_shadow_result__range_status
uint8_t prev_shadow_result__range_status
Definition: vl53l1_register_structs.h:2715
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__ambient_window_events_sd0
uint32_t prev_shadow_result_core__ambient_window_events_sd0
Definition: vl53l1_register_structs.h:2961
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__spare_0
uint8_t prev_shadow_result_core__spare_0
Definition: vl53l1_register_structs.h:3041
VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE
#define VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE
Definition: vl53l1_register_map.h:1078
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_11
uint8_t dss_calc__user_roi_spad_en_11
Definition: vl53l1_register_structs.h:3586
VL53L1_gph_general_config_t::gph__system__thresh_rate_high
uint16_t gph__system__thresh_rate_high
Definition: vl53l1_register_structs.h:3097
VL53L1_general_config_t::dss_config__manual_effective_spads_select
uint16_t dss_config__manual_effective_spads_select
Definition: vl53l1_register_structs.h:870
VL53L1_static_config_t::algo__range_ignore_valid_height_mm
uint8_t algo__range_ignore_valid_height_mm
Definition: vl53l1_register_structs.h:669
VL53L1_debug_results_t::gph__spare_0
uint8_t gph__spare_0
Definition: vl53l1_register_structs.h:1939
VL53L1_general_config_t::system__interrupt_config_gpio
uint8_t system__interrupt_config_gpio
Definition: vl53l1_register_structs.h:764
VL53L1_system_results_t::result__ambient_count_rate_mcps_sd0
uint16_t result__ambient_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:1425
VL53L1_gph_timing_config_t::gph__mm_config__timeout_macrop_b_lo
uint8_t gph__mm_config__timeout_macrop_b_lo
Definition: vl53l1_register_structs.h:3239
VL53L1_general_config_t::dss_config__max_spads_limit
uint8_t dss_config__max_spads_limit
Definition: vl53l1_register_structs.h:900
VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES
#define VL53L1_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:110
VL53L1_shadow_system_results_t::shadow_result__spare_0_sd1
uint16_t shadow_result__spare_0_sd1
Definition: vl53l1_register_structs.h:4224
VL53L1_timing_config_t::range_config__timeout_macrop_a_lo
uint8_t range_config__timeout_macrop_a_lo
Definition: vl53l1_register_structs.h:983
VL53L1_general_config_t
Definition: vl53l1_register_structs.h:743
VL53L1_static_config_t::dss_config__target_total_rate_mcps
uint16_t dss_config__target_total_rate_mcps
Definition: vl53l1_register_structs.h:417
VL53L1_timing_config_t::range_config__timeout_macrop_a_hi
uint8_t range_config__timeout_macrop_a_hi
Definition: vl53l1_register_structs.h:973
VL53L1_debug_results_t::interrupt_scheduler__data_out
uint32_t interrupt_scheduler__data_out
Definition: vl53l1_register_structs.h:2166
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_24
uint8_t dss_calc__user_roi_spad_en_24
Definition: vl53l1_register_structs.h:3716
VL53L1_prev_shadow_system_results_t::prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
uint16_t prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
Definition: vl53l1_register_structs.h:2808
VL53L1_general_config_t::dss_config__roi_mode_control
uint8_t dss_config__roi_mode_control
Definition: vl53l1_register_structs.h:839
VL53L1_prev_shadow_core_results_t
Definition: vl53l1_register_structs.h:2960
VL53L1_i2c_decode_static_nvm_managed
VL53L1_Error VL53L1_i2c_decode_static_nvm_managed(uint16_t buf_size, uint8_t *pbuffer, VL53L1_static_nvm_managed_t *pdata)
Decodes data structure VL53L1_static_nvm_managed_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:130
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_25
uint8_t dss_calc__user_roi_spad_en_25
Definition: vl53l1_register_structs.h:3726
VL53L1_shadow_system_results_t::shadow_result__dss_actual_effective_spads_sd0
uint16_t shadow_result__dss_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:4064
VL53L1_set_static_config
VL53L1_Error VL53L1_set_static_config(VL53L1_DEV Dev, VL53L1_static_config_t *pdata)
Sets static_config register group.
Definition: vl53l1_register_funcs.c:604
VL53L1_patch_results_t::xtalk_result__avg_xtalk_user_roi_kcps
uint32_t xtalk_result__avg_xtalk_user_roi_kcps
Definition: vl53l1_register_structs.h:3946
VL53L1_debug_results_t::interrupt_manager__status
uint8_t interrupt_manager__status
Definition: vl53l1_register_structs.h:2098
VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES
#define VL53L1_PATCH_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:114
VL53L1_general_config_t::global_config__stream_divider
uint8_t global_config__stream_divider
Definition: vl53l1_register_structs.h:754
VL53L1_nvm_copy_data_t::identification__module_type
uint8_t identification__module_type
Definition: vl53l1_register_structs.h:2219
VL53L1_set_customer_nvm_managed
VL53L1_Error VL53L1_set_customer_nvm_managed(VL53L1_DEV Dev, VL53L1_customer_nvm_managed_t *pdata)
Sets customer_nvm_managed register group.
Definition: vl53l1_register_funcs.c:366
VL53L1_timing_config_t::range_config__min_count_rate_rtn_limit_mcps
uint16_t range_config__min_count_rate_rtn_limit_mcps
Definition: vl53l1_register_structs.h:1043
VL53L1_static_config_t::algo__range_min_clip
uint8_t algo__range_min_clip
Definition: vl53l1_register_structs.h:679
VL53L1_shadow_system_results_t::shadow_result__ambient_count_rate_mcps_sd0
uint16_t shadow_result__ambient_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:4084
VL53L1_shadow_system_results_t::shadow_result__final_crosstalk_corrected_range_mm_sd0
uint16_t shadow_result__final_crosstalk_corrected_range_mm_sd0
Definition: vl53l1_register_structs.h:4114
VL53L1_enable_firmware
VL53L1_Error VL53L1_enable_firmware(VL53L1_DEV Dev)
Enables MCU firmware.
Definition: vl53l1_core.c:768
VL53L1_debug_results_t::nvm_bist__status
uint8_t nvm_bist__status
Definition: vl53l1_register_structs.h:2186
VL53L1_dynamic_config_t::sd_config__first_order_select
uint8_t sd_config__first_order_select
Definition: vl53l1_register_structs.h:1209
VL53L1_static_nvm_managed_t::ana_config__vhv_ref_sel_vddpix
uint8_t ana_config__vhv_ref_sel_vddpix
Definition: vl53l1_register_structs.h:139
VL53L1_dynamic_config_t::sd_config__quantifier
uint8_t sd_config__quantifier
Definition: vl53l1_register_structs.h:1220
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_8
uint8_t global_config__spad_enables_rtn_8
Definition: vl53l1_register_structs.h:2430
VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL
#define VL53L1_ERROR_COMMS_BUFFER_TOO_SMALL
Definition: vl53l1_error_codes.h:114
VL53L1_patch_results_t::xtalk_calc__xtalk_for_enabled_spads
uint32_t xtalk_calc__xtalk_for_enabled_spads
Definition: vl53l1_register_structs.h:3936
VL53L1_nvm_copy_data_t::ana_config__vcsel_selion
uint8_t ana_config__vcsel_selion
Definition: vl53l1_register_structs.h:2280
VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES
#define VL53L1_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:115
VL53L1_debug_results_t::phasecal_result__reference_phase
uint16_t phasecal_result__reference_phase
Definition: vl53l1_register_structs.h:1732
VL53L1_static_config_t::pad_i2c_hv__extsup_config
uint8_t pad_i2c_hv__extsup_config
Definition: vl53l1_register_structs.h:516
VL53L1_general_config_t::dss_config__min_spads_limit
uint8_t dss_config__min_spads_limit
Definition: vl53l1_register_structs.h:910
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_20
uint8_t dss_calc__user_roi_spad_en_20
Definition: vl53l1_register_structs.h:3676
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_30
uint8_t dss_calc__user_roi_spad_en_30
Definition: vl53l1_register_structs.h:3776
VL53L1_system_results_t::result__spare_1_sd1
uint16_t result__spare_1_sd1
Definition: vl53l1_register_structs.h:1575
VL53L1_static_config_t::gpio_hv_pad__ctrl
uint8_t gpio_hv_pad__ctrl
Definition: vl53l1_register_structs.h:526
VL53L1_i2c_decode_uint32_t
uint32_t VL53L1_i2c_decode_uint32_t(uint16_t count, uint8_t *pbuffer)
Decodes a uint32_t register value from an I2C read buffer.
Definition: vl53l1_core.c:624
VL53L1_nvm_copy_data_t::laser_safety__clip
uint8_t laser_safety__clip
Definition: vl53l1_register_structs.h:2330
VL53L1_core_results_t::result_core__signal_total_events_sd1
int32_t result_core__signal_total_events_sd1
Definition: vl53l1_register_structs.h:1689
VL53L1_static_config_t::spare_host_config__static_config_spare_0
uint8_t spare_host_config__static_config_spare_0
Definition: vl53l1_register_structs.h:639
VL53L1_general_config_t::phasecal_config__override
uint8_t phasecal_config__override
Definition: vl53l1_register_structs.h:829
VL53L1_debug_results_t::firmware__system_status
uint8_t firmware__system_status
Definition: vl53l1_register_structs.h:1868
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_0
uint8_t global_config__spad_enables_rtn_0
Definition: vl53l1_register_structs.h:2350
VL53L1_prev_shadow_system_results_t::prev_shadow_result__final_crosstalk_corrected_range_mm_sd0
uint16_t prev_shadow_result__final_crosstalk_corrected_range_mm_sd0
Definition: vl53l1_register_structs.h:2798
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_29
uint8_t dss_calc__user_roi_spad_en_29
Definition: vl53l1_register_structs.h:3766
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_25
uint8_t global_config__spad_enables_rtn_25
Definition: vl53l1_register_structs.h:2600
VL53L1_debug_results_t::gph__sd_config__woi_sd0
uint8_t gph__sd_config__woi_sd0
Definition: vl53l1_register_structs.h:1951
VL53L1_nvm_copy_data_t::roi_config__mode_roi_centre_spad
uint8_t roi_config__mode_roi_centre_spad
Definition: vl53l1_register_structs.h:2670
VL53L1_shadow_system_results_t::shadow_result__phase_sd1
uint16_t shadow_result__phase_sd1
Definition: vl53l1_register_structs.h:4204
VL53L1_CORE_RESULTS_I2C_SIZE_BYTES
#define VL53L1_CORE_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:104
VL53L1_gph_timing_config_t::gph__range_config__min_count_rate_rtn_limit_mcps
uint16_t gph__range_config__min_count_rate_rtn_limit_mcps
Definition: vl53l1_register_structs.h:3319
VL53L1_debug_results_t::ana_config__ref_bg_ctrl
uint8_t ana_config__ref_bg_ctrl
Definition: vl53l1_register_structs.h:1823
VL53L1_dynamic_config_t::system__grouped_parameter_hold_1
uint8_t system__grouped_parameter_hold_1
Definition: vl53l1_register_structs.h:1198
VL53L1_debug_results_t::firmware__cal_repeat_rate_counter
uint16_t firmware__cal_repeat_rate_counter
Definition: vl53l1_register_structs.h:1899
VL53L1_nvm_copy_data_t::identification__revision_id
uint8_t identification__revision_id
Definition: vl53l1_register_structs.h:2229
VL53L1_patch_results_t::dss_calc__spare_6
uint8_t dss_calc__spare_6
Definition: vl53l1_register_structs.h:3456
VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START
#define VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START
Definition: vl53l1_register_map.h:10839
VL53L1_shadow_system_results_t::shadow_result__report_status
uint8_t shadow_result__report_status
Definition: vl53l1_register_structs.h:4044
vl53l1_core.h
EwokPlus25 core function definitions.
VL53L1_system_results_t::result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
uint16_t result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
Definition: vl53l1_register_structs.h:1465
VL53L1_static_config_t::spare_host_config__static_config_spare_2
uint8_t spare_host_config__static_config_spare_2
Definition: vl53l1_register_structs.h:700
VL53L1_nvm_copy_data_t::protected_laser_safety__lock_bit
uint8_t protected_laser_safety__lock_bit
Definition: vl53l1_register_structs.h:2300
VL53L1_gph_general_config_t
Definition: vl53l1_register_structs.h:3096
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_5
uint8_t dss_calc__user_roi_spad_en_5
Definition: vl53l1_register_structs.h:3526
VL53L1_static_nvm_managed_t::vhv_config__offset
uint8_t vhv_config__offset
Definition: vl53l1_register_structs.h:210
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_0
uint8_t global_config__spad_enables_ref_0
Definition: vl53l1_register_structs.h:244
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_6
uint8_t global_config__spad_enables_rtn_6
Definition: vl53l1_register_structs.h:2410
VL53L1_prev_shadow_system_results_t::prev_shadow_result__sigma_sd0
uint16_t prev_shadow_result__sigma_sd0
Definition: vl53l1_register_structs.h:2778
VL53L1_debug_results_t::nvm_bist__complete
uint8_t nvm_bist__complete
Definition: vl53l1_register_structs.h:2176
VL53L1_patch_debug_t::result__debug_status
uint8_t result__debug_status
Definition: vl53l1_register_structs.h:3064
VL53L1_system_results_t::result__spare_0_sd1
uint16_t result__spare_0_sd1
Definition: vl53l1_register_structs.h:1565
VL53L1_static_config_t::ana_config__spad_sel_pswidth
uint8_t ana_config__spad_sel_pswidth
Definition: vl53l1_register_structs.h:569
VL53L1_dynamic_config_t::sd_config__initial_phase_sd1
uint8_t sd_config__initial_phase_sd1
Definition: vl53l1_register_structs.h:1188
VL53L1_prev_shadow_system_results_t::prev_shadow_result__final_crosstalk_corrected_range_mm_sd1
uint16_t prev_shadow_result__final_crosstalk_corrected_range_mm_sd1
Definition: vl53l1_register_structs.h:2898
VL53L1_shadow_system_results_t::shadow_result__peak_signal_count_rate_mcps_sd1
uint16_t shadow_result__peak_signal_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:4174
VL53L1_prev_shadow_system_results_t::prev_shadow_result__spare_3_sd1
uint16_t prev_shadow_result__spare_3_sd1
Definition: vl53l1_register_structs.h:2938
VL53L1_customer_nvm_managed_t
Definition: vl53l1_register_structs.h:243
VL53L1_system_results_t::result__phase_sd0
uint16_t result__phase_sd0
Definition: vl53l1_register_structs.h:1445
VL53L1_static_nvm_managed_t::vhv_config__timeout_macrop_loop_bound
uint8_t vhv_config__timeout_macrop_loop_bound
Definition: vl53l1_register_structs.h:189
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_27
uint8_t global_config__spad_enables_rtn_27
Definition: vl53l1_register_structs.h:2620
VL53L1_system_results_t::result__peak_signal_count_rate_mcps_sd1
uint16_t result__peak_signal_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:1515
VL53L1_static_config_t::sigma_estimator__sigma_ref_mm
uint8_t sigma_estimator__sigma_ref_mm
Definition: vl53l1_register_structs.h:619
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__ranging_total_events_sd0
uint32_t prev_shadow_result_core__ranging_total_events_sd0
Definition: vl53l1_register_structs.h:2971
VL53L1_static_nvm_managed_t::i2c_slave__device_address
uint8_t i2c_slave__device_address
Definition: vl53l1_register_structs.h:129
VL53L1_static_nvm_managed_t::osc_measured__fast_osc__frequency
uint16_t osc_measured__fast_osc__frequency
Definition: vl53l1_register_structs.h:179
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_4
uint8_t global_config__spad_enables_rtn_4
Definition: vl53l1_register_structs.h:2390
vl53l1_register_funcs.h
VL53L1 Register Function declarations.
VL53L1_patch_results_t::vhv_result__peak_signal_rate_mcps
uint16_t vhv_result__peak_signal_rate_mcps
Definition: vl53l1_register_structs.h:3846
VL53L1_Dev_t
Definition: vl53l1_platform_user_data.h:78
VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES
#define VL53L1_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:116
VL53L1_gph_timing_config_t::gph__range_config__timeout_macrop_a_lo
uint8_t gph__range_config__timeout_macrop_a_lo
Definition: vl53l1_register_structs.h:3259
VL53L1_static_config_t::sigma_estimator__effective_ambient_width_ns
uint8_t sigma_estimator__effective_ambient_width_ns
Definition: vl53l1_register_structs.h:609
VL53L1_gph_general_config_t::gph__system__thresh_rate_low
uint16_t gph__system__thresh_rate_low
Definition: vl53l1_register_structs.h:3107
VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL
#define VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL
Definition: vl53l1_register_map.h:9300
VL53L1_patch_results_t::dss_calc__mode_roi_1
uint8_t dss_calc__mode_roi_1
Definition: vl53l1_register_structs.h:3826
VL53L1_debug_results_t::mcu_to_host_bank__wr_access_en
uint8_t mcu_to_host_bank__wr_access_en
Definition: vl53l1_register_structs.h:2112
VL53L1_patch_results_t::mm_result__outer_complement_rate
uint16_t mm_result__outer_complement_rate
Definition: vl53l1_register_structs.h:3916
VL53L1_set_dynamic_config
VL53L1_Error VL53L1_set_dynamic_config(VL53L1_DEV Dev, VL53L1_dynamic_config_t *pdata)
Decodes data structure VL53L1_dynamic_config_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:1171
VL53L1_system_results_t::result__sigma_sd1
uint16_t result__sigma_sd1
Definition: vl53l1_register_structs.h:1535
VL53L1_i2c_decode_general_config
VL53L1_Error VL53L1_i2c_decode_general_config(uint16_t buf_size, uint8_t *pbuffer, VL53L1_general_config_t *pdata)
Decodes data structure VL53L1_general_config_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:738
VL53L1_debug_results_t::ana_config__osc_slow_ctrl
uint8_t ana_config__osc_slow_ctrl
Definition: vl53l1_register_structs.h:1846
VL53L1_static_config_t::gpio__fio_hv_status
uint8_t gpio__fio_hv_status
Definition: vl53l1_register_structs.h:559
VL53L1_dynamic_config_t
Definition: vl53l1_register_structs.h:1105
VL53L1_patch_results_t::xtalk_result__avg_xtalk_mm_inner_roi_kcps
uint32_t xtalk_result__avg_xtalk_mm_inner_roi_kcps
Definition: vl53l1_register_structs.h:3956
VL53L1_patch_results_t::sigma_estimator_calc__spare_0
uint8_t sigma_estimator_calc__spare_0
Definition: vl53l1_register_structs.h:3836
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_0
uint8_t dss_calc__user_roi_spad_en_0
Definition: vl53l1_register_structs.h:3476
VL53L1_debug_results_t::gph__sd_config__initial_phase_sd0
uint8_t gph__sd_config__initial_phase_sd0
Definition: vl53l1_register_structs.h:1971
VL53L1_system_control_t::system__interrupt_clear
uint8_t system__interrupt_clear
Definition: vl53l1_register_structs.h:1321
VL53L1_debug_results_t
Definition: vl53l1_register_structs.h:1731
VL53L1_shadow_core_results_t::shadow_result_core__ambient_window_events_sd0
uint32_t shadow_result_core__ambient_window_events_sd0
Definition: vl53l1_register_structs.h:4308
VL53L1_RESULT__INTERRUPT_STATUS
#define VL53L1_RESULT__INTERRUPT_STATUS
Definition: vl53l1_register_map.h:2052
VL53L1_nvm_copy_data_t::identification__model_id
uint8_t identification__model_id
Definition: vl53l1_register_structs.h:2209
VL53L1_general_config_t::dss_config__aperture_attenuation
uint8_t dss_config__aperture_attenuation
Definition: vl53l1_register_structs.h:890
VL53L1_patch_results_t::dss_calc__spare_3
uint8_t dss_calc__spare_3
Definition: vl53l1_register_structs.h:3426
VL53L1_core_results_t::result_core__ranging_total_events_sd0
uint32_t result_core__ranging_total_events_sd0
Definition: vl53l1_register_structs.h:1639
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_21
uint8_t dss_calc__user_roi_spad_en_21
Definition: vl53l1_register_structs.h:3686
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_18
uint8_t dss_calc__user_roi_spad_en_18
Definition: vl53l1_register_structs.h:3656
VL53L1_gph_timing_config_t
Definition: vl53l1_register_structs.h:3208
VL53L1_prev_shadow_system_results_t::prev_shadow_result__peak_signal_count_rate_mcps_sd0
uint16_t prev_shadow_result__peak_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:2758
VL53L1_patch_results_t::dss_calc__spare_1
uint8_t dss_calc__spare_1
Definition: vl53l1_register_structs.h:3406
VL53L1_gph_static_config_t::gph__dss_config__max_spads_limit
uint8_t gph__dss_config__max_spads_limit
Definition: vl53l1_register_structs.h:3176
VL53L1_static_config_t::nvm_bist__num_nvm_words
uint8_t nvm_bist__num_nvm_words
Definition: vl53l1_register_structs.h:471
VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES
#define VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:100
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_1
uint8_t global_config__spad_enables_ref_1
Definition: vl53l1_register_structs.h:254
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_15
uint8_t dss_calc__user_roi_spad_en_15
Definition: vl53l1_register_structs.h:3626
VL53L1_patch_debug_t
Definition: vl53l1_register_structs.h:3063
VL53L1_debug_results_t::gph__system__enable_xtalk_per_quadrant
uint8_t gph__system__enable_xtalk_per_quadrant
Definition: vl53l1_register_structs.h:1929
VL53L1_dynamic_config_t::system__enable_xtalk_per_quadrant
uint8_t system__enable_xtalk_per_quadrant
Definition: vl53l1_register_structs.h:1137
VL53L1_general_config_t::gph_config__stream_count_update_value
uint8_t gph_config__stream_count_update_value
Definition: vl53l1_register_structs.h:744
VL53L1_gph_timing_config_t::gph__mm_config__timeout_macrop_a_hi
uint8_t gph__mm_config__timeout_macrop_a_hi
Definition: vl53l1_register_structs.h:3209
VL53L1_i2c_decode_uint16_t
uint16_t VL53L1_i2c_decode_uint16_t(uint16_t count, uint8_t *pbuffer)
Decodes a uint16_t register value from an I2C read buffer.
Definition: vl53l1_core.c:540
VL53L1_shadow_system_results_t::shadow_result__ambient_count_rate_mcps_sd1
uint16_t shadow_result__ambient_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:4184
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_3
uint8_t global_config__spad_enables_rtn_3
Definition: vl53l1_register_structs.h:2380
VL53L1_timing_config_t::range_config__timeout_macrop_b_hi
uint8_t range_config__timeout_macrop_b_hi
Definition: vl53l1_register_structs.h:1003
VL53L1_patch_results_t::dss_calc__roi_ctrl
uint8_t dss_calc__roi_ctrl
Definition: vl53l1_register_structs.h:3395
VL53L1_shadow_system_results_t::shadow_result__peak_signal_count_rate_mcps_sd0
uint16_t shadow_result__peak_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:4074
VL53L1_system_results_t::result__spare_2_sd1
uint16_t result__spare_2_sd1
Definition: vl53l1_register_structs.h:1585
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_13
uint8_t global_config__spad_enables_rtn_13
Definition: vl53l1_register_structs.h:2480
VL53L1_patch_results_t::dss_result__num_requested_spads
uint16_t dss_result__num_requested_spads
Definition: vl53l1_register_structs.h:3896
VL53L1_nvm_copy_data_t::identification__module_id
uint16_t identification__module_id
Definition: vl53l1_register_structs.h:2240
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__total_periods_elapsed_sd0
uint32_t prev_shadow_result_core__total_periods_elapsed_sd0
Definition: vl53l1_register_structs.h:2991
VL53L1_shadow_system_results_t::shadow_result__final_crosstalk_corrected_range_mm_sd1
uint16_t shadow_result__final_crosstalk_corrected_range_mm_sd1
Definition: vl53l1_register_structs.h:4214
VL53L1_debug_results_t::pad_startup_mode__value_ro
uint8_t pad_startup_mode__value_ro
Definition: vl53l1_register_structs.h:2132
VL53L1_core_results_t::result_core__total_periods_elapsed_sd0
uint32_t result_core__total_periods_elapsed_sd0
Definition: vl53l1_register_structs.h:1659
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_1
uint8_t global_config__spad_enables_rtn_1
Definition: vl53l1_register_structs.h:2360
VL53L1_nvm_copy_data_t::ana_config__fast_osc__trim_max
uint8_t ana_config__fast_osc__trim_max
Definition: vl53l1_register_structs.h:2250
VL53L1_static_config_t::nvm_bist__start_address
uint8_t nvm_bist__start_address
Definition: vl53l1_register_structs.h:481
VL53L1_debug_results_t::ana_config__regdvdd1v2_ctrl
uint8_t ana_config__regdvdd1v2_ctrl
Definition: vl53l1_register_structs.h:1834
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_26
uint8_t global_config__spad_enables_rtn_26
Definition: vl53l1_register_structs.h:2610
VL53L1_general_config_t::dss_config__manual_block_select
uint8_t dss_config__manual_block_select
Definition: vl53l1_register_structs.h:880
VL53L1_core_results_t::result_core__total_periods_elapsed_sd1
uint32_t result_core__total_periods_elapsed_sd1
Definition: vl53l1_register_structs.h:1699
vl53l1_register_map.h
VL53L1 Register Map definitions.
VL53L1_gph_static_config_t::gph__dss_config__manual_effective_spads_select
uint16_t gph__dss_config__manual_effective_spads_select
Definition: vl53l1_register_structs.h:3156
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_2
uint8_t global_config__spad_enables_rtn_2
Definition: vl53l1_register_structs.h:2370
VL53L1_shadow_core_results_t::shadow_result_core__spare_0
uint8_t shadow_result_core__spare_0
Definition: vl53l1_register_structs.h:4388
VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES
#define VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:101
VL53L1_nvm_copy_data_t::roi_config__mode_roi_xy_size
uint8_t roi_config__mode_roi_xy_size
Definition: vl53l1_register_structs.h:2680
VL53L1_set_system_control
VL53L1_Error VL53L1_set_system_control(VL53L1_DEV Dev, VL53L1_system_control_t *pdata)
Decodes data structure VL53L1_system_control_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:1309
VL53L1_general_config_t::cal_config__vcsel_start
uint8_t cal_config__vcsel_start
Definition: vl53l1_register_structs.h:779
VL53L1_static_nvm_managed_t::vhv_config__init
uint8_t vhv_config__init
Definition: vl53l1_register_structs.h:220
VL53L1_patch_results_t::dss_result__enabled_blocks
uint8_t dss_result__enabled_blocks
Definition: vl53l1_register_structs.h:3886
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_7
uint8_t global_config__spad_enables_rtn_7
Definition: vl53l1_register_structs.h:2420
VL53L1_patch_results_t::range_result__offset_corrected_range
uint16_t range_result__offset_corrected_range
Definition: vl53l1_register_structs.h:3986
VL53L1_shadow_system_results_t::shadow_result__avg_signal_count_rate_mcps_sd0
uint16_t shadow_result__avg_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:4154
vl53l1_register_structs.h
VL53L1 Register Structure definitions.
VL53L1_system_results_t::result__avg_signal_count_rate_mcps_sd0
uint16_t result__avg_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:1495
VL53L1_patch_results_t::dss_calc__user_roi_1
uint8_t dss_calc__user_roi_1
Definition: vl53l1_register_structs.h:3806
VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI
#define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI
Definition: vl53l1_register_map.h:1395
VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES
#define VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:96
VL53L1_general_config_t::global_config__vcsel_width
uint8_t global_config__vcsel_width
Definition: vl53l1_register_structs.h:799
VL53L1_i2c_decode_debug_results
VL53L1_Error VL53L1_i2c_decode_debug_results(uint16_t buf_size, uint8_t *pbuffer, VL53L1_debug_results_t *pdata)
Sets core_results register group.
Definition: vl53l1_register_funcs.c:1937
LOG_FUNCTION_END
#define LOG_FUNCTION_END(status,...)
Definition: vl53l1_register_funcs.c:78
VL53L1_debug_results_t::phasecal_result__vcsel_start
uint8_t phasecal_result__vcsel_start
Definition: vl53l1_register_structs.h:1742
VL53L1_i2c_decode_customer_nvm_managed
VL53L1_Error VL53L1_i2c_decode_customer_nvm_managed(uint16_t buf_size, uint8_t *pbuffer, VL53L1_customer_nvm_managed_t *pdata)
Decodes data structure VL53L1_customer_nvm_managed_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:310
VL53L1_debug_results_t::gph__system__thresh_high
uint16_t gph__system__thresh_high
Definition: vl53l1_register_structs.h:1909
VL53L1_dynamic_config_t::system__grouped_parameter_hold_0
uint8_t system__grouped_parameter_hold_0
Definition: vl53l1_register_structs.h:1106
VL53L1_nvm_copy_data_t::ana_config__vcsel_trim
uint8_t ana_config__vcsel_trim
Definition: vl53l1_register_structs.h:2270
VL53L1_shadow_system_results_t::shadow_result__spare_1_sd1
uint16_t shadow_result__spare_1_sd1
Definition: vl53l1_register_structs.h:4234
VL53L1_system_results_t::result__thresh_info
uint8_t result__thresh_info
Definition: vl53l1_register_structs.h:1605
VL53L1_general_config_t::phasecal_config__target
uint8_t phasecal_config__target
Definition: vl53l1_register_structs.h:819
VL53L1_ReadMulti
VL53L1_Error VL53L1_ReadMulti(VL53L1_DEV Dev, uint16_t index, uint8_t *pdata, uint32_t count)
Definition: vl53l1_platform.c:16
VL53L1_shadow_system_results_t::shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
uint16_t shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0
Definition: vl53l1_register_structs.h:4124
VL53L1_WriteMulti
VL53L1_Error VL53L1_WriteMulti(VL53L1_DEV Dev, uint16_t index, uint8_t *pdata, uint32_t count)
Definition: vl53l1_platform.c:11
VL53L1_timing_config_t::range_config__timeout_macrop_b_lo
uint8_t range_config__timeout_macrop_b_lo
Definition: vl53l1_register_structs.h:1013
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_5
uint8_t global_config__spad_enables_ref_5
Definition: vl53l1_register_structs.h:294
VL53L1_customer_nvm_managed_t::ref_spad_char__total_rate_target_mcps
uint16_t ref_spad_char__total_rate_target_mcps
Definition: vl53l1_register_structs.h:364
VL53L1_prev_shadow_system_results_t
Definition: vl53l1_register_structs.h:2702
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_4
uint8_t global_config__spad_enables_ref_4
Definition: vl53l1_register_structs.h:284
VL53L1_gph_timing_config_t::gph__range_config__valid_phase_low
uint8_t gph__range_config__valid_phase_low
Definition: vl53l1_register_structs.h:3329
VL53L1_static_config_t
Definition: vl53l1_register_structs.h:416
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_6
uint8_t dss_calc__user_roi_spad_en_6
Definition: vl53l1_register_structs.h:3536
VL53L1_i2c_encode_customer_nvm_managed
VL53L1_Error VL53L1_i2c_encode_customer_nvm_managed(VL53L1_customer_nvm_managed_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Encodes data structure VL53L1_customer_nvm_managed_t into a I2C write buffer.
Definition: vl53l1_register_funcs.c:240
VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES
#define VL53L1_GPH_STATIC_CONFIG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:111
VL53L1_system_results_t::result__stream_count
uint8_t result__stream_count
Definition: vl53l1_register_structs.h:1395
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__ambient_window_events_sd1
uint32_t prev_shadow_result_core__ambient_window_events_sd1
Definition: vl53l1_register_structs.h:3001
VL53L1_system_results_t::result__spare_3_sd1
uint8_t result__spare_3_sd1
Definition: vl53l1_register_structs.h:1595
VL53L1_dynamic_config_t::system__sequence_config
uint8_t system__sequence_config
Definition: vl53l1_register_structs.h:1250
VL53L1_timing_config_t::system__intermeasurement_period
uint32_t system__intermeasurement_period
Definition: vl53l1_register_structs.h:1073
VL53L1_debug_results_t::gph__roi_config__user_roi_requested_global_xy_size
uint8_t gph__roi_config__user_roi_requested_global_xy_size
Definition: vl53l1_register_structs.h:2022
VL53L1_static_config_t::test_mode__ctrl
uint8_t test_mode__ctrl
Definition: vl53l1_register_structs.h:437
VL53L1_ERROR_NONE
#define VL53L1_ERROR_NONE
Definition: vl53l1_error_codes.h:91
VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES
#define VL53L1_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:108
VL53L1_shadow_system_results_t::shadow_result__mm_outer_actual_effective_spads_sd0
uint16_t shadow_result__mm_outer_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:4144
VL53L1_shadow_core_results_t::shadow_result_core__ambient_window_events_sd1
uint32_t shadow_result_core__ambient_window_events_sd1
Definition: vl53l1_register_structs.h:4348
VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES
#define VL53L1_NVM_COPY_DATA_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:106
VL53L1_debug_results_t::firmware__secondary_mode_status
uint8_t firmware__secondary_mode_status
Definition: vl53l1_register_structs.h:1889
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_23
uint8_t global_config__spad_enables_rtn_23
Definition: vl53l1_register_structs.h:2580
VL53L1_shadow_system_results_t::shadow_result__stream_count
uint8_t shadow_result__stream_count
Definition: vl53l1_register_structs.h:4054
VL53L1_dynamic_config_t::roi_config__user_roi_requested_global_xy_size
uint8_t roi_config__user_roi_requested_global_xy_size
Definition: vl53l1_register_structs.h:1240
VL53L1_gph_timing_config_t::gph__range_config__timeout_macrop_b_hi
uint8_t gph__range_config__timeout_macrop_b_hi
Definition: vl53l1_register_structs.h:3289
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_9
uint8_t global_config__spad_enables_rtn_9
Definition: vl53l1_register_structs.h:2440
VL53L1_static_config_t::algo__range_ignore_threshold_mcps
uint16_t algo__range_ignore_threshold_mcps
Definition: vl53l1_register_structs.h:659
VL53L1_shadow_system_results_t::shadow_result__range_status
uint8_t shadow_result__range_status
Definition: vl53l1_register_structs.h:4031
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_27
uint8_t dss_calc__user_roi_spad_en_27
Definition: vl53l1_register_structs.h:3746
VL53L1_debug_results_t::firmware__mode_status
uint8_t firmware__mode_status
Definition: vl53l1_register_structs.h:1879
VL53L1_system_results_t::result__mm_inner_actual_effective_spads_sd0
uint16_t result__mm_inner_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:1475
VL53L1_nvm_copy_data_t::ana_config__fast_osc__freq_set
uint8_t ana_config__fast_osc__freq_set
Definition: vl53l1_register_structs.h:2260
VL53L1_get_static_nvm_managed
VL53L1_Error VL53L1_get_static_nvm_managed(VL53L1_DEV Dev, VL53L1_static_nvm_managed_t *pdata)
Gets static_nvm_managed register group.
Definition: vl53l1_register_funcs.c:207
VL53L1_static_nvm_managed_t::vhv_config__count_thresh
uint8_t vhv_config__count_thresh
Definition: vl53l1_register_structs.h:200
VL53L1_general_config_t::system__thresh_rate_low
uint16_t system__thresh_rate_low
Definition: vl53l1_register_structs.h:860
VL53L1_patch_results_t::mm_result__total_offset
uint16_t mm_result__total_offset
Definition: vl53l1_register_structs.h:3926
VL53L1_i2c_encode_timing_config
VL53L1_Error VL53L1_i2c_encode_timing_config(VL53L1_timing_config_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Gets general_config register group.
Definition: vl53l1_register_funcs.c:864
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_31
uint8_t global_config__spad_enables_rtn_31
Definition: vl53l1_register_structs.h:2660
VL53L1_patch_results_t::dss_calc__user_roi_0
uint8_t dss_calc__user_roi_0
Definition: vl53l1_register_structs.h:3796
VL53L1_nvm_copy_data_t::laser_safety__key
uint8_t laser_safety__key
Definition: vl53l1_register_structs.h:2310
VL53L1_customer_nvm_managed_t::mm_config__outer_offset_mm
int16_t mm_config__outer_offset_mm
Definition: vl53l1_register_structs.h:394
VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES
#define VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:102
VL53L1_customer_nvm_managed_t::algo__crosstalk_compensation_x_plane_gradient_kcps
int16_t algo__crosstalk_compensation_x_plane_gradient_kcps
Definition: vl53l1_register_structs.h:344
VL53L1_debug_results_t::vhv_result__coldboot_status
uint8_t vhv_result__coldboot_status
Definition: vl53l1_register_structs.h:1772
VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES
#define VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:105
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_22
uint8_t global_config__spad_enables_rtn_22
Definition: vl53l1_register_structs.h:2570
VL53L1_debug_results_t::gph__system__thresh_low
uint16_t gph__system__thresh_low
Definition: vl53l1_register_structs.h:1919
VL53L1_i2c_encode_int16_t
void VL53L1_i2c_encode_int16_t(int16_t ip_value, uint16_t count, uint8_t *pbuffer)
Encodes a int16_t register value into an I2C write buffer.
Definition: vl53l1_core.c:559
VL53L1_customer_nvm_managed_t::ref_spad_man__num_requested_ref_spads
uint8_t ref_spad_man__num_requested_ref_spads
Definition: vl53l1_register_structs.h:314
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_12
uint8_t global_config__spad_enables_rtn_12
Definition: vl53l1_register_structs.h:2470
VL53L1_timing_config_t::mm_config__timeout_macrop_b_hi
uint8_t mm_config__timeout_macrop_b_hi
Definition: vl53l1_register_structs.h:953
VL53L1_shadow_core_results_t::shadow_result_core__ranging_total_events_sd0
uint32_t shadow_result_core__ranging_total_events_sd0
Definition: vl53l1_register_structs.h:4318
VL53L1_debug_results_t::gph__gph_id
uint8_t gph__gph_id
Definition: vl53l1_register_structs.h:2049
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_2
uint8_t global_config__spad_enables_ref_2
Definition: vl53l1_register_structs.h:264
VL53L1_prev_shadow_system_results_t::prev_shadow_result__mm_inner_actual_effective_spads_sd0
uint16_t prev_shadow_result__mm_inner_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:2818
VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV
#define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV
Definition: vl53l1_register_map.h:9628
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_17
uint8_t dss_calc__user_roi_spad_en_17
Definition: vl53l1_register_structs.h:3646
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_24
uint8_t global_config__spad_enables_rtn_24
Definition: vl53l1_register_structs.h:2590
VL53L1_FW_INTERNAL_I2C_SIZE_BYTES
#define VL53L1_FW_INTERNAL_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:113
VL53L1_gph_timing_config_t::gph__range_config__vcsel_period_b
uint8_t gph__range_config__vcsel_period_b
Definition: vl53l1_register_structs.h:3279
VL53L1_debug_results_t::system__interrupt_set
uint8_t system__interrupt_set
Definition: vl53l1_register_structs.h:2059
VL53L1_system_results_t::result__range_status
uint8_t result__range_status
Definition: vl53l1_register_structs.h:1372
VL53L1_prev_shadow_system_results_t::prev_shadow_result__ambient_count_rate_mcps_sd1
uint16_t prev_shadow_result__ambient_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:2868
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_16
uint8_t dss_calc__user_roi_spad_en_16
Definition: vl53l1_register_structs.h:3636
VL53L1_debug_results_t::pad_startup_mode__value_ctrl
uint8_t pad_startup_mode__value_ctrl
Definition: vl53l1_register_structs.h:2143
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_30
uint8_t global_config__spad_enables_rtn_30
Definition: vl53l1_register_structs.h:2650
VL53L1_customer_nvm_managed_t::algo__crosstalk_compensation_plane_offset_kcps
uint16_t algo__crosstalk_compensation_plane_offset_kcps
Definition: vl53l1_register_structs.h:334
VL53L1_system_results_t::result__ambient_count_rate_mcps_sd1
uint16_t result__ambient_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:1525
VL53L1_debug_results_t::ana_config__powerdown_go1
uint8_t ana_config__powerdown_go1
Definition: vl53l1_register_structs.h:1812
VL53L1_customer_nvm_managed_t::algo__part_to_part_range_offset_mm
int16_t algo__part_to_part_range_offset_mm
Definition: vl53l1_register_structs.h:374
VL53L1_i2c_encode_int32_t
void VL53L1_i2c_encode_int32_t(int32_t ip_value, uint16_t count, uint8_t *pbuffer)
Encodes a int32_t register value into an I2C write buffer.
Definition: vl53l1_core.c:675
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_14
uint8_t global_config__spad_enables_rtn_14
Definition: vl53l1_register_structs.h:2490
VL53L1_prev_shadow_system_results_t::prev_shadow_result__stream_count
uint8_t prev_shadow_result__stream_count
Definition: vl53l1_register_structs.h:2738
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_21
uint8_t global_config__spad_enables_rtn_21
Definition: vl53l1_register_structs.h:2560
VL53L1_general_config_t::cal_config__repeat_rate
uint16_t cal_config__repeat_rate
Definition: vl53l1_register_structs.h:789
VL53L1_static_nvm_managed_t::ana_config__reg_avdd1v2_sel
uint8_t ana_config__reg_avdd1v2_sel
Definition: vl53l1_register_structs.h:159
VL53L1_system_results_t::result__dss_actual_effective_spads_sd0
uint16_t result__dss_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:1405
VL53L1_patch_debug_t::result__debug_stage
uint8_t result__debug_stage
Definition: vl53l1_register_structs.h:3074
VL53L1_system_control_t
Definition: vl53l1_register_structs.h:1290
VL53L1_static_config_t::debug__ctrl
uint8_t debug__ctrl
Definition: vl53l1_register_structs.h:427
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_29
uint8_t global_config__spad_enables_rtn_29
Definition: vl53l1_register_structs.h:2640
VL53L1_i2c_encode_general_config
VL53L1_Error VL53L1_i2c_encode_general_config(VL53L1_general_config_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Gets static_config register group.
Definition: vl53l1_register_funcs.c:672
VL53L1_dynamic_config_t::system__grouped_parameter_hold
uint8_t system__grouped_parameter_hold
Definition: vl53l1_register_structs.h:1267
VL53L1_i2c_decode_int32_t
int32_t VL53L1_i2c_decode_int32_t(uint16_t count, uint8_t *pbuffer)
Decodes a int32_t register value from an I2C read buffer.
Definition: vl53l1_core.c:696
VL53L1_core_results_t::result_core__ambient_window_events_sd1
uint32_t result_core__ambient_window_events_sd1
Definition: vl53l1_register_structs.h:1669
VL53L1_i2c_decode_static_config
VL53L1_Error VL53L1_i2c_decode_static_config(uint16_t buf_size, uint8_t *pbuffer, VL53L1_static_config_t *pdata)
Decodes data structure VL53L1_static_config_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:520
VL53L1_debug_results_t::test_mode__status
uint8_t test_mode__status
Definition: vl53l1_register_structs.h:1858
VL53L1_debug_results_t::interrupt_manager__clear
uint8_t interrupt_manager__clear
Definition: vl53l1_register_structs.h:2084
VL53L1_set_general_config
VL53L1_Error VL53L1_set_general_config(VL53L1_DEV Dev, VL53L1_general_config_t *pdata)
Sets general_config register group.
Definition: vl53l1_register_funcs.c:796
VL53L1_set_static_nvm_managed
VL53L1_Error VL53L1_set_static_nvm_managed(VL53L1_DEV Dev, VL53L1_static_nvm_managed_t *pdata)
Sets static_nvm_managed register group.
Definition: vl53l1_register_funcs.c:174
VL53L1_debug_results_t::gph__sd_config__woi_sd1
uint8_t gph__sd_config__woi_sd1
Definition: vl53l1_register_structs.h:1961
VL53L1_customer_nvm_managed_t::global_config__spad_enables_ref_3
uint8_t global_config__spad_enables_ref_3
Definition: vl53l1_register_structs.h:274
VL53L1_static_nvm_managed_t::ana_config__vhv_ref_sel_vquench
uint8_t ana_config__vhv_ref_sel_vquench
Definition: vl53l1_register_structs.h:149
VL53L1_patch_results_t::dss_calc__spare_2
uint8_t dss_calc__spare_2
Definition: vl53l1_register_structs.h:3416
VL53L1_patch_results_t::range_result__accum_phase
uint32_t range_result__accum_phase
Definition: vl53l1_register_structs.h:3976
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_19
uint8_t global_config__spad_enables_rtn_19
Definition: vl53l1_register_structs.h:2540
VL53L1_customer_nvm_managed_t::mm_config__inner_offset_mm
int16_t mm_config__inner_offset_mm
Definition: vl53l1_register_structs.h:384
VL53L1_system_results_t::result__report_status
uint8_t result__report_status
Definition: vl53l1_register_structs.h:1385
VL53L1_patch_results_t
Definition: vl53l1_register_structs.h:3394
VL53L1_gph_static_config_t::gph__dss_config__min_spads_limit
uint8_t gph__dss_config__min_spads_limit
Definition: vl53l1_register_structs.h:3186
VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES
#define VL53L1_PATCH_DEBUG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:109
VL53L1_shadow_system_results_t::shadow_result__spare_2_sd1
uint16_t shadow_result__spare_2_sd1
Definition: vl53l1_register_structs.h:4244
VL53L1_nvm_copy_data_t::laser_safety__key_ro
uint8_t laser_safety__key_ro
Definition: vl53l1_register_structs.h:2320
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_28
uint8_t global_config__spad_enables_rtn_28
Definition: vl53l1_register_structs.h:2630
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_3
uint8_t dss_calc__user_roi_spad_en_3
Definition: vl53l1_register_structs.h:3506
VL53L1_DSS_CALC__ROI_CTRL
#define VL53L1_DSS_CALC__ROI_CTRL
Definition: vl53l1_register_map.h:9658
VL53L1_debug_results_t::gph__roi_config__user_roi_centre_spad
uint8_t gph__roi_config__user_roi_centre_spad
Definition: vl53l1_register_structs.h:2012
VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE
#define VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE
Definition: vl53l1_register_map.h:1971
VL53L1_static_config_t::spare_host_config__static_config_spare_1
uint8_t spare_host_config__static_config_spare_1
Definition: vl53l1_register_structs.h:649
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_23
uint8_t dss_calc__user_roi_spad_en_23
Definition: vl53l1_register_structs.h:3706
VL53L1_nvm_copy_data_t::global_config__spad_enables_rtn_16
uint8_t global_config__spad_enables_rtn_16
Definition: vl53l1_register_structs.h:2510
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_2
uint8_t dss_calc__user_roi_spad_en_2
Definition: vl53l1_register_structs.h:3496
VL53L1_dynamic_config_t::system__seed_config
uint8_t system__seed_config
Definition: vl53l1_register_structs.h:1147
VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES
#define VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES
Definition: vl53l1_register_structs.h:99
VL53L1_shadow_core_results_t::shadow_result_core__ranging_total_events_sd1
uint32_t shadow_result_core__ranging_total_events_sd1
Definition: vl53l1_register_structs.h:4358
VL53L1_core_results_t::result_core__ranging_total_events_sd1
uint32_t result_core__ranging_total_events_sd1
Definition: vl53l1_register_structs.h:1679
VL53L1_gph_static_config_t
Definition: vl53l1_register_structs.h:3144
VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH
#define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH
Definition: vl53l1_register_map.h:9222
VL53L1_prev_shadow_core_results_t::prev_shadow_result_core__signal_total_events_sd0
int32_t prev_shadow_result_core__signal_total_events_sd0
Definition: vl53l1_register_structs.h:2981
VL53L1_static_config_t::host_if__status
uint8_t host_if__status
Definition: vl53l1_register_structs.h:491
VL53L1_nvm_copy_data_t::ana_config__vcsel_selion_max
uint8_t ana_config__vcsel_selion_max
Definition: vl53l1_register_structs.h:2290
VL53L1_RESULT__DEBUG_STATUS
#define VL53L1_RESULT__DEBUG_STATUS
Definition: vl53l1_register_map.h:9192
VL53L1_shadow_system_results_t::shadow_result__dss_actual_effective_spads_sd1
uint16_t shadow_result__dss_actual_effective_spads_sd1
Definition: vl53l1_register_structs.h:4164
VL53L1_static_config_t::sd_config__reset_stages_lsb
uint8_t sd_config__reset_stages_lsb
Definition: vl53l1_register_structs.h:720
VL53L1_patch_results_t::mm_result__inner_intersection_rate
uint16_t mm_result__inner_intersection_rate
Definition: vl53l1_register_structs.h:3906
VL53L1_static_config_t::gpio__tio_hv_status
uint8_t gpio__tio_hv_status
Definition: vl53l1_register_structs.h:548
VL53L1_patch_results_t::dss_calc__spare_5
uint8_t dss_calc__spare_5
Definition: vl53l1_register_structs.h:3446
vl53l1_platform.h
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_26
uint8_t dss_calc__user_roi_spad_en_26
Definition: vl53l1_register_structs.h:3736
VL53L1_fw_internal_t
Definition: vl53l1_register_structs.h:3361
VL53L1_i2c_decode_int16_t
int16_t VL53L1_i2c_decode_int16_t(uint16_t count, uint8_t *pbuffer)
Decodes a int16_t register value from an I2C read buffer.
Definition: vl53l1_core.c:580
VL53L1_timing_config_t::system__fractional_enable
uint8_t system__fractional_enable
Definition: vl53l1_register_structs.h:1083
VL53L1_shadow_core_results_t::shadow_result_core__signal_total_events_sd1
int32_t shadow_result_core__signal_total_events_sd1
Definition: vl53l1_register_structs.h:4368
VL53L1_shadow_core_results_t::shadow_result_core__total_periods_elapsed_sd1
uint32_t shadow_result_core__total_periods_elapsed_sd1
Definition: vl53l1_register_structs.h:4378
VL53L1_debug_results_t::ref_spad_char_result__ref_location
uint8_t ref_spad_char_result__ref_location
Definition: vl53l1_register_structs.h:1762
VL53L1_timing_config_t::range_config__valid_phase_low
uint8_t range_config__valid_phase_low
Definition: vl53l1_register_structs.h:1053
VL53L1_I2C_SLAVE__DEVICE_ADDRESS
#define VL53L1_I2C_SLAVE__DEVICE_ADDRESS
Definition: vl53l1_register_map.h:82
VL53L1_dynamic_config_t::sd_config__woi_sd0
uint8_t sd_config__woi_sd0
Definition: vl53l1_register_structs.h:1158
VL53L1_patch_results_t::dss_calc__mode_roi_0
uint8_t dss_calc__mode_roi_0
Definition: vl53l1_register_structs.h:3816
VL53L1_system_results_t::result__peak_signal_count_rate_mcps_sd0
uint16_t result__peak_signal_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:1415
VL53L1_static_config_t::nvm_bist__ctrl
uint8_t nvm_bist__ctrl
Definition: vl53l1_register_structs.h:460
VL53L1_i2c_decode_nvm_copy_data
VL53L1_Error VL53L1_i2c_decode_nvm_copy_data(uint16_t buf_size, uint8_t *pbuffer, VL53L1_nvm_copy_data_t *pdata)
Sets debug_results register group.
Definition: vl53l1_register_funcs.c:2245
VL53L1_system_results_t::result__sigma_sd0
uint16_t result__sigma_sd0
Definition: vl53l1_register_structs.h:1435
VL53L1_shadow_system_results_t::shadow_result__thresh_info
uint8_t shadow_result__thresh_info
Definition: vl53l1_register_structs.h:4264
VL53L1_debug_results_t::power_management__go1_reset_status
uint8_t power_management__go1_reset_status
Definition: vl53l1_register_structs.h:2122
VL53L1_nvm_copy_data_t
Definition: vl53l1_register_structs.h:2208
VL53L1_get_customer_nvm_managed
VL53L1_Error VL53L1_get_customer_nvm_managed(VL53L1_DEV Dev, VL53L1_customer_nvm_managed_t *pdata)
Gets customer_nvm_managed register group.
Definition: vl53l1_register_funcs.c:399
VL53L1_shadow_system_results_t::shadow_result__mm_inner_actual_effective_spads_sd0
uint16_t shadow_result__mm_inner_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:4134
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_13
uint8_t dss_calc__user_roi_spad_en_13
Definition: vl53l1_register_structs.h:3606
VL53L1_Error
int8_t VL53L1_Error
Definition: vl53l1_error_codes.h:89
VL53L1_general_config_t::phasecal_config__timeout_macrop
uint8_t phasecal_config__timeout_macrop
Definition: vl53l1_register_structs.h:809
VL53L1_prev_shadow_system_results_t::prev_shadow_result__mm_outer_actual_effective_spads_sd0
uint16_t prev_shadow_result__mm_outer_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:2828
VL53L1_prev_shadow_system_results_t::prev_shadow_result__dss_actual_effective_spads_sd1
uint16_t prev_shadow_result__dss_actual_effective_spads_sd1
Definition: vl53l1_register_structs.h:2848
VL53L1_patch_results_t::dss_result__total_rate_per_spad
uint16_t dss_result__total_rate_per_spad
Definition: vl53l1_register_structs.h:3876
VL53L1_static_config_t::sd_config__reset_stages_msb
uint8_t sd_config__reset_stages_msb
Definition: vl53l1_register_structs.h:710
VL53L1_system_results_t::result__interrupt_status
uint8_t result__interrupt_status
Definition: vl53l1_register_structs.h:1360
VL53L1_fw_internal_t::firmware__internal_stream_count_div
uint8_t firmware__internal_stream_count_div
Definition: vl53l1_register_structs.h:3362
VL53L1_debug_results_t::gph__system__sequence_config
uint8_t gph__system__sequence_config
Definition: vl53l1_register_structs.h:2032
VL53L1_shadow_system_results_t::shadow_result__phase_sd0
uint16_t shadow_result__phase_sd0
Definition: vl53l1_register_structs.h:4104
VL53L1_patch_results_t::vhv_result__signal_total_events_ref
uint32_t vhv_result__signal_total_events_ref
Definition: vl53l1_register_structs.h:3856
VL53L1_static_config_t::ana_config__fast_osc__config_ctrl
uint8_t ana_config__fast_osc__config_ctrl
Definition: vl53l1_register_structs.h:589
VL53L1_system_results_t::result__mm_outer_actual_effective_spads_sd0
uint16_t result__mm_outer_actual_effective_spads_sd0
Definition: vl53l1_register_structs.h:1485
VL53L1_i2c_encode_dynamic_config
VL53L1_Error VL53L1_i2c_encode_dynamic_config(VL53L1_dynamic_config_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Decodes data structure VL53L1_timing_config_t from the input I2C read buffer.
Definition: vl53l1_register_funcs.c:1054
LOG_FUNCTION_START
#define LOG_FUNCTION_START(fmt,...)
Definition: vl53l1_register_funcs.c:76
VL53L1_timing_config_t::range_config__vcsel_period_b
uint8_t range_config__vcsel_period_b
Definition: vl53l1_register_structs.h:1023
VL53L1_i2c_encode_static_nvm_managed
VL53L1_Error VL53L1_i2c_encode_static_nvm_managed(VL53L1_static_nvm_managed_t *pdata, uint16_t buf_size, uint8_t *pbuffer)
Encodes data structure VL53L1_static_nvm_managed_t into a I2C write buffer.
Definition: vl53l1_register_funcs.c:84
VL53L1_shadow_system_results_t
Definition: vl53l1_register_structs.h:4008
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_31
uint8_t dss_calc__user_roi_spad_en_31
Definition: vl53l1_register_structs.h:3786
VL53L1_static_config_t::algo__crosstalk_compensation_valid_height_mm
uint8_t algo__crosstalk_compensation_valid_height_mm
Definition: vl53l1_register_structs.h:629
uint16_t
unsigned short uint16_t
Typedef defining 16 bit unsigned short type. The developer should modify this to suit the platform be...
Definition: vl53l1_types.h:123
VL53L1_disable_firmware
VL53L1_Error VL53L1_disable_firmware(VL53L1_DEV Dev)
Disables MCU firmware.
Definition: vl53l1_core.c:787
VL53L1_static_config_t::gpio_hv_mux__ctrl
uint8_t gpio_hv_mux__ctrl
Definition: vl53l1_register_structs.h:537
VL53L1_IDENTIFICATION__MODEL_ID
#define VL53L1_IDENTIFICATION__MODEL_ID
Definition: vl53l1_register_map.h:3870
VL53L1_prev_shadow_system_results_t::prev_shadow_result__phase_sd0
uint16_t prev_shadow_result__phase_sd0
Definition: vl53l1_register_structs.h:2788
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_22
uint8_t dss_calc__user_roi_spad_en_22
Definition: vl53l1_register_structs.h:3696
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_10
uint8_t dss_calc__user_roi_spad_en_10
Definition: vl53l1_register_structs.h:3576
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_8
uint8_t dss_calc__user_roi_spad_en_8
Definition: vl53l1_register_structs.h:3556
VL53L1_shadow_system_results_t::shadow_result__spare_3_sd1
uint8_t shadow_result__spare_3_sd1
Definition: vl53l1_register_structs.h:4254
VL53L1_shadow_system_results_t::shadow_phasecal_result__vcsel_start
uint8_t shadow_phasecal_result__vcsel_start
Definition: vl53l1_register_structs.h:4009
VL53L1_shadow_core_results_t
Definition: vl53l1_register_structs.h:4307
VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS
#define VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS
Definition: vl53l1_register_map.h:8188
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_4
uint8_t dss_calc__user_roi_spad_en_4
Definition: vl53l1_register_structs.h:3516
VL53L1_debug_results_t::pll_period_us
uint32_t pll_period_us
Definition: vl53l1_register_structs.h:2156
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_1
uint8_t dss_calc__user_roi_spad_en_1
Definition: vl53l1_register_structs.h:3486
VL53L1_shadow_core_results_t::shadow_result_core__total_periods_elapsed_sd0
uint32_t shadow_result_core__total_periods_elapsed_sd0
Definition: vl53l1_register_structs.h:4338
VL53L1_prev_shadow_system_results_t::prev_shadow_result__report_status
uint8_t prev_shadow_result__report_status
Definition: vl53l1_register_structs.h:2728
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uint8_t gph__sd_config__initial_phase_sd1
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uint16_t prev_shadow_result__spare_2_sd1
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uint16_t prev_shadow_result__sigma_sd1
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Definition: vl53l1_register_map.h:11501
VL53L1_gph_timing_config_t::gph__range_config__timeout_macrop_a_hi
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Definition: vl53l1_register_structs.h:112
VL53L1_prev_shadow_system_results_t::prev_shadow_result__spare_1_sd1
uint16_t prev_shadow_result__spare_1_sd1
Definition: vl53l1_register_structs.h:2918
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uint8_t global_config__spad_enables_rtn_15
Definition: vl53l1_register_structs.h:2500
VL53L1_static_nvm_managed_t
Definition: vl53l1_register_structs.h:128
VL53L1_prev_shadow_system_results_t::prev_shadow_result__ambient_count_rate_mcps_sd0
uint16_t prev_shadow_result__ambient_count_rate_mcps_sd0
Definition: vl53l1_register_structs.h:2768
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Definition: vl53l1_register_structs.h:1555
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Definition: vl53l1_register_structs.h:169
VL53L1_static_config_t::clk_gating__ctrl
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VL53L1_Error VL53L1_get_system_results(VL53L1_DEV Dev, VL53L1_system_results_t *pdata)
Sets system_results register group.
Definition: vl53l1_register_funcs.c:1600
VL53L1_i2c_decode_core_results
VL53L1_Error VL53L1_i2c_decode_core_results(uint16_t buf_size, uint8_t *pbuffer, VL53L1_core_results_t *pdata)
Encodes data structure VL53L1_core_results_t into a I2C write buffer.
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VL53L1_Error VL53L1_get_nvm_copy_data(VL53L1_DEV Dev, VL53L1_nvm_copy_data_t *pdata)
Sets nvm_copy_data register group.
Definition: vl53l1_register_funcs.c:2405
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Definition: vl53l1_register_map.h:2699
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uint8_t global_config__spad_enables_rtn_10
Definition: vl53l1_register_structs.h:2450
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Definition: vl53l1_register_structs.h:98
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Definition: vl53l1_register_structs.h:1063
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uint8_t shadow_phasecal_result__reference_phase_hi
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Definition: vl53l1_register_structs.h:3546
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int16_t algo__crosstalk_compensation_y_plane_gradient_kcps
Definition: vl53l1_register_structs.h:354
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Definition: vl53l1_register_structs.h:690
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Definition: vl53l1_register_structs.h:933
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uint16_t prev_shadow_result__peak_signal_count_rate_mcps_sd1
Definition: vl53l1_register_structs.h:2858
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uint8_t global_config__spad_enables_rtn_18
Definition: vl53l1_register_structs.h:2530
VL53L1_patch_results_t::dss_calc__user_roi_spad_en_9
uint8_t dss_calc__user_roi_spad_en_9
Definition: vl53l1_register_structs.h:3566

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autogenerated on Fri Aug 2 2024 08:35:54