Type definitions for the NVIC Registers. More...
Modules | |
| System Control Block (SCB) | |
| Type definitions for the System Control Block Registers. | |
Detailed Description
Type definitions for the NVIC Registers.
Macro Definition Documentation
◆ NVIC_STIR_INTID_Msk [1/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Msk [2/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Msk [3/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Msk [4/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Msk [5/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Msk [6/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Msk [7/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Msk [8/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 359 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Msk [9/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [10/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [11/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [12/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [13/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [14/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 425 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Msk [15/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [16/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [17/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [18/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [19/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [20/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 440 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Msk [21/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [22/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Msk [23/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Msk [24/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Msk [25/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [26/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [27/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Msk [28/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file core_cm35p.h.
◆ NVIC_STIR_INTID_Msk [29/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 482 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [30/30]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 483 of file core_armv81mml.h.
◆ NVIC_STIR_INTID_Pos [1/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Pos [2/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Pos [3/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Pos [4/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Pos [5/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Pos [6/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Pos [7/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.
◆ NVIC_STIR_INTID_Pos [8/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 358 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.
◆ NVIC_STIR_INTID_Pos [9/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [10/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [11/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [12/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [13/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [14/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 424 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.
◆ NVIC_STIR_INTID_Pos [15/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [16/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [17/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [18/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [19/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [20/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 439 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.
◆ NVIC_STIR_INTID_Pos [21/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [22/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Pos [23/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Pos [24/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [25/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Pos [26/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [27/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [28/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file core_cm35p.h.
◆ NVIC_STIR_INTID_Pos [29/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 481 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.
◆ NVIC_STIR_INTID_Pos [30/30]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 482 of file core_armv81mml.h.