stm32f4xx_i2c.c
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1 
91 /* Includes ------------------------------------------------------------------*/
92 #include "stm32f4xx_i2c.h"
93 #include "stm32f4xx_rcc.h"
94 
104 /* Private typedef -----------------------------------------------------------*/
105 /* Private define ------------------------------------------------------------*/
106 
107 #define CR1_CLEAR_MASK ((uint16_t)0xFBF5) /*<! I2C registers Masks */
108 #define FLAG_MASK ((uint32_t)0x00FFFFFF) /*<! I2C FLAG mask */
109 #define ITEN_MASK ((uint32_t)0x07000000) /*<! I2C Interrupt Enable mask */
110 
111 /* Private macro -------------------------------------------------------------*/
112 /* Private variables ---------------------------------------------------------*/
113 /* Private function prototypes -----------------------------------------------*/
114 /* Private functions ---------------------------------------------------------*/
115 
138 {
139  /* Check the parameters */
141 
142  if (I2Cx == I2C1)
143  {
144  /* Enable I2C1 reset state */
146  /* Release I2C1 from reset state */
148  }
149  else if (I2Cx == I2C2)
150  {
151  /* Enable I2C2 reset state */
153  /* Release I2C2 from reset state */
155  }
156  else
157  {
158  if (I2Cx == I2C3)
159  {
160  /* Enable I2C3 reset state */
162  /* Release I2C3 from reset state */
164  }
165  }
166 }
167 
180 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
181 {
182  uint16_t tmpreg = 0, freqrange = 0;
183  uint16_t result = 0x04;
184  uint32_t pclk1 = 8000000;
185  RCC_ClocksTypeDef rcc_clocks;
186  /* Check the parameters */
189  assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
190  assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
192  assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
194 
195 /*---------------------------- I2Cx CR2 Configuration ------------------------*/
196  /* Get the I2Cx CR2 value */
197  tmpreg = I2Cx->CR2;
198  /* Clear frequency FREQ[5:0] bits */
199  tmpreg &= (uint16_t)~((uint16_t)I2C_CR2_FREQ);
200  /* Get pclk1 frequency value */
201  RCC_GetClocksFreq(&rcc_clocks);
202  pclk1 = rcc_clocks.PCLK1_Frequency;
203  /* Set frequency bits depending on pclk1 value */
204  freqrange = (uint16_t)(pclk1 / 1000000);
205  tmpreg |= freqrange;
206  /* Write to I2Cx CR2 */
207  I2Cx->CR2 = tmpreg;
208 
209 /*---------------------------- I2Cx CCR Configuration ------------------------*/
210  /* Disable the selected I2C peripheral to configure TRISE */
211  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
212  /* Reset tmpreg value */
213  /* Clear F/S, DUTY and CCR[11:0] bits */
214  tmpreg = 0;
215 
216  /* Configure speed in standard mode */
217  if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
218  {
219  /* Standard mode speed calculate */
220  result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
221  /* Test if CCR value is under 0x4*/
222  if (result < 0x04)
223  {
224  /* Set minimum allowed value */
225  result = 0x04;
226  }
227  /* Set speed value for standard mode */
228  tmpreg |= result;
229  /* Set Maximum Rise Time for standard mode */
230  I2Cx->TRISE = freqrange + 1;
231  }
232  /* Configure speed in fast mode */
233  /* To use the I2C at 400 KHz (in fast mode), the PCLK1 frequency (I2C peripheral
234  input clock) must be a multiple of 10 MHz */
235  else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
236  {
237  if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
238  {
239  /* Fast mode speed calculate: Tlow/Thigh = 2 */
240  result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
241  }
242  else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
243  {
244  /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
245  result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
246  /* Set DUTY bit */
247  result |= I2C_DutyCycle_16_9;
248  }
249 
250  /* Test if CCR value is under 0x1*/
251  if ((result & I2C_CCR_CCR) == 0)
252  {
253  /* Set minimum allowed value */
254  result |= (uint16_t)0x0001;
255  }
256  /* Set speed value and set F/S bit for fast mode */
257  tmpreg |= (uint16_t)(result | I2C_CCR_FS);
258  /* Set Maximum Rise Time for fast mode */
259  I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);
260  }
261 
262  /* Write to I2Cx CCR */
263  I2Cx->CCR = tmpreg;
264  /* Enable the selected I2C peripheral */
265  I2Cx->CR1 |= I2C_CR1_PE;
266 
267 /*---------------------------- I2Cx CR1 Configuration ------------------------*/
268  /* Get the I2Cx CR1 value */
269  tmpreg = I2Cx->CR1;
270  /* Clear ACK, SMBTYPE and SMBUS bits */
271  tmpreg &= CR1_CLEAR_MASK;
272  /* Configure I2Cx: mode and acknowledgement */
273  /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
274  /* Set ACK bit according to I2C_Ack value */
275  tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
276  /* Write to I2Cx CR1 */
277  I2Cx->CR1 = tmpreg;
278 
279 /*---------------------------- I2Cx OAR1 Configuration -----------------------*/
280  /* Set I2Cx Own Address1 and acknowledged address */
281  I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
282 }
283 
289 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
290 {
291 /*---------------- Reset I2C init structure parameters values ----------------*/
292  /* initialize the I2C_ClockSpeed member */
293  I2C_InitStruct->I2C_ClockSpeed = 5000;
294  /* Initialize the I2C_Mode member */
295  I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
296  /* Initialize the I2C_DutyCycle member */
297  I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
298  /* Initialize the I2C_OwnAddress1 member */
299  I2C_InitStruct->I2C_OwnAddress1 = 0;
300  /* Initialize the I2C_Ack member */
301  I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
302  /* Initialize the I2C_AcknowledgedAddress member */
304 }
305 
314 {
315  /* Check the parameters */
318  if (NewState != DISABLE)
319  {
320  /* Enable the selected I2C peripheral */
321  I2Cx->CR1 |= I2C_CR1_PE;
322  }
323  else
324  {
325  /* Disable the selected I2C peripheral */
326  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
327  }
328 }
329 
340 {
341  /* Check the parameters */
344  if (NewState != DISABLE)
345  {
346  /* Enable the analog filter */
347  I2Cx->FLTR &= (uint16_t)~((uint16_t)I2C_FLTR_ANOFF);
348  }
349  else
350  {
351  /* Disable the analog filter */
352  I2Cx->FLTR |= I2C_FLTR_ANOFF;
353  }
354 }
355 
365 void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter)
366 {
367  uint16_t tmpreg = 0;
368 
369  /* Check the parameters */
371  assert_param(IS_I2C_DIGITAL_FILTER(I2C_DigitalFilter));
372 
373  /* Get the old register value */
374  tmpreg = I2Cx->FLTR;
375 
376  /* Reset I2Cx DNF bit [3:0] */
377  tmpreg &= (uint16_t)~((uint16_t)I2C_FLTR_DNF);
378 
379  /* Set I2Cx DNF coefficient */
380  tmpreg |= (uint16_t)((uint16_t)I2C_DigitalFilter & I2C_FLTR_DNF);
381 
382  /* Store the new register value */
383  I2Cx->FLTR = tmpreg;
384 }
385 
394 {
395  /* Check the parameters */
398  if (NewState != DISABLE)
399  {
400  /* Generate a START condition */
401  I2Cx->CR1 |= I2C_CR1_START;
402  }
403  else
404  {
405  /* Disable the START condition generation */
406  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_START);
407  }
408 }
409 
418 {
419  /* Check the parameters */
422  if (NewState != DISABLE)
423  {
424  /* Generate a STOP condition */
425  I2Cx->CR1 |= I2C_CR1_STOP;
426  }
427  else
428  {
429  /* Disable the STOP condition generation */
430  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_STOP);
431  }
432 }
433 
445 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction)
446 {
447  /* Check the parameters */
449  assert_param(IS_I2C_DIRECTION(I2C_Direction));
450  /* Test on the direction to set/reset the read/write bit */
451  if (I2C_Direction != I2C_Direction_Transmitter)
452  {
453  /* Set the address bit0 for read */
454  Address |= I2C_OAR1_ADD0;
455  }
456  else
457  {
458  /* Reset the address bit0 for write */
459  Address &= (uint8_t)~((uint8_t)I2C_OAR1_ADD0);
460  }
461  /* Send the address */
462  I2Cx->DR = Address;
463 }
464 
473 {
474  /* Check the parameters */
477  if (NewState != DISABLE)
478  {
479  /* Enable the acknowledgement */
480  I2Cx->CR1 |= I2C_CR1_ACK;
481  }
482  else
483  {
484  /* Disable the acknowledgement */
485  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ACK);
486  }
487 }
488 
495 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address)
496 {
497  uint16_t tmpreg = 0;
498 
499  /* Check the parameters */
501 
502  /* Get the old register value */
503  tmpreg = I2Cx->OAR2;
504 
505  /* Reset I2Cx Own address2 bit [7:1] */
506  tmpreg &= (uint16_t)~((uint16_t)I2C_OAR2_ADD2);
507 
508  /* Set I2Cx Own address2 */
509  tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE);
510 
511  /* Store the new register value */
512  I2Cx->OAR2 = tmpreg;
513 }
514 
523 {
524  /* Check the parameters */
527  if (NewState != DISABLE)
528  {
529  /* Enable dual addressing mode */
530  I2Cx->OAR2 |= I2C_OAR2_ENDUAL;
531  }
532  else
533  {
534  /* Disable dual addressing mode */
535  I2Cx->OAR2 &= (uint16_t)~((uint16_t)I2C_OAR2_ENDUAL);
536  }
537 }
538 
547 {
548  /* Check the parameters */
551  if (NewState != DISABLE)
552  {
553  /* Enable generall call */
554  I2Cx->CR1 |= I2C_CR1_ENGC;
555  }
556  else
557  {
558  /* Disable generall call */
559  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENGC);
560  }
561 }
562 
573 {
574  /* Check the parameters */
577  if (NewState != DISABLE)
578  {
579  /* Peripheral under reset */
580  I2Cx->CR1 |= I2C_CR1_SWRST;
581  }
582  else
583  {
584  /* Peripheral not under reset */
585  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_SWRST);
586  }
587 }
588 
597 {
598  /* Check the parameters */
601  if (NewState == DISABLE)
602  {
603  /* Enable the selected I2C Clock stretching */
604  I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
605  }
606  else
607  {
608  /* Disable the selected I2C Clock stretching */
609  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_NOSTRETCH);
610  }
611 }
612 
622 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle)
623 {
624  /* Check the parameters */
626  assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
627  if (I2C_DutyCycle != I2C_DutyCycle_16_9)
628  {
629  /* I2C fast mode Tlow/Thigh=2 */
630  I2Cx->CCR &= I2C_DutyCycle_2;
631  }
632  else
633  {
634  /* I2C fast mode Tlow/Thigh=16/9 */
635  I2Cx->CCR |= I2C_DutyCycle_16_9;
636  }
637 }
638 
660 void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition)
661 {
662  /* Check the parameters */
664  assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition));
665 
666  /* Check the input parameter */
667  if (I2C_NACKPosition == I2C_NACKPosition_Next)
668  {
669  /* Next byte in shift register is the last received byte */
670  I2Cx->CR1 |= I2C_NACKPosition_Next;
671  }
672  else
673  {
674  /* Current byte in shift register is the last received byte */
675  I2Cx->CR1 &= I2C_NACKPosition_Current;
676  }
677 }
678 
688 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert)
689 {
690  /* Check the parameters */
692  assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
693  if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
694  {
695  /* Drive the SMBusAlert pin Low */
696  I2Cx->CR1 |= I2C_SMBusAlert_Low;
697  }
698  else
699  {
700  /* Drive the SMBusAlert pin High */
701  I2Cx->CR1 &= I2C_SMBusAlert_High;
702  }
703 }
704 
713 {
714  /* Check the parameters */
717  if (NewState != DISABLE)
718  {
719  /* Enable the selected I2C ARP */
720  I2Cx->CR1 |= I2C_CR1_ENARP;
721  }
722  else
723  {
724  /* Disable the selected I2C ARP */
725  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENARP);
726  }
727 }
750 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
751 {
752  /* Check the parameters */
754  /* Write in the DR register the data to be sent */
755  I2Cx->DR = Data;
756 }
757 
764 {
765  /* Check the parameters */
767  /* Return the data in the DR register */
768  return (uint8_t)I2Cx->DR;
769 }
770 
795 {
796  /* Check the parameters */
799  if (NewState != DISABLE)
800  {
801  /* Enable the selected I2C PEC transmission */
802  I2Cx->CR1 |= I2C_CR1_PEC;
803  }
804  else
805  {
806  /* Disable the selected I2C PEC transmission */
807  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PEC);
808  }
809 }
810 
825 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition)
826 {
827  /* Check the parameters */
829  assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
830  if (I2C_PECPosition == I2C_PECPosition_Next)
831  {
832  /* Next byte in shift register is PEC */
833  I2Cx->CR1 |= I2C_PECPosition_Next;
834  }
835  else
836  {
837  /* Current byte in shift register is PEC */
838  I2Cx->CR1 &= I2C_PECPosition_Current;
839  }
840 }
841 
850 {
851  /* Check the parameters */
854  if (NewState != DISABLE)
855  {
856  /* Enable the selected I2C PEC calculation */
857  I2Cx->CR1 |= I2C_CR1_ENPEC;
858  }
859  else
860  {
861  /* Disable the selected I2C PEC calculation */
862  I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENPEC);
863  }
864 }
865 
872 {
873  /* Check the parameters */
875  /* Return the selected I2C PEC value */
876  return ((I2Cx->SR2) >> 8);
877 }
878 
905 {
906  /* Check the parameters */
909  if (NewState != DISABLE)
910  {
911  /* Enable the selected I2C DMA requests */
912  I2Cx->CR2 |= I2C_CR2_DMAEN;
913  }
914  else
915  {
916  /* Disable the selected I2C DMA requests */
917  I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_DMAEN);
918  }
919 }
920 
929 {
930  /* Check the parameters */
933  if (NewState != DISABLE)
934  {
935  /* Next DMA transfer is the last transfer */
936  I2Cx->CR2 |= I2C_CR2_LAST;
937  }
938  else
939  {
940  /* Next DMA transfer is not the last transfer */
941  I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_LAST);
942  }
943 }
944 
1066 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
1067 {
1068  __IO uint32_t tmp = 0;
1069 
1070  /* Check the parameters */
1072  assert_param(IS_I2C_REGISTER(I2C_Register));
1073 
1074  tmp = (uint32_t) I2Cx;
1075  tmp += I2C_Register;
1076 
1077  /* Return the selected register value */
1078  return (*(__IO uint16_t *) tmp);
1079 }
1080 
1093 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
1094 {
1095  /* Check the parameters */
1097  assert_param(IS_FUNCTIONAL_STATE(NewState));
1098  assert_param(IS_I2C_CONFIG_IT(I2C_IT));
1099 
1100  if (NewState != DISABLE)
1101  {
1102  /* Enable the selected I2C interrupts */
1103  I2Cx->CR2 |= I2C_IT;
1104  }
1105  else
1106  {
1107  /* Disable the selected I2C interrupts */
1108  I2Cx->CR2 &= (uint16_t)~I2C_IT;
1109  }
1110 }
1111 
1112 /*
1113  ===============================================================================
1114  1. Basic state monitoring
1115  ===============================================================================
1116  */
1117 
1153 {
1154  uint32_t lastevent = 0;
1155  uint32_t flag1 = 0, flag2 = 0;
1157 
1158  /* Check the parameters */
1160  assert_param(IS_I2C_EVENT(I2C_EVENT));
1161 
1162  /* Read the I2Cx status register */
1163  flag1 = I2Cx->SR1;
1164  flag2 = I2Cx->SR2;
1165  flag2 = flag2 << 16;
1166 
1167  /* Get the last event value from I2C status register */
1168  lastevent = (flag1 | flag2) & FLAG_MASK;
1169 
1170  /* Check whether the last event contains the I2C_EVENT */
1171  if ((lastevent & I2C_EVENT) == I2C_EVENT)
1172  {
1173  /* SUCCESS: last event is equal to I2C_EVENT */
1174  status = SUCCESS;
1175  }
1176  else
1177  {
1178  /* ERROR: last event is different from I2C_EVENT */
1179  status = ERROR;
1180  }
1181  /* Return status */
1182  return status;
1183 }
1184 
1185 /*
1186  ===============================================================================
1187  2. Advanced state monitoring
1188  ===============================================================================
1189  */
1190 
1201 {
1202  uint32_t lastevent = 0;
1203  uint32_t flag1 = 0, flag2 = 0;
1204 
1205  /* Check the parameters */
1207 
1208  /* Read the I2Cx status register */
1209  flag1 = I2Cx->SR1;
1210  flag2 = I2Cx->SR2;
1211  flag2 = flag2 << 16;
1212 
1213  /* Get the last event value from I2C status register */
1214  lastevent = (flag1 | flag2) & FLAG_MASK;
1215 
1216  /* Return status */
1217  return lastevent;
1218 }
1219 
1220 /*
1221  ===============================================================================
1222  3. Flag-based state monitoring
1223  ===============================================================================
1224  */
1225 
1256 {
1257  FlagStatus bitstatus = RESET;
1258  __IO uint32_t i2creg = 0, i2cxbase = 0;
1259 
1260  /* Check the parameters */
1262  assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
1263 
1264  /* Get the I2Cx peripheral base address */
1265  i2cxbase = (uint32_t)I2Cx;
1266 
1267  /* Read flag register index */
1268  i2creg = I2C_FLAG >> 28;
1269 
1270  /* Get bit[23:0] of the flag */
1271  I2C_FLAG &= FLAG_MASK;
1272 
1273  if(i2creg != 0)
1274  {
1275  /* Get the I2Cx SR1 register address */
1276  i2cxbase += 0x14;
1277  }
1278  else
1279  {
1280  /* Flag in I2Cx SR2 Register */
1281  I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
1282  /* Get the I2Cx SR2 register address */
1283  i2cxbase += 0x18;
1284  }
1285 
1286  if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
1287  {
1288  /* I2C_FLAG is set */
1289  bitstatus = SET;
1290  }
1291  else
1292  {
1293  /* I2C_FLAG is reset */
1294  bitstatus = RESET;
1295  }
1296 
1297  /* Return the I2C_FLAG status */
1298  return bitstatus;
1299 }
1300 
1332 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
1333 {
1334  uint32_t flagpos = 0;
1335  /* Check the parameters */
1337  assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
1338  /* Get the I2C flag position */
1339  flagpos = I2C_FLAG & FLAG_MASK;
1340  /* Clear the selected I2C flag */
1341  I2Cx->SR1 = (uint16_t)~flagpos;
1342 }
1343 
1367 {
1368  ITStatus bitstatus = RESET;
1369  uint32_t enablestatus = 0;
1370 
1371  /* Check the parameters */
1373  assert_param(IS_I2C_GET_IT(I2C_IT));
1374 
1375  /* Check if the interrupt source is enabled or not */
1376  enablestatus = (uint32_t)(((I2C_IT & ITEN_MASK) >> 16) & (I2Cx->CR2)) ;
1377 
1378  /* Get bit[23:0] of the flag */
1379  I2C_IT &= FLAG_MASK;
1380 
1381  /* Check the status of the specified I2C flag */
1382  if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
1383  {
1384  /* I2C_IT is set */
1385  bitstatus = SET;
1386  }
1387  else
1388  {
1389  /* I2C_IT is reset */
1390  bitstatus = RESET;
1391  }
1392  /* Return the I2C_IT status */
1393  return bitstatus;
1394 }
1395 
1426 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
1427 {
1428  uint32_t flagpos = 0;
1429  /* Check the parameters */
1431  assert_param(IS_I2C_CLEAR_IT(I2C_IT));
1432 
1433  /* Get the I2C flag position */
1434  flagpos = I2C_IT & FLAG_MASK;
1435 
1436  /* Clear the selected I2C flag */
1437  I2Cx->SR1 = (uint16_t)~flagpos;
1438 }
1439 
1456 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
FlagStatus
Definition: stm32f4xx.h:706
uint16_t I2C_Ack
Definition: stm32f4xx_i2c.h:68
#define IS_I2C_CLEAR_FLAG(FLAG)
#define I2C_CR1_PE
Definition: stm32f4xx.h:6789
uint32_t I2C_GetLastEvent(I2C_TypeDef *I2Cx)
Returns the last I2Cx Event.
void I2C_TransmitPEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C PEC transfer.
#define IS_I2C_CONFIG_IT(IT)
FunctionalState
Definition: stm32f4xx.h:708
#define IS_I2C_EVENT(EVENT)
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C DMA requests.
uint8_t I2C_GetPEC(I2C_TypeDef *I2Cx)
Returns the PEC value for the specified I2C.
void I2C_SMBusAlertConfig(I2C_TypeDef *I2Cx, uint16_t I2C_SMBusAlert)
Drives the SMBusAlert pin high or low for the specified I2C.
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication START condition.
uint16_t I2C_AcknowledgedAddress
Definition: stm32f4xx_i2c.h:71
#define IS_I2C_REGISTER(REGISTER)
#define I2C_DutyCycle_2
__IO uint16_t FLTR
Definition: stm32f4xx.h:1340
#define I2C_Mode_I2C
#define ITEN_MASK
#define IS_I2C_SMBUS_ALERT(ALERT)
#define I2C_DutyCycle_16_9
#define IS_I2C_NACK_POSITION(POSITION)
#define IS_I2C_PEC_POSITION(POSITION)
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Checks whether the specified I2C flag is set or not.
__IO uint16_t CCR
Definition: stm32f4xx.h:1336
__IO uint16_t CR2
Definition: stm32f4xx.h:1324
void I2C_AnalogFilterCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the Analog filter of I2C peripheral.
#define I2C_FLTR_DNF
Definition: stm32f4xx.h:6878
void I2C_CalculatePEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the PEC value calculation of the transferred bytes.
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C general call feature.
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct)
Initializes the I2Cx peripheral according to the specified parameters in the I2C_InitStruct.
__IO uint16_t OAR1
Definition: stm32f4xx.h:1326
__IO uint16_t DR
Definition: stm32f4xx.h:1330
uint16_t I2C_OwnAddress1
Definition: stm32f4xx_i2c.h:65
#define I2C3
Definition: stm32f4xx.h:2062
void assert_param(int val)
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C acknowledge feature.
uint16_t I2C_ReadRegister(I2C_TypeDef *I2Cx, uint8_t I2C_Register)
Reads the specified I2C register and returns its value.
static I2C_TypeDef * I2Cx
Definition: drv_i2c.c:64
#define I2C_CR2_DMAEN
Definition: stm32f4xx.h:6816
#define I2C_CR2_FREQ
Definition: stm32f4xx.h:6805
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
void I2C_DigitalFilterConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DigitalFilter)
Configures the Digital noise filter of I2C peripheral.
static volatile uint8_t * status
Definition: drv_i2c.c:102
#define CR1_CLEAR_MASK
#define I2C_Direction_Transmitter
#define I2C_CR1_NOSTRETCH
Definition: stm32f4xx.h:6795
#define I2C_NACKPosition_Next
__IO uint16_t SR2
Definition: stm32f4xx.h:1334
#define I2C_AcknowledgedAddress_7bit
Definition: stm32f4xx.h:706
#define I2C_CR1_ENGC
Definition: stm32f4xx.h:6794
#define IS_I2C_ACK_STATE(STATE)
#define I2C_PECPosition_Next
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Specifies that the next DMA transfer is the last one.
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C peripheral.
enum FlagStatus ITStatus
#define I2C_SMBusAlert_Low
#define IS_I2C_DIGITAL_FILTER(FILTER)
Definition: stm32f4xx_i2c.h:90
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
Forces or releases Low Speed APB (APB1) peripheral reset.
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data)
Sends a data byte through the I2Cx peripheral.
This file contains all the functions prototypes for the I2C firmware library.
__IO uint16_t TRISE
Definition: stm32f4xx.h:1338
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
#define __IO
Definition: core_cm0.h:198
ErrorStatus I2C_CheckEvent(I2C_TypeDef *I2Cx, uint32_t I2C_EVENT)
Checks whether the last I2Cx Event is equal to the one passed as parameter.
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Clears the I2Cx&#39;s pending flags.
#define I2C_CR1_START
Definition: stm32f4xx.h:6796
#define I2C_CR1_ENARP
Definition: stm32f4xx.h:6792
#define IS_I2C_OWN_ADDRESS1(ADDRESS1)
#define I2C_FLTR_ANOFF
Definition: stm32f4xx.h:6879
void I2C_ClearITPendingBit(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
Clears the I2Cx&#39;s interrupt pending bits.
void I2C_ARPCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C ARP.
#define IS_I2C_MODE(MODE)
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction)
Transmits the address byte to select the slave device.
#define I2C_CR1_ENPEC
Definition: stm32f4xx.h:6793
void I2C_StretchClockCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C Clock stretching.
#define IS_I2C_DIRECTION(DIRECTION)
void I2C_SoftwareResetCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C software reset.
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState)
Enables or disables the specified I2C interrupts.
#define FLAG_MASK
#define I2C_SMBusAlert_High
#define I2C_CCR_CCR
Definition: stm32f4xx.h:6870
uint32_t I2C_ClockSpeed
Definition: stm32f4xx_i2c.h:56
void I2C_PECPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_PECPosition)
Selects the specified I2C PEC position.
ErrorStatus
Definition: stm32f4xx.h:711
#define I2C_CR1_SWRST
Definition: stm32f4xx.h:6802
__IO uint16_t SR1
Definition: stm32f4xx.h:1332
__IO uint16_t OAR2
Definition: stm32f4xx.h:1328
I2C Init structure definition.
Definition: stm32f4xx_i2c.h:54
void I2C_FastModeDutyCycleConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DutyCycle)
Selects the specified I2C fast mode duty cycle.
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication STOP condition.
void I2C_DualAddressCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C dual addressing mode.
#define IS_I2C_GET_IT(IT)
void I2C_OwnAddress2Config(I2C_TypeDef *I2Cx, uint8_t Address)
Configures the specified I2C own address2.
#define I2C_CR1_ACK
Definition: stm32f4xx.h:6798
#define IS_I2C_CLEAR_IT(IT)
ITStatus I2C_GetITStatus(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
Checks whether the specified I2C interrupt has occurred or not.
#define I2C_CR2_LAST
Definition: stm32f4xx.h:6817
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS)
#define I2C2
Definition: stm32f4xx.h:2061
#define I2C_NACKPosition_Current
#define I2C_OAR2_ADD2
Definition: stm32f4xx.h:6838
#define IS_I2C_CLOCK_SPEED(SPEED)
#define IS_I2C_GET_FLAG(FLAG)
Inter-integrated Circuit Interface.
Definition: stm32f4xx.h:1320
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct)
Fills each I2C_InitStruct member with its default value.
void RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks)
Returns the frequencies of different on chip clocks; SYSCLK, HCLK, PCLK1 and PCLK2.
#define I2C_PECPosition_Current
#define I2C_OAR1_ADD0
Definition: stm32f4xx.h:6823
__IO uint16_t CR1
Definition: stm32f4xx.h:1322
void I2C_NACKPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_NACKPosition)
Selects the specified I2C NACK position in master receiver mode.
#define I2C1
Definition: stm32f4xx.h:2060
#define I2C_CR1_STOP
Definition: stm32f4xx.h:6797
#define I2C_CR1_PEC
Definition: stm32f4xx.h:6800
uint16_t I2C_DutyCycle
Definition: stm32f4xx_i2c.h:62
uint16_t I2C_Mode
Definition: stm32f4xx_i2c.h:59
#define IS_I2C_DUTY_CYCLE(CYCLE)
#define I2C_Ack_Disable
#define I2C_OAR2_ENDUAL
Definition: stm32f4xx.h:6837
#define IS_I2C_ALL_PERIPH(PERIPH)
Definition: stm32f4xx_i2c.h:82
void I2C_DeInit(I2C_TypeDef *I2Cx)
Deinitialize the I2Cx peripheral registers to their default reset values.
#define I2C_CCR_FS
Definition: stm32f4xx.h:6872


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19