stm32f4xx_i2c.h
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1 
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F4xx_I2C_H
31 #define __STM32F4xx_I2C_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx.h"
39 
48 /* Exported types ------------------------------------------------------------*/
49 
54 typedef struct
55 {
56  uint32_t I2C_ClockSpeed;
59  uint16_t I2C_Mode;
62  uint16_t I2C_DutyCycle;
65  uint16_t I2C_OwnAddress1;
68  uint16_t I2C_Ack;
74 
75 /* Exported constants --------------------------------------------------------*/
76 
77 
82 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
83  ((PERIPH) == I2C2) || \
84  ((PERIPH) == I2C3))
85 
90 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
91 
100 #define I2C_Mode_I2C ((uint16_t)0x0000)
101 #define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
102 #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
103 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
104  ((MODE) == I2C_Mode_SMBusDevice) || \
105  ((MODE) == I2C_Mode_SMBusHost))
106 
114 #define I2C_DutyCycle_16_9 ((uint16_t)0x4000)
115 #define I2C_DutyCycle_2 ((uint16_t)0xBFFF)
116 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
117  ((CYCLE) == I2C_DutyCycle_2))
118 
126 #define I2C_Ack_Enable ((uint16_t)0x0400)
127 #define I2C_Ack_Disable ((uint16_t)0x0000)
128 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
129  ((STATE) == I2C_Ack_Disable))
130 
138 #define I2C_Direction_Transmitter ((uint8_t)0x00)
139 #define I2C_Direction_Receiver ((uint8_t)0x01)
140 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
141  ((DIRECTION) == I2C_Direction_Receiver))
142 
150 #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
151 #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
152 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
153  ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
154 
162 #define I2C_Register_CR1 ((uint8_t)0x00)
163 #define I2C_Register_CR2 ((uint8_t)0x04)
164 #define I2C_Register_OAR1 ((uint8_t)0x08)
165 #define I2C_Register_OAR2 ((uint8_t)0x0C)
166 #define I2C_Register_DR ((uint8_t)0x10)
167 #define I2C_Register_SR1 ((uint8_t)0x14)
168 #define I2C_Register_SR2 ((uint8_t)0x18)
169 #define I2C_Register_CCR ((uint8_t)0x1C)
170 #define I2C_Register_TRISE ((uint8_t)0x20)
171 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
172  ((REGISTER) == I2C_Register_CR2) || \
173  ((REGISTER) == I2C_Register_OAR1) || \
174  ((REGISTER) == I2C_Register_OAR2) || \
175  ((REGISTER) == I2C_Register_DR) || \
176  ((REGISTER) == I2C_Register_SR1) || \
177  ((REGISTER) == I2C_Register_SR2) || \
178  ((REGISTER) == I2C_Register_CCR) || \
179  ((REGISTER) == I2C_Register_TRISE))
180 
188 #define I2C_NACKPosition_Next ((uint16_t)0x0800)
189 #define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
190 #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \
191  ((POSITION) == I2C_NACKPosition_Current))
192 
200 #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
201 #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
202 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
203  ((ALERT) == I2C_SMBusAlert_High))
204 
212 #define I2C_PECPosition_Next ((uint16_t)0x0800)
213 #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
214 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
215  ((POSITION) == I2C_PECPosition_Current))
216 
224 #define I2C_IT_BUF ((uint16_t)0x0400)
225 #define I2C_IT_EVT ((uint16_t)0x0200)
226 #define I2C_IT_ERR ((uint16_t)0x0100)
227 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
228 
236 #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
237 #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
238 #define I2C_IT_PECERR ((uint32_t)0x01001000)
239 #define I2C_IT_OVR ((uint32_t)0x01000800)
240 #define I2C_IT_AF ((uint32_t)0x01000400)
241 #define I2C_IT_ARLO ((uint32_t)0x01000200)
242 #define I2C_IT_BERR ((uint32_t)0x01000100)
243 #define I2C_IT_TXE ((uint32_t)0x06000080)
244 #define I2C_IT_RXNE ((uint32_t)0x06000040)
245 #define I2C_IT_STOPF ((uint32_t)0x02000010)
246 #define I2C_IT_ADD10 ((uint32_t)0x02000008)
247 #define I2C_IT_BTF ((uint32_t)0x02000004)
248 #define I2C_IT_ADDR ((uint32_t)0x02000002)
249 #define I2C_IT_SB ((uint32_t)0x02000001)
250 
251 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
252 
253 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
254  ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
255  ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
256  ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
257  ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
258  ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
259  ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
260 
272 #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
273 #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
274 #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
275 #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
276 #define I2C_FLAG_TRA ((uint32_t)0x00040000)
277 #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
278 #define I2C_FLAG_MSL ((uint32_t)0x00010000)
279 
284 #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
285 #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
286 #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
287 #define I2C_FLAG_OVR ((uint32_t)0x10000800)
288 #define I2C_FLAG_AF ((uint32_t)0x10000400)
289 #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
290 #define I2C_FLAG_BERR ((uint32_t)0x10000100)
291 #define I2C_FLAG_TXE ((uint32_t)0x10000080)
292 #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
293 #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
294 #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
295 #define I2C_FLAG_BTF ((uint32_t)0x10000004)
296 #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
297 #define I2C_FLAG_SB ((uint32_t)0x10000001)
298 
299 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
300 
301 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
302  ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
303  ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
304  ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
305  ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
306  ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
307  ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
308  ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
309  ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
310  ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
311  ((FLAG) == I2C_FLAG_SB))
312 
334 /* --EV5 */
335 #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
336 
362 /* --EV6 */
363 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
364 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
365 /* --EV9 */
366 #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
367 
397 /* Master RECEIVER mode -----------------------------*/
398 /* --EV7 */
399 #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
400 
401 /* Master TRANSMITTER mode --------------------------*/
402 /* --EV8 */
403 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
404 /* --EV8_2 */
405 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
406 
407 
440 /* --EV1 (all the events below are variants of EV1) */
441 /* 1) Case of One Single Address managed by the slave */
442 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
443 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
444 
445 /* 2) Case of Dual address managed by the slave */
446 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
447 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
448 
449 /* 3) Case of General Call enabled for the slave */
450 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
451 
479 /* Slave RECEIVER mode --------------------------*/
480 /* --EV2 */
481 #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
482 /* --EV4 */
483 #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
484 
485 /* Slave TRANSMITTER mode -----------------------*/
486 /* --EV3 */
487 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
488 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
489 /* --EV3_2 */
490 #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
491 
492 /*
493  ===============================================================================
494  End of Events Description
495  ===============================================================================
496  */
497 
498 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
499  ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
500  ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
501  ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
502  ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
503  ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
504  ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
505  ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
506  ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
507  ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
508  ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
509  ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
510  ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
511  ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
512  ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
513  ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
514  ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
515  ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
516  ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
517  ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
518 
526 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
527 
535 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
536 
544 /* Exported macro ------------------------------------------------------------*/
545 /* Exported functions --------------------------------------------------------*/
546 
547 /* Function used to set the I2C configuration to the default reset state *****/
549 
550 /* Initialization and Configuration functions *********************************/
551 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
552 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
553 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
554 void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter);
558 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
560 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
565 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
566 void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
567 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
568 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
569 
570 /* Data transfers functions ***************************************************/
571 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
573 
574 /* PEC management functions ***************************************************/
576 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
578 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
579 
580 /* DMA transfers management functions *****************************************/
581 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
583 
584 /* Interrupts, events and flags management functions **************************/
585 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
586 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
587 
588 /*
589  ===============================================================================
590  I2C State Monitoring Functions
591  ===============================================================================
592  This I2C driver provides three different ways for I2C state monitoring
593  depending on the application requirements and constraints:
594 
595 
596  1. Basic state monitoring (Using I2C_CheckEvent() function)
597  -----------------------------------------------------------
598  It compares the status registers (SR1 and SR2) content to a given event
599  (can be the combination of one or more flags).
600  It returns SUCCESS if the current status includes the given flags
601  and returns ERROR if one or more flags are missing in the current status.
602 
603  - When to use
604  - This function is suitable for most applications as well as for startup
605  activity since the events are fully described in the product reference
606  manual (RM0090).
607  - It is also suitable for users who need to define their own events.
608 
609  - Limitations
610  - If an error occurs (ie. error flags are set besides to the monitored
611  flags), the I2C_CheckEvent() function may return SUCCESS despite
612  the communication hold or corrupted real state.
613  In this case, it is advised to use error interrupts to monitor
614  the error events and handle them in the interrupt IRQ handler.
615 
616  Note
617  For error management, it is advised to use the following functions:
618  - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
619  - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
620  Where x is the peripheral instance (I2C1, I2C2 ...)
621  - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
622  I2Cx_ER_IRQHandler() function in order to determine which error occurred.
623  - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
624  and/or I2C_GenerateStop() in order to clear the error flag and source
625  and return to correct communication status.
626 
627 
628  2. Advanced state monitoring (Using the function I2C_GetLastEvent())
629  --------------------------------------------------------------------
630  Using the function I2C_GetLastEvent() which returns the image of both status
631  registers in a single word (uint32_t) (Status Register 2 value is shifted left
632  by 16 bits and concatenated to Status Register 1).
633 
634  - When to use
635  - This function is suitable for the same applications above but it
636  allows to overcome the mentioned limitation of I2C_GetFlagStatus()
637  function.
638  - The returned value could be compared to events already defined in
639  this file or to custom values defined by user.
640  This function is suitable when multiple flags are monitored at the
641  same time.
642  - At the opposite of I2C_CheckEvent() function, this function allows
643  user to choose when an event is accepted (when all events flags are
644  set and no other flags are set or just when the needed flags are set
645  like I2C_CheckEvent() function.
646 
647  - Limitations
648  - User may need to define his own events.
649  - Same remark concerning the error management is applicable for this
650  function if user decides to check only regular communication flags
651  (and ignores error flags).
652 
653 
654  3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
655  -----------------------------------------------------------------------
656 
657  Using the function I2C_GetFlagStatus() which simply returns the status of
658  one single flag (ie. I2C_FLAG_RXNE ...).
659 
660  - When to use
661  - This function could be used for specific applications or in debug
662  phase.
663  - It is suitable when only one flag checking is needed (most I2C
664  events are monitored through multiple flags).
665  - Limitations:
666  - When calling this function, the Status register is accessed.
667  Some flags are cleared when the status register is accessed.
668  So checking the status of one Flag, may clear other ones.
669  - Function may need to be called twice or more in order to monitor
670  one single event.
671  */
672 
673 /*
674  ===============================================================================
675  1. Basic state monitoring
676  ===============================================================================
677  */
678 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
679 /*
680  ===============================================================================
681  2. Advanced state monitoring
682  ===============================================================================
683  */
685 /*
686  ===============================================================================
687  3. Flag-based state monitoring
688  ===============================================================================
689  */
690 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
691 
692 
693 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
694 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
695 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
696 
697 #ifdef __cplusplus
698 }
699 #endif
700 
701 #endif /*__STM32F4xx_I2C_H */
702 
711 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
FlagStatus
Definition: stm32f4xx.h:706
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Specifies that the next DMA transfer is the last one.
uint16_t I2C_Ack
Definition: stm32f4xx_i2c.h:68
void I2C_OwnAddress2Config(I2C_TypeDef *I2Cx, uint8_t Address)
Configures the specified I2C own address2.
void I2C_TransmitPEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C PEC transfer.
FunctionalState
Definition: stm32f4xx.h:708
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Clears the I2Cx&#39;s pending flags.
uint16_t I2C_AcknowledgedAddress
Definition: stm32f4xx_i2c.h:71
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C acknowledge feature.
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication START condition.
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction)
Transmits the address byte to select the slave device.
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
uint16_t I2C_OwnAddress1
Definition: stm32f4xx_i2c.h:65
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication STOP condition.
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the I2C general call mode.
void I2C_PECPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_PECPosition)
Selects the specified I2C PEC position.
static I2C_TypeDef * I2Cx
Definition: drv_i2c.c:64
void I2C_NACKPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_NACKPosition)
Selects the specified I2C NACK position in master receiver mode.
void I2C_ARPCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C ARP.
void I2C_FastModeDutyCycleConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DutyCycle)
Selects the specified I2C fast mode duty cycle.
void I2C_DeInit(I2C_TypeDef *I2Cx)
Deinitializes the I2Cx peripheral registers to their default reset values.
enum FlagStatus ITStatus
ITStatus I2C_GetITStatus(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
Checks whether the specified I2C interrupt has occurred or not.
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct)
Fills each I2C_InitStruct member with its default value.
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C peripheral.
void I2C_CalculatePEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables I2C PEC calculation.
uint8_t I2C_GetPEC(I2C_TypeDef *I2Cx)
Returns the I2C PEC.
void I2C_SMBusAlertConfig(I2C_TypeDef *I2Cx, uint16_t I2C_SMBusAlert)
Drives the SMBusAlert pin high or low for the specified I2C.
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct)
Initializes the I2Cx peripheral according to the specified parameters in the I2C_InitStruct.
uint32_t I2C_ClockSpeed
Definition: stm32f4xx_i2c.h:56
void I2C_AnalogFilterCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the Analog filter of I2C peripheral.
ErrorStatus
Definition: stm32f4xx.h:711
void I2C_SoftwareResetCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C software reset.
void I2C_ClearITPendingBit(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
Clears the I2Cx&#39;s interrupt pending bits.
void I2C_DualAddressCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the I2C own address 2.
I2C Init structure definition.
Definition: stm32f4xx_i2c.h:54
uint16_t I2C_ReadRegister(I2C_TypeDef *I2Cx, uint8_t I2C_Register)
Reads the specified I2C register and returns its value.
void I2C_StretchClockCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the I2C Clock stretching.
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Checks whether the specified I2C flag is set or not.
Inter-integrated Circuit Interface.
Definition: stm32f4xx.h:1320
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C DMA requests.
uint32_t I2C_GetLastEvent(I2C_TypeDef *I2Cx)
Returns the last I2Cx Event.
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data)
Sends a data byte through the I2Cx peripheral.
uint16_t I2C_DutyCycle
Definition: stm32f4xx_i2c.h:62
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState)
Enables or disables the specified I2C interrupts.
uint16_t I2C_Mode
Definition: stm32f4xx_i2c.h:59
void I2C_DigitalFilterConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DigitalFilter)
Configures the Digital noise filter of I2C peripheral.
ErrorStatus I2C_CheckEvent(I2C_TypeDef *I2Cx, uint32_t I2C_EVENT)
Checks whether the last I2Cx Event is equal to the one passed as parameter.


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19