i2c.cpp
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1 /*
2  * Copyright (c) 2017, James Jackson
3  *
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * * Redistributions of source code must retain the above copyright notice, this
10  * list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * * Neither the name of the copyright holder nor the names of its
17  * contributors may be used to endorse or promote products derived from
18  * this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include "i2c.h"
33 
34 #define while_check(cond, result) \
35  { \
36  int32_t timeout_var = 200; \
37  while ((cond) && timeout_var) timeout_var--; \
38  if (!timeout_var) \
39  { \
40  handle_hardware_failure(); \
41  result = RESULT_ERROR; \
42  } \
43  }
44 
45 #define log_line event_history_.add_event(__LINE__)
46 
47 // global i2c ptrs used by the event interrupts
51 
53 {
54  c_ = c;
55 
56  if (c->dev == I2C1)
57  I2C1_Ptr = this;
58 
59  if (c->dev == I2C2)
60  I2C2_Ptr = this;
61 
62  if (c->dev == I2C3)
63  I2C3_Ptr = this;
64 
69 
70  // initialize the i2c itself
71  I2C_DeInit(c->dev);
72 
73  I2C_InitTypeDef I2C_InitStructure;
74  I2C_StructInit(&I2C_InitStructure);
75  I2C_InitStructure.I2C_ClockSpeed = c->I2C_ClockSpeed;
76  I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
77  I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
78  I2C_InitStructure.I2C_OwnAddress1 = 0; // The first device address
79  I2C_InitStructure.I2C_Ack = I2C_Ack_Disable;
81  I2C_Init(c->dev, &I2C_InitStructure);
82 
83  // Interrupts
84  NVIC_InitTypeDef NVIC_InitStructure;
85  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x01;
86  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;
87  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
88  NVIC_InitStructure.NVIC_IRQChannel = c->I2C_EV_IRQn;
89  NVIC_Init(&NVIC_InitStructure);
90 
91  // I2C Event Interrupt
92  NVIC_InitStructure.NVIC_IRQChannel = c->I2C_ER_IRQn;
93  NVIC_Init(&NVIC_InitStructure);
94 
95  // DMA Event Interrupt
96  NVIC_InitStructure.NVIC_IRQChannel = c->DMA_IRQn;
97  NVIC_Init(&NVIC_InitStructure);
98 
110 
111  DMA_InitStructure_.DMA_PeripheralBaseAddr = reinterpret_cast<uint32_t>(&(c->dev->DR));
116 
118  I2C_Cmd(c->dev, ENABLE);
119 
120  unstick(); // unsti1ck will properly initialize pins
121  log_line;
122  initialized_ = true;
123 }
124 
126 {
127  I2C_Cmd(c_->dev, DISABLE);
128 
130 
131  // Turn off the interrupts
133 
134  // reset errors
136 
139 
142 
143  delayMicroseconds(100);
144 
145  // clock out some bits
146  for (int i = 0; i < 16; ++i)
147  {
149  scl_.toggle();
150  }
152 
153  // send a start condition
158 
159  // then a stop
164 
165  // turn things back on
168  I2C_Cmd(c_->dev, ENABLE);
169 
171  write(0, 0, 0);
172 
174  log_line;
175 }
176 
177 int8_t I2C::read(uint8_t addr, uint8_t reg, uint8_t num_bytes, uint8_t* data, void (*callback)(uint8_t), bool blocking)
178 {
179  if (check_busy())
180  return RESULT_BUSY;
181  log_line;
182 
183  // configure the job
185  addr_ = addr << 1;
186  cb_ = callback;
187  reg_ = reg;
188  subaddress_sent_ = (reg_ == 0xFF);
189  len_ = num_bytes;
190  done_ = false;
192 
194  DMA_InitStructure_.DMA_BufferSize = static_cast<uint16_t>(len_);
195  DMA_InitStructure_.DMA_Memory0BaseAddr = reinterpret_cast<uint32_t>(data);
197 
198  I2C_Cmd(c_->dev, ENABLE);
199 
201 
202  // If we don't need to send the subaddress, then go ahead and spool up the DMA NACK
203  if (subaddress_sent_)
204  {
207  }
209 
211 
213  if (blocking)
214  {
215  log_line;
216  while (check_busy())
217  ;
218  }
219  log_line;
221 
222  return return_code_;
223 }
224 
226 {
228  if (cb_)
229  cb_(return_code_);
230  log_line;
231 }
232 
233 // blocking, single register read (for configuring devices)
234 int8_t I2C::read(uint8_t addr, uint8_t reg, uint8_t* data)
235 {
236  if (check_busy())
237  return RESULT_BUSY;
238  log_line;
240 
241  // Turn off interrupts while blocking
243 
245 
246  I2C_Cmd(c_->dev, ENABLE);
247  if (reg != 0xFF)
248  {
249  log_line;
253  uint32_t timeout = 500;
255  ;
256  if (timeout != 0)
257  {
259  I2C_Cmd(c_->dev, DISABLE);
260  }
261  else
262  {
264  log_line;
265  return return_code_;
266  }
267  I2C_Cmd(c_->dev, ENABLE);
268  I2C_SendData(c_->dev, reg);
270  }
271 
272  // Read the byte
276  I2C_Cmd(c_->dev, ENABLE);
278  uint32_t timeout = 500;
279  while (!I2C_CheckEvent(c_->dev, I2C_EVENT_MASTER_BYTE_RECEIVED) && --timeout != 0)
280  ;
281  if (timeout != 0)
282  {
283  *data = I2C_ReceiveData(c_->dev);
284  }
285  else
286  {
288  }
290  I2C_Cmd(c_->dev, DISABLE);
291  log_line;
292 
293  return return_code_;
294 }
295 
296 // asynchronous write, for commanding adc conversions
297 int8_t I2C::write(uint8_t addr, uint8_t reg, uint8_t data, void (*callback)(uint8_t), bool blocking)
298 {
299  if (check_busy())
300  return RESULT_BUSY;
301 
302  log_line;
304  addr_ = addr << 1;
305  cb_ = callback;
306  reg_ = reg;
307  subaddress_sent_ = (reg_ == 0xFF);
308  len_ = 1;
309  done_ = false;
310  data_ = data;
312 
313  I2C_Cmd(c_->dev, ENABLE);
314 
316 
318 
320 
322  if (blocking)
323  {
324  log_line;
325  while (check_busy())
326  ;
327  }
328  log_line;
329  return return_code_;
330 }
331 
332 // blocking, single register write (for configuring devices)
333 int8_t I2C::write(uint8_t addr, uint8_t reg, uint8_t data)
334 {
335  if (check_busy())
336  return RESULT_BUSY;
337 
338  log_line;
341 
342  // Turn off interrupts for blocking write
344  I2C_Cmd(c_->dev, ENABLE);
345 
346  // start the transfer
350  uint32_t timeout = 500;
352  && timeout--)
353  ;
354 
355  // No acknowledgement or timeout
356  if (I2C_GetLastEvent(c_->dev) & AF || timeout == 0)
357  {
358  log_line;
360  I2C_Cmd(c_->dev, DISABLE);
361  return RESULT_ERROR;
362  }
363 
364  // Send the register
365  if (reg != 0xFF)
366  {
367  log_line;
368  I2C_SendData(c_->dev, reg);
370  }
371 
372  // Write the byte with a NACK
374  I2C_SendData(c_->dev, data);
377  I2C_Cmd(c_->dev, DISABLE);
378  log_line;
380  return return_code_;
381 }
382 
383 // if for some reason, a step in an I2C read or write fails, call this
385 {
386  error_count_++;
388  log_line;
389  // unstick(); //unstick and reinitialize the hardware
390 }
391 
392 // This is the I2C_IT_ERR handler
394 {
395  log_line;
396  I2C_Cmd(c_->dev, DISABLE);
399 
400  // Turn off the interrupts
402 
403  // reset errors
406  log_line;
408 }
409 
410 // This is the I2C_IT_EV handler
412 {
413  uint32_t last_event = I2C_GetLastEvent(c_->dev);
415  // We just sent a byte
416  if ((last_event & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED)
417  {
419  // If we are reading, then we just sent a subaddress and need to send
420  // a repeated start, and enable the DMA NACK
421  if (current_status_ == READING)
422  {
423  log_line;
427  }
428  // We are in write mode and are done, need to clean up
429  else
430  {
431  log_line;
435  }
436  }
437 
438  // We just sent the address in write mode
439  else if ((last_event & I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)
440  {
442  // We need to send the subaddress
443  if (!subaddress_sent_)
444  {
445  log_line;
446  I2C_SendData(c_->dev, reg_);
447  subaddress_sent_ = true;
448  if (current_status_ == WRITING)
449  {
450  log_line;
452  done_ = true;
453  }
454  }
455  // We need to send our data (no subaddress)
456  else
457  {
458  log_line;
460  done_ = true;
461  }
462  }
463 
464  // We are in receiving mode, preparing to receive the big DMA dump
465  else if ((last_event & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)
466  {
468  log_line;
469  // I2C_ITConfig(c_->dev, I2C_IT_EVT, DISABLE);
471  I2C_DMACmd(c_->dev, ENABLE);
474  }
475 
476  // Start just sent
477  else if ((last_event & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT)
478  {
480  // we either don't need to send, or already sent the subaddress
482  {
483  log_line;
484  // Set up a receive
486  }
487  // We need to either send the subaddress or our datas
488  else
489  {
490  log_line;
491  // Set up a write
493  }
494  }
495 
496  // Sometimes we just get this over and over and over again
497  else if (last_event == SB)
498  {
499  // SB is cleared by clearing and resetting PE
500  I2C_Cmd(c_->dev, DISABLE);
501  I2C_Cmd(c_->dev, ENABLE);
502  error_count_++;
503  }
504 }
505 
506 // This checks to make sure that the I2C device isn't currently handling an i2c job, and if
507 // it is, that it hasn't stalled out
509 {
510  if (current_status_ == IDLE)
511  return false;
512  else
513  {
514  // If we haven't seen anything in a long while, then restart the device
515  if (micros() > last_event_us_ + 2000)
516  {
517  error_count_++;
518  // Send a stop condition
522 
523  // Force reset of the bus
524  // This is really slow, but it seems to be the only
525  // way to regain a connection if bad things happen
526  if (return_code_ == RESULT_ERROR)
527  {
528  I2C_Cmd(c_->dev, DISABLE);
531 
532  // Write Pins low
536 
537  // Send a stop
542 
543  // turn things back on
546  I2C_Cmd(c_->dev, ENABLE);
547 
549  }
550  log_line;
551  return false;
552  }
553  else
554  {
555  return true;
556  }
557  }
558 }
559 
560 extern "C"
561 {
562  // C-based IRQ functions (defined in the startup script)
564  {
566  {
567  /* Clear transmission complete flag */
569 
571  /* Send I2C1 STOP Condition */
573  /* Disable DMA channel*/
575 
576  /* Turn off I2C interrupts since we are done with the transfer */
578 
579  I2C2_Ptr->transfer_complete_cb(); // TODO make this configurable
580  }
581  }
582 
584  {
586  {
587  /* Clear transmission complete flag */
589 
591  /* Send I2C1 STOP Condition */
593  /* Disable DMA channel*/
595  /* Turn off I2C interrupts, because we are done with the transfer */
597 
598  I2C1_Ptr->transfer_complete_cb(); // TODO make this configurable
599  }
600  }
601 
602  void I2C1_ER_IRQHandler(void) { I2C1_Ptr->handle_error(); }
603 
604  void I2C1_EV_IRQHandler(void) { I2C1_Ptr->handle_event(); }
605 
606  void I2C2_ER_IRQHandler(void) { I2C2_Ptr->handle_error(); }
607 
608  void I2C2_EV_IRQHandler(void) { I2C2_Ptr->handle_event(); }
609 
610  void I2C3_ER_IRQHandler(void) { I2C3_Ptr->handle_error(); }
611 
612  void I2C3_EV_IRQHandler(void) { I2C3_Ptr->handle_event(); }
613 }
#define DMA_MemoryInc_Enable
uint32_t DMA_MemoryInc
Definition: stm32f4xx_dma.h:76
IRQn_Type DMA_IRQn
Definition: system.h:90
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Specifies that the next DMA transfer is the last one.
void transfer_complete_cb()
Definition: i2c.cpp:225
uint16_t I2C_Ack
Definition: stm32f4xx_i2c.h:68
I2C * I2C2_Ptr
Definition: i2c.cpp:49
uint32_t DMA_Channel
Definition: stm32f4xx_dma.h:56
void GPIO_PinAFConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
Changes the mapping of the specified pin.
void(* cb_)(uint8_t)
Definition: i2c.h:127
#define I2C_SR1_BERR
Definition: stm32f4xx.h:6851
uint32_t I2C_ClockSpeed
Definition: system.h:79
void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct)
Initializes the NVIC peripheral according to the specified parameters in the NVIC_InitStruct.
void toggle(void)
Definition: gpio.cpp:52
#define DMA_MemoryDataSize_Byte
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Clears the I2Cx&#39;s pending flags.
uint16_t I2C_AcknowledgedAddress
Definition: stm32f4xx_i2c.h:71
void I2C1_ER_IRQHandler(void)
Definition: i2c.cpp:602
void I2C3_EV_IRQHandler(void)
Definition: i2c.cpp:612
#define I2C_DutyCycle_2
#define I2C_IT_ERR
#define I2C_EVENT_MASTER_MODE_SELECT
Communication start.
uint16_t error_count_
Definition: i2c.h:83
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C acknowledge feature.
void set_mode(gpio_mode_t mode)
Definition: gpio.cpp:82
#define I2C_Mode_I2C
uint32_t DMA_MemoryBurst
#define I2C_SR1_AF
Definition: stm32f4xx.h:6853
void DMA_DeInit(DMA_Stream_TypeDef *DMAy_Streamx)
Deinitialize the DMAy Streamx registers to their default reset values.
#define I2C_SR1_ARLO
Definition: stm32f4xx.h:6852
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication START condition.
void DMA1_Stream0_IRQHandler(void)
Definition: i2c.cpp:583
#define DMA_FLAG_TCIF2
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED
#define DMA_PeripheralInc_Disable
void delayMicroseconds(uint32_t us)
Definition: system.c:94
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction)
Transmits the address byte to select the slave device.
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
I2C * I2C1_Ptr
Definition: i2c.cpp:48
Debug_History interrupt_history_
Definition: i2c.h:123
uint32_t DMA_MemoryDataSize
Definition: stm32f4xx_dma.h:82
void init(const i2c_hardware_struct_t *c)
Definition: i2c.cpp:52
void add_event(uint32_t event)
Definition: i2c.h:115
FlagStatus DMA_GetFlagStatus(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FLAG)
Checks whether the specified DMAy Streamx flag is set or not.
#define DMA_Priority_High
__IO uint16_t DR
Definition: stm32f4xx.h:1330
uint16_t I2C_OwnAddress1
Definition: stm32f4xx_i2c.h:65
#define I2C3
Definition: stm32f4xx.h:2062
void DMA_Init(DMA_Stream_TypeDef *DMAy_Streamx, DMA_InitTypeDef *DMA_InitStruct)
Initializes the DMAy Streamx according to the specified parameters in the DMA_InitStruct structure...
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState)
Generates I2Cx communication STOP condition.
uint32_t DMA_DIR
Definition: stm32f4xx_dma.h:65
void I2C2_EV_IRQHandler(void)
Definition: i2c.cpp:608
uint32_t DMA_PeripheralInc
Definition: stm32f4xx_dma.h:73
void DMA1_Stream2_IRQHandler(void)
Definition: i2c.cpp:563
DMA_InitTypeDef DMA_InitStructure_
Definition: i2c.h:97
volatile uint8_t data_
Definition: i2c.h:95
volatile uint64_t micros(void)
Definition: system.c:44
volatile current_status_t current_status_
Definition: i2c.h:86
void DMA_ITConfig(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_IT, FunctionalState NewState)
Enables or disables the specified DMAy Streamx interrupts.
#define I2C_FLAG_BUSY
#define I2C_Direction_Transmitter
uint32_t DMA_PeripheralDataSize
Definition: stm32f4xx_dma.h:79
uint16_t SCL_Pin
Definition: system.h:85
__IO uint16_t SR2
Definition: stm32f4xx.h:1334
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
Address Acknowledge.
#define I2C_AcknowledgedAddress_7bit
#define DMA_FIFOMode_Enable
#define DMA_FIFOThreshold_Full
Definition: i2c.h:46
void I2C_DeInit(I2C_TypeDef *I2Cx)
Deinitializes the I2Cx peripheral registers to their default reset values.
void init(GPIO_TypeDef *BasePort, uint16_t pin, gpio_mode_t mode)
Definition: gpio.cpp:34
GPIO sda_
Definition: i2c.h:81
I2C_TypeDef * dev
Definition: system.h:78
void I2C2_ER_IRQHandler(void)
Definition: i2c.cpp:606
#define DMA1_Stream0
Definition: stm32f4xx.h:2125
#define DMA_FLAG_TCIF0
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct)
Fills each I2C_InitStruct member with its default value.
uint32_t DMA_PeripheralBurst
void I2C1_EV_IRQHandler(void)
Definition: i2c.cpp:604
static volatile uint8_t addr
Definition: drv_i2c.c:95
void handle_hardware_failure()
Definition: i2c.cpp:384
void DMA_Cmd(DMA_Stream_TypeDef *DMAy_Streamx, FunctionalState NewState)
Enables or disables the specified DMAy Streamx.
uint32_t DMA_PeripheralBaseAddr
Definition: stm32f4xx_dma.h:59
uint32_t DMA_Memory0BaseAddr
Definition: stm32f4xx_dma.h:61
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C peripheral.
static volatile uint8_t reg
Definition: drv_i2c.c:96
IRQn_Type I2C_EV_IRQn
Definition: system.h:80
bool done_
Definition: i2c.h:89
#define DMA_MemoryBurst_Single
uint32_t DMA_FIFOThreshold
Definition: stm32f4xx_dma.h:98
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct)
Initializes the I2Cx peripheral according to the specified parameters in the I2C_InitStruct.
Definition: i2c.h:56
uint32_t I2C_ClockSpeed
Definition: stm32f4xx_i2c.h:56
void unstick()
Definition: i2c.cpp:125
bool initialized_
Definition: i2c.h:90
#define DMA_Mode_Normal
#define DMA1_Stream2
Definition: stm32f4xx.h:2127
void write(gpio_write_t state)
Definition: gpio.cpp:41
bool check_busy()
Definition: i2c.cpp:508
void I2C3_ER_IRQHandler(void)
Definition: i2c.cpp:610
uint16_t SDA_Pin
Definition: system.h:87
IRQn_Type I2C_ER_IRQn
Definition: system.h:81
__IO uint16_t SR1
Definition: stm32f4xx.h:1332
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
uint32_t DMA_Channel
Definition: system.h:89
uint32_t DMA_FIFOMode
Definition: stm32f4xx_dma.h:93
I2C Init structure definition.
Definition: stm32f4xx_i2c.h:54
Definition: i2c.h:75
#define while_check(cond, result)
Definition: i2c.cpp:34
#define DMA_PeripheralDataSize_Byte
volatile uint8_t addr_
Definition: i2c.h:92
int8_t write(uint8_t addr, uint8_t reg, uint8_t data, void(*callback)(uint8_t), bool blocking=false)
Definition: i2c.cpp:297
#define log_line
Definition: i2c.cpp:45
Definition: i2c.h:39
void handle_event()
Definition: i2c.cpp:411
Definition: gpio.h:43
uint32_t DMA_Mode
Definition: stm32f4xx_dma.h:85
volatile uint8_t len_
Definition: i2c.h:94
#define I2C2
Definition: stm32f4xx.h:2061
DMA_Stream_TypeDef * DMA_Stream
Definition: system.h:88
volatile uint8_t return_code_
Definition: i2c.h:87
I2C * I2C3_Ptr
Definition: i2c.cpp:50
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
Checks whether the specified I2C flag is set or not.
#define DMA_DIR_PeripheralToMemory
GPIO_TypeDef * GPIO
Definition: system.h:82
const i2c_hardware_struct_t * c_
Definition: i2c.h:99
int8_t read(uint8_t addr, uint8_t reg, uint8_t num_bytes, uint8_t *data, void(*callback)(uint8_t)=nullptr, bool blocking=false)
Definition: i2c.cpp:177
volatile uint8_t reg_
Definition: i2c.h:93
uint32_t DMA_BufferSize
Definition: stm32f4xx_dma.h:69
void handle_error()
Definition: i2c.cpp:393
Definition: i2c.h:63
uint32_t DMA_Priority
Definition: stm32f4xx_dma.h:90
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C DMA requests.
#define I2C_Direction_Receiver
bool subaddress_sent_
Definition: i2c.h:88
GPIO scl_
Definition: i2c.h:80
#define I2C1
Definition: stm32f4xx.h:2060
uint32_t I2C_GetLastEvent(I2C_TypeDef *I2Cx)
Returns the last I2Cx Event.
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data)
Sends a data byte through the I2Cx peripheral.
void DMA_ClearFlag(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FLAG)
Clears the DMAy Streamx&#39;s pending flags.
uint16_t I2C_DutyCycle
Definition: stm32f4xx_i2c.h:62
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState)
Enables or disables the specified I2C interrupts.
uint64_t last_event_us_
Definition: i2c.h:125
uint16_t I2C_Mode
Definition: stm32f4xx_i2c.h:59
uint8_t SCL_PinSource
Definition: system.h:84
uint8_t SDA_PinSource
Definition: system.h:86
void DMA_SetCurrDataCounter(DMA_Stream_TypeDef *DMAy_Streamx, uint16_t Counter)
Writes the number of data units to be transferred on the DMAy Streamx.
#define DMA_IT_TC
#define I2C_Ack_Disable
ErrorStatus I2C_CheckEvent(I2C_TypeDef *I2Cx, uint32_t I2C_EVENT)
Checks whether the last I2Cx Event is equal to the one passed as parameter.
#define I2C_SR1_OVR
Definition: stm32f4xx.h:6854
#define I2C_IT_EVT
#define DMA_PeripheralBurst_Single
#define I2C_EVENT_MASTER_BYTE_RECEIVED
Communication events.


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Sat May 9 2020 03:16:52