stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c
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1 
156 /* Includes ------------------------------------------------------------------*/
157 #include "stm32h7xx_hal.h"
158 
168 #ifdef HAL_UART_MODULE_ENABLED
169 
170 /* Private typedef -----------------------------------------------------------*/
171 /* Private define ------------------------------------------------------------*/
175 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
176  USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \
177  USART_CR1_FIFOEN ))
179 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \
180  USART_CR3_TXFTCFG | USART_CR3_RXFTCFG ))
182 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
183 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
184 
185 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
186 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
187 
192 /* Private macros ------------------------------------------------------------*/
193 /* Private variables ---------------------------------------------------------*/
194 const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
195 
196 /* Private function prototypes -----------------------------------------------*/
200 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
201 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
202 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
203 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
204 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
205 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
206 static void UART_DMAError(DMA_HandleTypeDef *hdma);
207 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
208 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
209 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
210 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
211 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
212 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
213 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
214 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
215 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
216 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
217 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
218 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
219 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
220 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
225 /* Exported functions --------------------------------------------------------*/
226 
297 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
298 {
299  /* Check the UART handle allocation */
300  if (huart == NULL)
301  {
302  return HAL_ERROR;
303  }
304 
305  if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
306  {
307  /* Check the parameters */
308  assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
309  }
310  else
311  {
312  /* Check the parameters */
313  assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
314  }
315 
316  if (huart->gState == HAL_UART_STATE_RESET)
317  {
318  /* Allocate lock resource and initialize it */
319  huart->Lock = HAL_UNLOCKED;
320 
321 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
322  UART_InitCallbacksToDefault(huart);
323 
324  if (huart->MspInitCallback == NULL)
325  {
326  huart->MspInitCallback = HAL_UART_MspInit;
327  }
328 
329  /* Init the low level hardware */
330  huart->MspInitCallback(huart);
331 #else
332  /* Init the low level hardware : GPIO, CLOCK */
333  HAL_UART_MspInit(huart);
334 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
335  }
336 
337  huart->gState = HAL_UART_STATE_BUSY;
338 
339  __HAL_UART_DISABLE(huart);
340 
341  /* Set the UART Communication parameters */
342  if (UART_SetConfig(huart) == HAL_ERROR)
343  {
344  return HAL_ERROR;
345  }
346 
347  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
348  {
349  UART_AdvFeatureConfig(huart);
350  }
351 
352  /* In asynchronous mode, the following bits must be kept cleared:
353  - LINEN and CLKEN bits in the USART_CR2 register,
354  - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
355  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
356  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
357 
358  __HAL_UART_ENABLE(huart);
359 
360  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
361  return (UART_CheckIdleState(huart));
362 }
363 
370 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
371 {
372  /* Check the UART handle allocation */
373  if (huart == NULL)
374  {
375  return HAL_ERROR;
376  }
377 
378  /* Check UART instance */
379  assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
380 
381  if (huart->gState == HAL_UART_STATE_RESET)
382  {
383  /* Allocate lock resource and initialize it */
384  huart->Lock = HAL_UNLOCKED;
385 
386 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
387  UART_InitCallbacksToDefault(huart);
388 
389  if (huart->MspInitCallback == NULL)
390  {
391  huart->MspInitCallback = HAL_UART_MspInit;
392  }
393 
394  /* Init the low level hardware */
395  huart->MspInitCallback(huart);
396 #else
397  /* Init the low level hardware : GPIO, CLOCK */
398  HAL_UART_MspInit(huart);
399 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
400  }
401 
402  huart->gState = HAL_UART_STATE_BUSY;
403 
404  __HAL_UART_DISABLE(huart);
405 
406  /* Set the UART Communication parameters */
407  if (UART_SetConfig(huart) == HAL_ERROR)
408  {
409  return HAL_ERROR;
410  }
411 
412  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
413  {
414  UART_AdvFeatureConfig(huart);
415  }
416 
417  /* In half-duplex mode, the following bits must be kept cleared:
418  - LINEN and CLKEN bits in the USART_CR2 register,
419  - SCEN and IREN bits in the USART_CR3 register.*/
420  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
421  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
422 
423  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
424  SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
425 
426  __HAL_UART_ENABLE(huart);
427 
428  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
429  return (UART_CheckIdleState(huart));
430 }
431 
432 
443 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
444 {
445  /* Check the UART handle allocation */
446  if (huart == NULL)
447  {
448  return HAL_ERROR;
449  }
450 
451  /* Check the LIN UART instance */
452  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
453  /* Check the Break detection length parameter */
454  assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
455 
456  /* LIN mode limited to 16-bit oversampling only */
457  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
458  {
459  return HAL_ERROR;
460  }
461  /* LIN mode limited to 8-bit data length */
462  if (huart->Init.WordLength != UART_WORDLENGTH_8B)
463  {
464  return HAL_ERROR;
465  }
466 
467  if (huart->gState == HAL_UART_STATE_RESET)
468  {
469  /* Allocate lock resource and initialize it */
470  huart->Lock = HAL_UNLOCKED;
471 
472 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
473  UART_InitCallbacksToDefault(huart);
474 
475  if (huart->MspInitCallback == NULL)
476  {
477  huart->MspInitCallback = HAL_UART_MspInit;
478  }
479 
480  /* Init the low level hardware */
481  huart->MspInitCallback(huart);
482 #else
483  /* Init the low level hardware : GPIO, CLOCK */
484  HAL_UART_MspInit(huart);
485 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
486  }
487 
488  huart->gState = HAL_UART_STATE_BUSY;
489 
490  __HAL_UART_DISABLE(huart);
491 
492  /* Set the UART Communication parameters */
493  if (UART_SetConfig(huart) == HAL_ERROR)
494  {
495  return HAL_ERROR;
496  }
497 
498  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
499  {
500  UART_AdvFeatureConfig(huart);
501  }
502 
503  /* In LIN mode, the following bits must be kept cleared:
504  - LINEN and CLKEN bits in the USART_CR2 register,
505  - SCEN and IREN bits in the USART_CR3 register.*/
506  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
507  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
508 
509  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
510  SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
511 
512  /* Set the USART LIN Break detection length. */
513  MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
514 
515  __HAL_UART_ENABLE(huart);
516 
517  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
518  return (UART_CheckIdleState(huart));
519 }
520 
521 
540 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
541 {
542  /* Check the UART handle allocation */
543  if (huart == NULL)
544  {
545  return HAL_ERROR;
546  }
547 
548  /* Check the wake up method parameter */
549  assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
550 
551  if (huart->gState == HAL_UART_STATE_RESET)
552  {
553  /* Allocate lock resource and initialize it */
554  huart->Lock = HAL_UNLOCKED;
555 
556 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
557  UART_InitCallbacksToDefault(huart);
558 
559  if (huart->MspInitCallback == NULL)
560  {
561  huart->MspInitCallback = HAL_UART_MspInit;
562  }
563 
564  /* Init the low level hardware */
565  huart->MspInitCallback(huart);
566 #else
567  /* Init the low level hardware : GPIO, CLOCK */
568  HAL_UART_MspInit(huart);
569 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
570  }
571 
572  huart->gState = HAL_UART_STATE_BUSY;
573 
574  __HAL_UART_DISABLE(huart);
575 
576  /* Set the UART Communication parameters */
577  if (UART_SetConfig(huart) == HAL_ERROR)
578  {
579  return HAL_ERROR;
580  }
581 
582  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
583  {
584  UART_AdvFeatureConfig(huart);
585  }
586 
587  /* In multiprocessor mode, the following bits must be kept cleared:
588  - LINEN and CLKEN bits in the USART_CR2 register,
589  - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
590  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
591  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
592 
593  if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
594  {
595  /* If address mark wake up method is chosen, set the USART address node */
596  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
597  }
598 
599  /* Set the wake up method by setting the WAKE bit in the CR1 register */
600  MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
601 
602  __HAL_UART_ENABLE(huart);
603 
604  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
605  return (UART_CheckIdleState(huart));
606 }
607 
608 
614 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
615 {
616  /* Check the UART handle allocation */
617  if (huart == NULL)
618  {
619  return HAL_ERROR;
620  }
621 
622  /* Check the parameters */
623  assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
624 
625  huart->gState = HAL_UART_STATE_BUSY;
626 
627  __HAL_UART_DISABLE(huart);
628 
629  huart->Instance->CR1 = 0x0U;
630  huart->Instance->CR2 = 0x0U;
631  huart->Instance->CR3 = 0x0U;
632 
633 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
634  if (huart->MspDeInitCallback == NULL)
635  {
636  huart->MspDeInitCallback = HAL_UART_MspDeInit;
637  }
638  /* DeInit the low level hardware */
639  huart->MspDeInitCallback(huart);
640 #else
641  /* DeInit the low level hardware */
642  HAL_UART_MspDeInit(huart);
643 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
644 
645  huart->ErrorCode = HAL_UART_ERROR_NONE;
646  huart->gState = HAL_UART_STATE_RESET;
647  huart->RxState = HAL_UART_STATE_RESET;
648 
649  __HAL_UNLOCK(huart);
650 
651  return HAL_OK;
652 }
653 
659 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
660 {
661  /* Prevent unused argument(s) compilation warning */
662  UNUSED(huart);
663 
664  /* NOTE : This function should not be modified, when the callback is needed,
665  the HAL_UART_MspInit can be implemented in the user file
666  */
667 }
668 
674 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
675 {
676  /* Prevent unused argument(s) compilation warning */
677  UNUSED(huart);
678 
679  /* NOTE : This function should not be modified, when the callback is needed,
680  the HAL_UART_MspDeInit can be implemented in the user file
681  */
682 }
683 
684 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
685 
707 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
708  pUART_CallbackTypeDef pCallback)
709 {
710  HAL_StatusTypeDef status = HAL_OK;
711 
712  if (pCallback == NULL)
713  {
714  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
715 
716  return HAL_ERROR;
717  }
718 
719  __HAL_LOCK(huart);
720 
721  if (huart->gState == HAL_UART_STATE_READY)
722  {
723  switch (CallbackID)
724  {
725  case HAL_UART_TX_HALFCOMPLETE_CB_ID :
726  huart->TxHalfCpltCallback = pCallback;
727  break;
728 
729  case HAL_UART_TX_COMPLETE_CB_ID :
730  huart->TxCpltCallback = pCallback;
731  break;
732 
733  case HAL_UART_RX_HALFCOMPLETE_CB_ID :
734  huart->RxHalfCpltCallback = pCallback;
735  break;
736 
737  case HAL_UART_RX_COMPLETE_CB_ID :
738  huart->RxCpltCallback = pCallback;
739  break;
740 
741  case HAL_UART_ERROR_CB_ID :
742  huart->ErrorCallback = pCallback;
743  break;
744 
745  case HAL_UART_ABORT_COMPLETE_CB_ID :
746  huart->AbortCpltCallback = pCallback;
747  break;
748 
749  case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
750  huart->AbortTransmitCpltCallback = pCallback;
751  break;
752 
753  case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
754  huart->AbortReceiveCpltCallback = pCallback;
755  break;
756 
757  case HAL_UART_WAKEUP_CB_ID :
758  huart->WakeupCallback = pCallback;
759  break;
760 
761  case HAL_UART_RX_FIFO_FULL_CB_ID :
762  huart->RxFifoFullCallback = pCallback;
763  break;
764 
765  case HAL_UART_TX_FIFO_EMPTY_CB_ID :
766  huart->TxFifoEmptyCallback = pCallback;
767  break;
768 
769  case HAL_UART_MSPINIT_CB_ID :
770  huart->MspInitCallback = pCallback;
771  break;
772 
773  case HAL_UART_MSPDEINIT_CB_ID :
774  huart->MspDeInitCallback = pCallback;
775  break;
776 
777  default :
778  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
779 
780  status = HAL_ERROR;
781  break;
782  }
783  }
784  else if (huart->gState == HAL_UART_STATE_RESET)
785  {
786  switch (CallbackID)
787  {
788  case HAL_UART_MSPINIT_CB_ID :
789  huart->MspInitCallback = pCallback;
790  break;
791 
792  case HAL_UART_MSPDEINIT_CB_ID :
793  huart->MspDeInitCallback = pCallback;
794  break;
795 
796  default :
797  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
798 
799  status = HAL_ERROR;
800  break;
801  }
802  }
803  else
804  {
805  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
806 
807  status = HAL_ERROR;
808  }
809 
810  __HAL_UNLOCK(huart);
811 
812  return status;
813 }
814 
836 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
837 {
838  HAL_StatusTypeDef status = HAL_OK;
839 
840  __HAL_LOCK(huart);
841 
842  if (HAL_UART_STATE_READY == huart->gState)
843  {
844  switch (CallbackID)
845  {
846  case HAL_UART_TX_HALFCOMPLETE_CB_ID :
847  huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
848  break;
849 
850  case HAL_UART_TX_COMPLETE_CB_ID :
851  huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
852  break;
853 
854  case HAL_UART_RX_HALFCOMPLETE_CB_ID :
855  huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
856  break;
857 
858  case HAL_UART_RX_COMPLETE_CB_ID :
859  huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
860  break;
861 
862  case HAL_UART_ERROR_CB_ID :
863  huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
864  break;
865 
866  case HAL_UART_ABORT_COMPLETE_CB_ID :
867  huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
868  break;
869 
870  case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
871  huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
872  break;
873 
874  case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
875  huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
876  break;
877 
878  case HAL_UART_WAKEUP_CB_ID :
879  huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
880  break;
881 
882  case HAL_UART_RX_FIFO_FULL_CB_ID :
883  huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
884  break;
885 
886  case HAL_UART_TX_FIFO_EMPTY_CB_ID :
887  huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
888  break;
889 
890  case HAL_UART_MSPINIT_CB_ID :
891  huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
892  break;
893 
894  case HAL_UART_MSPDEINIT_CB_ID :
895  huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
896  break;
897 
898  default :
899  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
900 
901  status = HAL_ERROR;
902  break;
903  }
904  }
905  else if (HAL_UART_STATE_RESET == huart->gState)
906  {
907  switch (CallbackID)
908  {
909  case HAL_UART_MSPINIT_CB_ID :
910  huart->MspInitCallback = HAL_UART_MspInit;
911  break;
912 
913  case HAL_UART_MSPDEINIT_CB_ID :
914  huart->MspDeInitCallback = HAL_UART_MspDeInit;
915  break;
916 
917  default :
918  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
919 
920  status = HAL_ERROR;
921  break;
922  }
923  }
924  else
925  {
926  huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
927 
928  status = HAL_ERROR;
929  }
930 
931  __HAL_UNLOCK(huart);
932 
933  return status;
934 }
935 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
936 
1033 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1034 {
1035  uint8_t *pdata8bits;
1036  uint16_t *pdata16bits;
1037  uint32_t tickstart;
1038 
1039  /* Check that a Tx process is not already ongoing */
1040  if (huart->gState == HAL_UART_STATE_READY)
1041  {
1042  if ((pData == NULL) || (Size == 0U))
1043  {
1044  return HAL_ERROR;
1045  }
1046 
1047  __HAL_LOCK(huart);
1048 
1049  huart->ErrorCode = HAL_UART_ERROR_NONE;
1050  huart->gState = HAL_UART_STATE_BUSY_TX;
1051 
1052  /* Init tickstart for timeout managment*/
1053  tickstart = HAL_GetTick();
1054 
1055  huart->TxXferSize = Size;
1056  huart->TxXferCount = Size;
1057 
1058  /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1059  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1060  {
1061  pdata8bits = NULL;
1062  pdata16bits = (uint16_t *) pData;
1063  }
1064  else
1065  {
1066  pdata8bits = pData;
1067  pdata16bits = NULL;
1068  }
1069 
1070  __HAL_UNLOCK(huart);
1071 
1072  while (huart->TxXferCount > 0U)
1073  {
1074  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1075  {
1076  return HAL_TIMEOUT;
1077  }
1078  if (pdata8bits == NULL)
1079  {
1080  huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1081  pdata16bits++;
1082  }
1083  else
1084  {
1085  huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1086  pdata8bits++;
1087  }
1088  huart->TxXferCount--;
1089  }
1090 
1091  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1092  {
1093  return HAL_TIMEOUT;
1094  }
1095 
1096  /* At end of Tx process, restore huart->gState to Ready */
1097  huart->gState = HAL_UART_STATE_READY;
1098 
1099  return HAL_OK;
1100  }
1101  else
1102  {
1103  return HAL_BUSY;
1104  }
1105 }
1106 
1122 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1123 {
1124  uint8_t *pdata8bits;
1125  uint16_t *pdata16bits;
1126  uint16_t uhMask;
1127  uint32_t tickstart;
1128 
1129  /* Check that a Rx process is not already ongoing */
1130  if (huart->RxState == HAL_UART_STATE_READY)
1131  {
1132  if ((pData == NULL) || (Size == 0U))
1133  {
1134  return HAL_ERROR;
1135  }
1136 
1137  __HAL_LOCK(huart);
1138 
1139  huart->ErrorCode = HAL_UART_ERROR_NONE;
1140  huart->RxState = HAL_UART_STATE_BUSY_RX;
1141 
1142  /* Init tickstart for timeout managment*/
1143  tickstart = HAL_GetTick();
1144 
1145  huart->RxXferSize = Size;
1146  huart->RxXferCount = Size;
1147 
1148  /* Computation of UART mask to apply to RDR register */
1149  UART_MASK_COMPUTATION(huart);
1150  uhMask = huart->Mask;
1151 
1152  /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1153  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1154  {
1155  pdata8bits = NULL;
1156  pdata16bits = (uint16_t *) pData;
1157  }
1158  else
1159  {
1160  pdata8bits = pData;
1161  pdata16bits = NULL;
1162  }
1163 
1164  __HAL_UNLOCK(huart);
1165 
1166  /* as long as data have to be received */
1167  while (huart->RxXferCount > 0U)
1168  {
1169  if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1170  {
1171  return HAL_TIMEOUT;
1172  }
1173  if (pdata8bits == NULL)
1174  {
1175  *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1176  pdata16bits++;
1177  }
1178  else
1179  {
1180  *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1181  pdata8bits++;
1182  }
1183  huart->RxXferCount--;
1184  }
1185 
1186  /* At end of Rx process, restore huart->RxState to Ready */
1187  huart->RxState = HAL_UART_STATE_READY;
1188 
1189  return HAL_OK;
1190  }
1191  else
1192  {
1193  return HAL_BUSY;
1194  }
1195 }
1196 
1207 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1208 {
1209  /* Check that a Tx process is not already ongoing */
1210  if (huart->gState == HAL_UART_STATE_READY)
1211  {
1212  if ((pData == NULL) || (Size == 0U))
1213  {
1214  return HAL_ERROR;
1215  }
1216 
1217  __HAL_LOCK(huart);
1218 
1219  huart->pTxBuffPtr = pData;
1220  huart->TxXferSize = Size;
1221  huart->TxXferCount = Size;
1222  huart->TxISR = NULL;
1223 
1224  huart->ErrorCode = HAL_UART_ERROR_NONE;
1225  huart->gState = HAL_UART_STATE_BUSY_TX;
1226 
1227  /* Configure Tx interrupt processing */
1228  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1229  {
1230  /* Set the Tx ISR function pointer according to the data word length */
1231  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1232  {
1233  huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1234  }
1235  else
1236  {
1237  huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1238  }
1239 
1240  __HAL_UNLOCK(huart);
1241 
1242  /* Enable the TX FIFO threshold interrupt */
1243  SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1244  }
1245  else
1246  {
1247  /* Set the Tx ISR function pointer according to the data word length */
1248  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1249  {
1250  huart->TxISR = UART_TxISR_16BIT;
1251  }
1252  else
1253  {
1254  huart->TxISR = UART_TxISR_8BIT;
1255  }
1256 
1257  __HAL_UNLOCK(huart);
1258 
1259  /* Enable the Transmit Data Register Empty interrupt */
1260  SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1261  }
1262 
1263  return HAL_OK;
1264  }
1265  else
1266  {
1267  return HAL_BUSY;
1268  }
1269 }
1270 
1281 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1282 {
1283  /* Check that a Rx process is not already ongoing */
1284  if (huart->RxState == HAL_UART_STATE_READY)
1285  {
1286  if ((pData == NULL) || (Size == 0U))
1287  {
1288  return HAL_ERROR;
1289  }
1290 
1291  __HAL_LOCK(huart);
1292 
1293  huart->pRxBuffPtr = pData;
1294  huart->RxXferSize = Size;
1295  huart->RxXferCount = Size;
1296  huart->RxISR = NULL;
1297 
1298  /* Computation of UART mask to apply to RDR register */
1299  UART_MASK_COMPUTATION(huart);
1300 
1301  huart->ErrorCode = HAL_UART_ERROR_NONE;
1302  huart->RxState = HAL_UART_STATE_BUSY_RX;
1303 
1304  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1305  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1306 
1307  /* Configure Rx interrupt processing*/
1308  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
1309  {
1310  /* Set the Rx ISR function pointer according to the data word length */
1311  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1312  {
1313  huart->RxISR = UART_RxISR_16BIT_FIFOEN;
1314  }
1315  else
1316  {
1317  huart->RxISR = UART_RxISR_8BIT_FIFOEN;
1318  }
1319 
1320  __HAL_UNLOCK(huart);
1321 
1322  /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
1323  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1324  SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
1325  }
1326  else
1327  {
1328  /* Set the Rx ISR function pointer according to the data word length */
1329  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1330  {
1331  huart->RxISR = UART_RxISR_16BIT;
1332  }
1333  else
1334  {
1335  huart->RxISR = UART_RxISR_8BIT;
1336  }
1337 
1338  __HAL_UNLOCK(huart);
1339 
1340  /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
1341  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
1342  }
1343 
1344  return HAL_OK;
1345  }
1346  else
1347  {
1348  return HAL_BUSY;
1349  }
1350 }
1351 
1362 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1363 {
1364  /* Check that a Tx process is not already ongoing */
1365  if (huart->gState == HAL_UART_STATE_READY)
1366  {
1367  if ((pData == NULL) || (Size == 0U))
1368  {
1369  return HAL_ERROR;
1370  }
1371 
1372  __HAL_LOCK(huart);
1373 
1374  huart->pTxBuffPtr = pData;
1375  huart->TxXferSize = Size;
1376  huart->TxXferCount = Size;
1377 
1378  huart->ErrorCode = HAL_UART_ERROR_NONE;
1379  huart->gState = HAL_UART_STATE_BUSY_TX;
1380 
1381  if (huart->hdmatx != NULL)
1382  {
1383  /* Set the UART DMA transfer complete callback */
1384  huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1385 
1386  /* Set the UART DMA Half transfer complete callback */
1387  huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1388 
1389  /* Set the DMA error callback */
1390  huart->hdmatx->XferErrorCallback = UART_DMAError;
1391 
1392  /* Set the DMA abort callback */
1393  huart->hdmatx->XferAbortCallback = NULL;
1394 
1395  /* Enable the UART transmit DMA channel */
1396  if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1397  {
1398  /* Set error code to DMA */
1399  huart->ErrorCode = HAL_UART_ERROR_DMA;
1400 
1401  __HAL_UNLOCK(huart);
1402 
1403  /* Restore huart->gState to ready */
1404  huart->gState = HAL_UART_STATE_READY;
1405 
1406  return HAL_ERROR;
1407  }
1408  }
1409  /* Clear the TC flag in the ICR register */
1410  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1411 
1412  __HAL_UNLOCK(huart);
1413 
1414  /* Enable the DMA transfer for transmit request by setting the DMAT bit
1415  in the UART CR3 register */
1416  SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1417 
1418  return HAL_OK;
1419  }
1420  else
1421  {
1422  return HAL_BUSY;
1423  }
1424 }
1425 
1438 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1439 {
1440  /* Check that a Rx process is not already ongoing */
1441  if (huart->RxState == HAL_UART_STATE_READY)
1442  {
1443  if ((pData == NULL) || (Size == 0U))
1444  {
1445  return HAL_ERROR;
1446  }
1447 
1448  __HAL_LOCK(huart);
1449 
1450  huart->pRxBuffPtr = pData;
1451  huart->RxXferSize = Size;
1452 
1453  huart->ErrorCode = HAL_UART_ERROR_NONE;
1454  huart->RxState = HAL_UART_STATE_BUSY_RX;
1455 
1456  if (huart->hdmarx != NULL)
1457  {
1458  /* Set the UART DMA transfer complete callback */
1459  huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
1460 
1461  /* Set the UART DMA Half transfer complete callback */
1462  huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
1463 
1464  /* Set the DMA error callback */
1465  huart->hdmarx->XferErrorCallback = UART_DMAError;
1466 
1467  /* Set the DMA abort callback */
1468  huart->hdmarx->XferAbortCallback = NULL;
1469 
1470  /* Enable the DMA channel */
1471  if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
1472  {
1473  /* Set error code to DMA */
1474  huart->ErrorCode = HAL_UART_ERROR_DMA;
1475 
1476  __HAL_UNLOCK(huart);
1477 
1478  /* Restore huart->gState to ready */
1479  huart->gState = HAL_UART_STATE_READY;
1480 
1481  return HAL_ERROR;
1482  }
1483  }
1484  __HAL_UNLOCK(huart);
1485 
1486  /* Enable the UART Parity Error Interrupt */
1487  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1488 
1489  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1490  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1491 
1492  /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1493  in the UART CR3 register */
1494  SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1495 
1496  return HAL_OK;
1497  }
1498  else
1499  {
1500  return HAL_BUSY;
1501  }
1502 }
1503 
1509 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1510 {
1511  const HAL_UART_StateTypeDef gstate = huart->gState;
1512  const HAL_UART_StateTypeDef rxstate = huart->RxState;
1513 
1514  __HAL_LOCK(huart);
1515 
1516  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1517  (gstate == HAL_UART_STATE_BUSY_TX))
1518  {
1519  /* Disable the UART DMA Tx request */
1520  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1521  }
1522  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1523  (rxstate == HAL_UART_STATE_BUSY_RX))
1524  {
1525  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1526  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1527  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1528 
1529  /* Disable the UART DMA Rx request */
1530  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1531  }
1532 
1533  __HAL_UNLOCK(huart);
1534 
1535  return HAL_OK;
1536 }
1537 
1543 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1544 {
1545  __HAL_LOCK(huart);
1546 
1547  if (huart->gState == HAL_UART_STATE_BUSY_TX)
1548  {
1549  /* Enable the UART DMA Tx request */
1550  SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1551  }
1552  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1553  {
1554  /* Clear the Overrun flag before resuming the Rx transfer */
1555  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1556 
1557  /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1558  SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1559  SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1560 
1561  /* Enable the UART DMA Rx request */
1562  SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1563  }
1564 
1565  __HAL_UNLOCK(huart);
1566 
1567  return HAL_OK;
1568 }
1569 
1575 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1576 {
1577  /* The Lock is not implemented on this API to allow the user application
1578  to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1579  HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1580  indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1581  interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1582  the stream and the corresponding call back is executed. */
1583 
1584  const HAL_UART_StateTypeDef gstate = huart->gState;
1585  const HAL_UART_StateTypeDef rxstate = huart->RxState;
1586 
1587  /* Stop UART DMA Tx request if ongoing */
1588  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1589  (gstate == HAL_UART_STATE_BUSY_TX))
1590  {
1591  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1592 
1593  /* Abort the UART DMA Tx channel */
1594  if (huart->hdmatx != NULL)
1595  {
1596  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1597  {
1598  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1599  {
1600  /* Set error code to DMA */
1601  huart->ErrorCode = HAL_UART_ERROR_DMA;
1602 
1603  return HAL_TIMEOUT;
1604  }
1605  }
1606  }
1607 
1608  UART_EndTxTransfer(huart);
1609  }
1610 
1611  /* Stop UART DMA Rx request if ongoing */
1612  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1613  (rxstate == HAL_UART_STATE_BUSY_RX))
1614  {
1615  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1616 
1617  /* Abort the UART DMA Rx channel */
1618  if (huart->hdmarx != NULL)
1619  {
1620  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1621  {
1622  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1623  {
1624  /* Set error code to DMA */
1625  huart->ErrorCode = HAL_UART_ERROR_DMA;
1626 
1627  return HAL_TIMEOUT;
1628  }
1629  }
1630  }
1631 
1632  UART_EndRxTransfer(huart);
1633  }
1634 
1635  return HAL_OK;
1636 }
1637 
1650 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1651 {
1652  /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1653  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1654  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1655 
1656  /* Disable the UART DMA Tx request if enabled */
1657  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1658  {
1659  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1660 
1661  /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1662  if (huart->hdmatx != NULL)
1663  {
1664  /* Set the UART DMA Abort callback to Null.
1665  No call back execution at end of DMA abort procedure */
1666  huart->hdmatx->XferAbortCallback = NULL;
1667 
1668  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1669  {
1670  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1671  {
1672  /* Set error code to DMA */
1673  huart->ErrorCode = HAL_UART_ERROR_DMA;
1674 
1675  return HAL_TIMEOUT;
1676  }
1677  }
1678  }
1679  }
1680 
1681  /* Disable the UART DMA Rx request if enabled */
1682  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1683  {
1684  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1685 
1686  /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1687  if (huart->hdmarx != NULL)
1688  {
1689  /* Set the UART DMA Abort callback to Null.
1690  No call back execution at end of DMA abort procedure */
1691  huart->hdmarx->XferAbortCallback = NULL;
1692 
1693  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1694  {
1695  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1696  {
1697  /* Set error code to DMA */
1698  huart->ErrorCode = HAL_UART_ERROR_DMA;
1699 
1700  return HAL_TIMEOUT;
1701  }
1702  }
1703  }
1704  }
1705 
1706  /* Reset Tx and Rx transfer counters */
1707  huart->TxXferCount = 0U;
1708  huart->RxXferCount = 0U;
1709 
1710  /* Clear the Error flags in the ICR register */
1711  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1712 
1713  /* Flush the whole TX FIFO (if needed) */
1714  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1715  {
1716  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1717  }
1718 
1719  /* Discard the received data */
1720  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1721 
1722  /* Restore huart->gState and huart->RxState to Ready */
1723  huart->gState = HAL_UART_STATE_READY;
1724  huart->RxState = HAL_UART_STATE_READY;
1725 
1726  huart->ErrorCode = HAL_UART_ERROR_NONE;
1727 
1728  return HAL_OK;
1729 }
1730 
1743 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1744 {
1745  /* Disable TCIE, TXEIE and TXFTIE interrupts */
1746  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1747  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1748 
1749  /* Disable the UART DMA Tx request if enabled */
1750  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1751  {
1752  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1753 
1754  /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1755  if (huart->hdmatx != NULL)
1756  {
1757  /* Set the UART DMA Abort callback to Null.
1758  No call back execution at end of DMA abort procedure */
1759  huart->hdmatx->XferAbortCallback = NULL;
1760 
1761  if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1762  {
1763  if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1764  {
1765  /* Set error code to DMA */
1766  huart->ErrorCode = HAL_UART_ERROR_DMA;
1767 
1768  return HAL_TIMEOUT;
1769  }
1770  }
1771  }
1772  }
1773 
1774  /* Reset Tx transfer counter */
1775  huart->TxXferCount = 0U;
1776 
1777  /* Flush the whole TX FIFO (if needed) */
1778  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1779  {
1780  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1781  }
1782 
1783  /* Restore huart->gState to Ready */
1784  huart->gState = HAL_UART_STATE_READY;
1785 
1786  return HAL_OK;
1787 }
1788 
1801 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1802 {
1803  /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1804  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1805  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1806 
1807  /* Disable the UART DMA Rx request if enabled */
1808  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1809  {
1810  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1811 
1812  /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1813  if (huart->hdmarx != NULL)
1814  {
1815  /* Set the UART DMA Abort callback to Null.
1816  No call back execution at end of DMA abort procedure */
1817  huart->hdmarx->XferAbortCallback = NULL;
1818 
1819  if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1820  {
1821  if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1822  {
1823  /* Set error code to DMA */
1824  huart->ErrorCode = HAL_UART_ERROR_DMA;
1825 
1826  return HAL_TIMEOUT;
1827  }
1828  }
1829  }
1830  }
1831 
1832  /* Reset Rx transfer counter */
1833  huart->RxXferCount = 0U;
1834 
1835  /* Clear the Error flags in the ICR register */
1836  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1837 
1838  /* Discard the received data */
1839  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1840 
1841  /* Restore huart->RxState to Ready */
1842  huart->RxState = HAL_UART_STATE_READY;
1843 
1844  return HAL_OK;
1845 }
1846 
1861 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1862 {
1863  uint32_t abortcplt = 1U;
1864 
1865  /* Disable interrupts */
1866  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | USART_CR1_TXEIE_TXFNFIE));
1867  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1868 
1869  /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1870  before any call to DMA Abort functions */
1871  /* DMA Tx Handle is valid */
1872  if (huart->hdmatx != NULL)
1873  {
1874  /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1875  Otherwise, set it to NULL */
1876  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1877  {
1878  huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1879  }
1880  else
1881  {
1882  huart->hdmatx->XferAbortCallback = NULL;
1883  }
1884  }
1885  /* DMA Rx Handle is valid */
1886  if (huart->hdmarx != NULL)
1887  {
1888  /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
1889  Otherwise, set it to NULL */
1890  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1891  {
1892  huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
1893  }
1894  else
1895  {
1896  huart->hdmarx->XferAbortCallback = NULL;
1897  }
1898  }
1899 
1900  /* Disable the UART DMA Tx request if enabled */
1901  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1902  {
1903  /* Disable DMA Tx at UART level */
1904  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1905 
1906  /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
1907  if (huart->hdmatx != NULL)
1908  {
1909  /* UART Tx DMA Abort callback has already been initialised :
1910  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1911 
1912  /* Abort DMA TX */
1913  if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
1914  {
1915  huart->hdmatx->XferAbortCallback = NULL;
1916  }
1917  else
1918  {
1919  abortcplt = 0U;
1920  }
1921  }
1922  }
1923 
1924  /* Disable the UART DMA Rx request if enabled */
1925  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1926  {
1927  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1928 
1929  /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
1930  if (huart->hdmarx != NULL)
1931  {
1932  /* UART Rx DMA Abort callback has already been initialised :
1933  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1934 
1935  /* Abort DMA RX */
1936  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
1937  {
1938  huart->hdmarx->XferAbortCallback = NULL;
1939  abortcplt = 1U;
1940  }
1941  else
1942  {
1943  abortcplt = 0U;
1944  }
1945  }
1946  }
1947 
1948  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
1949  if (abortcplt == 1U)
1950  {
1951  /* Reset Tx and Rx transfer counters */
1952  huart->TxXferCount = 0U;
1953  huart->RxXferCount = 0U;
1954 
1955  /* Clear ISR function pointers */
1956  huart->RxISR = NULL;
1957  huart->TxISR = NULL;
1958 
1959  /* Reset errorCode */
1960  huart->ErrorCode = HAL_UART_ERROR_NONE;
1961 
1962  /* Clear the Error flags in the ICR register */
1963  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1964 
1965  /* Flush the whole TX FIFO (if needed) */
1966  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1967  {
1968  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1969  }
1970 
1971  /* Discard the received data */
1972  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1973 
1974  /* Restore huart->gState and huart->RxState to Ready */
1975  huart->gState = HAL_UART_STATE_READY;
1976  huart->RxState = HAL_UART_STATE_READY;
1977 
1978  /* As no DMA to be aborted, call directly user Abort complete callback */
1979 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1980  /* Call registered Abort complete callback */
1981  huart->AbortCpltCallback(huart);
1982 #else
1983  /* Call legacy weak Abort complete callback */
1984  HAL_UART_AbortCpltCallback(huart);
1985 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1986  }
1987 
1988  return HAL_OK;
1989 }
1990 
2005 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2006 {
2007  /* Disable interrupts */
2008  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2009  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2010 
2011  /* Disable the UART DMA Tx request if enabled */
2012  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2013  {
2014  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2015 
2016  /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2017  if (huart->hdmatx != NULL)
2018  {
2019  /* Set the UART DMA Abort callback :
2020  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2021  huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2022 
2023  /* Abort DMA TX */
2024  if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2025  {
2026  /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2027  huart->hdmatx->XferAbortCallback(huart->hdmatx);
2028  }
2029  }
2030  else
2031  {
2032  /* Reset Tx transfer counter */
2033  huart->TxXferCount = 0U;
2034 
2035  /* Clear TxISR function pointers */
2036  huart->TxISR = NULL;
2037 
2038  /* Restore huart->gState to Ready */
2039  huart->gState = HAL_UART_STATE_READY;
2040 
2041  /* As no DMA to be aborted, call directly user Abort complete callback */
2042 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2043  /* Call registered Abort Transmit Complete Callback */
2044  huart->AbortTransmitCpltCallback(huart);
2045 #else
2046  /* Call legacy weak Abort Transmit Complete Callback */
2047  HAL_UART_AbortTransmitCpltCallback(huart);
2048 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2049  }
2050  }
2051  else
2052  {
2053  /* Reset Tx transfer counter */
2054  huart->TxXferCount = 0U;
2055 
2056  /* Clear TxISR function pointers */
2057  huart->TxISR = NULL;
2058 
2059  /* Flush the whole TX FIFO (if needed) */
2060  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2061  {
2062  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2063  }
2064 
2065  /* Restore huart->gState to Ready */
2066  huart->gState = HAL_UART_STATE_READY;
2067 
2068  /* As no DMA to be aborted, call directly user Abort complete callback */
2069 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2070  /* Call registered Abort Transmit Complete Callback */
2071  huart->AbortTransmitCpltCallback(huart);
2072 #else
2073  /* Call legacy weak Abort Transmit Complete Callback */
2074  HAL_UART_AbortTransmitCpltCallback(huart);
2075 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2076  }
2077 
2078  return HAL_OK;
2079 }
2080 
2095 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2096 {
2097  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2098  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2099  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2100 
2101  /* Disable the UART DMA Rx request if enabled */
2102  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2103  {
2104  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2105 
2106  /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2107  if (huart->hdmarx != NULL)
2108  {
2109  /* Set the UART DMA Abort callback :
2110  will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2111  huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2112 
2113  /* Abort DMA RX */
2114  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2115  {
2116  /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2117  huart->hdmarx->XferAbortCallback(huart->hdmarx);
2118  }
2119  }
2120  else
2121  {
2122  /* Reset Rx transfer counter */
2123  huart->RxXferCount = 0U;
2124 
2125  /* Clear RxISR function pointer */
2126  huart->pRxBuffPtr = NULL;
2127 
2128  /* Clear the Error flags in the ICR register */
2129  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2130 
2131  /* Discard the received data */
2132  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2133 
2134  /* Restore huart->RxState to Ready */
2135  huart->RxState = HAL_UART_STATE_READY;
2136 
2137  /* As no DMA to be aborted, call directly user Abort complete callback */
2138 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2139  /* Call registered Abort Receive Complete Callback */
2140  huart->AbortReceiveCpltCallback(huart);
2141 #else
2142  /* Call legacy weak Abort Receive Complete Callback */
2143  HAL_UART_AbortReceiveCpltCallback(huart);
2144 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2145  }
2146  }
2147  else
2148  {
2149  /* Reset Rx transfer counter */
2150  huart->RxXferCount = 0U;
2151 
2152  /* Clear RxISR function pointer */
2153  huart->pRxBuffPtr = NULL;
2154 
2155  /* Clear the Error flags in the ICR register */
2156  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2157 
2158  /* Restore huart->RxState to Ready */
2159  huart->RxState = HAL_UART_STATE_READY;
2160 
2161  /* As no DMA to be aborted, call directly user Abort complete callback */
2162 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2163  /* Call registered Abort Receive Complete Callback */
2164  huart->AbortReceiveCpltCallback(huart);
2165 #else
2166  /* Call legacy weak Abort Receive Complete Callback */
2167  HAL_UART_AbortReceiveCpltCallback(huart);
2168 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2169  }
2170 
2171  return HAL_OK;
2172 }
2173 
2179 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2180 {
2181  uint32_t isrflags = READ_REG(huart->Instance->ISR);
2182  uint32_t cr1its = READ_REG(huart->Instance->CR1);
2183  uint32_t cr3its = READ_REG(huart->Instance->CR3);
2184 
2185  uint32_t errorflags;
2186  uint32_t errorcode;
2187 
2188  /* If no error occurs */
2189  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2190  if (errorflags == 0U)
2191  {
2192  /* UART in mode Receiver ---------------------------------------------------*/
2193  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2194  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2195  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2196  {
2197  if (huart->RxISR != NULL)
2198  {
2199  huart->RxISR(huart);
2200  }
2201  return;
2202  }
2203  }
2204 
2205  /* If some errors occur */
2206  if ((errorflags != 0U)
2207  && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2208  || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2209  {
2210  /* UART parity error interrupt occurred -------------------------------------*/
2211  if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2212  {
2213  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2214 
2215  huart->ErrorCode |= HAL_UART_ERROR_PE;
2216  }
2217 
2218  /* UART frame error interrupt occurred --------------------------------------*/
2219  if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2220  {
2221  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2222 
2223  huart->ErrorCode |= HAL_UART_ERROR_FE;
2224  }
2225 
2226  /* UART noise error interrupt occurred --------------------------------------*/
2227  if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2228  {
2229  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2230 
2231  huart->ErrorCode |= HAL_UART_ERROR_NE;
2232  }
2233 
2234  /* UART Over-Run interrupt occurred -----------------------------------------*/
2235  if (((isrflags & USART_ISR_ORE) != 0U)
2236  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2237  ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2238  {
2239  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2240 
2241  huart->ErrorCode |= HAL_UART_ERROR_ORE;
2242  }
2243 
2244  /* UART Receiver Timeout interrupt occurred ---------------------------------*/
2245  if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2246  {
2247  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2248 
2249  huart->ErrorCode |= HAL_UART_ERROR_RTO;
2250  }
2251 
2252  /* Call UART Error Call back function if need be ----------------------------*/
2253  if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2254  {
2255  /* UART in mode Receiver --------------------------------------------------*/
2256  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2257  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2258  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2259  {
2260  if (huart->RxISR != NULL)
2261  {
2262  huart->RxISR(huart);
2263  }
2264  }
2265 
2266  /* If Error is to be considered as blocking :
2267  - Receiver Timeout error in Reception
2268  - Overrun error in Reception
2269  - any error occurs in DMA mode reception
2270  */
2271  errorcode = huart->ErrorCode;
2272  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2273  ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2274  {
2275  /* Blocking error : transfer is aborted
2276  Set the UART state ready to be able to start again the process,
2277  Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2278  UART_EndRxTransfer(huart);
2279 
2280  /* Disable the UART DMA Rx request if enabled */
2281  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2282  {
2283  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2284 
2285  /* Abort the UART DMA Rx channel */
2286  if (huart->hdmarx != NULL)
2287  {
2288  /* Set the UART DMA Abort callback :
2289  will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2290  huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2291 
2292  /* Abort DMA RX */
2293  if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2294  {
2295  /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2296  huart->hdmarx->XferAbortCallback(huart->hdmarx);
2297  }
2298  }
2299  else
2300  {
2301  /* Call user error callback */
2302 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2303  /*Call registered error callback*/
2304  huart->ErrorCallback(huart);
2305 #else
2306  /*Call legacy weak error callback*/
2307  HAL_UART_ErrorCallback(huart);
2308 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2309 
2310  }
2311  }
2312  else
2313  {
2314  /* Call user error callback */
2315 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2316  /*Call registered error callback*/
2317  huart->ErrorCallback(huart);
2318 #else
2319  /*Call legacy weak error callback*/
2320  HAL_UART_ErrorCallback(huart);
2321 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2322  }
2323  }
2324  else
2325  {
2326  /* Non Blocking error : transfer could go on.
2327  Error is notified to user through user error callback */
2328 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2329  /*Call registered error callback*/
2330  huart->ErrorCallback(huart);
2331 #else
2332  /*Call legacy weak error callback*/
2333  HAL_UART_ErrorCallback(huart);
2334 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2335  huart->ErrorCode = HAL_UART_ERROR_NONE;
2336  }
2337  }
2338  return;
2339 
2340  } /* End if some error occurs */
2341 
2342  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2343  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2344  {
2345  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2346 
2347  /* UART Rx state is not reset as a reception process might be ongoing.
2348  If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2349 
2350 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2351  /* Call registered Wakeup Callback */
2352  huart->WakeupCallback(huart);
2353 #else
2354  /* Call legacy weak Wakeup Callback */
2355  HAL_UARTEx_WakeupCallback(huart);
2356 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2357  return;
2358  }
2359 
2360  /* UART in mode Transmitter ------------------------------------------------*/
2361  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2362  && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2363  || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2364  {
2365  if (huart->TxISR != NULL)
2366  {
2367  huart->TxISR(huart);
2368  }
2369  return;
2370  }
2371 
2372  /* UART in mode Transmitter (transmission end) -----------------------------*/
2373  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2374  {
2375  UART_EndTransmit_IT(huart);
2376  return;
2377  }
2378 
2379  /* UART TX Fifo Empty occurred ----------------------------------------------*/
2380  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2381  {
2382 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2383  /* Call registered Tx Fifo Empty Callback */
2384  huart->TxFifoEmptyCallback(huart);
2385 #else
2386  /* Call legacy weak Tx Fifo Empty Callback */
2387  HAL_UARTEx_TxFifoEmptyCallback(huart);
2388 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2389  return;
2390  }
2391 
2392  /* UART RX Fifo Full occurred ----------------------------------------------*/
2393  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2394  {
2395 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2396  /* Call registered Rx Fifo Full Callback */
2397  huart->RxFifoFullCallback(huart);
2398 #else
2399  /* Call legacy weak Rx Fifo Full Callback */
2400  HAL_UARTEx_RxFifoFullCallback(huart);
2401 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2402  return;
2403  }
2404 }
2405 
2411 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2412 {
2413  /* Prevent unused argument(s) compilation warning */
2414  UNUSED(huart);
2415 
2416  /* NOTE : This function should not be modified, when the callback is needed,
2417  the HAL_UART_TxCpltCallback can be implemented in the user file.
2418  */
2419 }
2420 
2426 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2427 {
2428  /* Prevent unused argument(s) compilation warning */
2429  UNUSED(huart);
2430 
2431  /* NOTE: This function should not be modified, when the callback is needed,
2432  the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2433  */
2434 }
2435 
2441 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2442 {
2443  /* Prevent unused argument(s) compilation warning */
2444  UNUSED(huart);
2445 
2446  /* NOTE : This function should not be modified, when the callback is needed,
2447  the HAL_UART_RxCpltCallback can be implemented in the user file.
2448  */
2449 }
2450 
2456 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2457 {
2458  /* Prevent unused argument(s) compilation warning */
2459  UNUSED(huart);
2460 
2461  /* NOTE: This function should not be modified, when the callback is needed,
2462  the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2463  */
2464 }
2465 
2471 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2472 {
2473  /* Prevent unused argument(s) compilation warning */
2474  UNUSED(huart);
2475 
2476  /* NOTE : This function should not be modified, when the callback is needed,
2477  the HAL_UART_ErrorCallback can be implemented in the user file.
2478  */
2479 }
2480 
2486 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2487 {
2488  /* Prevent unused argument(s) compilation warning */
2489  UNUSED(huart);
2490 
2491  /* NOTE : This function should not be modified, when the callback is needed,
2492  the HAL_UART_AbortCpltCallback can be implemented in the user file.
2493  */
2494 }
2495 
2501 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2502 {
2503  /* Prevent unused argument(s) compilation warning */
2504  UNUSED(huart);
2505 
2506  /* NOTE : This function should not be modified, when the callback is needed,
2507  the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2508  */
2509 }
2510 
2516 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2517 {
2518  /* Prevent unused argument(s) compilation warning */
2519  UNUSED(huart);
2520 
2521  /* NOTE : This function should not be modified, when the callback is needed,
2522  the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2523  */
2524 }
2525 
2563 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2564 {
2565  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2566  {
2567  assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2568  MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2569  }
2570 }
2571 
2578 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2579 {
2580  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2581  {
2582  if (huart->gState == HAL_UART_STATE_READY)
2583  {
2584  /* Process Locked */
2585  __HAL_LOCK(huart);
2586 
2587  huart->gState = HAL_UART_STATE_BUSY;
2588 
2589  /* Set the USART RTOEN bit */
2590  SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2591 
2592  huart->gState = HAL_UART_STATE_READY;
2593 
2594  /* Process Unlocked */
2595  __HAL_UNLOCK(huart);
2596 
2597  return HAL_OK;
2598  }
2599  else
2600  {
2601  return HAL_BUSY;
2602  }
2603  }
2604  else
2605  {
2606  return HAL_ERROR;
2607  }
2608 }
2609 
2616 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2617 {
2618  if (!(IS_LPUART_INSTANCE(huart->Instance)))
2619  {
2620  if (huart->gState == HAL_UART_STATE_READY)
2621  {
2622  /* Process Locked */
2623  __HAL_LOCK(huart);
2624 
2625  huart->gState = HAL_UART_STATE_BUSY;
2626 
2627  /* Clear the USART RTOEN bit */
2628  CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2629 
2630  huart->gState = HAL_UART_STATE_READY;
2631 
2632  /* Process Unlocked */
2633  __HAL_UNLOCK(huart);
2634 
2635  return HAL_OK;
2636  }
2637  else
2638  {
2639  return HAL_BUSY;
2640  }
2641  }
2642  else
2643  {
2644  return HAL_ERROR;
2645  }
2646 }
2647 
2654 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2655 {
2656  __HAL_LOCK(huart);
2657 
2658  huart->gState = HAL_UART_STATE_BUSY;
2659 
2660  /* Enable USART mute mode by setting the MME bit in the CR1 register */
2661  SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2662 
2663  huart->gState = HAL_UART_STATE_READY;
2664 
2665  return (UART_CheckIdleState(huart));
2666 }
2667 
2674 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2675 {
2676  __HAL_LOCK(huart);
2677 
2678  huart->gState = HAL_UART_STATE_BUSY;
2679 
2680  /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2681  CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2682 
2683  huart->gState = HAL_UART_STATE_READY;
2684 
2685  return (UART_CheckIdleState(huart));
2686 }
2687 
2694 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2695 {
2696  __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2697 }
2698 
2704 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2705 {
2706  __HAL_LOCK(huart);
2707  huart->gState = HAL_UART_STATE_BUSY;
2708 
2709  /* Clear TE and RE bits */
2710  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2711 
2712  /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2713  SET_BIT(huart->Instance->CR1, USART_CR1_TE);
2714 
2715  huart->gState = HAL_UART_STATE_READY;
2716 
2717  __HAL_UNLOCK(huart);
2718 
2719  return HAL_OK;
2720 }
2721 
2727 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
2728 {
2729  __HAL_LOCK(huart);
2730  huart->gState = HAL_UART_STATE_BUSY;
2731 
2732  /* Clear TE and RE bits */
2733  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2734 
2735  /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
2736  SET_BIT(huart->Instance->CR1, USART_CR1_RE);
2737 
2738  huart->gState = HAL_UART_STATE_READY;
2739 
2740  __HAL_UNLOCK(huart);
2741 
2742  return HAL_OK;
2743 }
2744 
2745 
2751 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
2752 {
2753  /* Check the parameters */
2754  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
2755 
2756  __HAL_LOCK(huart);
2757 
2758  huart->gState = HAL_UART_STATE_BUSY;
2759 
2760  /* Send break characters */
2761  __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
2762 
2763  huart->gState = HAL_UART_STATE_READY;
2764 
2765  __HAL_UNLOCK(huart);
2766 
2767  return HAL_OK;
2768 }
2769 
2796 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
2797 {
2798  uint32_t temp1;
2799  uint32_t temp2;
2800  temp1 = huart->gState;
2801  temp2 = huart->RxState;
2802 
2803  return (HAL_UART_StateTypeDef)(temp1 | temp2);
2804 }
2805 
2812 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
2813 {
2814  return huart->ErrorCode;
2815 }
2833 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2834 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2835 {
2836  /* Init the UART Callback settings */
2837  huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2838  huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2839  huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2840  huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2841  huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
2842  huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2843  huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
2844  huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
2845  huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
2846  huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
2847  huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
2848 
2849 }
2850 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2851 
2857 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
2858 {
2859  uint32_t tmpreg;
2860  uint16_t brrtemp;
2861  UART_ClockSourceTypeDef clocksource;
2862  uint32_t usartdiv;
2863  HAL_StatusTypeDef ret = HAL_OK;
2864  uint32_t lpuart_ker_ck_pres;
2865  PLL2_ClocksTypeDef pll2_clocks;
2866  PLL3_ClocksTypeDef pll3_clocks;
2867  uint32_t pclk;
2868 
2869  /* Check the parameters */
2870  assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
2871  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
2872  if (UART_INSTANCE_LOWPOWER(huart))
2873  {
2874  assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
2875  }
2876  else
2877  {
2878  assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
2879  assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
2880  }
2881 
2882  assert_param(IS_UART_PARITY(huart->Init.Parity));
2883  assert_param(IS_UART_MODE(huart->Init.Mode));
2884  assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
2885  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
2886  assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
2887 
2888  /*-------------------------- USART CR1 Configuration -----------------------*/
2889  /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
2890  * the UART Word Length, Parity, Mode and oversampling:
2891  * set the M bits according to huart->Init.WordLength value
2892  * set PCE and PS bits according to huart->Init.Parity value
2893  * set TE and RE bits according to huart->Init.Mode value
2894  * set OVER8 bit according to huart->Init.OverSampling value */
2895  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
2896  tmpreg |= (uint32_t)huart->FifoMode;
2897  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
2898 
2899  /*-------------------------- USART CR2 Configuration -----------------------*/
2900  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
2901  * to huart->Init.StopBits value */
2902  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
2903 
2904  /*-------------------------- USART CR3 Configuration -----------------------*/
2905  /* Configure
2906  * - UART HardWare Flow Control: set CTSE and RTSE bits according
2907  * to huart->Init.HwFlowCtl value
2908  * - one-bit sampling method versus three samples' majority rule according
2909  * to huart->Init.OneBitSampling (not applicable to LPUART) */
2910  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
2911 
2912  if (!(UART_INSTANCE_LOWPOWER(huart)))
2913  {
2914  tmpreg |= huart->Init.OneBitSampling;
2915  }
2916  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
2917 
2918  /*-------------------------- USART PRESC Configuration -----------------------*/
2919  /* Configure
2920  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
2921  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
2922 
2923  /*-------------------------- USART BRR Configuration -----------------------*/
2924  UART_GETCLOCKSOURCE(huart, clocksource);
2925 
2926  /* Check LPUART instance */
2927  if (UART_INSTANCE_LOWPOWER(huart))
2928  {
2929  /* Retrieve frequency clock */
2930  switch (clocksource)
2931  {
2932  case UART_CLOCKSOURCE_D3PCLK1:
2933  pclk = HAL_RCCEx_GetD3PCLK1Freq();
2934  break;
2935  case UART_CLOCKSOURCE_PLL2:
2936  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
2937  pclk = pll2_clocks.PLL2_Q_Frequency;
2938  break;
2939  case UART_CLOCKSOURCE_PLL3:
2940  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
2941  pclk = pll3_clocks.PLL3_Q_Frequency;
2942  break;
2943  case UART_CLOCKSOURCE_HSI:
2944  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
2945  {
2946  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
2947  }
2948  else
2949  {
2950  pclk = (uint32_t) HSI_VALUE;
2951  }
2952  break;
2953  case UART_CLOCKSOURCE_CSI:
2954  pclk = (uint32_t) CSI_VALUE;
2955  break;
2956  case UART_CLOCKSOURCE_LSE:
2957  pclk = (uint32_t) LSE_VALUE;
2958  break;
2959  default:
2960  pclk = 0U;
2961  ret = HAL_ERROR;
2962  break;
2963  }
2964 
2965  /* If proper clock source reported */
2966  if (pclk != 0U)
2967  {
2968  /* Compute clock after Prescaler */
2969  lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
2970 
2971  /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
2972  if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
2973  (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
2974  {
2975  ret = HAL_ERROR;
2976  }
2977  else
2978  {
2979  /* Check computed UsartDiv value is in allocated range
2980  (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
2981  usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, (uint64_t)huart->Init.BaudRate, huart->Init.ClockPrescaler));
2982  if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
2983  {
2984  huart->Instance->BRR = usartdiv;
2985  }
2986  else
2987  {
2988  ret = HAL_ERROR;
2989  }
2990  } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
2991  } /* if (pclk != 0) */
2992  }
2993  /* Check UART Over Sampling to set Baud Rate Register */
2994  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
2995  {
2996  switch (clocksource)
2997  {
2998  case UART_CLOCKSOURCE_D2PCLK1:
2999  pclk = HAL_RCC_GetPCLK1Freq();
3000  break;
3001  case UART_CLOCKSOURCE_D2PCLK2:
3002  pclk = HAL_RCC_GetPCLK2Freq();
3003  break;
3004  case UART_CLOCKSOURCE_PLL2:
3005  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3006  pclk = pll2_clocks.PLL2_Q_Frequency;
3007  break;
3008  case UART_CLOCKSOURCE_PLL3:
3009  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3010  pclk = pll3_clocks.PLL3_Q_Frequency;
3011  break;
3012  case UART_CLOCKSOURCE_HSI:
3013  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3014  {
3015  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3016  }
3017  else
3018  {
3019  pclk = (uint32_t) HSI_VALUE;
3020  }
3021  break;
3022  case UART_CLOCKSOURCE_CSI:
3023  pclk = (uint32_t) CSI_VALUE;
3024  break;
3025  case UART_CLOCKSOURCE_LSE:
3026  pclk = (uint32_t) LSE_VALUE;
3027  break;
3028  default:
3029  pclk = 0U;
3030  ret = HAL_ERROR;
3031  break;
3032  }
3033 
3034  /* USARTDIV must be greater than or equal to 0d16 */
3035  if (pclk != 0U)
3036  {
3037  usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3038  if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3039  {
3040  brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3041  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3042  huart->Instance->BRR = brrtemp;
3043  }
3044  else
3045  {
3046  ret = HAL_ERROR;
3047  }
3048  }
3049  }
3050  else
3051  {
3052  switch (clocksource)
3053  {
3054  case UART_CLOCKSOURCE_D2PCLK1:
3055  pclk = HAL_RCC_GetPCLK1Freq();
3056  break;
3057  case UART_CLOCKSOURCE_D2PCLK2:
3058  pclk = HAL_RCC_GetPCLK2Freq();
3059  break;
3060  case UART_CLOCKSOURCE_PLL2:
3061  HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
3062  pclk = pll2_clocks.PLL2_Q_Frequency;
3063  break;
3064  case UART_CLOCKSOURCE_PLL3:
3065  HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
3066  pclk = pll3_clocks.PLL3_Q_Frequency;
3067  break;
3068  case UART_CLOCKSOURCE_HSI:
3069  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
3070  {
3071  pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
3072  }
3073  else
3074  {
3075  pclk = (uint32_t) HSI_VALUE;
3076  }
3077  break;
3078  case UART_CLOCKSOURCE_CSI:
3079  pclk = (uint32_t) CSI_VALUE;
3080  break;
3081  case UART_CLOCKSOURCE_LSE:
3082  pclk = (uint32_t) LSE_VALUE;
3083  break;
3084  default:
3085  pclk = 0U;
3086  ret = HAL_ERROR;
3087  break;
3088  }
3089 
3090  if (pclk != 0U)
3091  {
3092  /* USARTDIV must be greater than or equal to 0d16 */
3093  usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3094  if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3095  {
3096  huart->Instance->BRR = usartdiv;
3097  }
3098  else
3099  {
3100  ret = HAL_ERROR;
3101  }
3102  }
3103  }
3104 
3105  /* Initialize the number of data to process during RX/TX ISR execution */
3106  huart->NbTxDataToProcess = 1;
3107  huart->NbRxDataToProcess = 1;
3108 
3109  /* Clear ISR function pointers */
3110  huart->RxISR = NULL;
3111  huart->TxISR = NULL;
3112 
3113  return ret;
3114 }
3115 
3121 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3122 {
3123  /* Check whether the set of advanced features to configure is properly set */
3124  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3125 
3126  /* if required, configure TX pin active level inversion */
3127  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3128  {
3129  assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3130  MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3131  }
3132 
3133  /* if required, configure RX pin active level inversion */
3134  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3135  {
3136  assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3137  MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3138  }
3139 
3140  /* if required, configure data inversion */
3141  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3142  {
3143  assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3144  MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3145  }
3146 
3147  /* if required, configure RX/TX pins swap */
3148  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3149  {
3150  assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3151  MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3152  }
3153 
3154  /* if required, configure RX overrun detection disabling */
3155  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3156  {
3157  assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3158  MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3159  }
3160 
3161  /* if required, configure DMA disabling on reception error */
3162  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3163  {
3164  assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3165  MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3166  }
3167 
3168  /* if required, configure auto Baud rate detection scheme */
3169  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3170  {
3171  assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3172  assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3173  MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3174  /* set auto Baudrate detection parameters if detection is enabled */
3175  if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3176  {
3177  assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3178  MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3179  }
3180  }
3181 
3182  /* if required, configure MSB first on communication line */
3183  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3184  {
3185  assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3186  MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3187  }
3188 }
3189 
3195 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3196 {
3197  uint32_t tickstart;
3198 
3199  /* Initialize the UART ErrorCode */
3200  huart->ErrorCode = HAL_UART_ERROR_NONE;
3201 
3202  /* Init tickstart for timeout managment*/
3203  tickstart = HAL_GetTick();
3204 
3205  /* Check if the Transmitter is enabled */
3206  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3207  {
3208  /* Wait until TEACK flag is set */
3209  if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3210  {
3211  /* Timeout occurred */
3212  return HAL_TIMEOUT;
3213  }
3214  }
3215 
3216  /* Check if the Receiver is enabled */
3217  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3218  {
3219  /* Wait until REACK flag is set */
3220  if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3221  {
3222  /* Timeout occurred */
3223  return HAL_TIMEOUT;
3224  }
3225  }
3226 
3227  /* Initialize the UART State */
3228  huart->gState = HAL_UART_STATE_READY;
3229  huart->RxState = HAL_UART_STATE_READY;
3230 
3231  __HAL_UNLOCK(huart);
3232 
3233  return HAL_OK;
3234 }
3235 
3245 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3246  uint32_t Tickstart, uint32_t Timeout)
3247 {
3248  /* Wait until flag is set */
3249  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3250  {
3251  /* Check for the Timeout */
3252  if (Timeout != HAL_MAX_DELAY)
3253  {
3254  if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3255  {
3256  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
3257  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3258  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3259 
3260  huart->gState = HAL_UART_STATE_READY;
3261  huart->RxState = HAL_UART_STATE_READY;
3262 
3263  __HAL_UNLOCK(huart);
3264 
3265  return HAL_TIMEOUT;
3266  }
3267 
3268  if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
3269  {
3270  if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3271  {
3272  /* Clear Receiver Timeout flag*/
3273  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3274 
3275  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
3276  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3277  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3278 
3279  huart->gState = HAL_UART_STATE_READY;
3280  huart->RxState = HAL_UART_STATE_READY;
3281  huart->ErrorCode = HAL_UART_ERROR_RTO;
3282 
3283  /* Process Unlocked */
3284  __HAL_UNLOCK(huart);
3285 
3286  return HAL_TIMEOUT;
3287  }
3288  }
3289  }
3290  }
3291  return HAL_OK;
3292 }
3293 
3294 
3300 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3301 {
3302  /* Disable TXEIE, TCIE, TXFT interrupts */
3303  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3304  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3305 
3306  /* At end of Tx process, restore huart->gState to Ready */
3307  huart->gState = HAL_UART_STATE_READY;
3308 }
3309 
3310 
3316 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3317 {
3318  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3319  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3320  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3321 
3322  /* At end of Rx process, restore huart->RxState to Ready */
3323  huart->RxState = HAL_UART_STATE_READY;
3324 
3325  /* Reset RxIsr function pointer */
3326  huart->RxISR = NULL;
3327 }
3328 
3329 
3335 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3336 {
3337  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3338 
3339  /* DMA Normal mode */
3340  if (hdma->Init.Mode != DMA_CIRCULAR)
3341  {
3342  huart->TxXferCount = 0U;
3343 
3344  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3345  in the UART CR3 register */
3346  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3347 
3348  /* Enable the UART Transmit Complete Interrupt */
3349  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3350  }
3351  /* DMA Circular mode */
3352  else
3353  {
3354 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3355  /*Call registered Tx complete callback*/
3356  huart->TxCpltCallback(huart);
3357 #else
3358  /*Call legacy weak Tx complete callback*/
3359  HAL_UART_TxCpltCallback(huart);
3360 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3361  }
3362 }
3363 
3369 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3370 {
3371  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3372 
3373 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3374  /*Call registered Tx Half complete callback*/
3375  huart->TxHalfCpltCallback(huart);
3376 #else
3377  /*Call legacy weak Tx Half complete callback*/
3378  HAL_UART_TxHalfCpltCallback(huart);
3379 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3380 }
3381 
3387 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3388 {
3389  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3390 
3391  /* DMA Normal mode */
3392  if (hdma->Init.Mode != DMA_CIRCULAR)
3393  {
3394  huart->RxXferCount = 0U;
3395 
3396  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3397  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3398  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3399 
3400  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3401  in the UART CR3 register */
3402  CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3403 
3404  /* At end of Rx process, restore huart->RxState to Ready */
3405  huart->RxState = HAL_UART_STATE_READY;
3406  }
3407 
3408 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3409  /*Call registered Rx complete callback*/
3410  huart->RxCpltCallback(huart);
3411 #else
3412  /*Call legacy weak Rx complete callback*/
3413  HAL_UART_RxCpltCallback(huart);
3414 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3415 }
3416 
3422 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3423 {
3424  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3425 
3426 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3427  /*Call registered Rx Half complete callback*/
3428  huart->RxHalfCpltCallback(huart);
3429 #else
3430  /*Call legacy weak Rx Half complete callback*/
3431  HAL_UART_RxHalfCpltCallback(huart);
3432 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3433 }
3434 
3440 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3441 {
3442  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3443 
3444  const HAL_UART_StateTypeDef gstate = huart->gState;
3445  const HAL_UART_StateTypeDef rxstate = huart->RxState;
3446 
3447  /* Stop UART DMA Tx request if ongoing */
3448  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3449  (gstate == HAL_UART_STATE_BUSY_TX))
3450  {
3451  huart->TxXferCount = 0U;
3452  UART_EndTxTransfer(huart);
3453  }
3454 
3455  /* Stop UART DMA Rx request if ongoing */
3456  if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3457  (rxstate == HAL_UART_STATE_BUSY_RX))
3458  {
3459  huart->RxXferCount = 0U;
3460  UART_EndRxTransfer(huart);
3461  }
3462 
3463  huart->ErrorCode |= HAL_UART_ERROR_DMA;
3464 
3465 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3466  /*Call registered error callback*/
3467  huart->ErrorCallback(huart);
3468 #else
3469  /*Call legacy weak error callback*/
3470  HAL_UART_ErrorCallback(huart);
3471 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3472 }
3473 
3480 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3481 {
3482  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3483  huart->RxXferCount = 0U;
3484  huart->TxXferCount = 0U;
3485 
3486 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3487  /*Call registered error callback*/
3488  huart->ErrorCallback(huart);
3489 #else
3490  /*Call legacy weak error callback*/
3491  HAL_UART_ErrorCallback(huart);
3492 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3493 }
3494 
3503 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3504 {
3505  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3506 
3507  huart->hdmatx->XferAbortCallback = NULL;
3508 
3509  /* Check if an Abort process is still ongoing */
3510  if (huart->hdmarx != NULL)
3511  {
3512  if (huart->hdmarx->XferAbortCallback != NULL)
3513  {
3514  return;
3515  }
3516  }
3517 
3518  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3519  huart->TxXferCount = 0U;
3520  huart->RxXferCount = 0U;
3521 
3522  /* Reset errorCode */
3523  huart->ErrorCode = HAL_UART_ERROR_NONE;
3524 
3525  /* Clear the Error flags in the ICR register */
3526  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3527 
3528  /* Flush the whole TX FIFO (if needed) */
3529  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3530  {
3531  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3532  }
3533 
3534  /* Restore huart->gState and huart->RxState to Ready */
3535  huart->gState = HAL_UART_STATE_READY;
3536  huart->RxState = HAL_UART_STATE_READY;
3537 
3538  /* Call user Abort complete callback */
3539 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3540  /* Call registered Abort complete callback */
3541  huart->AbortCpltCallback(huart);
3542 #else
3543  /* Call legacy weak Abort complete callback */
3544  HAL_UART_AbortCpltCallback(huart);
3545 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3546 }
3547 
3548 
3557 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3558 {
3559  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3560 
3561  huart->hdmarx->XferAbortCallback = NULL;
3562 
3563  /* Check if an Abort process is still ongoing */
3564  if (huart->hdmatx != NULL)
3565  {
3566  if (huart->hdmatx->XferAbortCallback != NULL)
3567  {
3568  return;
3569  }
3570  }
3571 
3572  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3573  huart->TxXferCount = 0U;
3574  huart->RxXferCount = 0U;
3575 
3576  /* Reset errorCode */
3577  huart->ErrorCode = HAL_UART_ERROR_NONE;
3578 
3579  /* Clear the Error flags in the ICR register */
3580  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3581 
3582  /* Discard the received data */
3583  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3584 
3585  /* Restore huart->gState and huart->RxState to Ready */
3586  huart->gState = HAL_UART_STATE_READY;
3587  huart->RxState = HAL_UART_STATE_READY;
3588 
3589  /* Call user Abort complete callback */
3590 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3591  /* Call registered Abort complete callback */
3592  huart->AbortCpltCallback(huart);
3593 #else
3594  /* Call legacy weak Abort complete callback */
3595  HAL_UART_AbortCpltCallback(huart);
3596 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3597 }
3598 
3599 
3608 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3609 {
3610  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3611 
3612  huart->TxXferCount = 0U;
3613 
3614  /* Flush the whole TX FIFO (if needed) */
3615  if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3616  {
3617  __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3618  }
3619 
3620  /* Restore huart->gState to Ready */
3621  huart->gState = HAL_UART_STATE_READY;
3622 
3623  /* Call user Abort complete callback */
3624 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3625  /* Call registered Abort Transmit Complete Callback */
3626  huart->AbortTransmitCpltCallback(huart);
3627 #else
3628  /* Call legacy weak Abort Transmit Complete Callback */
3629  HAL_UART_AbortTransmitCpltCallback(huart);
3630 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3631 }
3632 
3641 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3642 {
3643  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3644 
3645  huart->RxXferCount = 0U;
3646 
3647  /* Clear the Error flags in the ICR register */
3648  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3649 
3650  /* Discard the received data */
3651  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3652 
3653  /* Restore huart->RxState to Ready */
3654  huart->RxState = HAL_UART_STATE_READY;
3655 
3656  /* Call user Abort complete callback */
3657 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3658  /* Call registered Abort Receive Complete Callback */
3659  huart->AbortReceiveCpltCallback(huart);
3660 #else
3661  /* Call legacy weak Abort Receive Complete Callback */
3662  HAL_UART_AbortReceiveCpltCallback(huart);
3663 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3664 }
3665 
3673 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
3674 {
3675  /* Check that a Tx process is ongoing */
3676  if (huart->gState == HAL_UART_STATE_BUSY_TX)
3677  {
3678  if (huart->TxXferCount == 0U)
3679  {
3680  /* Disable the UART Transmit Data Register Empty Interrupt */
3681  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3682 
3683  /* Enable the UART Transmit Complete Interrupt */
3684  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3685  }
3686  else
3687  {
3688  huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3689  huart->pTxBuffPtr++;
3690  huart->TxXferCount--;
3691  }
3692  }
3693 }
3694 
3702 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
3703 {
3704  uint16_t *tmp;
3705 
3706  /* Check that a Tx process is ongoing */
3707  if (huart->gState == HAL_UART_STATE_BUSY_TX)
3708  {
3709  if (huart->TxXferCount == 0U)
3710  {
3711  /* Disable the UART Transmit Data Register Empty Interrupt */
3712  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3713 
3714  /* Enable the UART Transmit Complete Interrupt */
3715  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3716  }
3717  else
3718  {
3719  tmp = (uint16_t *) huart->pTxBuffPtr;
3720  huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3721  huart->pTxBuffPtr += 2U;
3722  huart->TxXferCount--;
3723  }
3724  }
3725 }
3726 
3734 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
3735 {
3736  uint16_t nb_tx_data;
3737 
3738  /* Check that a Tx process is ongoing */
3739  if (huart->gState == HAL_UART_STATE_BUSY_TX)
3740  {
3741  for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3742  {
3743  if (huart->TxXferCount == 0U)
3744  {
3745  /* Disable the TX FIFO threshold interrupt */
3746  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3747 
3748  /* Enable the UART Transmit Complete Interrupt */
3749  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3750 
3751  break; /* force exit loop */
3752  }
3753  else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3754  {
3755  huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3756  huart->pTxBuffPtr++;
3757  huart->TxXferCount--;
3758  }
3759  else
3760  {
3761  /* Nothing to do */
3762  }
3763  }
3764  }
3765 }
3766 
3774 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
3775 {
3776  uint16_t *tmp;
3777  uint16_t nb_tx_data;
3778 
3779  /* Check that a Tx process is ongoing */
3780  if (huart->gState == HAL_UART_STATE_BUSY_TX)
3781  {
3782  for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3783  {
3784  if (huart->TxXferCount == 0U)
3785  {
3786  /* Disable the TX FIFO threshold interrupt */
3787  CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3788 
3789  /* Enable the UART Transmit Complete Interrupt */
3790  SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3791 
3792  break; /* force exit loop */
3793  }
3794  else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3795  {
3796  tmp = (uint16_t *) huart->pTxBuffPtr;
3797  huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3798  huart->pTxBuffPtr += 2U;
3799  huart->TxXferCount--;
3800  }
3801  else
3802  {
3803  /* Nothing to do */
3804  }
3805  }
3806  }
3807 }
3808 
3815 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
3816 {
3817  /* Disable the UART Transmit Complete Interrupt */
3818  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3819 
3820  /* Tx process is ended, restore huart->gState to Ready */
3821  huart->gState = HAL_UART_STATE_READY;
3822 
3823  /* Cleat TxISR function pointer */
3824  huart->TxISR = NULL;
3825 
3826 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3827  /*Call registered Tx complete callback*/
3828  huart->TxCpltCallback(huart);
3829 #else
3830  /*Call legacy weak Tx complete callback*/
3831  HAL_UART_TxCpltCallback(huart);
3832 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3833 }
3834 
3840 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
3841 {
3842  uint16_t uhMask = huart->Mask;
3843  uint16_t uhdata;
3844 
3845  /* Check that a Rx process is ongoing */
3846  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3847  {
3848  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3849  *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
3850  huart->pRxBuffPtr++;
3851  huart->RxXferCount--;
3852 
3853  if (huart->RxXferCount == 0U)
3854  {
3855  /* Disable the UART Parity Error Interrupt and RXNE interrupts */
3856  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3857 
3858  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3859  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3860 
3861  /* Rx process is completed, restore huart->RxState to Ready */
3862  huart->RxState = HAL_UART_STATE_READY;
3863 
3864  /* Clear RxISR function pointer */
3865  huart->RxISR = NULL;
3866 
3867 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3868  /*Call registered Rx complete callback*/
3869  huart->RxCpltCallback(huart);
3870 #else
3871  /*Call legacy weak Rx complete callback*/
3872  HAL_UART_RxCpltCallback(huart);
3873 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3874  }
3875  }
3876  else
3877  {
3878  /* Clear RXNE interrupt flag */
3879  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3880  }
3881 }
3882 
3890 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
3891 {
3892  uint16_t *tmp;
3893  uint16_t uhMask = huart->Mask;
3894  uint16_t uhdata;
3895 
3896  /* Check that a Rx process is ongoing */
3897  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3898  {
3899  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3900  tmp = (uint16_t *) huart->pRxBuffPtr ;
3901  *tmp = (uint16_t)(uhdata & uhMask);
3902  huart->pRxBuffPtr += 2U;
3903  huart->RxXferCount--;
3904 
3905  if (huart->RxXferCount == 0U)
3906  {
3907  /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
3908  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3909 
3910  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3911  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3912 
3913  /* Rx process is completed, restore huart->RxState to Ready */
3914  huart->RxState = HAL_UART_STATE_READY;
3915 
3916  /* Clear RxISR function pointer */
3917  huart->RxISR = NULL;
3918 
3919 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3920  /*Call registered Rx complete callback*/
3921  huart->RxCpltCallback(huart);
3922 #else
3923  /*Call legacy weak Rx complete callback*/
3924  HAL_UART_RxCpltCallback(huart);
3925 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3926  }
3927  }
3928  else
3929  {
3930  /* Clear RXNE interrupt flag */
3931  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3932  }
3933 }
3934 
3942 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
3943 {
3944  uint16_t uhMask = huart->Mask;
3945  uint16_t uhdata;
3946  uint16_t nb_rx_data;
3947  uint16_t rxdatacount;
3948 
3949  /* Check that a Rx process is ongoing */
3950  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3951  {
3952  for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
3953  {
3954  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3955  *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
3956  huart->pRxBuffPtr++;
3957  huart->RxXferCount--;
3958 
3959  if (huart->RxXferCount == 0U)
3960  {
3961  /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
3962  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3963 
3964  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
3965  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3966 
3967  /* Rx process is completed, restore huart->RxState to Ready */
3968  huart->RxState = HAL_UART_STATE_READY;
3969 
3970  /* Clear RxISR function pointer */
3971  huart->RxISR = NULL;
3972 
3973 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3974  /*Call registered Rx complete callback*/
3975  huart->RxCpltCallback(huart);
3976 #else
3977  /*Call legacy weak Rx complete callback*/
3978  HAL_UART_RxCpltCallback(huart);
3979 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3980  }
3981  }
3982 
3983  /* When remaining number of bytes to receive is less than the RX FIFO
3984  threshold, next incoming frames are processed as if FIFO mode was
3985  disabled (i.e. one interrupt per received frame).
3986  */
3987  rxdatacount = huart->RxXferCount;
3988  if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
3989  {
3990  /* Disable the UART RXFT interrupt*/
3991  CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3992 
3993  /* Update the RxISR function pointer */
3994  huart->RxISR = UART_RxISR_8BIT;
3995 
3996  /* Enable the UART Data Register Not Empty interrupt */
3997  SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3998  }
3999  }
4000  else
4001  {
4002  /* Clear RXNE interrupt flag */
4003  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4004  }
4005 }
4006 
4014 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4015 {
4016  uint16_t *tmp;
4017  uint16_t uhMask = huart->Mask;
4018  uint16_t uhdata;
4019  uint16_t nb_rx_data;
4020  uint16_t rxdatacount;
4021 
4022  /* Check that a Rx process is ongoing */
4023  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4024  {
4025  for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
4026  {
4027  uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4028  tmp = (uint16_t *) huart->pRxBuffPtr ;
4029  *tmp = (uint16_t)(uhdata & uhMask);
4030  huart->pRxBuffPtr += 2U;
4031  huart->RxXferCount--;
4032 
4033  if (huart->RxXferCount == 0U)
4034  {
4035  /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4036  CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4037 
4038  /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
4039  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4040 
4041  /* Rx process is completed, restore huart->RxState to Ready */
4042  huart->RxState = HAL_UART_STATE_READY;
4043 
4044  /* Clear RxISR function pointer */
4045  huart->RxISR = NULL;
4046 
4047 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4048  /*Call registered Rx complete callback*/
4049  huart->RxCpltCallback(huart);
4050 #else
4051  /*Call legacy weak Rx complete callback*/
4052  HAL_UART_RxCpltCallback(huart);
4053 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4054  }
4055  }
4056 
4057  /* When remaining number of bytes to receive is less than the RX FIFO
4058  threshold, next incoming frames are processed as if FIFO mode was
4059  disabled (i.e. one interrupt per received frame).
4060  */
4061  rxdatacount = huart->RxXferCount;
4062  if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4063  {
4064  /* Disable the UART RXFT interrupt*/
4065  CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4066 
4067  /* Update the RxISR function pointer */
4068  huart->RxISR = UART_RxISR_16BIT;
4069 
4070  /* Enable the UART Data Register Not Empty interrupt */
4071  SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4072  }
4073  }
4074  else
4075  {
4076  /* Clear RXNE interrupt flag */
4077  __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4078  }
4079 }
4080 
4085 #endif /* HAL_UART_MODULE_ENABLED */
4086 
4094 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_UART_ErrorCallback
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
IS_UART_OVERRUN
#define IS_UART_OVERRUN(__OVERRUN__)
Ensure that UART frame overrun setting is valid.
Definition: stm32f7xx_hal_uart.h:1327
USART_ISR_RTOF
#define USART_ISR_RTOF
Definition: stm32f769xx.h:15500
assert_param
#define assert_param(expr)
Include module's header file.
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:353
UART_ADVFEATURE_AUTOBAUDRATE_ENABLE
#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE
Definition: stm32f7xx_hal_uart.h:542
HAL_UART_Transmit_IT
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_CLEAR_PEF
#define UART_CLEAR_PEF
Definition: stm32f7xx_hal_uart.h:723
USART_CR1_TXEIE_TXFNFIE
#define USART_CR1_TXEIE_TXFNFIE
Definition: stm32h735xx.h:21391
__UART_HandleTypeDef::TxISR
void(* TxISR)(struct __UART_HandleTypeDef *huart)
Definition: stm32f7xx_hal_uart.h:209
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
USART_ISR_RXFF
#define USART_ISR_RXFF
Definition: stm32h735xx.h:21725
USART_CR2_ABREN
#define USART_CR2_ABREN
Definition: stm32f769xx.h:15342
HAL_UART_TxCpltCallback
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
__UART_HandleTypeDef::Init
UART_InitTypeDef Init
Definition: stm32f4xx_hal_uart.h:145
HAL_UART_StateTypeDef
HAL_UART_StateTypeDef
HAL UART State structures definition.
Definition: stm32f4xx_hal_uart.h:117
__UART_HandleTypeDef::NbRxDataToProcess
uint16_t NbRxDataToProcess
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:237
HAL_UART_AbortReceive
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
UARTPrescTable
const uint16_t UARTPrescTable[12]
USART_CR3_DDRE
#define USART_CR3_DDRE
Definition: stm32f769xx.h:15397
__UART_HandleTypeDef::NbTxDataToProcess
uint16_t NbTxDataToProcess
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:239
HAL_UART_ERROR_NE
#define HAL_UART_ERROR_NE
Definition: stm32f4xx_hal_uart.h:233
HAL_LIN_SendBreak
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
HAL_UART_Transmit
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
__DMA_HandleTypeDef::XferHalfCpltCallback
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:153
IS_UART_HWFLOW_INSTANCE
#define IS_UART_HWFLOW_INSTANCE(INSTANCE)
Definition: stm32f407xx.h:15483
PLL3_ClocksTypeDef::PLL3_Q_Frequency
uint32_t PLL3_Q_Frequency
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:134
HAL_UART_ERROR_FE
#define HAL_UART_ERROR_FE
Definition: stm32f4xx_hal_uart.h:234
USART_CR3_SCEN
#define USART_CR3_SCEN
Definition: stm32f407xx.h:12600
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
NULL
#define NULL
Definition: porcupine/demo/c/dr_libs/tests/external/miniaudio/extras/speex_resampler/thirdparty/resample.c:92
HAL_UART_Transmit_DMA
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_INSTANCE_LOWPOWER
#define UART_INSTANCE_LOWPOWER(__HANDLE__)
Check whether or not UART instance is Low Power UART.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1265
USART_CR2_SWAP
#define USART_CR2_SWAP
Definition: stm32f769xx.h:15327
USART_TypeDef::TDR
__IO uint32_t TDR
Definition: stm32f769xx.h:1018
USART_CR2_ABRMODE
#define USART_CR2_ABRMODE
Definition: stm32f769xx.h:15345
IS_UART_HALFDUPLEX_INSTANCE
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)
Definition: stm32f407xx.h:15472
HAL_DMA_ERROR_TIMEOUT
#define HAL_DMA_ERROR_TIMEOUT
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:190
USART_CR2_MSBFIRST
#define USART_CR2_MSBFIRST
Definition: stm32f769xx.h:15339
IS_UART_ADVFEATURE_MSBFIRST
#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__)
Ensure that UART frame MSB first setting is valid.
Definition: stm32f7xx_hal_uart.h:1351
USART_CR2_ADD
#define USART_CR2_ADD
Definition: stm32f407xx.h:12552
USART_CR1_TXFEIE
#define USART_CR1_TXFEIE
Definition: stm32h735xx.h:21449
UART_CLEAR_RTOF
#define UART_CLEAR_RTOF
Definition: stm32f7xx_hal_uart.h:735
USART_CR1_MME
#define USART_CR1_MME
Definition: stm32f769xx.h:15260
IS_UART_ADVFEATURE_AUTOBAUDRATE
#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__)
Ensure that UART auto Baud rate state is valid.
Definition: stm32f7xx_hal_uart.h:1335
HAL_UNLOCKED
@ HAL_UNLOCKED
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:53
UART_ADVFEATURE_MSBFIRST_INIT
#define UART_ADVFEATURE_MSBFIRST_INIT
Definition: stm32f7xx_hal_uart.h:488
USART_ISR_WUF
#define USART_ISR_WUF
Definition: stm32f769xx.h:15524
UART_InitTypeDef::OneBitSampling
uint32_t OneBitSampling
Definition: stm32f7xx_hal_uart.h:82
UART_FLAG_TC
#define UART_FLAG_TC
Definition: stm32f4xx_hal_uart.h:337
USART_CR3_HDSEL
#define USART_CR3_HDSEL
Definition: stm32f407xx.h:12594
RCC_FLAG_HSIDIV
#define RCC_FLAG_HSIDIV
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:652
huart
UART_HandleTypeDef huart
Definition: pv_stm32f469.c:31
HAL_UART_ERROR_RTO
#define HAL_UART_ERROR_RTO
Definition: stm32f7xx_hal_uart.h:313
HAL_DMA_Abort_IT
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
IS_UART_MODE
#define IS_UART_MODE(MODE)
Definition: stm32f4xx_hal_uart.h:788
UART_CLEAR_TCF
#define UART_CLEAR_TCF
Definition: stm32f7xx_hal_uart.h:728
UART_InitTypeDef::OverSampling
uint32_t OverSampling
Definition: stm32f4xx_hal_uart.h:74
UART_ADVFEATURE_NO_INIT
#define UART_ADVFEATURE_NO_INIT
Definition: stm32f7xx_hal_uart.h:480
IS_UART_RECEIVER_TIMEOUT_VALUE
#define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__)
Check the receiver timeout value.
Definition: stm32f7xx_hal_uart.h:1214
__UART_HandleTypeDef::TxXferCount
__IO uint16_t TxXferCount
Definition: stm32f4xx_hal_uart.h:151
HAL_UART_DMAStop
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
USART_ISR_RXNE_RXFNE
#define USART_ISR_RXNE_RXFNE
Definition: stm32h735xx.h:21668
UART_AdvFeatureConfig
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
HAL_RCCEx_GetD3PCLK1Freq
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
HAL_UART_Abort_IT
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
HAL_RCC_GetPCLK2Freq
uint32_t HAL_RCC_GetPCLK2Freq(void)
__DMA_HandleTypeDef::XferAbortCallback
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:161
UART_InitTypeDef::ClockPrescaler
uint32_t ClockPrescaler
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:95
UART_InitTypeDef::WordLength
uint32_t WordLength
Definition: stm32f4xx_hal_uart.h:55
HAL_MultiProcessor_EnableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
__UART_HandleTypeDef
UART handle Structure definition.
Definition: stm32f4xx_hal_uart.h:141
USART_CR2_TXINV
#define USART_CR2_TXINV
Definition: stm32f769xx.h:15333
__HAL_UART_ENABLE
#define __HAL_UART_ENABLE(__HANDLE__)
Enable UART.
Definition: stm32f4xx_hal_uart.h:652
USART_CR3_OVRDIS
#define USART_CR3_OVRDIS
Definition: stm32f769xx.h:15394
UART_InitTypeDef::BaudRate
uint32_t BaudRate
Definition: stm32f4xx_hal_uart.h:49
USART_CR3_DMAT
#define USART_CR3_DMAT
Definition: stm32f407xx.h:12606
UART_DIV_LPUART
#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__)
BRR division operation to set BRR register with LPUART.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1238
UART_ADVFEATURE_RXINVERT_INIT
#define UART_ADVFEATURE_RXINVERT_INIT
Definition: stm32f7xx_hal_uart.h:482
__DMA_HandleTypeDef::Init
DMA_InitTypeDef Init
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:143
UART_AdvFeatureInitTypeDef::RxPinLevelInvert
uint32_t RxPinLevelInvert
Definition: stm32f7xx_hal_uart.h:101
USART_TypeDef::CR1
__IO uint32_t CR1
Definition: stm32f407xx.h:763
HAL_ERROR
@ HAL_ERROR
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:43
UART_WORDLENGTH_9B
#define UART_WORDLENGTH_9B
Definition: stm32f4xx_hal_uart.h:248
__HAL_UART_GET_FLAG
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__)
Checks whether the specified UART flag is set or not.
Definition: stm32f4xx_hal_uart.h:426
__HAL_UART_DISABLE
#define __HAL_UART_DISABLE(__HANDLE__)
Disable UART.
Definition: stm32f4xx_hal_uart.h:658
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:214
HAL_GetTick
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323
UART_CLOCKSOURCE_PLL2
@ UART_CLOCKSOURCE_PLL2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:190
HAL_UART_DisableReceiverTimeout
HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
USART_ISR_FE
#define USART_ISR_FE
Definition: stm32f769xx.h:15470
IS_UART_WAKEUPMETHOD
#define IS_UART_WAKEUPMETHOD(WAKEUP)
Definition: stm32f4xx_hal_uart.h:796
DMA_CIRCULAR
#define DMA_CIRCULAR
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:282
USART_CR1_RTOIE
#define USART_CR1_RTOIE
Definition: stm32f769xx.h:15285
HAL_UART_ERROR_PE
#define HAL_UART_ERROR_PE
Definition: stm32f4xx_hal_uart.h:232
UART_CR2_ADDRESS_LSB_POS
#define UART_CR2_ADDRESS_LSB_POS
Definition: stm32f7xx_hal_uart.h:588
HAL_MultiProcessor_DisableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
HAL_UART_DMAResume
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_HSI
@ UART_CLOCKSOURCE_HSI
Definition: stm32f7xx_hal_uart.h:176
USART_ISR_ORE
#define USART_ISR_ORE
Definition: stm32f769xx.h:15476
HAL_UART_STATE_BUSY_TX
@ HAL_UART_STATE_BUSY_TX
Definition: stm32f4xx_hal_uart.h:125
HAL_UART_MspInit
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
UART MSP Initialization This function configures the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:320
USART_TypeDef::RTOR
__IO uint32_t RTOR
Definition: stm32f769xx.h:1013
UART_ADVFEATURE_DATAINVERT_INIT
#define UART_ADVFEATURE_DATAINVERT_INIT
Definition: stm32f7xx_hal_uart.h:483
UART_HWCONTROL_NONE
#define UART_HWCONTROL_NONE
Definition: stm32f4xx_hal_uart.h:275
HAL_OK
@ HAL_OK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:42
USART_CR1_RXNEIE_RXFNEIE
#define USART_CR1_RXNEIE_RXFNEIE
Definition: stm32h735xx.h:21385
UART_InitTypeDef::StopBits
uint32_t StopBits
Definition: stm32f4xx_hal_uart.h:58
IS_UART_PRESCALER
#define IS_UART_PRESCALER(__CLOCKPRESCALER__)
Ensure that UART Prescaler is valid.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1558
UART_OVERSAMPLING_8
#define UART_OVERSAMPLING_8
Definition: stm32f4xx_hal_uart.h:306
HAL_UART_ReceiverTimeout_Config
void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
HAL_HalfDuplex_EnableReceiver
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_SWAP
#define IS_UART_ADVFEATURE_SWAP(__SWAP__)
Ensure that UART frame RX/TX pins swap setting is valid.
Definition: stm32f7xx_hal_uart.h:1319
UART_CheckIdleState
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::OverrunDisable
uint32_t OverrunDisable
Definition: stm32f7xx_hal_uart.h:111
HAL_UART_RxCpltCallback
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_CSI
@ UART_CLOCKSOURCE_CSI
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:193
IS_UART_ADVFEATURE_RXINV
#define IS_UART_ADVFEATURE_RXINV(__RXINV__)
Ensure that UART frame RX inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1303
UNUSED
#define UNUSED(x)
Definition: porcupine/demo/c/dr_libs/old/dr.h:92
IS_UART_PARITY
#define IS_UART_PARITY(PARITY)
Definition: stm32f4xx_hal_uart.h:780
HSI_VALUE
#define HSI_VALUE
Internal High Speed oscillator (HSI) value. This value is used by the RCC HAL module to compute the s...
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:82
USART_CR3_WUFIE
#define USART_CR3_WUFIE
Definition: stm32f769xx.h:15417
USART_CR2_STOP
#define USART_CR2_STOP
Definition: stm32f407xx.h:12574
IS_UART_LIN_BREAK_DETECT_LENGTH
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH)
Definition: stm32f4xx_hal_uart.h:794
UART_FLAG_RTOF
#define UART_FLAG_RTOF
Definition: stm32f7xx_hal_uart.h:664
USART_TypeDef::PRESC
__IO uint32_t PRESC
Definition: stm32h735xx.h:1613
HAL_UART_RxHalfCpltCallback
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
UART_FIFOMODE_ENABLE
#define UART_FIFOMODE_ENABLE
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h:93
HAL_UARTEx_TxFifoEmptyCallback
void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
USART_CR2_CLKEN
#define USART_CR2_CLKEN
Definition: stm32f407xx.h:12570
__UART_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32f4xx_hal_uart.h:159
IS_UART_ONE_BIT_SAMPLE
#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__)
Ensure that UART frame sampling is valid.
Definition: stm32f7xx_hal_uart.h:1188
__HAL_LOCK
#define __HAL_LOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:93
HAL_UART_GetState
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_DMAONRXERROR
#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__)
Ensure that UART DMA enabling or disabling on error setting is valid.
Definition: stm32f7xx_hal_uart.h:1343
CSI_VALUE
#define CSI_VALUE
Internal oscillator (CSI) default value. This value is the default CSI value after Reset.
Definition: stm32h735/stm32h735g-dk/Inc/stm32h7xx_hal_conf.h:120
USART_TypeDef::RDR
__IO uint32_t RDR
Definition: stm32f769xx.h:1017
USART_ISR_REACK
#define USART_ISR_REACK
Definition: stm32f769xx.h:15530
USART_RTOR_RTO
#define USART_RTOR_RTO
Definition: stm32f769xx.h:15442
HAL_UART_EnableReceiverTimeout
HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
HAL_UART_AbortReceive_IT
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::DataInvert
uint32_t DataInvert
Definition: stm32f7xx_hal_uart.h:104
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:224
HAL_UART_ERROR_DMA
#define HAL_UART_ERROR_DMA
Definition: stm32f4xx_hal_uart.h:236
UART_CLEAR_OREF
#define UART_CLEAR_OREF
Definition: stm32f7xx_hal_uart.h:726
HAL_UART_Init
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
UART_CLEAR_NEF
#define UART_CLEAR_NEF
Definition: stm32f7xx_hal_uart.h:725
HAL_UART_ERROR_ORE
#define HAL_UART_ERROR_ORE
Definition: stm32f4xx_hal_uart.h:235
HAL_UART_AbortTransmit_IT
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
RESET
@ RESET
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:187
UART_MUTE_MODE_REQUEST
#define UART_MUTE_MODE_REQUEST
Definition: stm32f7xx_hal_uart.h:470
__UART_HandleTypeDef::Mask
uint16_t Mask
Definition: stm32f7xx_hal_uart.h:205
UART_CLOCKSOURCE_PLL3
@ UART_CLOCKSOURCE_PLL3
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:191
__UART_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32f4xx_hal_uart.h:163
HAL_BUSY
@ HAL_BUSY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:44
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
HAL_UART_Receive_DMA
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_FLAG_RXNE
#define UART_FLAG_RXNE
Definition: stm32f4xx_hal_uart.h:338
UART_AdvFeatureInitTypeDef::DMADisableonRxError
uint32_t DMADisableonRxError
Definition: stm32f7xx_hal_uart.h:114
UART_CLOCKSOURCE_D3PCLK1
@ UART_CLOCKSOURCE_D3PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:189
PLL2_ClocksTypeDef
RCC PLL2 Clocks structure definition.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:121
UART_AdvFeatureInitTypeDef::AutoBaudRateMode
uint32_t AutoBaudRateMode
Definition: stm32f7xx_hal_uart.h:120
__UART_HandleTypeDef::RxState
__IO HAL_UART_StateTypeDef RxState
Definition: stm32f4xx_hal_uart.h:169
IS_LPUART_INSTANCE
#define IS_LPUART_INSTANCE(INSTANCE)
Definition: stm32h735xx.h:24654
USART_CR3_TXFTIE
#define USART_CR3_TXFTIE
Definition: stm32h735xx.h:21589
HAL_UART_TIMEOUT_VALUE
#define HAL_UART_TIMEOUT_VALUE
Definition: stm32f7xx_hal_uart.h:641
HAL_UART_STATE_BUSY_RX
@ HAL_UART_STATE_BUSY_RX
Definition: stm32f4xx_hal_uart.h:127
USART_TypeDef::CR3
__IO uint32_t CR3
Definition: stm32f407xx.h:765
USART_CR1_PEIE
#define USART_CR1_PEIE
Definition: stm32f407xx.h:12529
USART_TypeDef::CR2
__IO uint32_t CR2
Definition: stm32f407xx.h:764
__HAL_UNLOCK
#define __HAL_UNLOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:105
UART_AdvFeatureInitTypeDef::TxPinLevelInvert
uint32_t TxPinLevelInvert
Definition: stm32f7xx_hal_uart.h:98
USART_ISR_TXE_TXFNF
#define USART_ISR_TXE_TXFNF
Definition: stm32h735xx.h:21674
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:216
UART_CLEAR_FEF
#define UART_CLEAR_FEF
Definition: stm32f7xx_hal_uart.h:724
UART_WORDLENGTH_8B
#define UART_WORDLENGTH_8B
Definition: stm32f4xx_hal_uart.h:247
USART_TypeDef::ISR
__IO uint32_t ISR
Definition: stm32f769xx.h:1015
HAL_MAX_DELAY
#define HAL_MAX_DELAY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:61
__UART_HandleTypeDef::AdvancedInit
UART_AdvFeatureInitTypeDef AdvancedInit
Definition: stm32f7xx_hal_uart.h:191
UART_ClockSourceTypeDef
UART_ClockSourceTypeDef
UART clock sources definition.
Definition: stm32f7xx_hal_uart.h:172
HAL_DMA_Abort
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
__UART_HandleTypeDef::TxXferSize
uint16_t TxXferSize
Definition: stm32f4xx_hal_uart.h:149
__UART_HandleTypeDef::RxISR
void(* RxISR)(struct __UART_HandleTypeDef *huart)
Definition: stm32f7xx_hal_uart.h:207
__HAL_UART_SEND_REQ
#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__)
Set a specific UART request flag.
Definition: stm32f7xx_hal_uart.h:987
__UART_HandleTypeDef::pTxBuffPtr
uint8_t * pTxBuffPtr
Definition: stm32f4xx_hal_uart.h:147
HAL_UART_Receive
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
__UART_HandleTypeDef::FifoMode
uint32_t FifoMode
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:234
HAL_RCCEx_GetPLL3ClockFreq
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
UART_CLOCKSOURCE_D2PCLK1
@ UART_CLOCKSOURCE_D2PCLK1
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:187
__UART_HandleTypeDef::gState
__IO HAL_UART_StateTypeDef gState
Definition: stm32f4xx_hal_uart.h:165
HAL_UART_ERROR_NONE
#define HAL_UART_ERROR_NONE
Definition: stm32f4xx_hal_uart.h:231
UART_ADVFEATURE_DMADISABLEONERROR_INIT
#define UART_ADVFEATURE_DMADISABLEONERROR_INIT
Definition: stm32f7xx_hal_uart.h:486
IS_UART_INSTANCE
#define IS_UART_INSTANCE
Definition: stm32f407xx.h:15480
__UART_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32f4xx_hal_uart.h:161
__UART_HandleTypeDef::RxXferSize
uint16_t RxXferSize
Definition: stm32f4xx_hal_uart.h:155
UART_SetConfig
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
USART_CR1_TCIE
#define USART_CR1_TCIE
Definition: stm32f407xx.h:12523
USART_TypeDef::BRR
__IO uint32_t BRR
Definition: stm32f407xx.h:762
IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(__INSTANCE__)
Definition: stm32f769xx.h:21979
USART_CR3_EIE
#define USART_CR3_EIE
Definition: stm32f407xx.h:12585
__UART_HandleTypeDef::pRxBuffPtr
uint8_t * pRxBuffPtr
Definition: stm32f4xx_hal_uart.h:153
USART_ISR_TC
#define USART_ISR_TC
Definition: stm32f769xx.h:15485
__UART_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f4xx_hal_uart.h:172
HAL_TIMEOUT
@ HAL_TIMEOUT
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:45
UART_CLEAR_WUF
#define UART_CLEAR_WUF
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:806
PLL2_ClocksTypeDef::PLL2_Q_Frequency
uint32_t PLL2_Q_Frequency
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:124
LSE_VALUE
#define LSE_VALUE
External Low Speed oscillator (LSE) value.
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:97
USART_CR2_LBDL
#define USART_CR2_LBDL
Definition: stm32f407xx.h:12555
UART_TXDATA_FLUSH_REQUEST
#define UART_TXDATA_FLUSH_REQUEST
Definition: stm32f7xx_hal_uart.h:472
UART_WAKEUPMETHOD_ADDRESSMARK
#define UART_WAKEUPMETHOD_ADDRESSMARK
Definition: stm32f4xx_hal_uart.h:324
__DMA_HandleTypeDef::Parent
void * Parent
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:149
IS_UART_LIN_INSTANCE
#define IS_UART_LIN_INSTANCE
Definition: stm32f407xx.h:15488
HAL_HalfDuplex_EnableTransmitter
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
UART_ADVFEATURE_TXINVERT_INIT
#define UART_ADVFEATURE_TXINVERT_INIT
Definition: stm32f7xx_hal_uart.h:481
__DMA_HandleTypeDef::XferCpltCallback
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:151
PLL3_ClocksTypeDef
RCC PLL3 Clocks structure definition.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h:131
IS_UART_HARDWARE_FLOW_CONTROL
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)
Definition: stm32f4xx_hal_uart.h:783
UART_WaitOnFlagUntilTimeout
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
HAL_RCC_GetPCLK1Freq
uint32_t HAL_RCC_GetPCLK1Freq(void)
USART_CR1_WAKE
#define USART_CR1_WAKE
Definition: stm32f407xx.h:12538
UART_MASK_COMPUTATION
#define UART_MASK_COMPUTATION(__HANDLE__)
Report the UART mask to apply to retrieve the received data according to the word length and to the p...
Definition: stm32f7xx_hal_uart_ex.h:347
USART_ISR_NE
#define USART_ISR_NE
Definition: stm32f769xx.h:15473
SET
@ SET
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:188
UART_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f4xx_hal_uart.h:68
__HAL_RCC_GET_FLAG
#define __HAL_RCC_GET_FLAG(__FLAG__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:1230
UART_RXDATA_FLUSH_REQUEST
#define UART_RXDATA_FLUSH_REQUEST
Definition: stm32f7xx_hal_uart.h:471
HAL_MultiProcessor_Init
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
HAL_UART_AbortTransmit
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
HAL_UART_STATE_RESET
@ HAL_UART_STATE_RESET
Definition: stm32f4xx_hal_uart.h:119
HAL_LIN_Init
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
UART_GETCLOCKSOURCE
#define UART_GETCLOCKSOURCE(__HANDLE__, __CLOCKSOURCE__)
Report the UART clock source.
Definition: stm32f7xx_hal_uart_ex.h:162
FlagStatus
FlagStatus
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:185
USART_ISR_TXFE
#define USART_ISR_TXFE
Definition: stm32h735xx.h:21722
USART_PRESC_PRESCALER
#define USART_PRESC_PRESCALER
Definition: stm32h735xx.h:21796
HAL_UART_AbortReceiveCpltCallback
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
USART_CR1_RXFFIE
#define USART_CR1_RXFFIE
Definition: stm32h735xx.h:21452
HAL_UART_IRQHandler
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
UART_CLOCKSOURCE_LSE
@ UART_CLOCKSOURCE_LSE
Definition: stm32f7xx_hal_uart.h:178
UART_InitTypeDef::HwFlowCtl
uint32_t HwFlowCtl
Definition: stm32f4xx_hal_uart.h:71
USART_CR1_RE
#define USART_CR1_RE
Definition: stm32f407xx.h:12511
HAL_HalfDuplex_Init
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
UART_PARITY_NONE
#define UART_PARITY_NONE
Definition: stm32f4xx_hal_uart.h:265
UART_ADVFEATURE_RXOVERRUNDISABLE_INIT
#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT
Definition: stm32f7xx_hal_uart.h:485
HAL_IS_BIT_SET
#define HAL_IS_BIT_SET(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:63
USART_CR3_RXFTIE
#define USART_CR3_RXFTIE
Definition: stm32h735xx.h:21601
IS_UART_STOPBITS
#define IS_UART_STOPBITS(STOPBITS)
Definition: stm32f4xx_hal_uart.h:778
HAL_RCCEx_GetPLL2ClockFreq
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
HAL_DMA_GetError
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
HAL_UART_DeInit
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
UART_AdvFeatureInitTypeDef::MSBFirst
uint32_t MSBFirst
Definition: stm32f7xx_hal_uart.h:124
UART_DIV_SAMPLING8
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_)
Definition: stm32f4xx_hal_uart.h:810
UART_ADVFEATURE_SWAP_INIT
#define UART_ADVFEATURE_SWAP_INIT
Definition: stm32f7xx_hal_uart.h:484
IS_UART_WORD_LENGTH
#define IS_UART_WORD_LENGTH(LENGTH)
Definition: stm32f4xx_hal_uart.h:775
USART_CR2_RTOEN
#define USART_CR2_RTOEN
Definition: stm32f769xx.h:15350
DMA_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:70
READ_REG
#define READ_REG(REG)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:222
USART_ISR_TEACK
#define USART_ISR_TEACK
Definition: stm32f769xx.h:15527
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:212
HAL_UART_AbortTransmitCpltCallback
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
IS_UART_OVERSAMPLING
#define IS_UART_OVERSAMPLING(SAMPLING)
Definition: stm32f4xx_hal_uart.h:791
HAL_UART_TxHalfCpltCallback
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
USART_CR2_LINEN
#define USART_CR2_LINEN
Definition: stm32f407xx.h:12580
USART_CR3_DMAR
#define USART_CR3_DMAR
Definition: stm32f407xx.h:12603
UART_DIV_SAMPLING16
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_)
Definition: stm32f4xx_hal_uart.h:801
HAL_UART_Receive_IT
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_MultiProcessor_EnterMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
UART_SENDBREAK_REQUEST
#define UART_SENDBREAK_REQUEST
Definition: stm32f7xx_hal_uart.h:469
IS_UART_ADVFEATURE_DATAINV
#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__)
Ensure that UART frame data inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1311
IS_UART_ADVFEATURE_TXINV
#define IS_UART_ADVFEATURE_TXINV(__TXINV__)
Ensure that UART frame TX inversion setting is valid.
Definition: stm32f7xx_hal_uart.h:1295
UART_CLOCKSOURCE_D2PCLK2
@ UART_CLOCKSOURCE_D2PCLK2
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:188
UART_ADVFEATURE_AUTOBAUDRATE_INIT
#define UART_ADVFEATURE_AUTOBAUDRATE_INIT
Definition: stm32f7xx_hal_uart.h:487
USART_CR3_IREN
#define USART_CR3_IREN
Definition: stm32f407xx.h:12588
__HAL_RCC_GET_HSI_DIVIDER
#define __HAL_RCC_GET_HSI_DIVIDER()
Macro to get the HSI divider.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h:7145
__UART_HandleTypeDef::Instance
USART_TypeDef * Instance
Definition: stm32f4xx_hal_uart.h:143
UART_AdvFeatureInitTypeDef::AdvFeatureInit
uint32_t AdvFeatureInit
Definition: stm32f7xx_hal_uart.h:94
HAL_UART_AbortCpltCallback
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
IS_UART_ADVFEATURE_INIT
#define IS_UART_ADVFEATURE_INIT(__INIT__)
Ensure that UART advanced features initialization is valid.
Definition: stm32f7xx_hal_uart.h:1280
USART_CR1_TE
#define USART_CR1_TE
Definition: stm32f407xx.h:12514
USART_ISR_PE
#define USART_ISR_PE
Definition: stm32f769xx.h:15467
__HAL_UART_CLEAR_FLAG
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clears the specified UART pending flag.
Definition: stm32f4xx_hal_uart.h:450
UART_FLAG_TXE
#define UART_FLAG_TXE
Definition: stm32f4xx_hal_uart.h:336
USART_CR2_DATAINV
#define USART_CR2_DATAINV
Definition: stm32f769xx.h:15336
HAL_UART_STATE_BUSY
@ HAL_UART_STATE_BUSY
Definition: stm32f4xx_hal_uart.h:123
__UART_HandleTypeDef::RxXferCount
__IO uint16_t RxXferCount
Definition: stm32f4xx_hal_uart.h:157
HAL_UART_MspDeInit
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
UART MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:369
HAL_UARTEx_WakeupCallback
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
IS_LPUART_STOPBITS
#define IS_LPUART_STOPBITS(__STOPBITS__)
Ensure that LPUART frame number of stop bits is valid.
Definition: stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h:1302
UART_AdvFeatureInitTypeDef::AutoBaudRateEnable
uint32_t AutoBaudRateEnable
Definition: stm32f7xx_hal_uart.h:117
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HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
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void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
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Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:159
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Definition: stm32f4xx_hal_uart.h:61
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#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__)
Ensure that UART auto Baud rate detection mode is valid.
Definition: stm32f7xx_hal_uart.h:1196
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#define USART_CR2_RXINV
Definition: stm32f769xx.h:15330
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#define IS_UART_BAUDRATE(BAUDRATE)
Definition: stm32f4xx_hal_uart.h:798
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@ HAL_UART_STATE_READY
Definition: stm32f4xx_hal_uart.h:121
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uint32_t Swap
Definition: stm32f7xx_hal_uart.h:108
HAL_UART_GetError
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:55