fsl_sai.h

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/*
 * Copyright (c) 2015, Freescale Semiconductor, Inc.
 * Copyright 2016-2020 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
 
#ifndef _FSL_SAI_H_
#define _FSL_SAI_H_
 
#include "fsl_common.h"
 
/*******************************************************************************
 * Definitions
 ******************************************************************************/
 
#define FSL_SAI_DRIVER_VERSION (MAKE_VERSION(2, 3, 1)) 
 
 
enum
{
    kStatus_SAI_TxBusy    = MAKE_STATUS(kStatusGroup_SAI, 0), 
    kStatus_SAI_RxBusy    = MAKE_STATUS(kStatusGroup_SAI, 1), 
    kStatus_SAI_TxError   = MAKE_STATUS(kStatusGroup_SAI, 2), 
    kStatus_SAI_RxError   = MAKE_STATUS(kStatusGroup_SAI, 3), 
    kStatus_SAI_QueueFull = MAKE_STATUS(kStatusGroup_SAI, 4), 
    kStatus_SAI_TxIdle    = MAKE_STATUS(kStatusGroup_SAI, 5), 
    kStatus_SAI_RxIdle    = MAKE_STATUS(kStatusGroup_SAI, 6)  
};
 
enum
{
    kSAI_Channel0Mask = 1 << 0U, 
    kSAI_Channel1Mask = 1 << 1U, 
    kSAI_Channel2Mask = 1 << 2U, 
    kSAI_Channel3Mask = 1 << 3U, 
    kSAI_Channel4Mask = 1 << 4U, 
    kSAI_Channel5Mask = 1 << 5U, 
    kSAI_Channel6Mask = 1 << 6U, 
    kSAI_Channel7Mask = 1 << 7U, 
};
 
typedef enum _sai_protocol
{
    kSAI_BusLeftJustified = 0x0U, 
    kSAI_BusRightJustified,       
    kSAI_BusI2S,                  
    kSAI_BusPCMA,                 
    kSAI_BusPCMB                  
} sai_protocol_t;
 
typedef enum _sai_master_slave
{
    kSAI_Master                      = 0x0U, 
    kSAI_Slave                       = 0x1U, 
    kSAI_Bclk_Master_FrameSync_Slave = 0x2U, 
    kSAI_Bclk_Slave_FrameSync_Master = 0x3U, 
} sai_master_slave_t;
 
typedef enum _sai_mono_stereo
{
    kSAI_Stereo = 0x0U, 
    kSAI_MonoRight,     
    kSAI_MonoLeft       
} sai_mono_stereo_t;
 
typedef enum _sai_data_order
{
    kSAI_DataLSB = 0x0U, 
    kSAI_DataMSB         
} sai_data_order_t;
 
typedef enum _sai_clock_polarity
{
    kSAI_PolarityActiveHigh  = 0x0U, 
    kSAI_PolarityActiveLow   = 0x1U, 
    kSAI_SampleOnFallingEdge = 0x0U, 
    kSAI_SampleOnRisingEdge  = 0x1U, 
} sai_clock_polarity_t;
 
typedef enum _sai_sync_mode
{
    kSAI_ModeAsync = 0x0U, 
    kSAI_ModeSync,         
#if defined(FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI) && (FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI)
    kSAI_ModeSyncWithOtherTx, 
    kSAI_ModeSyncWithOtherRx  
#endif                        /* FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI */
} sai_sync_mode_t;
 
#if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
 
typedef enum _sai_mclk_source
{
    kSAI_MclkSourceSysclk = 0x0U, 
    kSAI_MclkSourceSelect1,       
    kSAI_MclkSourceSelect2,       
    kSAI_MclkSourceSelect3        
} sai_mclk_source_t;
#endif
 
typedef enum _sai_bclk_source
{
    kSAI_BclkSourceBusclk = 0x0U, 
    /* General device bit source definition */
    kSAI_BclkSourceMclkOption1 = 0x1U, 
    kSAI_BclkSourceMclkOption2 = 0x2U, 
    kSAI_BclkSourceMclkOption3 = 0x3U, 
    /* Kinetis device bit clock source definition */
    kSAI_BclkSourceMclkDiv   = 0x1U, 
    kSAI_BclkSourceOtherSai0 = 0x2U, 
    kSAI_BclkSourceOtherSai1 = 0x3U  
} sai_bclk_source_t;
 
enum
{
    kSAI_WordStartInterruptEnable =
        I2S_TCSR_WSIE_MASK, 
    kSAI_SyncErrorInterruptEnable   = I2S_TCSR_SEIE_MASK, 
    kSAI_FIFOWarningInterruptEnable = I2S_TCSR_FWIE_MASK, 
    kSAI_FIFOErrorInterruptEnable   = I2S_TCSR_FEIE_MASK, 
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    kSAI_FIFORequestInterruptEnable = I2S_TCSR_FRIE_MASK, 
#endif                                                    /* FSL_FEATURE_SAI_FIFO_COUNT */
};
 
enum
{
    kSAI_FIFOWarningDMAEnable = I2S_TCSR_FWDE_MASK, 
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    kSAI_FIFORequestDMAEnable = I2S_TCSR_FRDE_MASK, 
#endif                                              /* FSL_FEATURE_SAI_FIFO_COUNT */
};
 
enum
{
    kSAI_WordStartFlag = I2S_TCSR_WSF_MASK, 
    kSAI_SyncErrorFlag = I2S_TCSR_SEF_MASK, 
    kSAI_FIFOErrorFlag = I2S_TCSR_FEF_MASK, 
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    kSAI_FIFORequestFlag = I2S_TCSR_FRF_MASK, 
#endif                                        /* FSL_FEATURE_SAI_FIFO_COUNT */
    kSAI_FIFOWarningFlag = I2S_TCSR_FWF_MASK, 
};
 
typedef enum _sai_reset_type
{
    kSAI_ResetTypeSoftware = I2S_TCSR_SR_MASK, 
    kSAI_ResetTypeFIFO     = I2S_TCSR_FR_MASK, 
    kSAI_ResetAll          = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK 
} sai_reset_type_t;
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
 
typedef enum _sai_fifo_packing
{
    kSAI_FifoPackingDisabled = 0x0U, 
    kSAI_FifoPacking8bit     = 0x2U, 
    kSAI_FifoPacking16bit    = 0x3U  
} sai_fifo_packing_t;
#endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
 
typedef struct _sai_config
{
    sai_protocol_t protocol;  
    sai_sync_mode_t syncMode; 
#if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
    bool mclkOutputEnable; 
#if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
    sai_mclk_source_t mclkSource; 
#endif                            /* FSL_FEATURE_SAI_HAS_MCR */
#endif
    sai_bclk_source_t bclkSource;   
    sai_master_slave_t masterSlave; 
} sai_config_t;
 
#ifndef SAI_XFER_QUEUE_SIZE
 
#define SAI_XFER_QUEUE_SIZE (4U)
#endif
 
typedef enum _sai_sample_rate
{
    kSAI_SampleRate8KHz    = 8000U,   
    kSAI_SampleRate11025Hz = 11025U,  
    kSAI_SampleRate12KHz   = 12000U,  
    kSAI_SampleRate16KHz   = 16000U,  
    kSAI_SampleRate22050Hz = 22050U,  
    kSAI_SampleRate24KHz   = 24000U,  
    kSAI_SampleRate32KHz   = 32000U,  
    kSAI_SampleRate44100Hz = 44100U,  
    kSAI_SampleRate48KHz   = 48000U,  
    kSAI_SampleRate96KHz   = 96000U,  
    kSAI_SampleRate192KHz  = 192000U, 
    kSAI_SampleRate384KHz  = 384000U, 
} sai_sample_rate_t;
 
typedef enum _sai_word_width
{
    kSAI_WordWidth8bits  = 8U,  
    kSAI_WordWidth16bits = 16U, 
    kSAI_WordWidth24bits = 24U, 
    kSAI_WordWidth32bits = 32U  
} sai_word_width_t;
 
#if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE
 
typedef enum _sai_data_pin_state
{
    kSAI_DataPinStateTriState =
        0U, 
    kSAI_DataPinStateOutputZero = 1U, 
} sai_data_pin_state_t;
#endif
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE
 
typedef enum _sai_fifo_combine
{
    kSAI_FifoCombineDisabled = 0U,          
    kSAI_FifoCombineModeEnabledOnRead,      
    kSAI_FifoCombineModeEnabledOnWrite,     
    kSAI_FifoCombineModeEnabledOnReadWrite, 
} sai_fifo_combine_t;
#endif
 
typedef enum _sai_transceiver_type
{
    kSAI_Transmitter = 0U, 
    kSAI_Receiver    = 1U, 
} sai_transceiver_type_t;
 
typedef enum _sai_frame_sync_len
{
    kSAI_FrameSyncLenOneBitClk    = 0U, 
    kSAI_FrameSyncLenPerWordWidth = 1U, 
} sai_frame_sync_len_t;
 
typedef struct _sai_transfer_format
{
    uint32_t sampleRate_Hz;   
    uint32_t bitWidth;        
    sai_mono_stereo_t stereo; 
#if defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)
    uint32_t masterClockHz; 
#endif                      /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    uint8_t watermark; 
#endif                 /* FSL_FEATURE_SAI_FIFO_COUNT */
 
    /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle
     * other parameter carefully, such as
     * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask
     * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated.
     * for the single channel usage, user can provide channel or channel mask only, such as,
     * channel = 0 or channelMask = kSAI_Channel0Mask.
     */
    uint8_t channel;     
    uint8_t channelMask; 
    uint8_t endChannel;  
    uint8_t channelNums; 
    sai_protocol_t protocol; 
    bool isFrameSyncCompact; 
} sai_transfer_format_t;
 
#if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
    (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
 
typedef struct _sai_master_clock
{
#if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
    bool mclkOutputEnable; 
#if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
    sai_mclk_source_t mclkSource; 
#endif
#endif
 
#if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
    (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
    uint32_t mclkHz;          
    uint32_t mclkSourceClkHz; 
#endif
} sai_master_clock_t;
#endif
 
#if (defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) || \
    (defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE) ||         \
    (defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING) ||                           \
    (defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1))
#define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 1
#else
#define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0
#endif
 
#if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
 
typedef struct _sai_fifo
{
#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
    bool fifoContinueOneError; 
#endif
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_COMBINE
    sai_fifo_combine_t fifoCombine; 
#endif
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
    sai_fifo_packing_t fifoPacking; 
#endif
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    uint8_t fifoWatermark; 
#endif
} sai_fifo_t;
#endif
 
typedef struct _sai_bit_clock
{
    bool bclkSrcSwap;    
    bool bclkInputDelay; 
    sai_clock_polarity_t bclkPolarity; 
    sai_bclk_source_t bclkSource;      
} sai_bit_clock_t;
 
typedef struct _sai_frame_sync
{
    uint8_t frameSyncWidth; 
    bool frameSyncEarly;    
#if defined(FSL_FEATURE_SAI_HAS_FRAME_SYNC_ON_DEMAND) && FSL_FEATURE_SAI_HAS_FRAME_SYNC_ON_DEMAND
    bool frameSyncGenerateOnDemand; 
#endif
 
    sai_clock_polarity_t frameSyncPolarity; 
} sai_frame_sync_t;
 
typedef struct _sai_serial_data
{
#if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE
    sai_data_pin_state_t dataMode; 
#endif
 
    sai_data_order_t dataOrder; 
    uint8_t dataWord0Length;    
    uint8_t dataWordNLength; 
    uint8_t dataWordLength;  
    uint8_t
        dataFirstBitShifted; 
    uint8_t dataWordNum;     
    uint32_t dataMaskedWord; 
} sai_serial_data_t;
 
typedef struct _sai_transceiver
{
    sai_serial_data_t serialData; 
    sai_frame_sync_t frameSync;   
    sai_bit_clock_t bitClock;     
#if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
    sai_fifo_t fifo; 
#endif
    sai_master_slave_t masterSlave; 
    sai_sync_mode_t syncMode; 
    uint8_t startChannel; 
    uint8_t channelMask;  
    uint8_t endChannel;   
    uint8_t channelNums;  
} sai_transceiver_t;
 
typedef struct _sai_transfer
{
    uint8_t *data;   
    size_t dataSize; 
} sai_transfer_t;
 
typedef struct _sai_handle sai_handle_t;
 
typedef void (*sai_transfer_callback_t)(I2S_Type *base, sai_handle_t *handle, status_t status, void *userData);
 
struct _sai_handle
{
    I2S_Type *base; 
    uint32_t state;                   
    sai_transfer_callback_t callback; 
    void *userData;                   
    uint8_t bitWidth;                 
    /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle
     * other parameter carefully, such as
     * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask
     * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated.
     * for the single channel usage, user can provide channel or channel mask only, such as,
     * channel = 0 or channelMask = kSAI_Channel0Mask.
     */
    uint8_t channel;     
    uint8_t channelMask; 
    uint8_t endChannel;  
    uint8_t channelNums; 
    sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; 
    size_t transferSize[SAI_XFER_QUEUE_SIZE];     
    volatile uint8_t queueUser;                   
    volatile uint8_t queueDriver;                 
#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
    uint8_t watermark; 
#endif
};
 
/*******************************************************************************
 * API
 ******************************************************************************/
 
#if defined(__cplusplus)
extern "C" {
#endif /*_cplusplus*/
 
void SAI_TxInit(I2S_Type *base, const sai_config_t *config);
 
void SAI_RxInit(I2S_Type *base, const sai_config_t *config);
 
void SAI_TxGetDefaultConfig(sai_config_t *config);
 
void SAI_RxGetDefaultConfig(sai_config_t *config);
 
void SAI_Init(I2S_Type *base);
 
void SAI_Deinit(I2S_Type *base);
 
void SAI_TxReset(I2S_Type *base);
 
void SAI_RxReset(I2S_Type *base);
 
void SAI_TxEnable(I2S_Type *base, bool enable);
 
void SAI_RxEnable(I2S_Type *base, bool enable);
 
static inline void SAI_TxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)
{
    if (masterSlave == kSAI_Master)
    {
        base->TCR2 |= I2S_TCR2_BCD_MASK;
    }
    else
    {
        base->TCR2 &= ~I2S_TCR2_BCD_MASK;
    }
}
 
static inline void SAI_RxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)
{
    if (masterSlave == kSAI_Master)
    {
        base->RCR2 |= I2S_RCR2_BCD_MASK;
    }
    else
    {
        base->RCR2 &= ~I2S_RCR2_BCD_MASK;
    }
}
 
static inline void SAI_RxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)
{
    if (masterSlave == kSAI_Master)
    {
        base->RCR4 |= I2S_RCR4_FSD_MASK;
    }
    else
    {
        base->RCR4 &= ~I2S_RCR4_FSD_MASK;
    }
}
 
static inline void SAI_TxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)
{
    if (masterSlave == kSAI_Master)
    {
        base->TCR4 |= I2S_TCR4_FSD_MASK;
    }
    else
    {
        base->TCR4 &= ~I2S_TCR4_FSD_MASK;
    }
}
 
void SAI_TxSetBitClockRate(
    I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers);
 
void SAI_RxSetBitClockRate(
    I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers);
 
void SAI_TxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config);
 
void SAI_RxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config);
 
#if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
    (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
 
void SAI_SetMasterClockConfig(I2S_Type *base, sai_master_clock_t *config);
#endif
 
#if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
 
void SAI_TxSetFifoConfig(I2S_Type *base, sai_fifo_t *config);
 
void SAI_RxSetFifoConfig(I2S_Type *base, sai_fifo_t *config);
#endif
 
void SAI_TxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config);
 
void SAI_RxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config);
 
void SAI_TxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config);
 
void SAI_RxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config);
 
void SAI_TxSetConfig(I2S_Type *base, sai_transceiver_t *config);
 
void SAI_RxSetConfig(I2S_Type *base, sai_transceiver_t *config);
 
void SAI_GetClassicI2SConfig(sai_transceiver_t *config,
                             sai_word_width_t bitWidth,
                             sai_mono_stereo_t mode,
                             uint32_t saiChannelMask);
 
void SAI_GetLeftJustifiedConfig(sai_transceiver_t *config,
                                sai_word_width_t bitWidth,
                                sai_mono_stereo_t mode,
                                uint32_t saiChannelMask);
 
void SAI_GetRightJustifiedConfig(sai_transceiver_t *config,
                                 sai_word_width_t bitWidth,
                                 sai_mono_stereo_t mode,
                                 uint32_t saiChannelMask);
 
void SAI_GetTDMConfig(sai_transceiver_t *config,
                      sai_frame_sync_len_t frameSyncWidth,
                      sai_word_width_t bitWidth,
                      uint32_t dataWordNum,
                      uint32_t saiChannelMask);
 
void SAI_GetDSPConfig(sai_transceiver_t *config,
                      sai_frame_sync_len_t frameSyncWidth,
                      sai_word_width_t bitWidth,
                      sai_mono_stereo_t mode,
                      uint32_t saiChannelMask);
static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)
{
    return base->TCSR;
}
 
static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)
{
    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
}
 
static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)
{
    return base->RCSR;
}
 
static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)
{
    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
}
 
void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
 
void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
 
void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
 
void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
 
void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order);
 
void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order);
 
void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
 
void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
 
void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
 
void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
 
void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
 
void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
#endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
 
#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
 
static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
{
    if (isEnabled)
    {
        base->TCR4 |= I2S_TCR4_FCONT_MASK;
    }
    else
    {
        base->TCR4 &= ~I2S_TCR4_FCONT_MASK;
    }
}
 
static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
{
    if (isEnabled)
    {
        base->RCR4 |= I2S_RCR4_FCONT_MASK;
    }
    else
    {
        base->RCR4 &= ~I2S_RCR4_FCONT_MASK;
    }
}
#endif
 
static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)
{
    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
}
 
static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)
{
    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
}
 
static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)
{
    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
}
 
static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)
{
    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
}
 
static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
{
    if (enable)
    {
        base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
    }
    else
    {
        base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
    }
}
 
static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
{
    if (enable)
    {
        base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
    }
    else
    {
        base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
    }
}
 
static inline uint32_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
{
    return (uint32_t)(&(base->TDR)[channel]);
}
 
static inline uint32_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
{
    return (uint32_t)(&(base->RDR)[channel]);
}
 
void SAI_TxSetFormat(I2S_Type *base,
                     sai_transfer_format_t *format,
                     uint32_t mclkSourceClockHz,
                     uint32_t bclkSourceClockHz);
 
void SAI_RxSetFormat(I2S_Type *base,
                     sai_transfer_format_t *format,
                     uint32_t mclkSourceClockHz,
                     uint32_t bclkSourceClockHz);
 
void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
void SAI_WriteMultiChannelBlocking(
    I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)
{
    base->TDR[channel] = data;
}
 
void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
void SAI_ReadMultiChannelBlocking(
    I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)
{
    return base->RDR[channel];
}
 
void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
 
void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
 
void SAI_TransferTxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config);
 
void SAI_TransferRxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config);
 
status_t SAI_TransferTxSetFormat(I2S_Type *base,
                                 sai_handle_t *handle,
                                 sai_transfer_format_t *format,
                                 uint32_t mclkSourceClockHz,
                                 uint32_t bclkSourceClockHz);
 
status_t SAI_TransferRxSetFormat(I2S_Type *base,
                                 sai_handle_t *handle,
                                 sai_transfer_format_t *format,
                                 uint32_t mclkSourceClockHz,
                                 uint32_t bclkSourceClockHz);
 
status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
 
status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
 
status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
 
status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
 
void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle);
 
void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle);
 
void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle);
 
void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle);
 
void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
 
void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
 
#if defined(__cplusplus)
}
#endif /*_cplusplus*/
 
#endif /* _FSL_SAI_H_ */