fsl_common.h

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/*
 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
 * Copyright 2016-2020 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
 
#ifndef _FSL_COMMON_H_
#define _FSL_COMMON_H_
 
#include <assert.h>
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
 
#if defined(__ICCARM__)
#include <stddef.h>
#endif
 
/*
 * For CMSIS pack RTE.
 * CMSIS pack RTE generates "RTC_Components.h" which contains the statements
 * of the related <RTE_Components_h> element for all selected software components.
 */
#ifdef _RTE_
#include "RTE_Components.h"
#endif
 
#include "fsl_device_registers.h"
 
/*******************************************************************************
 * Definitions
 ******************************************************************************/
 
#define MAKE_STATUS(group, code) ((((group)*100) + (code)))
 
#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
 
#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 2, 4))
 
/* Debug console type definition. */
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE          0U      
#define DEBUG_CONSOLE_DEVICE_TYPE_UART          1U      
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART        2U      
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI         3U      
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC        4U      
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM      5U      
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART         6U      
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART        7U      
#define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART    8U      
#define DEBUG_CONSOLE_DEVICE_TYPE_SWO           9U      
enum _status_groups
{
    kStatusGroup_Generic = 0,                 
    kStatusGroup_FLASH = 1,                   
    kStatusGroup_LPSPI = 4,                   
    kStatusGroup_FLEXIO_SPI = 5,              
    kStatusGroup_DSPI = 6,                    
    kStatusGroup_FLEXIO_UART = 7,             
    kStatusGroup_FLEXIO_I2C = 8,              
    kStatusGroup_LPI2C = 9,                   
    kStatusGroup_UART = 10,                   
    kStatusGroup_I2C = 11,                    
    kStatusGroup_LPSCI = 12,                  
    kStatusGroup_LPUART = 13,                 
    kStatusGroup_SPI = 14,                    
    kStatusGroup_XRDC = 15,                   
    kStatusGroup_SEMA42 = 16,                 
    kStatusGroup_SDHC = 17,                   
    kStatusGroup_SDMMC = 18,                  
    kStatusGroup_SAI = 19,                    
    kStatusGroup_MCG = 20,                    
    kStatusGroup_SCG = 21,                    
    kStatusGroup_SDSPI = 22,                  
    kStatusGroup_FLEXIO_I2S = 23,             
    kStatusGroup_FLEXIO_MCULCD = 24,          
    kStatusGroup_FLASHIAP = 25,               
    kStatusGroup_FLEXCOMM_I2C = 26,           
    kStatusGroup_I2S = 27,                    
    kStatusGroup_IUART = 28,                  
    kStatusGroup_CSI = 29,                    
    kStatusGroup_MIPI_DSI = 30,               
    kStatusGroup_SDRAMC = 35,                 
    kStatusGroup_POWER = 39,                  
    kStatusGroup_ENET = 40,                   
    kStatusGroup_PHY = 41,                    
    kStatusGroup_TRGMUX = 42,                 
    kStatusGroup_SMARTCARD = 43,              
    kStatusGroup_LMEM = 44,                   
    kStatusGroup_QSPI = 45,                   
    kStatusGroup_DMA = 50,                    
    kStatusGroup_EDMA = 51,                   
    kStatusGroup_DMAMGR = 52,                 
    kStatusGroup_FLEXCAN = 53,                
    kStatusGroup_LTC = 54,                    
    kStatusGroup_FLEXIO_CAMERA = 55,          
    kStatusGroup_LPC_SPI = 56,                
    kStatusGroup_LPC_USART = 57,              
    kStatusGroup_DMIC = 58,                   
    kStatusGroup_SDIF = 59,                   
    kStatusGroup_SPIFI = 60,                  
    kStatusGroup_OTP = 61,                    
    kStatusGroup_MCAN = 62,                   
    kStatusGroup_CAAM = 63,                   
    kStatusGroup_ECSPI = 64,                  
    kStatusGroup_USDHC = 65,                  
    kStatusGroup_LPC_I2C = 66,                
    kStatusGroup_DCP = 67,                    
    kStatusGroup_MSCAN = 68,                  
    kStatusGroup_ESAI = 69,                   
    kStatusGroup_FLEXSPI = 70,                
    kStatusGroup_MMDC = 71,                   
    kStatusGroup_PDM = 72,                    
    kStatusGroup_SDMA = 73,                   
    kStatusGroup_ICS = 74,                    
    kStatusGroup_SPDIF = 75,                  
    kStatusGroup_LPC_MINISPI = 76,            
    kStatusGroup_HASHCRYPT = 77,              
    kStatusGroup_LPC_SPI_SSP = 78,            
    kStatusGroup_I3C = 79,                    
    kStatusGroup_LPC_I2C_1 = 97,              
    kStatusGroup_NOTIFIER = 98,               
    kStatusGroup_DebugConsole = 99,           
    kStatusGroup_SEMC = 100,                  
    kStatusGroup_ApplicationRangeStart = 101, 
    kStatusGroup_IAP = 102,                   
    kStatusGroup_SFA = 103,                   
    kStatusGroup_SPC = 104,                   
    kStatusGroup_PUF = 105,                   
    kStatusGroup_HAL_GPIO = 121,              
    kStatusGroup_HAL_UART = 122,              
    kStatusGroup_HAL_TIMER = 123,             
    kStatusGroup_HAL_SPI = 124,               
    kStatusGroup_HAL_I2C = 125,               
    kStatusGroup_HAL_FLASH = 126,             
    kStatusGroup_HAL_PWM = 127,               
    kStatusGroup_HAL_RNG = 128,               
    kStatusGroup_TIMERMANAGER = 135,          
    kStatusGroup_SERIALMANAGER = 136,         
    kStatusGroup_LED = 137,                   
    kStatusGroup_BUTTON = 138,                
    kStatusGroup_EXTERN_EEPROM = 139,         
    kStatusGroup_SHELL = 140,                 
    kStatusGroup_MEM_MANAGER = 141,           
    kStatusGroup_LIST = 142,                  
    kStatusGroup_OSA = 143,                   
    kStatusGroup_COMMON_TASK = 144,           
    kStatusGroup_MSG = 145,                   
    kStatusGroup_SDK_OCOTP = 146,             
    kStatusGroup_SDK_FLEXSPINOR = 147,        
    kStatusGroup_CODEC = 148,                 
    kStatusGroup_ASRC = 149,                 
    kStatusGroup_OTFAD = 150,                 
    kStatusGroup_SDIOSLV = 151,                 
};
 
enum
{
    kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0),  
    kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1),      
    kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2),    
    kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3),   
    kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4),   
    kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5),   
    kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6),   
};
 
typedef int32_t status_t;
 
/*
 * Macro guard for whether to use default weak IRQ implementation in drivers
 */
#ifndef FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
#define FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ 1
#endif
 
/* @{ */
#if !defined(MIN)
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
#endif
 
#if !defined(MAX)
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
#endif
/* @} */
 
#if !defined(ARRAY_SIZE)
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif
 
/* @{ */
#if !defined(UINT16_MAX)
#define UINT16_MAX ((uint16_t)-1)
#endif
 
#if !defined(UINT32_MAX)
#define UINT32_MAX ((uint32_t)-1)
#endif
/* @} */
 
/* @{ */
#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)(((uint64_t)(us) * (clockFreqInHz)) / 1000000U)
 
#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000000U / (clockFreqInHz))
 
#define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)(ms) * (clockFreqInHz) / 1000U)
 
#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000U / (clockFreqInHz))
/* @} */
 
#if (defined __CORTEX_M) && ((__CORTEX_M == 4U) || (__CORTEX_M == 7U))
#define SDK_ISR_EXIT_BARRIER __DSB()
#else
#define SDK_ISR_EXIT_BARRIER
#endif
 
/* @} */
 
/* @{ */
#if (defined(__ICCARM__))
 
_Pragma("diag_suppress=Pm120")
#define SDK_PRAGMA(x) _Pragma(#x)
    _Pragma("diag_error=Pm120")
#define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
 
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
#define SDK_L1DCACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) var
#endif
 
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
#define SDK_L2CACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L2CACHE_LINESIZE_BYTE) var
#endif
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
 
#define SDK_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var
 
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
#define SDK_L1DCACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))) var
#endif
 
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
#define SDK_L2CACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))) var
#endif
#elif defined(__GNUC__)
 
#define SDK_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
 
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
#define SDK_L1DCACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
#endif
 
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
#define SDK_L2CACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)))
#endif
#else
#error Toolchain not supported
#define SDK_ALIGN(var, alignbytes) var
#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
#define SDK_L1DCACHE_ALIGN(var) var
#endif
#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
#define SDK_L2CACHE_ALIGN(var) var
#endif
#endif
 
#define SDK_SIZEALIGN(var, alignbytes) \
    ((unsigned int)((var) + ((alignbytes)-1U)) & (unsigned int)(~(unsigned int)((alignbytes)-1U)))
/* @} */
 
/* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
 * "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables,
 * please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them, these zero-inited variables
 * will be initialized to zero in system startup.
 */
/* @{ */
#if (defined(__ICCARM__))
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
#define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable"
#define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
#else
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
#endif
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
    __attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var
#if(defined(__CC_ARM))
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
    __attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var
#else
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section(".bss.NonCacheable"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
    __attribute__((section(".bss.NonCacheable"))) __attribute__((aligned(alignbytes))) var
#endif
#else
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) __attribute__((aligned(alignbytes))) var
#endif
#elif(defined(__XCC__))
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
    __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
    __attribute__((section("NonCacheable"))) var __attribute__((aligned(alignbytes)))
#elif(defined(__GNUC__))
/* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"
 * in your projects to make sure the non-cacheable section variables will be initialized in system startup.
 */
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
    __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
    __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes)))
#else
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var __attribute__((aligned(alignbytes)))
#endif
#else
#error Toolchain not supported.
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var
#endif
/* @} */
 
/* @{ */
#if defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE
#if (defined(__ICCARM__))
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#elif(defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#else
#error Toolchain not supported.
#endif /* defined(__ICCARM__) */
#else
#if (defined(__ICCARM__))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#elif(defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#else
#error Toolchain not supported.
#endif
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
/* @} */
 
#if (defined(__ICCARM__))
#define RAMFUNCTION_SECTION_CODE(func) func @"RamFunction"
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
#elif(defined(__GNUC__))
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
#else
#error Toolchain not supported.
#endif /* defined(__ICCARM__) */
/* @} */
 
/* For switch case code block, if case section ends without "break;" statement, there wil be
 fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc.
 To suppress this warning, "SUPPRESS_FALL_THROUGH_WARNING();" need to be added at the end of each
 case section which misses "break;"statement.
 */
/* @{ */
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
#define SUPPRESS_FALL_THROUGH_WARNING() __attribute__ ((fallthrough))
#else
#define SUPPRESS_FALL_THROUGH_WARNING()
#endif
/* @} */
 
#if defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
void DefaultISR(void);
#endif
/*
 * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t
 * defined in previous of this file.
 */
#include "fsl_clock.h"
 
/*
 * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral
 */
#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
     (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
#include "fsl_reset.h"
#endif
 
/*******************************************************************************
 * API
 ******************************************************************************/
 
#if defined(__cplusplus)
        extern "C"
{
#endif
 
    static inline status_t EnableIRQ(IRQn_Type interrupt)
    {
        if (NotAvail_IRQn == interrupt)
        {
            return kStatus_Fail;
        }
 
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
        if ((uint32_t)interrupt >= (uint32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
        {
            return kStatus_Fail;
        }
#endif
 
#if defined(__GIC_PRIO_BITS)
        GIC_EnableIRQ(interrupt);
#else
        NVIC_EnableIRQ(interrupt);
#endif
        return kStatus_Success;
    }
 
    static inline status_t DisableIRQ(IRQn_Type interrupt)
    {
        if (NotAvail_IRQn == interrupt)
        {
            return kStatus_Fail;
        }
 
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
        if ((uint32_t)interrupt >= (uint32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
        {
            return kStatus_Fail;
        }
#endif
 
#if defined(__GIC_PRIO_BITS)
        GIC_DisableIRQ(interrupt);
#else
    NVIC_DisableIRQ(interrupt);
#endif
        return kStatus_Success;
    }
 
    static inline uint32_t DisableGlobalIRQ(void)
    {
#if defined (__XCC__)
        return 0;
#else
#if defined(CPSR_I_Msk)
        uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;
 
        __disable_irq();
 
        return cpsr;
#else
    uint32_t regPrimask = __get_PRIMASK();
 
    __disable_irq();
 
    return regPrimask;
#endif
#endif
    }
 
    static inline void EnableGlobalIRQ(uint32_t primask)
    {
#if defined (__XCC__)
#else
#if defined(CPSR_I_Msk)
        __set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
#else
    __set_PRIMASK(primask);
#endif
#endif
    }
 
#if defined(ENABLE_RAM_VECTOR_TABLE)
 
    uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
#endif /* ENABLE_RAM_VECTOR_TABLE. */
 
#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
 
    void EnableDeepSleepIRQ(IRQn_Type interrupt);
 
    void DisableDeepSleepIRQ(IRQn_Type interrupt);
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
 
    void *SDK_Malloc(size_t size, size_t alignbytes);
 
    void SDK_Free(void *ptr);
 
    void SDK_DelayAtLeastUs(uint32_t delay_us, uint32_t coreClock_Hz);
 
#if defined(__cplusplus)
}
#endif
 
#endif /* _FSL_COMMON_H_ */