uart_serial.h
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1 
33 /*
34  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
35  */
36 #ifndef _UART_SERIAL_H_
37 #define _UART_SERIAL_H_
38 
39 #include "compiler.h"
40 #include "sysclk.h"
41 #if (SAMG55)
42 #include "flexcom.h"
43 #endif
44 #if ((!SAM4L) && (!SAMG55))
45 #include "uart.h"
46 #endif
47 #include "usart.h"
48 
52 #include "conf_uart_serial.h"
54 
56 
58 typedef struct uart_rs232_options {
60  uint32_t baudrate;
61 
63  uint32_t charlength;
64 
69  uint32_t paritytype;
70 
72  uint32_t stopbits;
73 
74 } usart_rs232_options_t;
75 
76 typedef usart_rs232_options_t usart_serial_options_t;
77 
78 typedef Usart *usart_if;
79 
87 static inline void usart_serial_init(usart_if p_usart,
88  usart_serial_options_t *opt)
89 {
90 #if ((!SAM4L) && (!SAMG55))
91  sam_uart_opt_t uart_settings;
92  uart_settings.ul_mck = sysclk_get_peripheral_hz();
93  uart_settings.ul_baudrate = opt->baudrate;
94  uart_settings.ul_mode = opt->paritytype;
95 #endif
96 
97  sam_usart_opt_t usart_settings;
98  usart_settings.baudrate = opt->baudrate;
99  usart_settings.char_length = opt->charlength;
100  usart_settings.parity_type = opt->paritytype;
101  usart_settings.stop_bits= opt->stopbits;
102  usart_settings.channel_mode= US_MR_CHMODE_NORMAL;
103 
104 #ifdef UART
105  if (UART == (Uart*)p_usart) {
106  sysclk_enable_peripheral_clock(ID_UART);
107  /* Configure UART */
108  uart_init((Uart*)p_usart, &uart_settings);
109  }
110 #else
111 # ifdef UART0
112  if (UART0 == (Uart*)p_usart) {
113  sysclk_enable_peripheral_clock(ID_UART0);
114  /* Configure UART */
115  uart_init((Uart*)p_usart, &uart_settings);
116  }
117 # endif
118 # ifdef UART1
119  if (UART1 == (Uart*)p_usart) {
120  sysclk_enable_peripheral_clock(ID_UART1);
121  /* Configure UART */
122  uart_init((Uart*)p_usart, &uart_settings);
123  }
124 # endif
125 # ifdef UART2
126  if (UART2 == (Uart*)p_usart) {
127  sysclk_enable_peripheral_clock(ID_UART2);
128  /* Configure UART */
129  uart_init((Uart*)p_usart, &uart_settings);
130  }
131 # endif
132 # ifdef UART3
133  if (UART3 == (Uart*)p_usart) {
134  sysclk_enable_peripheral_clock(ID_UART3);
135  /* Configure UART */
136  uart_init((Uart*)p_usart, &uart_settings);
137  }
138 # endif
139 # ifdef UART4
140  if (UART4 == (Uart*)p_usart) {
141  sysclk_enable_peripheral_clock(ID_UART4);
142  /* Configure UART */
143  uart_init((Uart*)p_usart, &uart_settings);
144  }
145 # endif
146 #endif /* ifdef UART */
147 
148 
149 #ifdef USART
150  if (USART == p_usart) {
151 #if (!SAM4L)
152  sysclk_enable_peripheral_clock(ID_USART);
153  /* Configure USART */
154  usart_init_rs232(p_usart, &usart_settings,
155  sysclk_get_peripheral_hz());
156 #endif
157 #if (SAM4L)
158  sysclk_enable_peripheral_clock(p_usart);
159  /* Configure USART */
160  usart_init_rs232(p_usart, &usart_settings,
161  sysclk_get_peripheral_bus_hz(p_usart));
162 #endif
163  /* Enable the receiver and transmitter. */
164  usart_enable_tx(p_usart);
165  usart_enable_rx(p_usart);
166  }
167 #else
168 # ifdef USART0
169  if (USART0 == p_usart) {
170 #if (!SAM4L)
171 #if (SAMG55)
172  flexcom_enable(FLEXCOM0);
173  flexcom_set_opmode(FLEXCOM0, FLEXCOM_USART);
174 #else
175  sysclk_enable_peripheral_clock(ID_USART0);
176 #endif
177  /* Configure USART */
178  usart_init_rs232(p_usart, &usart_settings,
179  sysclk_get_peripheral_hz());
180 #endif
181 #if (SAM4L)
182  sysclk_enable_peripheral_clock(p_usart);
183  /* Configure USART */
184  usart_init_rs232(p_usart, &usart_settings,
185  sysclk_get_peripheral_bus_hz(p_usart));
186 #endif
187  /* Enable the receiver and transmitter. */
188  usart_enable_tx(p_usart);
189  usart_enable_rx(p_usart);
190  }
191 # endif
192 # ifdef USART1
193  if (USART1 == p_usart) {
194 #if (!SAM4L)
195 #if (SAMG55)
196  flexcom_enable(FLEXCOM1);
197  flexcom_set_opmode(FLEXCOM1, FLEXCOM_USART);
198 #else
199  sysclk_enable_peripheral_clock(ID_USART1);
200 #endif
201  /* Configure USART */
202  usart_init_rs232(p_usart, &usart_settings,
203  sysclk_get_peripheral_hz());
204 #endif
205 #if (SAM4L)
206  sysclk_enable_peripheral_clock(p_usart);
207  /* Configure USART */
208  usart_init_rs232(p_usart, &usart_settings,
209  sysclk_get_peripheral_bus_hz(p_usart));
210 #endif
211  /* Enable the receiver and transmitter. */
212  usart_enable_tx(p_usart);
213  usart_enable_rx(p_usart);
214  }
215 # endif
216 # ifdef USART2
217  if (USART2 == p_usart) {
218 #if (!SAM4L)
219 #if (SAMG55)
220  flexcom_enable(FLEXCOM2);
221  flexcom_set_opmode(FLEXCOM2, FLEXCOM_USART);
222 #else
223  sysclk_enable_peripheral_clock(ID_USART2);
224 #endif
225  /* Configure USART */
226  usart_init_rs232(p_usart, &usart_settings,
227  sysclk_get_peripheral_hz());
228 #endif
229 #if (SAM4L)
230  sysclk_enable_peripheral_clock(p_usart);
231  /* Configure USART */
232  usart_init_rs232(p_usart, &usart_settings,
233  sysclk_get_peripheral_bus_hz(p_usart));
234 #endif
235  /* Enable the receiver and transmitter. */
236  usart_enable_tx(p_usart);
237  usart_enable_rx(p_usart);
238  }
239 # endif
240 # ifdef USART3
241  if (USART3 == p_usart) {
242 #if (!SAM4L)
243 #if (SAMG55)
244  flexcom_enable(FLEXCOM3);
245  flexcom_set_opmode(FLEXCOM3, FLEXCOM_USART);
246 #else
247  sysclk_enable_peripheral_clock(ID_USART3);
248 #endif
249  /* Configure USART */
250  usart_init_rs232(p_usart, &usart_settings,
251  sysclk_get_peripheral_hz());
252 #endif
253 #if (SAM4L)
254  sysclk_enable_peripheral_clock(p_usart);
255  /* Configure USART */
256  usart_init_rs232(p_usart, &usart_settings,
257  sysclk_get_peripheral_bus_hz(p_usart));
258 #endif
259  /* Enable the receiver and transmitter. */
260  usart_enable_tx(p_usart);
261  usart_enable_rx(p_usart);
262  }
263 # endif
264 # ifdef USART4
265  if (USART4 == p_usart) {
266 #if (!SAM4L)
267 #if (SAMG55)
268  flexcom_enable(FLEXCOM4);
269  flexcom_set_opmode(FLEXCOM4, FLEXCOM_USART);
270 #else
271  sysclk_enable_peripheral_clock(ID_USART4);
272 #endif
273  /* Configure USART */
274  usart_init_rs232(p_usart, &usart_settings,
275  sysclk_get_peripheral_hz());
276 #endif
277 #if (SAM4L)
278  sysclk_enable_peripheral_clock(p_usart);
279  /* Configure USART */
280  usart_init_rs232(p_usart, &usart_settings,
281  sysclk_get_peripheral_bus_hz(p_usart));
282 #endif
283  /* Enable the receiver and transmitter. */
284  usart_enable_tx(p_usart);
285  usart_enable_rx(p_usart);
286  }
287 # endif
288 # ifdef USART5
289  if (USART5 == p_usart) {
290 #if (!SAM4L)
291 #if (SAMG55)
292  flexcom_enable(FLEXCOM5);
293  flexcom_set_opmode(FLEXCOM5, FLEXCOM_USART);
294 #else
295  sysclk_enable_peripheral_clock(ID_USART5);
296 #endif
297  /* Configure USART */
298  usart_init_rs232(p_usart, &usart_settings,
299  sysclk_get_peripheral_hz());
300 #endif
301 #if (SAM4L)
302  sysclk_enable_peripheral_clock(p_usart);
303  /* Configure USART */
304  usart_init_rs232(p_usart, &usart_settings,
305  sysclk_get_peripheral_bus_hz(p_usart));
306 #endif
307  /* Enable the receiver and transmitter. */
308  usart_enable_tx(p_usart);
309  usart_enable_rx(p_usart);
310  }
311 # endif
312 # ifdef USART6
313  if (USART6 == p_usart) {
314 #if (!SAM4L)
315 #if (SAMG55)
316  flexcom_enable(FLEXCOM6);
317  flexcom_set_opmode(FLEXCOM6, FLEXCOM_USART);
318 #else
319  sysclk_enable_peripheral_clock(ID_USART6);
320 #endif
321  /* Configure USART */
322  usart_init_rs232(p_usart, &usart_settings,
323  sysclk_get_peripheral_hz());
324 #endif
325 #if (SAM4L)
326  sysclk_enable_peripheral_clock(p_usart);
327  /* Configure USART */
328  usart_init_rs232(p_usart, &usart_settings,
329  sysclk_get_peripheral_bus_hz(p_usart));
330 #endif
331  /* Enable the receiver and transmitter. */
332  usart_enable_tx(p_usart);
333  usart_enable_rx(p_usart);
334  }
335 # endif
336 # ifdef USART7
337  if (USART7 == p_usart) {
338 #if (!SAM4L)
339 #if (SAMG55)
340  flexcom_enable(FLEXCOM7);
341  flexcom_set_opmode(FLEXCOM7, FLEXCOM_USART);
342 #else
343  sysclk_enable_peripheral_clock(ID_USART7);
344 #endif
345  /* Configure USART */
346  usart_init_rs232(p_usart, &usart_settings,
347  sysclk_get_peripheral_hz());
348 #endif
349 #if (SAM4L)
350  sysclk_enable_peripheral_clock(p_usart);
351  /* Configure USART */
352  usart_init_rs232(p_usart, &usart_settings,
353  sysclk_get_peripheral_bus_hz(p_usart));
354 #endif
355  /* Enable the receiver and transmitter. */
356  usart_enable_tx(p_usart);
357  usart_enable_rx(p_usart);
358  }
359 # endif
360 
361 #endif /* ifdef USART */
362 
363 }
364 
376 static inline int usart_serial_putchar(usart_if p_usart, const uint8_t c)
377 {
378 #ifdef UART
379  if (UART == (Uart*)p_usart) {
380  while (uart_write((Uart*)p_usart, c)!=0);
381  return 1;
382  }
383 #else
384 # ifdef UART0
385  if (UART0 == (Uart*)p_usart) {
386  while (uart_write((Uart*)p_usart, c)!=0);
387  return 1;
388  }
389 # endif
390 # ifdef UART1
391  if (UART1 == (Uart*)p_usart) {
392  while (uart_write((Uart*)p_usart, c)!=0);
393  return 1;
394  }
395 # endif
396 # ifdef UART2
397  if (UART2 == (Uart*)p_usart) {
398  while (uart_write((Uart*)p_usart, c)!=0);
399  return 1;
400  }
401 # endif
402 # ifdef UART3
403  if (UART3 == (Uart*)p_usart) {
404  while (uart_write((Uart*)p_usart, c)!=0);
405  return 1;
406  }
407 # endif
408 #endif /* ifdef UART */
409 
410 
411 #ifdef USART
412  if (USART == p_usart) {
413  while (usart_write(p_usart, c)!=0);
414  return 1;
415  }
416 #else
417 # ifdef USART0
418  if (USART0 == p_usart) {
419  while (usart_write(p_usart, c)!=0);
420  return 1;
421  }
422 # endif
423 # ifdef USART1
424  if (USART1 == p_usart) {
425  while (usart_write(p_usart, c)!=0);
426  return 1;
427  }
428 # endif
429 # ifdef USART2
430  if (USART2 == p_usart) {
431  while (usart_write(p_usart, c)!=0);
432  return 1;
433  }
434 # endif
435 # ifdef USART3
436  if (USART3 == p_usart) {
437  while (usart_write(p_usart, c)!=0);
438  return 1;
439  }
440 # endif
441 # ifdef USART4
442  if (USART4 == p_usart) {
443  while (usart_write(p_usart, c)!=0);
444  return 1;
445  }
446 # endif
447 # ifdef USART5
448  if (USART5 == p_usart) {
449  while (usart_write(p_usart, c)!=0);
450  return 1;
451  }
452 # endif
453 # ifdef USART6
454  if (USART6 == p_usart) {
455  while (usart_write(p_usart, c)!=0);
456  return 1;
457  }
458 # endif
459 # ifdef USART7
460  if (USART7 == p_usart) {
461  while (usart_write(p_usart, c)!=0);
462  return 1;
463  }
464 # endif
465 #endif /* ifdef USART */
466 
467  return 0;
468 }
476 static inline void usart_serial_getchar(usart_if p_usart, uint8_t *data)
477 {
478  uint32_t val = 0;
479 
480  /* Avoid Cppcheck Warning */
481  UNUSED(val);
482 
483 #ifdef UART
484  if (UART == (Uart*)p_usart) {
485  while (uart_read((Uart*)p_usart, data));
486  }
487 #else
488 # ifdef UART0
489  if (UART0 == (Uart*)p_usart) {
490  while (uart_read((Uart*)p_usart, data));
491  }
492 # endif
493 # ifdef UART1
494  if (UART1 == (Uart*)p_usart) {
495  while (uart_read((Uart*)p_usart, data));
496  }
497 # endif
498 # ifdef UART2
499  if (UART2 == (Uart*)p_usart) {
500  while (uart_read((Uart*)p_usart, data));
501  }
502 # endif
503 # ifdef UART3
504  if (UART3 == (Uart*)p_usart) {
505  while (uart_read((Uart*)p_usart, data));
506  }
507 # endif
508 #endif /* ifdef UART */
509 
510 
511 #ifdef USART
512  if (USART == p_usart) {
513  while (usart_read(p_usart, &val));
514  *data = (uint8_t)(val & 0xFF);
515  }
516 #else
517 # ifdef USART0
518  if (USART0 == p_usart) {
519  while (usart_read(p_usart, &val));
520  *data = (uint8_t)(val & 0xFF);
521  }
522 # endif
523 # ifdef USART1
524  if (USART1 == p_usart) {
525  while (usart_read(p_usart, &val));
526  *data = (uint8_t)(val & 0xFF);
527  }
528 # endif
529 # ifdef USART2
530  if (USART2 == p_usart) {
531  while (usart_read(p_usart, &val));
532  *data = (uint8_t)(val & 0xFF);
533  }
534 # endif
535 # ifdef USART3
536  if (USART3 == p_usart) {
537  while (usart_read(p_usart, &val));
538  *data = (uint8_t)(val & 0xFF);
539  }
540 # endif
541 # ifdef USART4
542  if (USART4 == p_usart) {
543  while (usart_read(p_usart, &val));
544  *data = (uint8_t)(val & 0xFF);
545  }
546 # endif
547 # ifdef USART5
548  if (USART5 == p_usart) {
549  while (usart_read(p_usart, &val));
550  *data = (uint8_t)(val & 0xFF);
551  }
552 # endif
553 # ifdef USART6
554  if (USART6 == p_usart) {
555  while (usart_read(p_usart, &val));
556  *data = (uint8_t)(val & 0xFF);
557  }
558 # endif
559 # ifdef USART7
560  if (USART7 == p_usart) {
561  while (usart_read(p_usart, &val));
562  *data = (uint8_t)(val & 0xFF);
563  }
564 # endif
565 #endif /* ifdef USART */
566 
567 }
568 
577 static inline uint32_t usart_serial_is_rx_ready(usart_if p_usart)
578 {
579 #ifdef UART
580  if (UART == (Uart*)p_usart) {
581  return uart_is_rx_ready((Uart*)p_usart);
582  }
583 #else
584 # ifdef UART0
585  if (UART0 == (Uart*)p_usart) {
586  return uart_is_rx_ready((Uart*)p_usart);
587  }
588 # endif
589 # ifdef UART1
590  if (UART1 == (Uart*)p_usart) {
591  return uart_is_rx_ready((Uart*)p_usart);
592  }
593 # endif
594 # ifdef UART2
595  if (UART2 == (Uart*)p_usart) {
596  return uart_is_rx_ready((Uart*)p_usart);
597  }
598 # endif
599 # ifdef UART3
600  if (UART3 == (Uart*)p_usart) {
601  return uart_is_rx_ready((Uart*)p_usart);
602  }
603 # endif
604 #endif /* ifdef UART */
605 
606 
607 #ifdef USART
608  if (USART == p_usart) {
609  return usart_is_rx_ready(p_usart);
610  }
611 #else
612 # ifdef USART0
613  if (USART0 == p_usart) {
614  return usart_is_rx_ready(p_usart);
615  }
616 # endif
617 # ifdef USART1
618  if (USART1 == p_usart) {
619  return usart_is_rx_ready(p_usart);
620  }
621 # endif
622 # ifdef USART2
623  if (USART2 == p_usart) {
624  return usart_is_rx_ready(p_usart);
625  }
626 # endif
627 # ifdef USART3
628  if (USART3 == p_usart) {
629  return usart_is_rx_ready(p_usart);
630  }
631 # endif
632 # ifdef USART4
633  if (USART4 == p_usart) {
634  return usart_is_rx_ready(p_usart);
635  }
636 # endif
637 # ifdef USART5
638  if (USART5 == p_usart) {
639  return usart_is_rx_ready(p_usart);
640  }
641 # endif
642 # ifdef USART6
643  if (USART6 == p_usart) {
644  return usart_is_rx_ready(p_usart);
645  }
646 # endif
647 # ifdef USART7
648  if (USART7 == p_usart) {
649  return usart_is_rx_ready(p_usart);
650  }
651 # endif
652 #endif /* ifdef USART */
653 
654  return 0;
655 }
656 
665 status_code_t usart_serial_write_packet(usart_if usart, const uint8_t *data,
666  size_t len);
667 
676 status_code_t usart_serial_read_packet(usart_if usart, uint8_t *data,
677  size_t len);
678 
679 #endif /* _UART_SERIAL_H_ */
usart_if
Usart * usart_if
Definition: uart_serial.h:78
usart_enable_rx
void usart_enable_rx(Usart *p_usart)
Enable USART receiver.
Definition: usart.c:1426
uart_rs232_options::charlength
uint32_t charlength
Definition: uart_serial.h:63
ID_USART1
#define ID_USART1
USART 1 (USART1)
Definition: same70j19.h:419
UNUSED
#define UNUSED(v)
Marking v as a unused parameter or value.
Definition: compiler.h:86
Usart
Usart hardware registers.
Definition: utils/cmsis/same70/include/component/usart.h:46
sam_uart_opt::ul_mck
uint32_t ul_mck
Definition: drivers/uart/uart.h:60
sam_uart_opt::ul_baudrate
uint32_t ul_baudrate
Definition: drivers/uart/uart.h:62
sam_uart_opt::ul_mode
uint32_t ul_mode
Definition: drivers/uart/uart.h:64
UART3
#define UART3
(UART3 ) Base Address
Definition: same70n19.h:584
usart_serial_putchar
static int usart_serial_putchar(usart_if p_usart, const uint8_t c)
Sends a character with the USART.
Definition: uart_serial.h:376
Uart
Uart hardware registers.
Definition: utils/cmsis/same70/include/component/uart.h:46
uart_rs232_options::stopbits
uint32_t stopbits
Definition: uart_serial.h:72
uart_read
uint32_t uart_read(Uart *p_uart, uint8_t *puc_data)
Read from UART Receive Holding Register. Before reading user should check if rx is ready...
Definition: uart.c:362
US_MR_CHMODE_NORMAL
#define US_MR_CHMODE_NORMAL
(US_MR) Normal mode
Definition: utils/cmsis/same70/include/component/usart.h:157
sam_usart_opt_t::channel_mode
uint32_t channel_mode
Definition: drivers/usart/usart.h:115
usart_serial_write_packet
status_code_t usart_serial_write_packet(usart_if usart, const uint8_t *data, size_t len)
Send a sequence of bytes to a USART device.
Definition: usart_serial.c:48
ID_UART3
#define ID_UART3
UART 3 (UART3)
Definition: same70n19.h:468
usart_rs232_options_t
struct uart_rs232_options usart_rs232_options_t
UART1
#define UART1
(UART1 ) Base Address
Definition: same70j19.h:527
USART0
#define USART0
(USART0) Base Address
Definition: same70j19.h:505
ID_UART0
#define ID_UART0
UART 0 (UART0)
Definition: same70j19.h:414
USART1
#define USART1
(USART1) Base Address
Definition: same70j19.h:506
uart_init
uint32_t uart_init(Uart *p_uart, const sam_uart_opt_t *p_uart_opt)
Configure UART with the specified parameters.
Definition: uart.c:81
compiler.h
Commonly used includes, types and macros.
sam_usart_opt_t
Definition: drivers/usart/usart.h:85
usart_read
uint32_t usart_read(Usart *p_usart, uint32_t *c)
Read from USART Receive Holding Register.
Definition: usart.c:1759
sysclk_get_peripheral_hz
static uint32_t sysclk_get_peripheral_hz(void)
Retrieves the current rate in Hz of the peripheral clocks.
Definition: same70/sysclk.h:392
sam_usart_opt_t::stop_bits
uint32_t stop_bits
Definition: drivers/usart/usart.h:108
sam_usart_opt_t::parity_type
uint32_t parity_type
Definition: drivers/usart/usart.h:101
usart_is_rx_ready
uint32_t usart_is_rx_ready(Usart *p_usart)
Check if the received data are ready. Check if Data have been received and loaded into USART_RHR...
Definition: usart.c:1688
usart_init_rs232
uint32_t usart_init_rs232(Usart *p_usart, const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck)
Configure USART to work in RS232 mode.
Definition: usart.c:274
ID_UART1
#define ID_UART1
UART 1 (UART1)
Definition: same70j19.h:415
sam_usart_opt_t::baudrate
uint32_t baudrate
Definition: drivers/usart/usart.h:87
ID_UART2
#define ID_UART2
UART 2 (UART2)
Definition: same70j19.h:437
uart_is_rx_ready
uint32_t uart_is_rx_ready(Uart *p_uart)
Check if Received data is ready. Check if data has been received and loaded in UART_RHR.
Definition: uart.c:302
usart_serial_getchar
static void usart_serial_getchar(usart_if p_usart, uint8_t *data)
Waits until a character is received, and returns it.
Definition: uart_serial.h:476
uart_rs232_options
Definition: uart_serial.h:58
data
USBInterfaceDescriptor data
Definition: CDCDSerialDriver.h:117
sam_uart_opt
Option list for UART peripheral initialization.
Definition: drivers/uart/uart.h:58
ID_USART0
#define ID_USART0
USART 0 (USART0)
Definition: same70j19.h:418
status_code_t
enum status_code status_code_t
Definition: status_codes.h:97
usart_serial_init
static void usart_serial_init(usart_if p_usart, usart_serial_options_t *opt)
Initializes the Usart in master mode.
Definition: uart_serial.h:87
sam_usart_opt_t::char_length
uint32_t char_length
Definition: drivers/usart/usart.h:94
uart_write
uint32_t uart_write(Uart *p_uart, const uint8_t uc_data)
Write to UART Transmit Holding Register Before writing user should check if tx is ready (or empty)...
Definition: uart.c:342
usart_enable_tx
void usart_enable_tx(Usart *p_usart)
Enable USART transmitter.
Definition: usart.c:1384
sysclk_enable_peripheral_clock
static void sysclk_enable_peripheral_clock(uint32_t ul_id)
Enable a peripheral&#39;s clock.
Definition: same70/sysclk.h:423
UART0
#define UART0
(UART0 ) Base Address
Definition: same70j19.h:525
USART2
#define USART2
(USART2) Base Address
Definition: same70n19.h:548
uart_rs232_options::paritytype
uint32_t paritytype
Definition: uart_serial.h:69
uart_rs232_options::baudrate
uint32_t baudrate
Definition: uart_serial.h:60
UART4
#define UART4
(UART4 ) Base Address
Definition: same70n19.h:585
usart_write
uint32_t usart_write(Usart *p_usart, uint32_t c)
Write to USART Transmit Holding Register.
Definition: usart.c:1704
usart_serial_read_packet
status_code_t usart_serial_read_packet(usart_if usart, uint8_t *data, size_t len)
Receive a sequence of bytes to a USART device.
Definition: usart_serial.c:68
usart_serial_options_t
usart_rs232_options_t usart_serial_options_t
Definition: uart_serial.h:76
usart_serial_is_rx_ready
static uint32_t usart_serial_is_rx_ready(usart_if p_usart)
Check if Received data is ready.
Definition: uart_serial.h:577
sysclk_get_peripheral_bus_hz
static uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module)
Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral...
Definition: same70/sysclk.h:408
ID_USART2
#define ID_USART2
USART 2 (USART2)
Definition: same70n19.h:445
UART2
#define UART2
(UART2 ) Base Address
Definition: same70j19.h:539
ID_UART4
#define ID_UART4
UART 4 (UART4)
Definition: same70n19.h:469
conf_uart_serial.h
USART Serial Configuration.

inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:17:58