uart.c

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/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */

#include "uart.h"


#ifdef __cplusplus
extern "C" {
#endif


uint32_t uart_init(Uart *p_uart, const sam_uart_opt_t *p_uart_opt)
{
        uint32_t cd = 0;

        /* Reset and disable receiver & transmitter */
        p_uart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX
                        | UART_CR_RXDIS | UART_CR_TXDIS;

        /* Check and configure baudrate */
        /* Asynchronous, no oversampling */
        cd = (p_uart_opt->ul_mck / p_uart_opt->ul_baudrate) / UART_MCK_DIV;
        if (cd < UART_MCK_DIV_MIN_FACTOR || cd > UART_MCK_DIV_MAX_FACTOR)
                return 1;

        p_uart->UART_BRGR = cd;
        /* Configure mode */
        p_uart->UART_MR = p_uart_opt->ul_mode;

#if (!SAMV71 && !SAMV70 && !SAME70 && !SAMS70)
        /* Disable PDC channel */
        p_uart->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
#endif

        /* Enable receiver and transmitter */
        p_uart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;

        return 0;
}

void uart_enable_tx(Uart *p_uart)
{
        /* Enable transmitter */
        p_uart->UART_CR = UART_CR_TXEN;
}

void uart_disable_tx(Uart *p_uart)
{
        /* Disable transmitter */
        p_uart->UART_CR = UART_CR_TXDIS;
}

void uart_reset_tx(Uart *p_uart)
{
        /* Reset transmitter */
        p_uart->UART_CR = UART_CR_RSTTX | UART_CR_TXDIS;
}

void uart_enable_rx(Uart *p_uart)
{
        /* Enable receiver */
        p_uart->UART_CR = UART_CR_RXEN;
}

void uart_disable_rx(Uart *p_uart)
{
        /* Disable receiver */
        p_uart->UART_CR = UART_CR_RXDIS;
}

void uart_reset_rx(Uart *p_uart)
{
        /* Reset receiver */
        p_uart->UART_CR = UART_CR_RSTRX | UART_CR_RXDIS;
}

void uart_enable(Uart *p_uart)
{
        /* Enable receiver and transmitter */
        p_uart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
}

void uart_disable(Uart *p_uart)
{
        /* Disable receiver and transmitter */
        p_uart->UART_CR = UART_CR_RXDIS | UART_CR_TXDIS;
}

void uart_reset(Uart *p_uart)
{
        /* Reset and disable receiver & transmitter */
        p_uart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX
                        | UART_CR_RXDIS | UART_CR_TXDIS;
}

void uart_enable_interrupt(Uart *p_uart, uint32_t ul_sources)
{
        p_uart->UART_IER = ul_sources;
}

void uart_disable_interrupt(Uart *p_uart, uint32_t ul_sources)
{
        p_uart->UART_IDR = ul_sources;
}

uint32_t uart_get_interrupt_mask(Uart *p_uart)
{
        return p_uart->UART_IMR;
}

uint32_t uart_get_status(Uart *p_uart)
{
        return p_uart->UART_SR;
}

void uart_reset_status(Uart *p_uart)
{
        p_uart->UART_CR = UART_CR_RSTSTA;
}

uint32_t uart_is_tx_ready(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_TXRDY) > 0;
}

uint32_t uart_is_tx_empty(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_TXEMPTY) > 0;
}

uint32_t uart_is_rx_ready(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_RXRDY) > 0;
}

uint32_t uart_is_tx_buf_empty(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_TXEMPTY) > 0;
}

void uart_set_clock_divisor(Uart *p_uart, uint16_t us_divisor)
{
        p_uart->UART_BRGR = us_divisor;
}

uint32_t uart_write(Uart *p_uart, const uint8_t uc_data)
{
        /* Check if the transmitter is ready */
        if (!(p_uart->UART_SR & UART_SR_TXRDY))
                return 1;

        /* Send character */
        p_uart->UART_THR = uc_data;
        return 0;
}

uint32_t uart_read(Uart *p_uart, uint8_t *puc_data)
{
        /* Check if the receiver is ready */
        if ((p_uart->UART_SR & UART_SR_RXRDY) == 0)
                return 1;

        /* Read character */
        *puc_data = (uint8_t) p_uart->UART_RHR;
        return 0;
}

#if (!SAMV71 && !SAMV70 && !SAME70 && !SAMS70)

uint32_t uart_is_rx_buf_end(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_ENDRX) > 0;
}

uint32_t uart_is_tx_buf_end(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_ENDTX) > 0;
}

uint32_t uart_is_rx_buf_full(Uart *p_uart)
{
        return (p_uart->UART_SR & UART_SR_RXBUFF) > 0;
}

Pdc *uart_get_pdc_base(Uart *p_uart)
{
        Pdc *p_pdc_base;

#if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM)
        if (p_uart == UART0)
                p_pdc_base = PDC_UART0;
#elif (SAM3XA || SAM3U)
        if (p_uart == UART)
                p_pdc_base = PDC_UART;
#else
#error "Unsupported device"
#endif

#if (SAM3S || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM)
        if (p_uart == UART1)
                p_pdc_base = PDC_UART1;
#endif

#if (SAM4N)
        if (p_uart == UART2)
                p_pdc_base = PDC_UART2;
#endif

        return p_pdc_base;
}
#endif

#if (SAM4C || SAM4CP || SAM4CM)

void uart_enable_optical_interface(Uart *p_uart)
{
        Assert(p_uart == UART1);
        p_uart->UART_MR |= UART_MR_OPT_EN;
}

void uart_disable_optical_interface(Uart *p_uart)
{
        Assert(p_uart == UART1);
        p_uart->UART_MR &= ~UART_MR_OPT_EN;
}

void uart_config_optical_interface(Uart *p_uart,
                struct uart_config_optical *cfg)
{
        Assert(p_uart == UART1);
        uint32_t reg = p_uart->UART_MR;

        reg &= ~(UART_MR_OPT_RXINV | UART_MR_OPT_MDINV | UART_MR_FILTER
                        | UART_MR_OPT_CLKDIV_Msk | UART_MR_OPT_DUTY_Msk
                        | UART_MR_OPT_CMPTH_Msk);
        reg |= (cfg->rx_inverted ? UART_MR_OPT_RXINV : 0)
                        | (cfg->tx_inverted ? UART_MR_OPT_MDINV : 0)
                        | (cfg->rx_filter ? UART_MR_FILTER : 0)
                        | UART_MR_OPT_CLKDIV(cfg->clk_div)
                        | cfg->duty | cfg->threshold;

        p_uart->UART_MR = reg;
}
#endif

#if (SAMG53 || SAMG54 || SAMV71 || SAMV70 || SAME70 || SAMS70)

void uart_set_sleepwalking(Uart *p_uart, uint8_t ul_low_value,
                bool cmpmode, bool cmppar, uint8_t ul_high_value)
{
        Assert(ul_low_value <= ul_high_value);

        uint32_t temp = 0;

        if (cmpmode) {
                temp |= UART_CMPR_CMPMODE_START_CONDITION;
        }

        if (cmppar) {
                temp |= UART_CMPR_CMPPAR;
        }

        temp |= UART_CMPR_VAL1(ul_low_value);

        temp |= UART_CMPR_VAL2(ul_high_value);

        p_uart->UART_CMPR= temp;
}

void uart_set_write_protection(Uart *p_uart, bool flag)
{
        if (flag) {
                p_uart->UART_WPMR = UART_WPMR_WPKEY_PASSWD | UART_WPMR_WPEN;
        } else {
                p_uart->UART_WPMR = UART_WPMR_WPKEY_PASSWD;
        }
}
#endif



#ifdef __cplusplus
}
#endif

---

inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:17:58