stm32f10x_usart.c
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1 
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x_usart.h"
24 #include "stm32f10x_rcc.h"
25 
47 #define CR1_UE_Set ((uint16_t)0x2000)
48 #define CR1_UE_Reset ((uint16_t)0xDFFF)
50 #define CR1_WAKE_Mask ((uint16_t)0xF7FF)
52 #define CR1_RWU_Set ((uint16_t)0x0002)
53 #define CR1_RWU_Reset ((uint16_t)0xFFFD)
54 #define CR1_SBK_Set ((uint16_t)0x0001)
55 #define CR1_CLEAR_Mask ((uint16_t)0xE9F3)
56 #define CR2_Address_Mask ((uint16_t)0xFFF0)
58 #define CR2_LINEN_Set ((uint16_t)0x4000)
59 #define CR2_LINEN_Reset ((uint16_t)0xBFFF)
61 #define CR2_LBDL_Mask ((uint16_t)0xFFDF)
62 #define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF)
63 #define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF)
65 #define CR3_SCEN_Set ((uint16_t)0x0020)
66 #define CR3_SCEN_Reset ((uint16_t)0xFFDF)
68 #define CR3_NACK_Set ((uint16_t)0x0010)
69 #define CR3_NACK_Reset ((uint16_t)0xFFEF)
71 #define CR3_HDSEL_Set ((uint16_t)0x0008)
72 #define CR3_HDSEL_Reset ((uint16_t)0xFFF7)
74 #define CR3_IRLP_Mask ((uint16_t)0xFFFB)
75 #define CR3_CLEAR_Mask ((uint16_t)0xFCFF)
77 #define CR3_IREN_Set ((uint16_t)0x0002)
78 #define CR3_IREN_Reset ((uint16_t)0xFFFD)
79 #define GTPR_LSB_Mask ((uint16_t)0x00FF)
80 #define GTPR_MSB_Mask ((uint16_t)0xFF00)
81 #define IT_Mask ((uint16_t)0x001F)
83 /* USART OverSampling-8 Mask */
84 #define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */
85 #define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */
86 
87 /* USART One Bit Sampling Mask */
88 #define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */
89 #define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */
90 
131 {
132  /* Check the parameters */
134 
135  if (USARTx == USART1)
136  {
139  }
140  else if (USARTx == USART2)
141  {
144  }
145  else if (USARTx == USART3)
146  {
149  }
150  else if (USARTx == UART4)
151  {
154  }
155  else
156  {
157  if (USARTx == UART5)
158  {
161  }
162  }
163 }
164 
176 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
177 {
178  uint32_t tmpreg = 0x00, apbclock = 0x00;
179  uint32_t integerdivider = 0x00;
180  uint32_t fractionaldivider = 0x00;
181  uint32_t usartxbase = 0;
182  RCC_ClocksTypeDef RCC_ClocksStatus;
183  /* Check the parameters */
185  assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
187  assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
188  assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
189  assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
191  /* The hardware flow control is available only for USART1, USART2 and USART3 */
193  {
195  }
196 
197  usartxbase = (uint32_t)USARTx;
198 
199 /*---------------------------- USART CR2 Configuration -----------------------*/
200  tmpreg = USARTx->CR2;
201  /* Clear STOP[13:12] bits */
202  tmpreg &= CR2_STOP_CLEAR_Mask;
203  /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
204  /* Set STOP[13:12] bits according to USART_StopBits value */
205  tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits;
206 
207  /* Write to USART CR2 */
208  USARTx->CR2 = (uint16_t)tmpreg;
209 
210 /*---------------------------- USART CR1 Configuration -----------------------*/
211  tmpreg = USARTx->CR1;
212  /* Clear M, PCE, PS, TE and RE bits */
213  tmpreg &= CR1_CLEAR_Mask;
214  /* Configure the USART Word Length, Parity and mode ----------------------- */
215  /* Set the M bits according to USART_WordLength value */
216  /* Set PCE and PS bits according to USART_Parity value */
217  /* Set TE and RE bits according to USART_Mode value */
218  tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
219  USART_InitStruct->USART_Mode;
220  /* Write to USART CR1 */
221  USARTx->CR1 = (uint16_t)tmpreg;
222 
223 /*---------------------------- USART CR3 Configuration -----------------------*/
224  tmpreg = USARTx->CR3;
225  /* Clear CTSE and RTSE bits */
226  tmpreg &= CR3_CLEAR_Mask;
227  /* Configure the USART HFC -------------------------------------------------*/
228  /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
229  tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
230  /* Write to USART CR3 */
231  USARTx->CR3 = (uint16_t)tmpreg;
232 
233 /*---------------------------- USART BRR Configuration -----------------------*/
234  /* Configure the USART Baud Rate -------------------------------------------*/
235  RCC_GetClocksFreq(&RCC_ClocksStatus);
236  if (usartxbase == USART1_BASE)
237  {
238  apbclock = RCC_ClocksStatus.PCLK2_Frequency;
239  }
240  else
241  {
242  apbclock = RCC_ClocksStatus.PCLK1_Frequency;
243  }
244 
245  /* Determine the integer part */
246  if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
247  {
248  /* Integer part computing in case Oversampling mode is 8 Samples */
249  integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate)));
250  }
251  else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
252  {
253  /* Integer part computing in case Oversampling mode is 16 Samples */
254  integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate)));
255  }
256  tmpreg = (integerdivider / 100) << 4;
257 
258  /* Determine the fractional part */
259  fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
260 
261  /* Implement the fractional part in the register */
262  if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
263  {
264  tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
265  }
266  else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
267  {
268  tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F);
269  }
270 
271  /* Write to USART BRR */
272  USARTx->BRR = (uint16_t)tmpreg;
273 }
274 
281 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
282 {
283  /* USART_InitStruct members default value */
284  USART_InitStruct->USART_BaudRate = 9600;
285  USART_InitStruct->USART_WordLength = USART_WordLength_8b;
286  USART_InitStruct->USART_StopBits = USART_StopBits_1;
287  USART_InitStruct->USART_Parity = USART_Parity_No ;
288  USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
290 }
291 
302 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
303 {
304  uint32_t tmpreg = 0x00;
305  /* Check the parameters */
307  assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
308  assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
309  assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
310  assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
311 
312 /*---------------------------- USART CR2 Configuration -----------------------*/
313  tmpreg = USARTx->CR2;
314  /* Clear CLKEN, CPOL, CPHA and LBCL bits */
315  tmpreg &= CR2_CLOCK_CLEAR_Mask;
316  /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
317  /* Set CLKEN bit according to USART_Clock value */
318  /* Set CPOL bit according to USART_CPOL value */
319  /* Set CPHA bit according to USART_CPHA value */
320  /* Set LBCL bit according to USART_LastBit value */
321  tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL |
322  USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
323  /* Write to USART CR2 */
324  USARTx->CR2 = (uint16_t)tmpreg;
325 }
326 
333 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
334 {
335  /* USART_ClockInitStruct members default value */
336  USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
337  USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
338  USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
339  USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
340 }
341 
351 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
352 {
353  /* Check the parameters */
356 
357  if (NewState != DISABLE)
358  {
359  /* Enable the selected USART by setting the UE bit in the CR1 register */
360  USARTx->CR1 |= CR1_UE_Set;
361  }
362  else
363  {
364  /* Disable the selected USART by clearing the UE bit in the CR1 register */
365  USARTx->CR1 &= CR1_UE_Reset;
366  }
367 }
368 
388 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState)
389 {
390  uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
391  uint32_t usartxbase = 0x00;
392  /* Check the parameters */
394  assert_param(IS_USART_CONFIG_IT(USART_IT));
396  /* The CTS interrupt is not available for UART4 and UART5 */
397  if (USART_IT == USART_IT_CTS)
398  {
400  }
401 
402  usartxbase = (uint32_t)USARTx;
403 
404  /* Get the USART register index */
405  usartreg = (((uint8_t)USART_IT) >> 0x05);
406 
407  /* Get the interrupt position */
408  itpos = USART_IT & IT_Mask;
409  itmask = (((uint32_t)0x01) << itpos);
410 
411  if (usartreg == 0x01) /* The IT is in CR1 register */
412  {
413  usartxbase += 0x0C;
414  }
415  else if (usartreg == 0x02) /* The IT is in CR2 register */
416  {
417  usartxbase += 0x10;
418  }
419  else /* The IT is in CR3 register */
420  {
421  usartxbase += 0x14;
422  }
423  if (NewState != DISABLE)
424  {
425  *(__IO uint32_t*)usartxbase |= itmask;
426  }
427  else
428  {
429  *(__IO uint32_t*)usartxbase &= ~itmask;
430  }
431 }
432 
448 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
449 {
450  /* Check the parameters */
452  assert_param(IS_USART_DMAREQ(USART_DMAReq));
453  assert_param(IS_FUNCTIONAL_STATE(NewState));
454  if (NewState != DISABLE)
455  {
456  /* Enable the DMA transfer for selected requests by setting the DMAT and/or
457  DMAR bits in the USART CR3 register */
458  USARTx->CR3 |= USART_DMAReq;
459  }
460  else
461  {
462  /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
463  DMAR bits in the USART CR3 register */
464  USARTx->CR3 &= (uint16_t)~USART_DMAReq;
465  }
466 }
467 
476 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
477 {
478  /* Check the parameters */
480  assert_param(IS_USART_ADDRESS(USART_Address));
481 
482  /* Clear the USART address */
483  USARTx->CR2 &= CR2_Address_Mask;
484  /* Set the USART address node */
485  USARTx->CR2 |= USART_Address;
486 }
487 
499 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp)
500 {
501  /* Check the parameters */
503  assert_param(IS_USART_WAKEUP(USART_WakeUp));
504 
505  USARTx->CR1 &= CR1_WAKE_Mask;
506  USARTx->CR1 |= USART_WakeUp;
507 }
508 
519 {
520  /* Check the parameters */
522  assert_param(IS_FUNCTIONAL_STATE(NewState));
523 
524  if (NewState != DISABLE)
525  {
526  /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
527  USARTx->CR1 |= CR1_RWU_Set;
528  }
529  else
530  {
531  /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
532  USARTx->CR1 &= CR1_RWU_Reset;
533  }
534 }
535 
547 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength)
548 {
549  /* Check the parameters */
551  assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength));
552 
553  USARTx->CR2 &= CR2_LBDL_Mask;
554  USARTx->CR2 |= USART_LINBreakDetectLength;
555 }
556 
567 {
568  /* Check the parameters */
571 
572  if (NewState != DISABLE)
573  {
574  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
575  USARTx->CR2 |= CR2_LINEN_Set;
576  }
577  else
578  {
579  /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */
580  USARTx->CR2 &= CR2_LINEN_Reset;
581  }
582 }
583 
592 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
593 {
594  /* Check the parameters */
596  assert_param(IS_USART_DATA(Data));
597 
598  /* Transmit Data */
599  USARTx->DR = (Data & (uint16_t)0x01FF);
600 }
601 
610 {
611  /* Check the parameters */
613 
614  /* Receive Data */
615  return (uint16_t)(USARTx->DR & (uint16_t)0x01FF);
616 }
617 
626 {
627  /* Check the parameters */
629 
630  /* Send break characters */
631  USARTx->CR1 |= CR1_SBK_Set;
632 }
633 
641 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
642 {
643  /* Check the parameters */
645 
646  /* Clear the USART Guard time */
647  USARTx->GTPR &= GTPR_LSB_Mask;
648  /* Set the USART guard time */
649  USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08);
650 }
651 
661 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
662 {
663  /* Check the parameters */
665 
666  /* Clear the USART prescaler */
667  USARTx->GTPR &= GTPR_MSB_Mask;
668  /* Set the USART prescaler */
669  USARTx->GTPR |= USART_Prescaler;
670 }
671 
681 {
682  /* Check the parameters */
685  if (NewState != DISABLE)
686  {
687  /* Enable the SC mode by setting the SCEN bit in the CR3 register */
688  USARTx->CR3 |= CR3_SCEN_Set;
689  }
690  else
691  {
692  /* Disable the SC mode by clearing the SCEN bit in the CR3 register */
693  USARTx->CR3 &= CR3_SCEN_Reset;
694  }
695 }
696 
706 {
707  /* Check the parameters */
710  if (NewState != DISABLE)
711  {
712  /* Enable the NACK transmission by setting the NACK bit in the CR3 register */
713  USARTx->CR3 |= CR3_NACK_Set;
714  }
715  else
716  {
717  /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
718  USARTx->CR3 &= CR3_NACK_Reset;
719  }
720 }
721 
732 {
733  /* Check the parameters */
736 
737  if (NewState != DISABLE)
738  {
739  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
740  USARTx->CR3 |= CR3_HDSEL_Set;
741  }
742  else
743  {
744  /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
745  USARTx->CR3 &= CR3_HDSEL_Reset;
746  }
747 }
748 
749 
763 {
764  /* Check the parameters */
767 
768  if (NewState != DISABLE)
769  {
770  /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */
771  USARTx->CR1 |= CR1_OVER8_Set;
772  }
773  else
774  {
775  /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */
776  USARTx->CR1 &= CR1_OVER8_Reset;
777  }
778 }
779 
790 {
791  /* Check the parameters */
794 
795  if (NewState != DISABLE)
796  {
797  /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */
798  USARTx->CR3 |= CR3_ONEBITE_Set;
799  }
800  else
801  {
802  /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */
803  USARTx->CR3 &= CR3_ONEBITE_Reset;
804  }
805 }
806 
818 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode)
819 {
820  /* Check the parameters */
822  assert_param(IS_USART_IRDA_MODE(USART_IrDAMode));
823 
824  USARTx->CR3 &= CR3_IRLP_Mask;
825  USARTx->CR3 |= USART_IrDAMode;
826 }
827 
838 {
839  /* Check the parameters */
842 
843  if (NewState != DISABLE)
844  {
845  /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
846  USARTx->CR3 |= CR3_IREN_Set;
847  }
848  else
849  {
850  /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
851  USARTx->CR3 &= CR3_IREN_Reset;
852  }
853 }
854 
874 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG)
875 {
876  FlagStatus bitstatus = RESET;
877  /* Check the parameters */
879  assert_param(IS_USART_FLAG(USART_FLAG));
880  /* The CTS flag is not available for UART4 and UART5 */
881  if (USART_FLAG == USART_FLAG_CTS)
882  {
884  }
885 
886  if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
887  {
888  bitstatus = SET;
889  }
890  else
891  {
892  bitstatus = RESET;
893  }
894  return bitstatus;
895 }
896 
923 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
924 {
925  /* Check the parameters */
927  assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
928  /* The CTS flag is not available for UART4 and UART5 */
929  if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
930  {
932  }
933 
934  USARTx->SR = (uint16_t)~USART_FLAG;
935 }
936 
956 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
957 {
958  uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
959  ITStatus bitstatus = RESET;
960  /* Check the parameters */
962  assert_param(IS_USART_GET_IT(USART_IT));
963  /* The CTS interrupt is not available for UART4 and UART5 */
964  if (USART_IT == USART_IT_CTS)
965  {
967  }
968 
969  /* Get the USART register index */
970  usartreg = (((uint8_t)USART_IT) >> 0x05);
971  /* Get the interrupt position */
972  itmask = USART_IT & IT_Mask;
973  itmask = (uint32_t)0x01 << itmask;
974 
975  if (usartreg == 0x01) /* The IT is in CR1 register */
976  {
977  itmask &= USARTx->CR1;
978  }
979  else if (usartreg == 0x02) /* The IT is in CR2 register */
980  {
981  itmask &= USARTx->CR2;
982  }
983  else /* The IT is in CR3 register */
984  {
985  itmask &= USARTx->CR3;
986  }
987 
988  bitpos = USART_IT >> 0x08;
989  bitpos = (uint32_t)0x01 << bitpos;
990  bitpos &= USARTx->SR;
991  if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
992  {
993  bitstatus = SET;
994  }
995  else
996  {
997  bitstatus = RESET;
998  }
999 
1000  return bitstatus;
1001 }
1002 
1030 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
1031 {
1032  uint16_t bitpos = 0x00, itmask = 0x00;
1033  /* Check the parameters */
1035  assert_param(IS_USART_CLEAR_IT(USART_IT));
1036  /* The CTS interrupt is not available for UART4 and UART5 */
1037  if (USART_IT == USART_IT_CTS)
1038  {
1040  }
1041 
1042  bitpos = USART_IT >> 0x08;
1043  itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
1044  USARTx->SR = (uint16_t)~itmask;
1045 }
1058 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
#define CR2_LBDL_Mask
void USART_ClockStructInit(USART_ClockInitTypeDef *USART_ClockInitStruct)
Fills each USART_ClockInitStruct member with its default value.
#define USART_LastBit_Disable
FlagStatus
Definition: stm32f4xx.h:706
#define CR1_RWU_Set
#define USART_Clock_Disable
#define IS_USART_DATA(DATA)
#define CR3_NACK_Set
void USART_SmartCardNACKCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables NACK transmission.
FunctionalState
Definition: stm32f4xx.h:708
#define IS_USART_CLOCK(CLOCK)
#define USART_Parity_No
uint16_t USART_HardwareFlowControl
This file contains all the functions prototypes for the USART firmware library.
Universal Synchronous Asynchronous Receiver Transmitter.
Definition: stm32f4xx.h:1710
#define USART_Mode_Tx
#define IS_USART_CLEAR_FLAG(FLAG)
#define CR3_ONEBITE_Reset
#define IS_USART_STOPBITS(STOPBITS)
#define CR3_IREN_Reset
#define CR1_OVER8_Set
#define IS_USART_MODE(MODE)
void USART_ClearFlag(USART_TypeDef *USARTx, uint16_t USART_FLAG)
Clears the USARTx&#39;s pending flags.
#define CR2_CLOCK_CLEAR_Mask
void USART_OneBitMethodCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s one bit sampling method.
#define CR1_SBK_Set
#define CR3_IREN_Set
void USART_SendData(USART_TypeDef *USARTx, uint16_t Data)
Transmits single data through the USARTx peripheral.
void USART_IrDACmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s IrDA interface.
#define CR1_UE_Reset
#define IS_USART_CPOL(CPOL)
void USART_SetAddress(USART_TypeDef *USARTx, uint8_t USART_Address)
Sets the address of the USART node.
#define USART_Mode_Rx
void assert_param(int val)
#define IS_USART_LASTBIT(LASTBIT)
__IO uint16_t BRR
Definition: stm32f4xx.h:1716
#define CR1_WAKE_Mask
void USART_ReceiverWakeUpCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Determines if the USART is in mute mode or not.
void USART_DeInit(USART_TypeDef *USARTx)
Deinitializes the USARTx peripheral registers to their default reset values.
void USART_Cmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the specified USART peripheral.
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
#define CR1_UE_Set
void USART_IrDAConfig(USART_TypeDef *USARTx, uint16_t USART_IrDAMode)
Configures the USART&#39;s IrDA interface.
void USART_SetPrescaler(USART_TypeDef *USARTx, uint8_t USART_Prescaler)
Sets the system clock prescaler.
__IO uint16_t GTPR
Definition: stm32f4xx.h:1724
void USART_SendBreak(USART_TypeDef *USARTx)
Transmits break characters.
#define CR3_SCEN_Reset
void USART_SmartCardCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USARTís Smart Card mode.
#define IS_USART_PARITY(PARITY)
void USART_OverSampling8Cmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s 8x oversampling mode.
#define USART_HardwareFlowControl_None
__IO uint16_t SR
Definition: stm32f4xx.h:1712
#define CR3_CLEAR_Mask
void USART_ClockInit(USART_TypeDef *USARTx, USART_ClockInitTypeDef *USART_ClockInitStruct)
Initializes the USARTx peripheral Clock according to the specified parameters in the USART_ClockInitS...
#define USART_WordLength_8b
Definition: stm32f4xx.h:706
#define UART5
Definition: stm32f4xx.h:2059
#define IT_Mask
enum FlagStatus ITStatus
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
Forces or releases Low Speed APB (APB1) peripheral reset.
#define USART1
Definition: stm32f4xx.h:2080
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH)
USART Clock Init Structure definition.
#define IS_USART_BAUDRATE(BAUDRATE)
#define __IO
Definition: core_cm0.h:198
__IO uint16_t DR
Definition: stm32f4xx.h:1714
void USART_ClearITPendingBit(USART_TypeDef *USARTx, uint16_t USART_IT)
Clears the USARTx&#39;s interrupt pending bits.
#define IS_USART_DMAREQ(DMAREQ)
#define IS_USART_ALL_PERIPH(PERIPH)
#define IS_USART_CPHA(CPHA)
#define USART_CPOL_Low
#define CR2_LINEN_Reset
void USART_DMACmd(USART_TypeDef *USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
Enables or disables the USARTís DMA interface.
#define USART_IT_CTS
void USART_LINCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USARTís LIN mode.
uint16_t USART_WordLength
void USART_ITConfig(USART_TypeDef *USARTx, uint16_t USART_IT, FunctionalState NewState)
Enables or disables the specified USART interrupts.
void USART_HalfDuplexCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USARTís Half Duplex communication.
__IO uint16_t CR2
Definition: stm32f4xx.h:1720
#define CR2_STOP_CLEAR_Mask
ITStatus USART_GetITStatus(USART_TypeDef *USARTx, uint16_t USART_IT)
Checks whether the specified USART interrupt has occurred or not.
#define USART_FLAG_CTS
#define GTPR_LSB_Mask
This file contains all the functions prototypes for the RCC firmware library.
#define IS_USART_FLAG(FLAG)
#define CR3_IRLP_Mask
FlagStatus USART_GetFlagStatus(USART_TypeDef *USARTx, uint16_t USART_FLAG)
Checks whether the specified USART flag is set or not.
#define CR3_HDSEL_Reset
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
Forces or releases High Speed APB (APB2) peripheral reset.
#define CR2_LINEN_Set
void USART_LINBreakDetectLengthConfig(USART_TypeDef *USARTx, uint16_t USART_LINBreakDetectLength)
Sets the USART LIN Break detection length.
#define IS_USART_123_PERIPH(PERIPH)
#define USART1_BASE
Definition: stm32f4xx.h:1927
#define USART3
Definition: stm32f4xx.h:2057
#define CR1_CLEAR_Mask
#define GTPR_MSB_Mask
#define CR3_HDSEL_Set
#define IS_USART_CONFIG_IT(IT)
#define USART_CPHA_1Edge
void USART_StructInit(USART_InitTypeDef *USART_InitStruct)
Fills each USART_InitStruct member with its default value.
#define USART_StopBits_1
#define IS_USART_GET_IT(IT)
#define IS_USART_IRDA_MODE(MODE)
void RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks)
Returns the frequencies of different on chip clocks; SYSCLK, HCLK, PCLK1 and PCLK2.
#define CR3_NACK_Reset
void USART_Init(USART_TypeDef *USARTx, USART_InitTypeDef *USART_InitStruct)
Initializes the USARTx peripheral according to the specified parameters in the USART_InitStruct ...
#define IS_USART_ADDRESS(ADDRESS)
#define UART4
Definition: stm32f4xx.h:2058
void USART_WakeUpConfig(USART_TypeDef *USARTx, uint16_t USART_WakeUp)
Selects the USART WakeUp method.
__IO uint16_t CR3
Definition: stm32f4xx.h:1722
void USART_SetGuardTime(USART_TypeDef *USARTx, uint8_t USART_GuardTime)
Sets the specified USART guard time.
#define CR2_Address_Mask
#define IS_USART_WORD_LENGTH(LENGTH)
USART Init Structure definition.
uint16_t USART_ReceiveData(USART_TypeDef *USARTx)
Returns the most recent received data by the USARTx peripheral.
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)
#define USART2
Definition: stm32f4xx.h:2056
#define CR3_SCEN_Set
#define IS_USART_WAKEUP(WAKEUP)
__IO uint16_t CR1
Definition: stm32f4xx.h:1718
#define CR1_OVER8_Reset
#define CR3_ONEBITE_Set
#define CR1_RWU_Reset
#define IS_USART_CLEAR_IT(IT)


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19