Flexible Static Memory Controller Bank2. More...

#include <stm32f407xx.h>

Public Attributes
__IO uint32_t	ECCR2

__IO uint32_t	ECCR3

__IO uint32_t	PATT2

__IO uint32_t	PATT3

__IO uint32_t	PCR2

__IO uint32_t	PCR3

__IO uint32_t	PMEM2

__IO uint32_t	PMEM3

uint32_t	RESERVED0

uint32_t	RESERVED1

uint32_t	RESERVED2

uint32_t	RESERVED3

__IO uint32_t	SR2

__IO uint32_t	SR3

Detailed Description

Flexible Static Memory Controller Bank2.

Definition at line 492 of file stm32f407xx.h.

Member Data Documentation

◆ ECCR2

__IO uint32_t FSMC_Bank2_3_TypeDef::ECCR2

NAND Flash ECC result registers 2, Address offset: 0x74

Definition at line 499 of file stm32f407xx.h.

◆ ECCR3

__IO uint32_t FSMC_Bank2_3_TypeDef::ECCR3

NAND Flash ECC result registers 3, Address offset: 0x94

Definition at line 507 of file stm32f407xx.h.

◆ PATT2

__IO uint32_t FSMC_Bank2_3_TypeDef::PATT2

NAND Flash Attribute memory space timing register 2, Address offset: 0x6C

Definition at line 497 of file stm32f407xx.h.

◆ PATT3

__IO uint32_t FSMC_Bank2_3_TypeDef::PATT3

NAND Flash Attribute memory space timing register 3, Address offset: 0x8C

Definition at line 505 of file stm32f407xx.h.

◆ PCR2

__IO uint32_t FSMC_Bank2_3_TypeDef::PCR2

NAND Flash control register 2, Address offset: 0x60

Definition at line 494 of file stm32f407xx.h.

◆ PCR3

__IO uint32_t FSMC_Bank2_3_TypeDef::PCR3

NAND Flash control register 3, Address offset: 0x80

Definition at line 502 of file stm32f407xx.h.

◆ PMEM2

__IO uint32_t FSMC_Bank2_3_TypeDef::PMEM2

NAND Flash Common memory space timing register 2, Address offset: 0x68

Definition at line 496 of file stm32f407xx.h.

◆ PMEM3

__IO uint32_t FSMC_Bank2_3_TypeDef::PMEM3

NAND Flash Common memory space timing register 3, Address offset: 0x88

Definition at line 504 of file stm32f407xx.h.

◆ RESERVED0

uint32_t FSMC_Bank2_3_TypeDef::RESERVED0

Reserved, 0x70

Definition at line 498 of file stm32f407xx.h.

◆ RESERVED1

uint32_t FSMC_Bank2_3_TypeDef::RESERVED1

Reserved, 0x78

Definition at line 500 of file stm32f407xx.h.

◆ RESERVED2

uint32_t FSMC_Bank2_3_TypeDef::RESERVED2

Reserved, 0x7C

Definition at line 501 of file stm32f407xx.h.

◆ RESERVED3

uint32_t FSMC_Bank2_3_TypeDef::RESERVED3

Reserved, 0x90

Definition at line 506 of file stm32f407xx.h.

◆ SR2

__IO uint32_t FSMC_Bank2_3_TypeDef::SR2

NAND Flash FIFO status and interrupt register 2, Address offset: 0x64

Definition at line 495 of file stm32f407xx.h.

◆ SR3

__IO uint32_t FSMC_Bank2_3_TypeDef::SR3

NAND Flash FIFO status and interrupt register 3, Address offset: 0x84

Definition at line 503 of file stm32f407xx.h.

The documentation for this struct was generated from the following file:

stm32f407xx.h

Public Attributes