Public Attributes | List of all members

Analog to Digital Converter
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#include <stm32f407xx.h>

Public Attributes

__IO uint32_t AWD2CR
 
__IO uint32_t AWD3CR
 
__IO uint32_t CALFACT
 
__IO uint32_t CALFACT2
 
__IO uint32_t CALFACT2_RES14
 
__IO uint32_t CALFACT_RES13
 
__IO uint32_t CFGR
 
__IO uint32_t CFGR2
 
__IO uint32_t CR
 
__IO uint32_t CR1
 
__IO uint32_t CR2
 
__IO uint32_t DIFSEL
 
__IO uint32_t DIFSEL_RES12
 
__IO uint32_t DR
 
__IO uint32_t HTR
 
__IO uint32_t HTR1
 
__IO uint32_t HTR1_TR2
 
__IO uint32_t HTR2
 
__IO uint32_t HTR2_CALFACT
 
__IO uint32_t HTR3
 
__IO uint32_t HTR3_RES11
 
__IO uint32_t IER
 
__IO uint32_t ISR
 
__IO uint32_t JDR1
 
__IO uint32_t JDR2
 
__IO uint32_t JDR3
 
__IO uint32_t JDR4
 
__IO uint32_t JOFR1
 
__IO uint32_t JOFR2
 
__IO uint32_t JOFR3
 
__IO uint32_t JOFR4
 
__IO uint32_t JSQR
 
__IO uint32_t LTR
 
__IO uint32_t LTR1
 
__IO uint32_t LTR1_TR1
 
__IO uint32_t LTR2
 
__IO uint32_t LTR2_DIFSEL
 
__IO uint32_t LTR3
 
__IO uint32_t LTR3_RES10
 
__IO uint32_t OFR1
 
__IO uint32_t OFR2
 
__IO uint32_t OFR3
 
__IO uint32_t OFR4
 
__IO uint32_t PCSEL
 
__IO uint32_t PCSEL_RES0
 
__IO uint32_t RES1_TR3
 
uint32_t RESERVED1
 
uint32_t RESERVED2
 
uint32_t RESERVED3
 
uint32_t RESERVED4
 
uint32_t RESERVED5 [4]
 
uint32_t RESERVED6 [4]
 
uint32_t RESERVED7 [4]
 
uint32_t RESERVED8
 
uint32_t RESERVED9
 
__IO uint32_t SMPR1
 
__IO uint32_t SMPR2
 
__IO uint32_t SQR1
 
__IO uint32_t SQR2
 
__IO uint32_t SQR3
 
__IO uint32_t SQR4
 
__IO uint32_t SR
 

Detailed Description

Analog to Digital Converter

Analog to Digital Converter.

Definition at line 179 of file stm32f407xx.h.

Member Data Documentation

◆ AWD2CR

__IO uint32_t ADC_TypeDef::AWD2CR

ADC Analog Watchdog 2 Configuration Register, Address offset: 0xA0

Definition at line 279 of file stm32h735xx.h.

◆ AWD3CR

__IO uint32_t ADC_TypeDef::AWD3CR

ADC Analog Watchdog 3 Configuration Register, Address offset: 0xA4

Definition at line 280 of file stm32h735xx.h.

◆ CALFACT

__IO uint32_t ADC_TypeDef::CALFACT

ADC Calibration Factors, Address offset: 0xC4

Definition at line 309 of file stm32h747xx.h.

◆ CALFACT2

__IO uint32_t ADC_TypeDef::CALFACT2

ADC Linearity Calibration Factors, Address offset: 0xC8

Definition at line 310 of file stm32h747xx.h.

◆ CALFACT2_RES14

__IO uint32_t ADC_TypeDef::CALFACT2_RES14

ADC Linearity Calibration Factors specific ADC1/2, Address offset: 0xC8

Definition at line 289 of file stm32h735xx.h.

◆ CALFACT_RES13

__IO uint32_t ADC_TypeDef::CALFACT_RES13

ADC Calibration Factors specific ADC1/2, Address offset: 0xC4

Definition at line 288 of file stm32h735xx.h.

◆ CFGR

__IO uint32_t ADC_TypeDef::CFGR

ADC Configuration register, Address offset: 0x0C

Definition at line 251 of file stm32h735xx.h.

◆ CFGR2

__IO uint32_t ADC_TypeDef::CFGR2

ADC Configuration register 2, Address offset: 0x10

Definition at line 252 of file stm32h735xx.h.

◆ CR

__IO uint32_t ADC_TypeDef::CR

ADC control register, Address offset: 0x08

Definition at line 250 of file stm32h735xx.h.

◆ CR1

__IO uint32_t ADC_TypeDef::CR1

ADC control register 1, Address offset: 0x04

Definition at line 182 of file stm32f407xx.h.

◆ CR2

__IO uint32_t ADC_TypeDef::CR2

ADC control register 2, Address offset: 0x08

Definition at line 183 of file stm32f407xx.h.

◆ DIFSEL

__IO uint32_t ADC_TypeDef::DIFSEL

ADC Differential Mode Selection Register, Address offset: 0xC0

Definition at line 308 of file stm32h747xx.h.

◆ DIFSEL_RES12

__IO uint32_t ADC_TypeDef::DIFSEL_RES12

ADC Differential Mode Selection Register specific ADC1/2, Address offset: 0xC0

Definition at line 287 of file stm32h735xx.h.

◆ DR

__IO uint32_t ADC_TypeDef::DR

ADC regular data register, Address offset: 0x4C

ADC regular data register, Address offset: 0x40

Definition at line 200 of file stm32f407xx.h.

◆ HTR

__IO uint32_t ADC_TypeDef::HTR

ADC watchdog higher threshold register, Address offset: 0x24

Definition at line 190 of file stm32f407xx.h.

◆ HTR1

__IO uint32_t ADC_TypeDef::HTR1

ADC watchdog higher threshold register 1, Address offset: 0x24

Definition at line 278 of file stm32h747xx.h.

◆ HTR1_TR2

__IO uint32_t ADC_TypeDef::HTR1_TR2

ADC watchdog higher threshold register 1, Address offset: 0x24

Definition at line 257 of file stm32h735xx.h.

◆ HTR2

__IO uint32_t ADC_TypeDef::HTR2

ADC watchdog Higher threshold register 2, Address offset: 0xB4

Definition at line 305 of file stm32h747xx.h.

◆ HTR2_CALFACT

__IO uint32_t ADC_TypeDef::HTR2_CALFACT

ADC watchdog Higher threshold register 2, Calfact for ADC3, Address offset: 0xB4

Definition at line 284 of file stm32h735xx.h.

◆ HTR3

__IO uint32_t ADC_TypeDef::HTR3

ADC watchdog Higher threshold register 3, Address offset: 0xBC

Definition at line 307 of file stm32h747xx.h.

◆ HTR3_RES11

__IO uint32_t ADC_TypeDef::HTR3_RES11

ADC watchdog Higher threshold register 3, specific ADC1/2, Address offset: 0xBC

Definition at line 286 of file stm32h735xx.h.

◆ IER

__IO uint32_t ADC_TypeDef::IER

ADC Interrupt Enable Register, Address offset: 0x04

Definition at line 249 of file stm32h735xx.h.

◆ ISR

__IO uint32_t ADC_TypeDef::ISR

ADC Interrupt and Status Register, Address offset: 0x00

Definition at line 248 of file stm32h735xx.h.

◆ JDR1

__IO uint32_t ADC_TypeDef::JDR1

ADC injected data register 1, Address offset: 0x3C

ADC injected data register 1, Address offset: 0x80

Definition at line 196 of file stm32f407xx.h.

◆ JDR2

__IO uint32_t ADC_TypeDef::JDR2

ADC injected data register 2, Address offset: 0x40

ADC injected data register 2, Address offset: 0x84

Definition at line 197 of file stm32f407xx.h.

◆ JDR3

__IO uint32_t ADC_TypeDef::JDR3

ADC injected data register 3, Address offset: 0x44

ADC injected data register 3, Address offset: 0x88

Definition at line 198 of file stm32f407xx.h.

◆ JDR4

__IO uint32_t ADC_TypeDef::JDR4

ADC injected data register 4, Address offset: 0x48

ADC injected data register 4, Address offset: 0x8C

Definition at line 199 of file stm32f407xx.h.

◆ JOFR1

__IO uint32_t ADC_TypeDef::JOFR1

ADC injected channel data offset register 1, Address offset: 0x14

Definition at line 186 of file stm32f407xx.h.

◆ JOFR2

__IO uint32_t ADC_TypeDef::JOFR2

ADC injected channel data offset register 2, Address offset: 0x18

Definition at line 187 of file stm32f407xx.h.

◆ JOFR3

__IO uint32_t ADC_TypeDef::JOFR3

ADC injected channel data offset register 3, Address offset: 0x1C

Definition at line 188 of file stm32f407xx.h.

◆ JOFR4

__IO uint32_t ADC_TypeDef::JOFR4

ADC injected channel data offset register 4, Address offset: 0x20

Definition at line 189 of file stm32f407xx.h.

◆ JSQR

__IO uint32_t ADC_TypeDef::JSQR

ADC injected sequence register, Address offset: 0x38

ADC injected sequence register, Address offset: 0x4C

Definition at line 195 of file stm32f407xx.h.

◆ LTR

__IO uint32_t ADC_TypeDef::LTR

ADC watchdog lower threshold register, Address offset: 0x28

Definition at line 191 of file stm32f407xx.h.

◆ LTR1

__IO uint32_t ADC_TypeDef::LTR1

ADC watchdog Lower threshold register 1, Address offset: 0x20

Definition at line 277 of file stm32h747xx.h.

◆ LTR1_TR1

__IO uint32_t ADC_TypeDef::LTR1_TR1

ADC watchdog Lower threshold register 1, Address offset: 0x20

Definition at line 256 of file stm32h735xx.h.

◆ LTR2

__IO uint32_t ADC_TypeDef::LTR2

ADC watchdog Lower threshold register 2, Address offset: 0xB0

Definition at line 304 of file stm32h747xx.h.

◆ LTR2_DIFSEL

__IO uint32_t ADC_TypeDef::LTR2_DIFSEL

ADC watchdog Lower threshold register 2, Difsel for ADC3, Address offset: 0xB0

Definition at line 283 of file stm32h735xx.h.

◆ LTR3

__IO uint32_t ADC_TypeDef::LTR3

ADC watchdog Lower threshold register 3, Address offset: 0xB8

Definition at line 306 of file stm32h747xx.h.

◆ LTR3_RES10

__IO uint32_t ADC_TypeDef::LTR3_RES10

ADC watchdog Lower threshold register 3, specific ADC1/2, Address offset: 0xB8

Definition at line 285 of file stm32h735xx.h.

◆ OFR1

__IO uint32_t ADC_TypeDef::OFR1

ADC offset register 1, Address offset: 0x60

Definition at line 269 of file stm32h735xx.h.

◆ OFR2

__IO uint32_t ADC_TypeDef::OFR2

ADC offset register 2, Address offset: 0x64

Definition at line 270 of file stm32h735xx.h.

◆ OFR3

__IO uint32_t ADC_TypeDef::OFR3

ADC offset register 3, Address offset: 0x68

Definition at line 271 of file stm32h735xx.h.

◆ OFR4

__IO uint32_t ADC_TypeDef::OFR4

ADC offset register 4, Address offset: 0x6C

Definition at line 272 of file stm32h735xx.h.

◆ PCSEL

__IO uint32_t ADC_TypeDef::PCSEL

ADC pre-channel selection, Address offset: 0x1C

Definition at line 276 of file stm32h747xx.h.

◆ PCSEL_RES0

__IO uint32_t ADC_TypeDef::PCSEL_RES0

Rserved for ADC3, ADC1/2 pre-channel selection, Address offset: 0x1C

Definition at line 255 of file stm32h735xx.h.

◆ RES1_TR3

__IO uint32_t ADC_TypeDef::RES1_TR3

Rserved for ADC1/2, ADC3 threshold register, Address offset: 0x28

Definition at line 258 of file stm32h735xx.h.

◆ RESERVED1

uint32_t ADC_TypeDef::RESERVED1

Reserved, 0x028

Definition at line 279 of file stm32h747xx.h.

◆ RESERVED2

uint32_t ADC_TypeDef::RESERVED2

Reserved, 0x02C

Definition at line 259 of file stm32h735xx.h.

◆ RESERVED3

uint32_t ADC_TypeDef::RESERVED3

Reserved, 0x044

Definition at line 265 of file stm32h735xx.h.

◆ RESERVED4

uint32_t ADC_TypeDef::RESERVED4

Reserved, 0x048

Definition at line 266 of file stm32h735xx.h.

◆ RESERVED5

uint32_t ADC_TypeDef::RESERVED5

Reserved, 0x050 - 0x05C

Definition at line 268 of file stm32h735xx.h.

◆ RESERVED6

uint32_t ADC_TypeDef::RESERVED6

Reserved, 0x070 - 0x07C

Definition at line 273 of file stm32h735xx.h.

◆ RESERVED7

uint32_t ADC_TypeDef::RESERVED7

Reserved, 0x090 - 0x09C

Definition at line 278 of file stm32h735xx.h.

◆ RESERVED8

uint32_t ADC_TypeDef::RESERVED8

Reserved, 0x0A8

Definition at line 281 of file stm32h735xx.h.

◆ RESERVED9

uint32_t ADC_TypeDef::RESERVED9

Reserved, 0x0AC

Definition at line 282 of file stm32h735xx.h.

◆ SMPR1

__IO uint32_t ADC_TypeDef::SMPR1

ADC sample time register 1, Address offset: 0x0C

ADC sample time register 1, Address offset: 0x14

Definition at line 184 of file stm32f407xx.h.

◆ SMPR2

__IO uint32_t ADC_TypeDef::SMPR2

ADC sample time register 2, Address offset: 0x10

ADC sample time register 2, Address offset: 0x18

Definition at line 185 of file stm32f407xx.h.

◆ SQR1

__IO uint32_t ADC_TypeDef::SQR1

ADC regular sequence register 1, Address offset: 0x2C

ADC regular sequence register 1, Address offset: 0x30

Definition at line 192 of file stm32f407xx.h.

◆ SQR2

__IO uint32_t ADC_TypeDef::SQR2

ADC regular sequence register 2, Address offset: 0x30

ADC regular sequence register 2, Address offset: 0x34

Definition at line 193 of file stm32f407xx.h.

◆ SQR3

__IO uint32_t ADC_TypeDef::SQR3

ADC regular sequence register 3, Address offset: 0x34

ADC regular sequence register 3, Address offset: 0x38

Definition at line 194 of file stm32f407xx.h.

◆ SQR4

__IO uint32_t ADC_TypeDef::SQR4

ADC regular sequence register 4, Address offset: 0x3C

Definition at line 263 of file stm32h735xx.h.

◆ SR

__IO uint32_t ADC_TypeDef::SR

ADC status register, Address offset: 0x00

Definition at line 181 of file stm32f407xx.h.


The documentation for this struct was generated from the following files:


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:19