Macros | |
| #define | TMR_CAPT_COUNT (4U) |
| #define | TMR_CMPLD1_COUNT (4U) |
| #define | TMR_CMPLD2_COUNT (4U) |
| #define | TMR_CNTR_COUNT (4U) |
| #define | TMR_COMP1_COUNT (4U) |
| #define | TMR_COMP2_COUNT (4U) |
| #define | TMR_CSCTRL_COUNT (4U) |
| #define | TMR_CTRL_COUNT (4U) |
| #define | TMR_DMA_COUNT (4U) |
| #define | TMR_ENBL_COUNT (4U) |
| #define | TMR_FILT_COUNT (4U) |
| #define | TMR_HOLD_COUNT (4U) |
| #define | TMR_LOAD_COUNT (4U) |
| #define | TMR_SCTRL_COUNT (4U) |
COMP1 - Timer Channel Compare Register 1 | |
| #define | TMR_COMP1_COMPARISON_1_MASK (0xFFFFU) |
| #define | TMR_COMP1_COMPARISON_1_SHIFT (0U) |
| #define | TMR_COMP1_COMPARISON_1(x) (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK) |
COMP2 - Timer Channel Compare Register 2 | |
| #define | TMR_COMP2_COMPARISON_2_MASK (0xFFFFU) |
| #define | TMR_COMP2_COMPARISON_2_SHIFT (0U) |
| #define | TMR_COMP2_COMPARISON_2(x) (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK) |
CAPT - Timer Channel Capture Register | |
| #define | TMR_CAPT_CAPTURE_MASK (0xFFFFU) |
| #define | TMR_CAPT_CAPTURE_SHIFT (0U) |
| #define | TMR_CAPT_CAPTURE(x) (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK) |
LOAD - Timer Channel Load Register | |
| #define | TMR_LOAD_LOAD_MASK (0xFFFFU) |
| #define | TMR_LOAD_LOAD_SHIFT (0U) |
| #define | TMR_LOAD_LOAD(x) (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK) |
HOLD - Timer Channel Hold Register | |
| #define | TMR_HOLD_HOLD_MASK (0xFFFFU) |
| #define | TMR_HOLD_HOLD_SHIFT (0U) |
| #define | TMR_HOLD_HOLD(x) (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK) |
CNTR - Timer Channel Counter Register | |
| #define | TMR_CNTR_COUNTER_MASK (0xFFFFU) |
| #define | TMR_CNTR_COUNTER_SHIFT (0U) |
| #define | TMR_CNTR_COUNTER(x) (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK) |
CMPLD1 - Timer Channel Comparator Load Register 1 | |
| #define | TMR_CMPLD1_COMPARATOR_LOAD_1_MASK (0xFFFFU) |
| #define | TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT (0U) |
| #define | TMR_CMPLD1_COMPARATOR_LOAD_1(x) (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK) |
CMPLD2 - Timer Channel Comparator Load Register 2 | |
| #define | TMR_CMPLD2_COMPARATOR_LOAD_2_MASK (0xFFFFU) |
| #define | TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT (0U) |
| #define | TMR_CMPLD2_COMPARATOR_LOAD_2(x) (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK) |
FILT - Timer Channel Input Filter Register | |
| #define | TMR_FILT_FILT_PER_MASK (0xFFU) |
| #define | TMR_FILT_FILT_PER_SHIFT (0U) |
| #define | TMR_FILT_FILT_PER(x) (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK) |
| #define | TMR_FILT_FILT_CNT_MASK (0x700U) |
| #define | TMR_FILT_FILT_CNT_SHIFT (8U) |
| #define | TMR_FILT_FILT_CNT(x) (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK) |
DMA - Timer Channel DMA Enable Register | |
| #define | TMR_DMA_IEFDE_MASK (0x1U) |
| #define | TMR_DMA_IEFDE_SHIFT (0U) |
| #define | TMR_DMA_IEFDE(x) (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK) |
| #define | TMR_DMA_CMPLD1DE_MASK (0x2U) |
| #define | TMR_DMA_CMPLD1DE_SHIFT (1U) |
| #define | TMR_DMA_CMPLD1DE(x) (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK) |
| #define | TMR_DMA_CMPLD2DE_MASK (0x4U) |
| #define | TMR_DMA_CMPLD2DE_SHIFT (2U) |
| #define | TMR_DMA_CMPLD2DE(x) (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK) |
ENBL - Timer Channel Enable Register | |
| #define | TMR_ENBL_ENBL_MASK (0xFU) |
| #define | TMR_ENBL_ENBL_SHIFT (0U) |
| #define | TMR_ENBL_ENBL(x) (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK) |
Detailed Description
Macro Definition Documentation
◆ TMR_CAPT_CAPTURE
| #define TMR_CAPT_CAPTURE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK) |
CAPTURE - Capture Value
Definition at line 37437 of file MIMXRT1052.h.
◆ TMR_CAPT_CAPTURE_MASK
| #define TMR_CAPT_CAPTURE_MASK (0xFFFFU) |
Definition at line 37433 of file MIMXRT1052.h.
◆ TMR_CAPT_CAPTURE_SHIFT
| #define TMR_CAPT_CAPTURE_SHIFT (0U) |
Definition at line 37434 of file MIMXRT1052.h.
◆ TMR_CAPT_COUNT
| #define TMR_CAPT_COUNT (4U) |
Definition at line 37441 of file MIMXRT1052.h.
◆ TMR_CMPLD1_COMPARATOR_LOAD_1
| #define TMR_CMPLD1_COMPARATOR_LOAD_1 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK) |
Definition at line 37671 of file MIMXRT1052.h.
◆ TMR_CMPLD1_COMPARATOR_LOAD_1_MASK
| #define TMR_CMPLD1_COMPARATOR_LOAD_1_MASK (0xFFFFU) |
Definition at line 37669 of file MIMXRT1052.h.
◆ TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT
| #define TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT (0U) |
Definition at line 37670 of file MIMXRT1052.h.
◆ TMR_CMPLD1_COUNT
| #define TMR_CMPLD1_COUNT (4U) |
Definition at line 37675 of file MIMXRT1052.h.
◆ TMR_CMPLD2_COMPARATOR_LOAD_2
| #define TMR_CMPLD2_COMPARATOR_LOAD_2 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK) |
Definition at line 37681 of file MIMXRT1052.h.
◆ TMR_CMPLD2_COMPARATOR_LOAD_2_MASK
| #define TMR_CMPLD2_COMPARATOR_LOAD_2_MASK (0xFFFFU) |
Definition at line 37679 of file MIMXRT1052.h.
◆ TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT
| #define TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT (0U) |
Definition at line 37680 of file MIMXRT1052.h.
◆ TMR_CMPLD2_COUNT
| #define TMR_CMPLD2_COUNT (4U) |
Definition at line 37685 of file MIMXRT1052.h.
◆ TMR_CNTR_COUNT
| #define TMR_CNTR_COUNT (4U) |
Definition at line 37473 of file MIMXRT1052.h.
◆ TMR_CNTR_COUNTER
| #define TMR_CNTR_COUNTER | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK) |
Definition at line 37469 of file MIMXRT1052.h.
◆ TMR_CNTR_COUNTER_MASK
| #define TMR_CNTR_COUNTER_MASK (0xFFFFU) |
Definition at line 37467 of file MIMXRT1052.h.
◆ TMR_CNTR_COUNTER_SHIFT
| #define TMR_CNTR_COUNTER_SHIFT (0U) |
Definition at line 37468 of file MIMXRT1052.h.
◆ TMR_COMP1_COMPARISON_1
| #define TMR_COMP1_COMPARISON_1 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK) |
COMPARISON_1 - Comparison Value 1
Definition at line 37413 of file MIMXRT1052.h.
◆ TMR_COMP1_COMPARISON_1_MASK
| #define TMR_COMP1_COMPARISON_1_MASK (0xFFFFU) |
Definition at line 37409 of file MIMXRT1052.h.
◆ TMR_COMP1_COMPARISON_1_SHIFT
| #define TMR_COMP1_COMPARISON_1_SHIFT (0U) |
Definition at line 37410 of file MIMXRT1052.h.
◆ TMR_COMP1_COUNT
| #define TMR_COMP1_COUNT (4U) |
Definition at line 37417 of file MIMXRT1052.h.
◆ TMR_COMP2_COMPARISON_2
| #define TMR_COMP2_COMPARISON_2 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK) |
COMPARISON_2 - Comparison Value 2
Definition at line 37425 of file MIMXRT1052.h.
◆ TMR_COMP2_COMPARISON_2_MASK
| #define TMR_COMP2_COMPARISON_2_MASK (0xFFFFU) |
Definition at line 37421 of file MIMXRT1052.h.
◆ TMR_COMP2_COMPARISON_2_SHIFT
| #define TMR_COMP2_COMPARISON_2_SHIFT (0U) |
Definition at line 37422 of file MIMXRT1052.h.
◆ TMR_COMP2_COUNT
| #define TMR_COMP2_COUNT (4U) |
Definition at line 37429 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ALT_LOAD
| #define TMR_CSCTRL_ALT_LOAD | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ALT_LOAD_SHIFT)) & TMR_CSCTRL_ALT_LOAD_MASK) |
ALT_LOAD - Alternative Load Enable 0b0..Counter can be re-initialized only with the LOAD register. 0b1..Counter can be re-initialized with the LOAD or CMPLD2 registers depending on count direction.
Definition at line 37754 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ALT_LOAD_MASK
| #define TMR_CSCTRL_ALT_LOAD_MASK (0x1000U) |
Definition at line 37748 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ALT_LOAD_SHIFT
| #define TMR_CSCTRL_ALT_LOAD_SHIFT (12U) |
Definition at line 37749 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL1
| #define TMR_CSCTRL_CL1 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL1_SHIFT)) & TMR_CSCTRL_CL1_MASK) |
CL1 - Compare Load Control 1 0b00..Never preload 0b01..Load upon successful compare with the value in COMP1 0b10..Load upon successful compare with the value in COMP2 0b11..Reserved
Definition at line 37697 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL1_MASK
| #define TMR_CSCTRL_CL1_MASK (0x3U) |
Definition at line 37689 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL1_SHIFT
| #define TMR_CSCTRL_CL1_SHIFT (0U) |
Definition at line 37690 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL2
| #define TMR_CSCTRL_CL2 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL2_SHIFT)) & TMR_CSCTRL_CL2_MASK) |
CL2 - Compare Load Control 2 0b00..Never preload 0b01..Load upon successful compare with the value in COMP1 0b10..Load upon successful compare with the value in COMP2 0b11..Reserved
Definition at line 37706 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL2_MASK
| #define TMR_CSCTRL_CL2_MASK (0xCU) |
Definition at line 37698 of file MIMXRT1052.h.
◆ TMR_CSCTRL_CL2_SHIFT
| #define TMR_CSCTRL_CL2_SHIFT (2U) |
Definition at line 37699 of file MIMXRT1052.h.
◆ TMR_CSCTRL_COUNT
| #define TMR_CSCTRL_COUNT (4U) |
Definition at line 37774 of file MIMXRT1052.h.
◆ TMR_CSCTRL_DBG_EN
| #define TMR_CSCTRL_DBG_EN | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_DBG_EN_SHIFT)) & TMR_CSCTRL_DBG_EN_MASK) |
DBG_EN - Debug Actions Enable 0b00..Continue with normal operation during debug mode. (default) 0b01..Halt TMR counter during debug mode. 0b10..Force TMR output to logic 0 (prior to consideration of SCTRL[OPS]). 0b11..Both halt counter and force output to 0 during debug mode.
Definition at line 37770 of file MIMXRT1052.h.
◆ TMR_CSCTRL_DBG_EN_MASK
| #define TMR_CSCTRL_DBG_EN_MASK (0xC000U) |
Definition at line 37762 of file MIMXRT1052.h.
◆ TMR_CSCTRL_DBG_EN_SHIFT
| #define TMR_CSCTRL_DBG_EN_SHIFT (14U) |
Definition at line 37763 of file MIMXRT1052.h.
◆ TMR_CSCTRL_FAULT
| #define TMR_CSCTRL_FAULT | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_FAULT_SHIFT)) & TMR_CSCTRL_FAULT_MASK) |
FAULT - Fault Enable 0b0..Fault function disabled. 0b1..Fault function enabled.
Definition at line 37761 of file MIMXRT1052.h.
◆ TMR_CSCTRL_FAULT_MASK
| #define TMR_CSCTRL_FAULT_MASK (0x2000U) |
Definition at line 37755 of file MIMXRT1052.h.
◆ TMR_CSCTRL_FAULT_SHIFT
| #define TMR_CSCTRL_FAULT_SHIFT (13U) |
Definition at line 37756 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ROC
| #define TMR_CSCTRL_ROC | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ROC_SHIFT)) & TMR_CSCTRL_ROC_MASK) |
ROC - Reload on Capture 0b0..Do not reload the counter on a capture event. 0b1..Reload the counter on a capture event.
Definition at line 37747 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ROC_MASK
| #define TMR_CSCTRL_ROC_MASK (0x800U) |
Definition at line 37741 of file MIMXRT1052.h.
◆ TMR_CSCTRL_ROC_SHIFT
| #define TMR_CSCTRL_ROC_SHIFT (11U) |
Definition at line 37742 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1
| #define TMR_CSCTRL_TCF1 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1_SHIFT)) & TMR_CSCTRL_TCF1_MASK) |
TCF1 - Timer Compare 1 Interrupt Flag
Definition at line 37711 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1_MASK
| #define TMR_CSCTRL_TCF1_MASK (0x10U) |
Definition at line 37707 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1_SHIFT
| #define TMR_CSCTRL_TCF1_SHIFT (4U) |
Definition at line 37708 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1EN
| #define TMR_CSCTRL_TCF1EN | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1EN_SHIFT)) & TMR_CSCTRL_TCF1EN_MASK) |
TCF1EN - Timer Compare 1 Interrupt Enable
Definition at line 37721 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1EN_MASK
| #define TMR_CSCTRL_TCF1EN_MASK (0x40U) |
Definition at line 37717 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF1EN_SHIFT
| #define TMR_CSCTRL_TCF1EN_SHIFT (6U) |
Definition at line 37718 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2
| #define TMR_CSCTRL_TCF2 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2_SHIFT)) & TMR_CSCTRL_TCF2_MASK) |
TCF2 - Timer Compare 2 Interrupt Flag
Definition at line 37716 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2_MASK
| #define TMR_CSCTRL_TCF2_MASK (0x20U) |
Definition at line 37712 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2_SHIFT
| #define TMR_CSCTRL_TCF2_SHIFT (5U) |
Definition at line 37713 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2EN
| #define TMR_CSCTRL_TCF2EN | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2EN_SHIFT)) & TMR_CSCTRL_TCF2EN_MASK) |
TCF2EN - Timer Compare 2 Interrupt Enable
Definition at line 37726 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2EN_MASK
| #define TMR_CSCTRL_TCF2EN_MASK (0x80U) |
Definition at line 37722 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCF2EN_SHIFT
| #define TMR_CSCTRL_TCF2EN_SHIFT (7U) |
Definition at line 37723 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCI
| #define TMR_CSCTRL_TCI | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCI_SHIFT)) & TMR_CSCTRL_TCI_MASK) |
TCI - Triggered Count Initialization Control 0b0..Stop counter upon receiving a second trigger event while still counting from the first trigger event. 0b1..Reload the counter upon receiving a second trigger event while still counting from the first trigger event.
Definition at line 37740 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCI_MASK
| #define TMR_CSCTRL_TCI_MASK (0x400U) |
Definition at line 37734 of file MIMXRT1052.h.
◆ TMR_CSCTRL_TCI_SHIFT
| #define TMR_CSCTRL_TCI_SHIFT (10U) |
Definition at line 37735 of file MIMXRT1052.h.
◆ TMR_CSCTRL_UP
| #define TMR_CSCTRL_UP | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_UP_SHIFT)) & TMR_CSCTRL_UP_MASK) |
UP - Counting Direction Indicator 0b0..The last count was in the DOWN direction. 0b1..The last count was in the UP direction.
Definition at line 37733 of file MIMXRT1052.h.
◆ TMR_CSCTRL_UP_MASK
| #define TMR_CSCTRL_UP_MASK (0x200U) |
Definition at line 37727 of file MIMXRT1052.h.
◆ TMR_CSCTRL_UP_SHIFT
| #define TMR_CSCTRL_UP_SHIFT (9U) |
Definition at line 37728 of file MIMXRT1052.h.
◆ TMR_CTRL_CM
| #define TMR_CTRL_CM | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_CM_SHIFT)) & TMR_CTRL_CM_MASK) |
CM - Count Mode 0b000..No operation 0b001..Count rising edges of primary sourceRising edges are counted only when SCTRL[IPS] = 0. Falling edges are counted when SCTRL[IPS] = 1. If the primary count source is IP bus clock divide by 1, only rising edges are counted regardless of the value of SCTRL[IPS]. 0b010..Count rising and falling edges of primary sourceIP bus clock divide by 1 cannot be used as a primary count source in edge count mode. 0b011..Count rising edges of primary source while secondary input high active 0b100..Quadrature count mode, uses primary and secondary sources 0b101..Count rising edges of primary source; secondary source specifies directionRising edges are counted only when SCTRL[IPS] = 0. Falling edges are counted when SCTRL[IPS] = 1. 0b110..Edge of secondary source triggers primary count until compare 0b111..Cascaded counter mode (up/down)The primary count source must be set to one of the counter outputs.
Definition at line 37570 of file MIMXRT1052.h.
◆ TMR_CTRL_CM_MASK
| #define TMR_CTRL_CM_MASK (0xE000U) |
Definition at line 37555 of file MIMXRT1052.h.
◆ TMR_CTRL_CM_SHIFT
| #define TMR_CTRL_CM_SHIFT (13U) |
Definition at line 37556 of file MIMXRT1052.h.
◆ TMR_CTRL_COINIT
| #define TMR_CTRL_COINIT | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_COINIT_SHIFT)) & TMR_CTRL_COINIT_MASK) |
COINIT - Co-Channel Initialization 0b0..Co-channel counter/timers cannot force a re-initialization of this counter/timer 0b1..Co-channel counter/timers may force a re-initialization of this counter/timer
Definition at line 37496 of file MIMXRT1052.h.
◆ TMR_CTRL_COINIT_MASK
| #define TMR_CTRL_COINIT_MASK (0x8U) |
Definition at line 37490 of file MIMXRT1052.h.
◆ TMR_CTRL_COINIT_SHIFT
| #define TMR_CTRL_COINIT_SHIFT (3U) |
Definition at line 37491 of file MIMXRT1052.h.
◆ TMR_CTRL_COUNT
| #define TMR_CTRL_COUNT (4U) |
Definition at line 37574 of file MIMXRT1052.h.
◆ TMR_CTRL_DIR
| #define TMR_CTRL_DIR | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_DIR_SHIFT)) & TMR_CTRL_DIR_MASK) |
DIR - Count Direction 0b0..Count up. 0b1..Count down.
Definition at line 37503 of file MIMXRT1052.h.
◆ TMR_CTRL_DIR_MASK
| #define TMR_CTRL_DIR_MASK (0x10U) |
Definition at line 37497 of file MIMXRT1052.h.
◆ TMR_CTRL_DIR_SHIFT
| #define TMR_CTRL_DIR_SHIFT (4U) |
Definition at line 37498 of file MIMXRT1052.h.
◆ TMR_CTRL_LENGTH
| #define TMR_CTRL_LENGTH | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_LENGTH_SHIFT)) & TMR_CTRL_LENGTH_MASK) |
LENGTH - Count Length 0b0..Count until roll over at $FFFF and continue from $0000. 0b1..Count until compare, then re-initialize. If counting up, a successful compare occurs when the counter reaches a COMP1 value. If counting down, a successful compare occurs when the counter reaches a COMP2 value. When output mode $4 is used, alternating values of COMP1 and COMP2 are used to generate successful comparisons. For example, the counter counts until a COMP1 value is reached, re-initializes, counts until COMP2 value is reached, re-initializes, counts until COMP1 value is reached, and so on.
Definition at line 37514 of file MIMXRT1052.h.
◆ TMR_CTRL_LENGTH_MASK
| #define TMR_CTRL_LENGTH_MASK (0x20U) |
Definition at line 37504 of file MIMXRT1052.h.
◆ TMR_CTRL_LENGTH_SHIFT
| #define TMR_CTRL_LENGTH_SHIFT (5U) |
Definition at line 37505 of file MIMXRT1052.h.
◆ TMR_CTRL_ONCE
| #define TMR_CTRL_ONCE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_ONCE_SHIFT)) & TMR_CTRL_ONCE_MASK) |
ONCE - Count Once 0b0..Count repeatedly. 0b1..Count until compare and then stop. If counting up, a successful compare occurs when the counter reaches a COMP1 value. If counting down, a successful compare occurs when the counter reaches a COMP2 value. When output mode $4 is used, the counter re-initializes after reaching the COMP1 value, continues to count to the COMP2 value, and then stops.
Definition at line 37524 of file MIMXRT1052.h.
◆ TMR_CTRL_ONCE_MASK
| #define TMR_CTRL_ONCE_MASK (0x40U) |
Definition at line 37515 of file MIMXRT1052.h.
◆ TMR_CTRL_ONCE_SHIFT
| #define TMR_CTRL_ONCE_SHIFT (6U) |
Definition at line 37516 of file MIMXRT1052.h.
◆ TMR_CTRL_OUTMODE
| #define TMR_CTRL_OUTMODE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_OUTMODE_SHIFT)) & TMR_CTRL_OUTMODE_MASK) |
OUTMODE - Output Mode 0b000..Asserted while counter is active 0b001..Clear OFLAG output on successful compare 0b010..Set OFLAG output on successful compare 0b011..Toggle OFLAG output on successful compare 0b100..Toggle OFLAG output using alternating compare registers 0b101..Set on compare, cleared on secondary source input edge 0b110..Set on compare, cleared on counter rollover 0b111..Enable gated clock output while counter is active
Definition at line 37489 of file MIMXRT1052.h.
◆ TMR_CTRL_OUTMODE_MASK
| #define TMR_CTRL_OUTMODE_MASK (0x7U) |
Definition at line 37477 of file MIMXRT1052.h.
◆ TMR_CTRL_OUTMODE_SHIFT
| #define TMR_CTRL_OUTMODE_SHIFT (0U) |
Definition at line 37478 of file MIMXRT1052.h.
◆ TMR_CTRL_PCS
| #define TMR_CTRL_PCS | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_PCS_SHIFT)) & TMR_CTRL_PCS_MASK) |
PCS - Primary Count Source 0b0000..Counter 0 input pin 0b0001..Counter 1 input pin 0b0010..Counter 2 input pin 0b0011..Counter 3 input pin 0b0100..Counter 0 output 0b0101..Counter 1 output 0b0110..Counter 2 output 0b0111..Counter 3 output 0b1000..IP bus clock divide by 1 prescaler 0b1001..IP bus clock divide by 2 prescaler 0b1010..IP bus clock divide by 4 prescaler 0b1011..IP bus clock divide by 8 prescaler 0b1100..IP bus clock divide by 16 prescaler 0b1101..IP bus clock divide by 32 prescaler 0b1110..IP bus clock divide by 64 prescaler 0b1111..IP bus clock divide by 128 prescaler
Definition at line 37554 of file MIMXRT1052.h.
◆ TMR_CTRL_PCS_MASK
| #define TMR_CTRL_PCS_MASK (0x1E00U) |
Definition at line 37534 of file MIMXRT1052.h.
◆ TMR_CTRL_PCS_SHIFT
| #define TMR_CTRL_PCS_SHIFT (9U) |
Definition at line 37535 of file MIMXRT1052.h.
◆ TMR_CTRL_SCS
| #define TMR_CTRL_SCS | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_SCS_SHIFT)) & TMR_CTRL_SCS_MASK) |
SCS - Secondary Count Source 0b00..Counter 0 input pin 0b01..Counter 1 input pin 0b10..Counter 2 input pin 0b11..Counter 3 input pin
Definition at line 37533 of file MIMXRT1052.h.
◆ TMR_CTRL_SCS_MASK
| #define TMR_CTRL_SCS_MASK (0x180U) |
Definition at line 37525 of file MIMXRT1052.h.
◆ TMR_CTRL_SCS_SHIFT
| #define TMR_CTRL_SCS_SHIFT (7U) |
Definition at line 37526 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD1DE
| #define TMR_DMA_CMPLD1DE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK) |
CMPLD1DE - Comparator Preload Register 1 DMA Enable
Definition at line 37804 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD1DE_MASK
| #define TMR_DMA_CMPLD1DE_MASK (0x2U) |
Definition at line 37800 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD1DE_SHIFT
| #define TMR_DMA_CMPLD1DE_SHIFT (1U) |
Definition at line 37801 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD2DE
| #define TMR_DMA_CMPLD2DE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK) |
CMPLD2DE - Comparator Preload Register 2 DMA Enable
Definition at line 37809 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD2DE_MASK
| #define TMR_DMA_CMPLD2DE_MASK (0x4U) |
Definition at line 37805 of file MIMXRT1052.h.
◆ TMR_DMA_CMPLD2DE_SHIFT
| #define TMR_DMA_CMPLD2DE_SHIFT (2U) |
Definition at line 37806 of file MIMXRT1052.h.
◆ TMR_DMA_COUNT
| #define TMR_DMA_COUNT (4U) |
Definition at line 37813 of file MIMXRT1052.h.
◆ TMR_DMA_IEFDE
| #define TMR_DMA_IEFDE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK) |
IEFDE - Input Edge Flag DMA Enable
Definition at line 37799 of file MIMXRT1052.h.
◆ TMR_DMA_IEFDE_MASK
| #define TMR_DMA_IEFDE_MASK (0x1U) |
Definition at line 37795 of file MIMXRT1052.h.
◆ TMR_DMA_IEFDE_SHIFT
| #define TMR_DMA_IEFDE_SHIFT (0U) |
Definition at line 37796 of file MIMXRT1052.h.
◆ TMR_ENBL_COUNT
| #define TMR_ENBL_COUNT (4U) |
Definition at line 37827 of file MIMXRT1052.h.
◆ TMR_ENBL_ENBL
| #define TMR_ENBL_ENBL | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK) |
ENBL - Timer Channel Enable 0b0000..Timer channel is disabled. 0b0001..Timer channel is enabled. (default)
Definition at line 37823 of file MIMXRT1052.h.
◆ TMR_ENBL_ENBL_MASK
| #define TMR_ENBL_ENBL_MASK (0xFU) |
Definition at line 37817 of file MIMXRT1052.h.
◆ TMR_ENBL_ENBL_SHIFT
| #define TMR_ENBL_ENBL_SHIFT (0U) |
Definition at line 37818 of file MIMXRT1052.h.
◆ TMR_FILT_COUNT
| #define TMR_FILT_COUNT (4U) |
Definition at line 37791 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_CNT
| #define TMR_FILT_FILT_CNT | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK) |
FILT_CNT - Input Filter Sample Count
Definition at line 37787 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_CNT_MASK
| #define TMR_FILT_FILT_CNT_MASK (0x700U) |
Definition at line 37783 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_CNT_SHIFT
| #define TMR_FILT_FILT_CNT_SHIFT (8U) |
Definition at line 37784 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_PER
| #define TMR_FILT_FILT_PER | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK) |
FILT_PER - Input Filter Sample Period
Definition at line 37782 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_PER_MASK
| #define TMR_FILT_FILT_PER_MASK (0xFFU) |
Definition at line 37778 of file MIMXRT1052.h.
◆ TMR_FILT_FILT_PER_SHIFT
| #define TMR_FILT_FILT_PER_SHIFT (0U) |
Definition at line 37779 of file MIMXRT1052.h.
◆ TMR_HOLD_COUNT
| #define TMR_HOLD_COUNT (4U) |
Definition at line 37463 of file MIMXRT1052.h.
◆ TMR_HOLD_HOLD
| #define TMR_HOLD_HOLD | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK) |
Definition at line 37459 of file MIMXRT1052.h.
◆ TMR_HOLD_HOLD_MASK
| #define TMR_HOLD_HOLD_MASK (0xFFFFU) |
Definition at line 37457 of file MIMXRT1052.h.
◆ TMR_HOLD_HOLD_SHIFT
| #define TMR_HOLD_HOLD_SHIFT (0U) |
Definition at line 37458 of file MIMXRT1052.h.
◆ TMR_LOAD_COUNT
| #define TMR_LOAD_COUNT (4U) |
Definition at line 37453 of file MIMXRT1052.h.
◆ TMR_LOAD_LOAD
| #define TMR_LOAD_LOAD | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK) |
LOAD - Timer Load Register
Definition at line 37449 of file MIMXRT1052.h.
◆ TMR_LOAD_LOAD_MASK
| #define TMR_LOAD_LOAD_MASK (0xFFFFU) |
Definition at line 37445 of file MIMXRT1052.h.
◆ TMR_LOAD_LOAD_SHIFT
| #define TMR_LOAD_LOAD_SHIFT (0U) |
Definition at line 37446 of file MIMXRT1052.h.
◆ TMR_SCTRL_CAPTURE_MODE
| #define TMR_SCTRL_CAPTURE_MODE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_CAPTURE_MODE_SHIFT)) & TMR_SCTRL_CAPTURE_MODE_MASK) |
CAPTURE_MODE - Input Capture Mode 0b00..Capture function is disabled 0b01..Load capture register on rising edge (when IPS=0) or falling edge (when IPS=1) of input 0b10..Load capture register on falling edge (when IPS=0) or rising edge (when IPS=1) of input 0b11..Load capture register on both edges of input
Definition at line 37621 of file MIMXRT1052.h.
◆ TMR_SCTRL_CAPTURE_MODE_MASK
| #define TMR_SCTRL_CAPTURE_MODE_MASK (0xC0U) |
Definition at line 37613 of file MIMXRT1052.h.
◆ TMR_SCTRL_CAPTURE_MODE_SHIFT
| #define TMR_SCTRL_CAPTURE_MODE_SHIFT (6U) |
Definition at line 37614 of file MIMXRT1052.h.
◆ TMR_SCTRL_COUNT
| #define TMR_SCTRL_COUNT (4U) |
Definition at line 37665 of file MIMXRT1052.h.
◆ TMR_SCTRL_EEOF
| #define TMR_SCTRL_EEOF | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_EEOF_SHIFT)) & TMR_SCTRL_EEOF_MASK) |
EEOF - Enable External OFLAG Force
Definition at line 37607 of file MIMXRT1052.h.
◆ TMR_SCTRL_EEOF_MASK
| #define TMR_SCTRL_EEOF_MASK (0x10U) |
Definition at line 37603 of file MIMXRT1052.h.
◆ TMR_SCTRL_EEOF_SHIFT
| #define TMR_SCTRL_EEOF_SHIFT (4U) |
Definition at line 37604 of file MIMXRT1052.h.
◆ TMR_SCTRL_FORCE
| #define TMR_SCTRL_FORCE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_FORCE_SHIFT)) & TMR_SCTRL_FORCE_MASK) |
FORCE - Force OFLAG Output
Definition at line 37597 of file MIMXRT1052.h.
◆ TMR_SCTRL_FORCE_MASK
| #define TMR_SCTRL_FORCE_MASK (0x4U) |
Definition at line 37593 of file MIMXRT1052.h.
◆ TMR_SCTRL_FORCE_SHIFT
| #define TMR_SCTRL_FORCE_SHIFT (2U) |
Definition at line 37594 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEF
| #define TMR_SCTRL_IEF | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEF_SHIFT)) & TMR_SCTRL_IEF_MASK) |
IEF - Input Edge Flag
Definition at line 37641 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEF_MASK
| #define TMR_SCTRL_IEF_MASK (0x800U) |
Definition at line 37637 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEF_SHIFT
| #define TMR_SCTRL_IEF_SHIFT (11U) |
Definition at line 37638 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEFIE
| #define TMR_SCTRL_IEFIE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEFIE_SHIFT)) & TMR_SCTRL_IEFIE_MASK) |
IEFIE - Input Edge Flag Interrupt Enable
Definition at line 37636 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEFIE_MASK
| #define TMR_SCTRL_IEFIE_MASK (0x400U) |
Definition at line 37632 of file MIMXRT1052.h.
◆ TMR_SCTRL_IEFIE_SHIFT
| #define TMR_SCTRL_IEFIE_SHIFT (10U) |
Definition at line 37633 of file MIMXRT1052.h.
◆ TMR_SCTRL_INPUT
| #define TMR_SCTRL_INPUT | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_INPUT_SHIFT)) & TMR_SCTRL_INPUT_MASK) |
INPUT - External Input Signal
Definition at line 37626 of file MIMXRT1052.h.
◆ TMR_SCTRL_INPUT_MASK
| #define TMR_SCTRL_INPUT_MASK (0x100U) |
Definition at line 37622 of file MIMXRT1052.h.
◆ TMR_SCTRL_INPUT_SHIFT
| #define TMR_SCTRL_INPUT_SHIFT (8U) |
Definition at line 37623 of file MIMXRT1052.h.
◆ TMR_SCTRL_IPS
| #define TMR_SCTRL_IPS | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IPS_SHIFT)) & TMR_SCTRL_IPS_MASK) |
IPS - Input Polarity Select
Definition at line 37631 of file MIMXRT1052.h.
◆ TMR_SCTRL_IPS_MASK
| #define TMR_SCTRL_IPS_MASK (0x200U) |
Definition at line 37627 of file MIMXRT1052.h.
◆ TMR_SCTRL_IPS_SHIFT
| #define TMR_SCTRL_IPS_SHIFT (9U) |
Definition at line 37628 of file MIMXRT1052.h.
◆ TMR_SCTRL_MSTR
| #define TMR_SCTRL_MSTR | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_MSTR_SHIFT)) & TMR_SCTRL_MSTR_MASK) |
MSTR - Master Mode
Definition at line 37612 of file MIMXRT1052.h.
◆ TMR_SCTRL_MSTR_MASK
| #define TMR_SCTRL_MSTR_MASK (0x20U) |
Definition at line 37608 of file MIMXRT1052.h.
◆ TMR_SCTRL_MSTR_SHIFT
| #define TMR_SCTRL_MSTR_SHIFT (5U) |
Definition at line 37609 of file MIMXRT1052.h.
◆ TMR_SCTRL_OEN
| #define TMR_SCTRL_OEN | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OEN_SHIFT)) & TMR_SCTRL_OEN_MASK) |
OEN - Output Enable 0b0..The external pin is configured as an input. 0b1..The OFLAG output signal is driven on the external pin. Other timer groups using this external pin as their input see the driven value. The polarity of the signal is determined by OPS.
Definition at line 37585 of file MIMXRT1052.h.
◆ TMR_SCTRL_OEN_MASK
| #define TMR_SCTRL_OEN_MASK (0x1U) |
Definition at line 37578 of file MIMXRT1052.h.
◆ TMR_SCTRL_OEN_SHIFT
| #define TMR_SCTRL_OEN_SHIFT (0U) |
Definition at line 37579 of file MIMXRT1052.h.
◆ TMR_SCTRL_OPS
| #define TMR_SCTRL_OPS | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OPS_SHIFT)) & TMR_SCTRL_OPS_MASK) |
OPS - Output Polarity Select 0b0..True polarity. 0b1..Inverted polarity.
Definition at line 37592 of file MIMXRT1052.h.
◆ TMR_SCTRL_OPS_MASK
| #define TMR_SCTRL_OPS_MASK (0x2U) |
Definition at line 37586 of file MIMXRT1052.h.
◆ TMR_SCTRL_OPS_SHIFT
| #define TMR_SCTRL_OPS_SHIFT (1U) |
Definition at line 37587 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCF
| #define TMR_SCTRL_TCF | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCF_SHIFT)) & TMR_SCTRL_TCF_MASK) |
TCF - Timer Compare Flag
Definition at line 37661 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCF_MASK
| #define TMR_SCTRL_TCF_MASK (0x8000U) |
Definition at line 37657 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCF_SHIFT
| #define TMR_SCTRL_TCF_SHIFT (15U) |
Definition at line 37658 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCFIE
| #define TMR_SCTRL_TCFIE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCFIE_SHIFT)) & TMR_SCTRL_TCFIE_MASK) |
TCFIE - Timer Compare Flag Interrupt Enable
Definition at line 37656 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCFIE_MASK
| #define TMR_SCTRL_TCFIE_MASK (0x4000U) |
Definition at line 37652 of file MIMXRT1052.h.
◆ TMR_SCTRL_TCFIE_SHIFT
| #define TMR_SCTRL_TCFIE_SHIFT (14U) |
Definition at line 37653 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOF
| #define TMR_SCTRL_TOF | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOF_SHIFT)) & TMR_SCTRL_TOF_MASK) |
TOF - Timer Overflow Flag
Definition at line 37651 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOF_MASK
| #define TMR_SCTRL_TOF_MASK (0x2000U) |
Definition at line 37647 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOF_SHIFT
| #define TMR_SCTRL_TOF_SHIFT (13U) |
Definition at line 37648 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOFIE
| #define TMR_SCTRL_TOFIE | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOFIE_SHIFT)) & TMR_SCTRL_TOFIE_MASK) |
TOFIE - Timer Overflow Flag Interrupt Enable
Definition at line 37646 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOFIE_MASK
| #define TMR_SCTRL_TOFIE_MASK (0x1000U) |
Definition at line 37642 of file MIMXRT1052.h.
◆ TMR_SCTRL_TOFIE_SHIFT
| #define TMR_SCTRL_TOFIE_SHIFT (12U) |
Definition at line 37643 of file MIMXRT1052.h.
◆ TMR_SCTRL_VAL
| #define TMR_SCTRL_VAL | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_VAL_SHIFT)) & TMR_SCTRL_VAL_MASK) |
VAL - Forced OFLAG Value
Definition at line 37602 of file MIMXRT1052.h.
◆ TMR_SCTRL_VAL_MASK
| #define TMR_SCTRL_VAL_MASK (0x8U) |
Definition at line 37598 of file MIMXRT1052.h.
◆ TMR_SCTRL_VAL_SHIFT
| #define TMR_SCTRL_VAL_SHIFT (3U) |
Definition at line 37599 of file MIMXRT1052.h.