Modules | |
TMR Register Masks | |
Classes | |
struct | TMR_Type |
Macros | |
#define | TMR1 ((TMR_Type *)TMR1_BASE) |
#define | TMR1_BASE (0x401DC000u) |
#define | TMR2 ((TMR_Type *)TMR2_BASE) |
#define | TMR2_BASE (0x401E0000u) |
#define | TMR3 ((TMR_Type *)TMR3_BASE) |
#define | TMR3_BASE (0x401E4000u) |
#define | TMR4 ((TMR_Type *)TMR4_BASE) |
#define | TMR4_BASE (0x401E8000u) |
#define | TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE } |
#define | TMR_BASE_PTRS { (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4 } |
#define | TMR_IRQS { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn } |
Peripheral TMR1 base pointer
Definition at line 37839 of file MIMXRT1052.h.
#define TMR1_BASE (0x401DC000u) |
Peripheral TMR1 base address
Definition at line 37837 of file MIMXRT1052.h.
Peripheral TMR2 base pointer
Definition at line 37843 of file MIMXRT1052.h.
#define TMR2_BASE (0x401E0000u) |
Peripheral TMR2 base address
Definition at line 37841 of file MIMXRT1052.h.
Peripheral TMR3 base pointer
Definition at line 37847 of file MIMXRT1052.h.
#define TMR3_BASE (0x401E4000u) |
Peripheral TMR3 base address
Definition at line 37845 of file MIMXRT1052.h.
Peripheral TMR4 base pointer
Definition at line 37851 of file MIMXRT1052.h.
#define TMR4_BASE (0x401E8000u) |
Peripheral TMR4 base address
Definition at line 37849 of file MIMXRT1052.h.
Array initializer of TMR peripheral base addresses
Definition at line 37853 of file MIMXRT1052.h.
Array initializer of TMR peripheral base pointers
Definition at line 37855 of file MIMXRT1052.h.
#define TMR_IRQS { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn } |
Interrupt vectors for the TMR peripheral type
Definition at line 37857 of file MIMXRT1052.h.