Modules | Classes | Macros
Collaboration diagram for LPUART Peripheral Access Layer:

Modules

 LPUART Register Masks
 

Classes

struct  LPUART_Type
 

Macros

#define LPUART1   ((LPUART_Type *)LPUART1_BASE)
 
#define LPUART1_BASE   (0x40184000u)
 
#define LPUART2   ((LPUART_Type *)LPUART2_BASE)
 
#define LPUART2_BASE   (0x40188000u)
 
#define LPUART3   ((LPUART_Type *)LPUART3_BASE)
 
#define LPUART3_BASE   (0x4018C000u)
 
#define LPUART4   ((LPUART_Type *)LPUART4_BASE)
 
#define LPUART4_BASE   (0x40190000u)
 
#define LPUART5   ((LPUART_Type *)LPUART5_BASE)
 
#define LPUART5_BASE   (0x40194000u)
 
#define LPUART6   ((LPUART_Type *)LPUART6_BASE)
 
#define LPUART6_BASE   (0x40198000u)
 
#define LPUART7   ((LPUART_Type *)LPUART7_BASE)
 
#define LPUART7_BASE   (0x4019C000u)
 
#define LPUART8   ((LPUART_Type *)LPUART8_BASE)
 
#define LPUART8_BASE   (0x401A0000u)
 
#define LPUART_BASE_ADDRS   { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE }
 
#define LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }
 
#define LPUART_RX_TX_IRQS   { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn }
 

Detailed Description

Macro Definition Documentation

◆ LPUART1

#define LPUART1   ((LPUART_Type *)LPUART1_BASE)

Peripheral LPUART1 base pointer

Definition at line 27647 of file MIMXRT1052.h.

◆ LPUART1_BASE

#define LPUART1_BASE   (0x40184000u)

Peripheral LPUART1 base address

Definition at line 27645 of file MIMXRT1052.h.

◆ LPUART2

#define LPUART2   ((LPUART_Type *)LPUART2_BASE)

Peripheral LPUART2 base pointer

Definition at line 27651 of file MIMXRT1052.h.

◆ LPUART2_BASE

#define LPUART2_BASE   (0x40188000u)

Peripheral LPUART2 base address

Definition at line 27649 of file MIMXRT1052.h.

◆ LPUART3

#define LPUART3   ((LPUART_Type *)LPUART3_BASE)

Peripheral LPUART3 base pointer

Definition at line 27655 of file MIMXRT1052.h.

◆ LPUART3_BASE

#define LPUART3_BASE   (0x4018C000u)

Peripheral LPUART3 base address

Definition at line 27653 of file MIMXRT1052.h.

◆ LPUART4

#define LPUART4   ((LPUART_Type *)LPUART4_BASE)

Peripheral LPUART4 base pointer

Definition at line 27659 of file MIMXRT1052.h.

◆ LPUART4_BASE

#define LPUART4_BASE   (0x40190000u)

Peripheral LPUART4 base address

Definition at line 27657 of file MIMXRT1052.h.

◆ LPUART5

#define LPUART5   ((LPUART_Type *)LPUART5_BASE)

Peripheral LPUART5 base pointer

Definition at line 27663 of file MIMXRT1052.h.

◆ LPUART5_BASE

#define LPUART5_BASE   (0x40194000u)

Peripheral LPUART5 base address

Definition at line 27661 of file MIMXRT1052.h.

◆ LPUART6

#define LPUART6   ((LPUART_Type *)LPUART6_BASE)

Peripheral LPUART6 base pointer

Definition at line 27667 of file MIMXRT1052.h.

◆ LPUART6_BASE

#define LPUART6_BASE   (0x40198000u)

Peripheral LPUART6 base address

Definition at line 27665 of file MIMXRT1052.h.

◆ LPUART7

#define LPUART7   ((LPUART_Type *)LPUART7_BASE)

Peripheral LPUART7 base pointer

Definition at line 27671 of file MIMXRT1052.h.

◆ LPUART7_BASE

#define LPUART7_BASE   (0x4019C000u)

Peripheral LPUART7 base address

Definition at line 27669 of file MIMXRT1052.h.

◆ LPUART8

#define LPUART8   ((LPUART_Type *)LPUART8_BASE)

Peripheral LPUART8 base pointer

Definition at line 27675 of file MIMXRT1052.h.

◆ LPUART8_BASE

#define LPUART8_BASE   (0x401A0000u)

Peripheral LPUART8 base address

Definition at line 27673 of file MIMXRT1052.h.

◆ LPUART_BASE_ADDRS

Array initializer of LPUART peripheral base addresses

Definition at line 27677 of file MIMXRT1052.h.

◆ LPUART_BASE_PTRS

#define LPUART_BASE_PTRS   { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }

Array initializer of LPUART peripheral base pointers

Definition at line 27679 of file MIMXRT1052.h.

◆ LPUART_RX_TX_IRQS

Interrupt vectors for the LPUART peripheral type

Definition at line 27681 of file MIMXRT1052.h.



picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:10