Modules | Classes | Macros
Collaboration diagram for ADC_ETC Peripheral Access Layer:

Modules

 ADC_ETC Register Masks
 

Classes

struct  ADC_ETC_Type
 

Macros

#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)
 
#define ADC_ETC_BASE   (0x403B0000u)
 
#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }
 
#define ADC_ETC_BASE_PTRS   { ADC_ETC }
 
#define ADC_ETC_FAULT_IRQS   { ADC_ETC_ERROR_IRQ_IRQn }
 
#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }
 

Detailed Description

Macro Definition Documentation

◆ ADC_ETC

#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)

Peripheral ADC_ETC base pointer

Definition at line 2053 of file MIMXRT1052.h.

◆ ADC_ETC_BASE

#define ADC_ETC_BASE   (0x403B0000u)

Peripheral ADC_ETC base address

Definition at line 2051 of file MIMXRT1052.h.

◆ ADC_ETC_BASE_ADDRS

#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }

Array initializer of ADC_ETC peripheral base addresses

Definition at line 2055 of file MIMXRT1052.h.

◆ ADC_ETC_BASE_PTRS

#define ADC_ETC_BASE_PTRS   { ADC_ETC }

Array initializer of ADC_ETC peripheral base pointers

Definition at line 2057 of file MIMXRT1052.h.

◆ ADC_ETC_FAULT_IRQS

#define ADC_ETC_FAULT_IRQS   { ADC_ETC_ERROR_IRQ_IRQn }

Definition at line 2060 of file MIMXRT1052.h.

◆ ADC_ETC_IRQS

#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }

Interrupt vectors for the ADC_ETC peripheral type

Definition at line 2059 of file MIMXRT1052.h.



picovoice_driver
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autogenerated on Fri Apr 1 2022 02:15:09