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7 #ifndef _CLOCK_CONFIG_H_
8 #define _CLOCK_CONFIG_H_
15 #define BOARD_XTAL0_CLK_HZ 24000000U
17 #define BOARD_XTAL32K_CLK_HZ 32768U
22 #if defined(__cplusplus)
32 #if defined(__cplusplus)
42 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U
45 #define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL
46 #define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL
47 #define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
48 #define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
49 #define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
50 #define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
51 #define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
52 #define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL
53 #define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 2400000UL
54 #define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL
55 #define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL
56 #define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
57 #define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL
58 #define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 160000000UL
59 #define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL
60 #define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL
61 #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL
62 #define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 67500000UL
63 #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
64 #define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
65 #define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL
66 #define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
67 #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL
68 #define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 24000000UL
69 #define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
70 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
71 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
72 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
73 #define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
74 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
75 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
76 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
77 #define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
78 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
79 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
80 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
81 #define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL
82 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
83 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
84 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 132000000UL
85 #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
86 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
87 #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
88 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
89 #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL
107 #if defined(__cplusplus)
117 #if defined(__cplusplus)
PLL configuration for AUDIO and VIDEO.
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN
Sys PLL for BOARD_BootClockRUN configuration.
void BOARD_InitBootClocks(void)
This function executes default configuration of clocks.
PLL configuration for ARM.
const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN
Video PLL set for BOARD_BootClockRUN configuration.
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN
Usb1 PLL set for BOARD_BootClockRUN configuration.
PLL configuration for USB.
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN
Arm PLL set for BOARD_BootClockRUN configuration.
void BOARD_BootClockRUN(void)
This function executes configuration of clocks.
PLL configuration for System.