68 #if !defined(STM32F40_41xxx) && !defined(STM32F427_437xx) && !defined(STM32F429_439xx) && !defined(STM32F401xx) && !defined(STM32F410xx) && \ 69 !defined(STM32F411xE) && !defined(STM32F446xx) && !defined(STM32F469_479xx) 98 #define STM32F40_41xxx 103 #define STM32F427_437xx 110 #if !defined(STM32F40_41xxx) && !defined(STM32F427_437xx) && !defined(STM32F429_439xx) && !defined(STM32F401xx) && !defined(STM32F410xx) && \ 111 !defined(STM32F411xE) && !defined(STM32F446xx) && !defined(STM32F469_479xx) 112 #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)" 115 #if !defined (USE_STDPERIPH_DRIVER) 131 #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || \ 132 defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F469_479xx) 133 #if !defined (HSE_VALUE) 134 #define HSE_VALUE ((uint32_t)25000000) 136 #elif defined(STM32F446xx) 137 #if !defined (HSE_VALUE) 138 #define HSE_VALUE ((uint32_t)8000000) 145 #if !defined (HSE_STARTUP_TIMEOUT) 146 #define HSE_STARTUP_TIMEOUT ((uint16_t)0x05000) 149 #if !defined (HSI_VALUE) 150 #define HSI_VALUE ((uint32_t)16000000) 156 #define __STM32F4XX_STDPERIPH_VERSION_MAIN (0x01) 157 #define __STM32F4XX_STDPERIPH_VERSION_SUB1 (0x06) 158 #define __STM32F4XX_STDPERIPH_VERSION_SUB2 (0x01) 159 #define __STM32F4XX_STDPERIPH_VERSION_RC (0x00) 160 #define __STM32F4XX_STDPERIPH_VERSION ((__STM32F4XX_STDPERIPH_VERSION_MAIN << 24)\ 161 |(__STM32F4XX_STDPERIPH_VERSION_SUB1 << 16)\ 162 |(__STM32F4XX_STDPERIPH_VERSION_SUB2 << 8)\ 163 |(__STM32F4XX_STDPERIPH_VERSION_RC)) 176 #define __CM4_REV 0x0001 177 #define __MPU_PRESENT 1 178 #define __NVIC_PRIO_BITS 4 179 #define __Vendor_SysTickConfig 0 180 #define __FPU_PRESENT 1 218 #if defined(STM32F40_41xxx) 224 TIM1_BRK_TIM9_IRQn = 24,
225 TIM1_UP_TIM10_IRQn = 25,
226 TIM1_TRG_COM_TIM11_IRQn = 26,
242 OTG_FS_WKUP_IRQn = 42,
243 TIM8_BRK_TIM12_IRQn = 43,
244 TIM8_UP_TIM13_IRQn = 44,
245 TIM8_TRG_COM_TIM14_IRQn = 45,
247 DMA1_Stream7_IRQn = 47,
256 DMA2_Stream0_IRQn = 56,
257 DMA2_Stream1_IRQn = 57,
258 DMA2_Stream2_IRQn = 58,
259 DMA2_Stream3_IRQn = 59,
260 DMA2_Stream4_IRQn = 60,
268 DMA2_Stream5_IRQn = 68,
269 DMA2_Stream6_IRQn = 69,
270 DMA2_Stream7_IRQn = 70,
274 OTG_HS_EP1_OUT_IRQn = 74,
275 OTG_HS_EP1_IN_IRQn = 75,
276 OTG_HS_WKUP_IRQn = 76,
284 #if defined(STM32F427_437xx) 290 TIM1_BRK_TIM9_IRQn = 24,
291 TIM1_UP_TIM10_IRQn = 25,
292 TIM1_TRG_COM_TIM11_IRQn = 26,
308 OTG_FS_WKUP_IRQn = 42,
309 TIM8_BRK_TIM12_IRQn = 43,
310 TIM8_UP_TIM13_IRQn = 44,
311 TIM8_TRG_COM_TIM14_IRQn = 45,
313 DMA1_Stream7_IRQn = 47,
322 DMA2_Stream0_IRQn = 56,
323 DMA2_Stream1_IRQn = 57,
324 DMA2_Stream2_IRQn = 58,
325 DMA2_Stream3_IRQn = 59,
326 DMA2_Stream4_IRQn = 60,
334 DMA2_Stream5_IRQn = 68,
335 DMA2_Stream6_IRQn = 69,
336 DMA2_Stream7_IRQn = 70,
340 OTG_HS_EP1_OUT_IRQn = 74,
341 OTG_HS_EP1_IN_IRQn = 75,
342 OTG_HS_WKUP_IRQn = 76,
357 #if defined(STM32F429_439xx) 363 TIM1_BRK_TIM9_IRQn = 24,
364 TIM1_UP_TIM10_IRQn = 25,
365 TIM1_TRG_COM_TIM11_IRQn = 26,
381 OTG_FS_WKUP_IRQn = 42,
382 TIM8_BRK_TIM12_IRQn = 43,
383 TIM8_UP_TIM13_IRQn = 44,
384 TIM8_TRG_COM_TIM14_IRQn = 45,
386 DMA1_Stream7_IRQn = 47,
395 DMA2_Stream0_IRQn = 56,
396 DMA2_Stream1_IRQn = 57,
397 DMA2_Stream2_IRQn = 58,
398 DMA2_Stream3_IRQn = 59,
399 DMA2_Stream4_IRQn = 60,
407 DMA2_Stream5_IRQn = 68,
408 DMA2_Stream6_IRQn = 69,
409 DMA2_Stream7_IRQn = 70,
413 OTG_HS_EP1_OUT_IRQn = 74,
414 OTG_HS_EP1_IN_IRQn = 75,
415 OTG_HS_WKUP_IRQn = 76,
432 #if defined(STM32F410xx) 434 TIM1_BRK_TIM9_IRQn = 24,
436 TIM1_TRG_COM_TIM11_IRQn = 26,
448 DMA1_Stream7_IRQn = 47,
451 DMA2_Stream0_IRQn = 56,
452 DMA2_Stream1_IRQn = 57,
453 DMA2_Stream2_IRQn = 58,
454 DMA2_Stream3_IRQn = 59,
455 DMA2_Stream4_IRQn = 60,
456 DMA2_Stream5_IRQn = 68,
457 DMA2_Stream6_IRQn = 69,
458 DMA2_Stream7_IRQn = 70,
463 FMPI2C1_EV_IRQn = 95,
464 FMPI2C1_ER_IRQn = 96,
468 #if defined(STM32F401xx) || defined(STM32F411xE) 470 TIM1_BRK_TIM9_IRQn = 24,
471 TIM1_UP_TIM10_IRQn = 25,
472 TIM1_TRG_COM_TIM11_IRQn = 26,
487 OTG_FS_WKUP_IRQn = 42,
488 DMA1_Stream7_IRQn = 47,
492 DMA2_Stream0_IRQn = 56,
493 DMA2_Stream1_IRQn = 57,
494 DMA2_Stream2_IRQn = 58,
495 DMA2_Stream3_IRQn = 59,
496 DMA2_Stream4_IRQn = 60,
498 DMA2_Stream5_IRQn = 68,
499 DMA2_Stream6_IRQn = 69,
500 DMA2_Stream7_IRQn = 70,
505 #if defined(STM32F401xx) 508 #if defined(STM32F411xE) 514 #if defined(STM32F469_479xx) 520 TIM1_BRK_TIM9_IRQn = 24,
521 TIM1_UP_TIM10_IRQn = 25,
522 TIM1_TRG_COM_TIM11_IRQn = 26,
538 OTG_FS_WKUP_IRQn = 42,
539 TIM8_BRK_TIM12_IRQn = 43,
540 TIM8_UP_TIM13_IRQn = 44,
541 TIM8_TRG_COM_TIM14_IRQn = 45,
543 DMA1_Stream7_IRQn = 47,
552 DMA2_Stream0_IRQn = 56,
553 DMA2_Stream1_IRQn = 57,
554 DMA2_Stream2_IRQn = 58,
555 DMA2_Stream3_IRQn = 59,
556 DMA2_Stream4_IRQn = 60,
564 DMA2_Stream5_IRQn = 68,
565 DMA2_Stream6_IRQn = 69,
566 DMA2_Stream7_IRQn = 70,
570 OTG_HS_EP1_OUT_IRQn = 74,
571 OTG_HS_EP1_IN_IRQn = 75,
572 OTG_HS_WKUP_IRQn = 76,
591 #if defined(STM32F446xx) 597 TIM1_BRK_TIM9_IRQn = 24,
598 TIM1_UP_TIM10_IRQn = 25,
599 TIM1_TRG_COM_TIM11_IRQn = 26,
615 OTG_FS_WKUP_IRQn = 42,
617 TIM8_BRK_TIM12_IRQn = 43,
618 TIM8_UP_TIM13_IRQn = 44,
619 TIM8_TRG_COM_TIM14_IRQn = 45,
620 DMA1_Stream7_IRQn = 47,
629 DMA2_Stream0_IRQn = 56,
630 DMA2_Stream1_IRQn = 57,
631 DMA2_Stream2_IRQn = 58,
632 DMA2_Stream3_IRQn = 59,
633 DMA2_Stream4_IRQn = 60,
639 DMA2_Stream5_IRQn = 68,
640 DMA2_Stream6_IRQn = 69,
641 DMA2_Stream7_IRQn = 70,
645 OTG_HS_EP1_OUT_IRQn = 74,
646 OTG_HS_EP1_IN_IRQn = 75,
647 OTG_HS_WKUP_IRQn = 76,
657 FMPI2C1_EV_IRQn = 95,
667 #include "system_stm32f4xx.h" 696 typedef const uint8_t
uc8;
709 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 806 uint32_t RESERVED0[88];
809 uint32_t RESERVED1[12];
818 uint32_t RESERVED5[8];
822 #if defined(STM32F446xx) 951 uint32_t RESERVED[236];
956 #if defined(STM32F469_479xx) 966 __IO uint32_t LVCIDR;
967 __IO uint32_t LCOLCR;
970 uint32_t RESERVED0[4];
972 __IO uint32_t GVCIDR;
978 __IO uint32_t VHSACR;
979 __IO uint32_t VHBPCR;
981 __IO uint32_t VVSACR;
982 __IO uint32_t VVBPCR;
983 __IO uint32_t VVFPCR;
990 __IO uint32_t TCCR[6];
996 __IO uint32_t PCONFR;
1000 uint32_t RESERVED1[2];
1001 __IO uint32_t ISR[2];
1002 __IO uint32_t IER[2];
1003 uint32_t RESERVED2[3];
1004 __IO uint32_t FIR[2];
1005 uint32_t RESERVED3[8];
1007 uint32_t RESERVED4[2];
1008 __IO uint32_t LCVCIDR;
1009 __IO uint32_t LCCCR;
1011 __IO uint32_t LPMCCR;
1012 uint32_t RESERVED6[7];
1013 __IO uint32_t VMCCR;
1014 __IO uint32_t VPCCR;
1015 __IO uint32_t VCCCR;
1016 __IO uint32_t VNPCCR;
1017 __IO uint32_t VHSACCR;
1018 __IO uint32_t VHBPCCR;
1019 __IO uint32_t VLCCR;
1020 __IO uint32_t VVSACCR;
1021 __IO uint32_t VVBPCCR;
1022 __IO uint32_t VVFPCCR;
1023 __IO uint32_t VVACCR;
1024 uint32_t RESERVED7[11];
1025 __IO uint32_t TDCCR;
1026 uint32_t RESERVED8[155];
1027 __IO uint32_t WCFGR;
1031 __IO uint32_t WIFCR;
1033 __IO uint32_t WPCR[5];
1034 uint32_t RESERVED10;
1035 __IO uint32_t WRPCR;
1053 uint32_t RESERVED0[2];
1056 uint32_t RESERVED1[2];
1067 uint32_t RESERVED2[40];
1073 uint32_t RESERVED3[14];
1076 uint32_t RESERVED4[5];
1078 uint32_t RESERVED5[10];
1081 uint32_t RESERVED6[10];
1083 uint32_t RESERVED7[334];
1095 uint32_t RESERVED9[565];
1106 uint32_t RESERVED10[8];
1142 #if defined(STM32F40_41xxx) 1149 __IO uint32_t BTCR[8];
1158 __IO uint32_t BWTR[7];
1169 __IO uint32_t PMEM2;
1170 __IO uint32_t PATT2;
1172 __IO uint32_t ECCR2;
1183 __IO uint32_t PMEM3;
1184 __IO uint32_t PATT3;
1186 __IO uint32_t ECCR3;
1197 __IO uint32_t PMEM4;
1198 __IO uint32_t PATT4;
1203 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 1210 __IO uint32_t BTCR[8];
1211 } FMC_Bank1_TypeDef;
1219 __IO uint32_t BWTR[7];
1220 } FMC_Bank1E_TypeDef;
1230 __IO uint32_t PMEM2;
1231 __IO uint32_t PATT2;
1233 __IO uint32_t ECCR2;
1234 } FMC_Bank2_TypeDef;
1244 __IO uint32_t PMEM3;
1245 __IO uint32_t PATT3;
1247 __IO uint32_t ECCR3;
1248 } FMC_Bank3_TypeDef;
1258 __IO uint32_t PMEM4;
1259 __IO uint32_t PATT4;
1261 } FMC_Bank4_TypeDef;
1269 __IO uint32_t SDCR[2];
1270 __IO uint32_t SDTR[2];
1271 __IO uint32_t SDCMR;
1272 __IO uint32_t SDRTR;
1274 } FMC_Bank5_6_TypeDef;
1304 #if defined (STM32F410xx) 1307 __IO uint32_t CMPCR;
1308 uint32_t RESERVED1[2];
1311 uint32_t RESERVED[2];
1344 #if defined(STM32F410xx) || defined(STM32F446xx) 1355 __IO uint32_t TIMINGR;
1356 __IO uint32_t TIMEOUTR;
1383 uint32_t RESERVED0[2];
1389 uint32_t RESERVED1[2];
1391 uint32_t RESERVED2[1];
1393 uint32_t RESERVED3[1];
1416 uint32_t RESERVED0[2];
1420 uint32_t RESERVED1[3];
1451 uint32_t RESERVED1[2];
1458 uint32_t RESERVED3[2];
1465 uint32_t RESERVED5[2];
1468 uint32_t RESERVED6[2];
1570 uint32_t RESERVED0[2];
1572 uint32_t RESERVED1[13];
1602 #if defined(STM32F446xx) 1621 #if defined(STM32F446xx) || defined(STM32F469_479xx) 1636 __IO uint32_t PSMKR;
1637 __IO uint32_t PSMAR;
1643 #if defined(STM32F446xx) 1795 uint32_t RESERVED[52];
1819 #if defined(STM32F410xx) 1843 #define FLASH_BASE ((uint32_t)0x08000000) 1844 #define CCMDATARAM_BASE ((uint32_t)0x10000000) 1845 #define SRAM1_BASE ((uint32_t)0x20000000) 1846 #define SRAM2_BASE ((uint32_t)0x2001C000) 1847 #define SRAM3_BASE ((uint32_t)0x20020000) 1848 #define PERIPH_BASE ((uint32_t)0x40000000) 1849 #define BKPSRAM_BASE ((uint32_t)0x40024000) 1851 #if defined(STM32F40_41xxx) 1852 #define FSMC_R_BASE ((uint32_t)0xA0000000) 1855 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 1856 #define FMC_R_BASE ((uint32_t)0xA0000000) 1859 #if defined(STM32F446xx) || defined(STM32F469_479xx) 1860 #define QSPI_R_BASE ((uint32_t)0xA0001000) 1863 #define CCMDATARAM_BB_BASE ((uint32_t)0x12000000) 1864 #define SRAM1_BB_BASE ((uint32_t)0x22000000) 1865 #define SRAM2_BB_BASE ((uint32_t)0x2201C000) 1866 #define SRAM3_BB_BASE ((uint32_t)0x22400000) 1867 #define PERIPH_BB_BASE ((uint32_t)0x42000000) 1868 #define BKPSRAM_BB_BASE ((uint32_t)0x42024000) 1871 #define SRAM_BASE SRAM1_BASE 1872 #define SRAM_BB_BASE SRAM1_BB_BASE 1876 #define APB1PERIPH_BASE PERIPH_BASE 1877 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000) 1878 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000) 1879 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x10000000) 1882 #define TIM2_BASE (APB1PERIPH_BASE + 0x0000) 1883 #define TIM3_BASE (APB1PERIPH_BASE + 0x0400) 1884 #define TIM4_BASE (APB1PERIPH_BASE + 0x0800) 1885 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) 1886 #define TIM6_BASE (APB1PERIPH_BASE + 0x1000) 1887 #define TIM7_BASE (APB1PERIPH_BASE + 0x1400) 1888 #if defined(STM32F410xx) 1889 #define LPTIM1_BASE (APB1PERIPH_BASE + 0x2400) 1891 #define TIM12_BASE (APB1PERIPH_BASE + 0x1800) 1892 #define TIM13_BASE (APB1PERIPH_BASE + 0x1C00) 1893 #define TIM14_BASE (APB1PERIPH_BASE + 0x2000) 1894 #define RTC_BASE (APB1PERIPH_BASE + 0x2800) 1895 #define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) 1896 #define IWDG_BASE (APB1PERIPH_BASE + 0x3000) 1897 #define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400) 1898 #define SPI2_BASE (APB1PERIPH_BASE + 0x3800) 1899 #define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) 1900 #if defined(STM32F446xx) 1901 #define SPDIFRX_BASE (APB1PERIPH_BASE + 0x4000) 1903 #define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000) 1904 #define USART2_BASE (APB1PERIPH_BASE + 0x4400) 1905 #define USART3_BASE (APB1PERIPH_BASE + 0x4800) 1906 #define UART4_BASE (APB1PERIPH_BASE + 0x4C00) 1907 #define UART5_BASE (APB1PERIPH_BASE + 0x5000) 1908 #define I2C1_BASE (APB1PERIPH_BASE + 0x5400) 1909 #define I2C2_BASE (APB1PERIPH_BASE + 0x5800) 1910 #define I2C3_BASE (APB1PERIPH_BASE + 0x5C00) 1911 #if defined(STM32F410xx) || defined(STM32F446xx) 1912 #define FMPI2C1_BASE (APB1PERIPH_BASE + 0x6000) 1914 #define CAN1_BASE (APB1PERIPH_BASE + 0x6400) 1915 #define CAN2_BASE (APB1PERIPH_BASE + 0x6800) 1916 #if defined(STM32F446xx) 1917 #define CEC_BASE (APB1PERIPH_BASE + 0x6C00) 1919 #define PWR_BASE (APB1PERIPH_BASE + 0x7000) 1920 #define DAC_BASE (APB1PERIPH_BASE + 0x7400) 1921 #define UART7_BASE (APB1PERIPH_BASE + 0x7800) 1922 #define UART8_BASE (APB1PERIPH_BASE + 0x7C00) 1925 #define TIM1_BASE (APB2PERIPH_BASE + 0x0000) 1926 #define TIM8_BASE (APB2PERIPH_BASE + 0x0400) 1927 #define USART1_BASE (APB2PERIPH_BASE + 0x1000) 1928 #define USART6_BASE (APB2PERIPH_BASE + 0x1400) 1929 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) 1930 #define ADC2_BASE (APB2PERIPH_BASE + 0x2100) 1931 #define ADC3_BASE (APB2PERIPH_BASE + 0x2200) 1932 #define ADC_BASE (APB2PERIPH_BASE + 0x2300) 1933 #define SDIO_BASE (APB2PERIPH_BASE + 0x2C00) 1934 #define SPI1_BASE (APB2PERIPH_BASE + 0x3000) 1935 #define SPI4_BASE (APB2PERIPH_BASE + 0x3400) 1936 #define SYSCFG_BASE (APB2PERIPH_BASE + 0x3800) 1937 #define EXTI_BASE (APB2PERIPH_BASE + 0x3C00) 1938 #define TIM9_BASE (APB2PERIPH_BASE + 0x4000) 1939 #define TIM10_BASE (APB2PERIPH_BASE + 0x4400) 1940 #define TIM11_BASE (APB2PERIPH_BASE + 0x4800) 1941 #define SPI5_BASE (APB2PERIPH_BASE + 0x5000) 1942 #define SPI6_BASE (APB2PERIPH_BASE + 0x5400) 1943 #define SAI1_BASE (APB2PERIPH_BASE + 0x5800) 1944 #define SAI1_Block_A_BASE (SAI1_BASE + 0x004) 1945 #define SAI1_Block_B_BASE (SAI1_BASE + 0x024) 1946 #if defined(STM32F446xx) 1947 #define SAI2_BASE (APB2PERIPH_BASE + 0x5C00) 1948 #define SAI2_Block_A_BASE (SAI2_BASE + 0x004) 1949 #define SAI2_Block_B_BASE (SAI2_BASE + 0x024) 1951 #define LTDC_BASE (APB2PERIPH_BASE + 0x6800) 1952 #define LTDC_Layer1_BASE (LTDC_BASE + 0x84) 1953 #define LTDC_Layer2_BASE (LTDC_BASE + 0x104) 1954 #if defined(STM32F469_479xx) 1955 #define DSI_BASE (APB2PERIPH_BASE + 0x6C00) 1959 #define GPIOA_BASE (AHB1PERIPH_BASE + 0x0000) 1960 #define GPIOB_BASE (AHB1PERIPH_BASE + 0x0400) 1961 #define GPIOC_BASE (AHB1PERIPH_BASE + 0x0800) 1962 #define GPIOD_BASE (AHB1PERIPH_BASE + 0x0C00) 1963 #define GPIOE_BASE (AHB1PERIPH_BASE + 0x1000) 1964 #define GPIOF_BASE (AHB1PERIPH_BASE + 0x1400) 1965 #define GPIOG_BASE (AHB1PERIPH_BASE + 0x1800) 1966 #define GPIOH_BASE (AHB1PERIPH_BASE + 0x1C00) 1967 #define GPIOI_BASE (AHB1PERIPH_BASE + 0x2000) 1968 #define GPIOJ_BASE (AHB1PERIPH_BASE + 0x2400) 1969 #define GPIOK_BASE (AHB1PERIPH_BASE + 0x2800) 1970 #define CRC_BASE (AHB1PERIPH_BASE + 0x3000) 1971 #define RCC_BASE (AHB1PERIPH_BASE + 0x3800) 1972 #define FLASH_R_BASE (AHB1PERIPH_BASE + 0x3C00) 1973 #define DMA1_BASE (AHB1PERIPH_BASE + 0x6000) 1974 #define DMA1_Stream0_BASE (DMA1_BASE + 0x010) 1975 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028) 1976 #define DMA1_Stream2_BASE (DMA1_BASE + 0x040) 1977 #define DMA1_Stream3_BASE (DMA1_BASE + 0x058) 1978 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070) 1979 #define DMA1_Stream5_BASE (DMA1_BASE + 0x088) 1980 #define DMA1_Stream6_BASE (DMA1_BASE + 0x0A0) 1981 #define DMA1_Stream7_BASE (DMA1_BASE + 0x0B8) 1982 #define DMA2_BASE (AHB1PERIPH_BASE + 0x6400) 1983 #define DMA2_Stream0_BASE (DMA2_BASE + 0x010) 1984 #define DMA2_Stream1_BASE (DMA2_BASE + 0x028) 1985 #define DMA2_Stream2_BASE (DMA2_BASE + 0x040) 1986 #define DMA2_Stream3_BASE (DMA2_BASE + 0x058) 1987 #define DMA2_Stream4_BASE (DMA2_BASE + 0x070) 1988 #define DMA2_Stream5_BASE (DMA2_BASE + 0x088) 1989 #define DMA2_Stream6_BASE (DMA2_BASE + 0x0A0) 1990 #define DMA2_Stream7_BASE (DMA2_BASE + 0x0B8) 1991 #define ETH_BASE (AHB1PERIPH_BASE + 0x8000) 1992 #define ETH_MAC_BASE (ETH_BASE) 1993 #define ETH_MMC_BASE (ETH_BASE + 0x0100) 1994 #define ETH_PTP_BASE (ETH_BASE + 0x0700) 1995 #define ETH_DMA_BASE (ETH_BASE + 0x1000) 1996 #define DMA2D_BASE (AHB1PERIPH_BASE + 0xB000) 1999 #define DCMI_BASE (AHB2PERIPH_BASE + 0x50000) 2000 #define CRYP_BASE (AHB2PERIPH_BASE + 0x60000) 2001 #define HASH_BASE (AHB2PERIPH_BASE + 0x60400) 2002 #define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x60710) 2003 #define RNG_BASE (AHB2PERIPH_BASE + 0x60800) 2005 #if defined(STM32F40_41xxx) 2007 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) 2008 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) 2009 #define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) 2010 #define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) 2011 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) 2014 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 2016 #define FMC_Bank1_R_BASE (FMC_R_BASE + 0x0000) 2017 #define FMC_Bank1E_R_BASE (FMC_R_BASE + 0x0104) 2018 #define FMC_Bank2_R_BASE (FMC_R_BASE + 0x0060) 2019 #define FMC_Bank3_R_BASE (FMC_R_BASE + 0x0080) 2020 #define FMC_Bank4_R_BASE (FMC_R_BASE + 0x00A0) 2021 #define FMC_Bank5_6_R_BASE (FMC_R_BASE + 0x0140) 2025 #define DBGMCU_BASE ((uint32_t )0xE0042000) 2034 #if defined(STM32F446xx) || defined(STM32F469_479xx) 2035 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE) 2037 #define TIM2 ((TIM_TypeDef *) TIM2_BASE) 2038 #define TIM3 ((TIM_TypeDef *) TIM3_BASE) 2039 #define TIM4 ((TIM_TypeDef *) TIM4_BASE) 2040 #define TIM5 ((TIM_TypeDef *) TIM5_BASE) 2041 #define TIM6 ((TIM_TypeDef *) TIM6_BASE) 2042 #define TIM7 ((TIM_TypeDef *) TIM7_BASE) 2043 #define TIM12 ((TIM_TypeDef *) TIM12_BASE) 2044 #define TIM13 ((TIM_TypeDef *) TIM13_BASE) 2045 #define TIM14 ((TIM_TypeDef *) TIM14_BASE) 2046 #define RTC ((RTC_TypeDef *) RTC_BASE) 2047 #define WWDG ((WWDG_TypeDef *) WWDG_BASE) 2048 #define IWDG ((IWDG_TypeDef *) IWDG_BASE) 2049 #define I2S2ext ((SPI_TypeDef *) I2S2ext_BASE) 2050 #define SPI2 ((SPI_TypeDef *) SPI2_BASE) 2051 #define SPI3 ((SPI_TypeDef *) SPI3_BASE) 2052 #if defined(STM32F446xx) 2053 #define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 2055 #define I2S3ext ((SPI_TypeDef *) I2S3ext_BASE) 2056 #define USART2 ((USART_TypeDef *) USART2_BASE) 2057 #define USART3 ((USART_TypeDef *) USART3_BASE) 2058 #define UART4 ((USART_TypeDef *) UART4_BASE) 2059 #define UART5 ((USART_TypeDef *) UART5_BASE) 2060 #define I2C1 ((I2C_TypeDef *) I2C1_BASE) 2061 #define I2C2 ((I2C_TypeDef *) I2C2_BASE) 2062 #define I2C3 ((I2C_TypeDef *) I2C3_BASE) 2063 #if defined(STM32F410xx) || defined(STM32F446xx) 2064 #define FMPI2C1 ((FMPI2C_TypeDef *) FMPI2C1_BASE) 2066 #if defined(STM32F410xx) 2067 #define LPTIM1 ((LPTIM_TypeDef *) LPTIM1_BASE) 2069 #define CAN1 ((CAN_TypeDef *) CAN1_BASE) 2070 #define CAN2 ((CAN_TypeDef *) CAN2_BASE) 2071 #if defined(STM32F446xx) 2072 #define CEC ((CEC_TypeDef *) CEC_BASE) 2074 #define PWR ((PWR_TypeDef *) PWR_BASE) 2075 #define DAC ((DAC_TypeDef *) DAC_BASE) 2076 #define UART7 ((USART_TypeDef *) UART7_BASE) 2077 #define UART8 ((USART_TypeDef *) UART8_BASE) 2078 #define TIM1 ((TIM_TypeDef *) TIM1_BASE) 2079 #define TIM8 ((TIM_TypeDef *) TIM8_BASE) 2080 #define USART1 ((USART_TypeDef *) USART1_BASE) 2081 #define USART6 ((USART_TypeDef *) USART6_BASE) 2082 #define ADC ((ADC_Common_TypeDef *) ADC_BASE) 2083 #define ADC1 ((ADC_TypeDef *) ADC1_BASE) 2084 #define ADC2 ((ADC_TypeDef *) ADC2_BASE) 2085 #define ADC3 ((ADC_TypeDef *) ADC3_BASE) 2086 #define SDIO ((SDIO_TypeDef *) SDIO_BASE) 2087 #define SPI1 ((SPI_TypeDef *) SPI1_BASE) 2088 #define SPI4 ((SPI_TypeDef *) SPI4_BASE) 2089 #define SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE) 2090 #define EXTI ((EXTI_TypeDef *) EXTI_BASE) 2091 #define TIM9 ((TIM_TypeDef *) TIM9_BASE) 2092 #define TIM10 ((TIM_TypeDef *) TIM10_BASE) 2093 #define TIM11 ((TIM_TypeDef *) TIM11_BASE) 2094 #define SPI5 ((SPI_TypeDef *) SPI5_BASE) 2095 #define SPI6 ((SPI_TypeDef *) SPI6_BASE) 2096 #define SAI1 ((SAI_TypeDef *) SAI1_BASE) 2097 #define SAI1_Block_A ((SAI_Block_TypeDef *)SAI1_Block_A_BASE) 2098 #define SAI1_Block_B ((SAI_Block_TypeDef *)SAI1_Block_B_BASE) 2099 #if defined(STM32F446xx) 2100 #define SAI2 ((SAI_TypeDef *) SAI2_BASE) 2101 #define SAI2_Block_A ((SAI_Block_TypeDef *)SAI2_Block_A_BASE) 2102 #define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE) 2104 #define LTDC ((LTDC_TypeDef *)LTDC_BASE) 2105 #define LTDC_Layer1 ((LTDC_Layer_TypeDef *)LTDC_Layer1_BASE) 2106 #define LTDC_Layer2 ((LTDC_Layer_TypeDef *)LTDC_Layer2_BASE) 2107 #if defined(STM32F469_479xx) 2108 #define DSI ((DSI_TypeDef *)DSI_BASE) 2110 #define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) 2111 #define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) 2112 #define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) 2113 #define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) 2114 #define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) 2115 #define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) 2116 #define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) 2117 #define GPIOH ((GPIO_TypeDef *) GPIOH_BASE) 2118 #define GPIOI ((GPIO_TypeDef *) GPIOI_BASE) 2119 #define GPIOJ ((GPIO_TypeDef *) GPIOJ_BASE) 2120 #define GPIOK ((GPIO_TypeDef *) GPIOK_BASE) 2121 #define CRC ((CRC_TypeDef *) CRC_BASE) 2122 #define RCC ((RCC_TypeDef *) RCC_BASE) 2123 #define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) 2124 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) 2125 #define DMA1_Stream0 ((DMA_Stream_TypeDef *) DMA1_Stream0_BASE) 2126 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE) 2127 #define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE) 2128 #define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE) 2129 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE) 2130 #define DMA1_Stream5 ((DMA_Stream_TypeDef *) DMA1_Stream5_BASE) 2131 #define DMA1_Stream6 ((DMA_Stream_TypeDef *) DMA1_Stream6_BASE) 2132 #define DMA1_Stream7 ((DMA_Stream_TypeDef *) DMA1_Stream7_BASE) 2133 #define DMA2 ((DMA_TypeDef *) DMA2_BASE) 2134 #define DMA2_Stream0 ((DMA_Stream_TypeDef *) DMA2_Stream0_BASE) 2135 #define DMA2_Stream1 ((DMA_Stream_TypeDef *) DMA2_Stream1_BASE) 2136 #define DMA2_Stream2 ((DMA_Stream_TypeDef *) DMA2_Stream2_BASE) 2137 #define DMA2_Stream3 ((DMA_Stream_TypeDef *) DMA2_Stream3_BASE) 2138 #define DMA2_Stream4 ((DMA_Stream_TypeDef *) DMA2_Stream4_BASE) 2139 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) 2140 #define DMA2_Stream6 ((DMA_Stream_TypeDef *) DMA2_Stream6_BASE) 2141 #define DMA2_Stream7 ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE) 2142 #define ETH ((ETH_TypeDef *) ETH_BASE) 2143 #define DMA2D ((DMA2D_TypeDef *)DMA2D_BASE) 2144 #define DCMI ((DCMI_TypeDef *) DCMI_BASE) 2145 #define CRYP ((CRYP_TypeDef *) CRYP_BASE) 2146 #define HASH ((HASH_TypeDef *) HASH_BASE) 2147 #define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE) 2148 #define RNG ((RNG_TypeDef *) RNG_BASE) 2150 #if defined(STM32F40_41xxx) 2151 #define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE) 2152 #define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE) 2153 #define FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE) 2154 #define FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE) 2155 #define FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE) 2158 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 2159 #define FMC_Bank1 ((FMC_Bank1_TypeDef *) FMC_Bank1_R_BASE) 2160 #define FMC_Bank1E ((FMC_Bank1E_TypeDef *) FMC_Bank1E_R_BASE) 2161 #define FMC_Bank2 ((FMC_Bank2_TypeDef *) FMC_Bank2_R_BASE) 2162 #define FMC_Bank3 ((FMC_Bank3_TypeDef *) FMC_Bank3_R_BASE) 2163 #define FMC_Bank4 ((FMC_Bank4_TypeDef *) FMC_Bank4_R_BASE) 2164 #define FMC_Bank5_6 ((FMC_Bank5_6_TypeDef *) FMC_Bank5_6_R_BASE) 2167 #define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) 2191 #define ADC_SR_AWD ((uint8_t)0x01) 2192 #define ADC_SR_EOC ((uint8_t)0x02) 2193 #define ADC_SR_JEOC ((uint8_t)0x04) 2194 #define ADC_SR_JSTRT ((uint8_t)0x08) 2195 #define ADC_SR_STRT ((uint8_t)0x10) 2196 #define ADC_SR_OVR ((uint8_t)0x20) 2199 #define ADC_CR1_AWDCH ((uint32_t)0x0000001F) 2200 #define ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) 2201 #define ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) 2202 #define ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) 2203 #define ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) 2204 #define ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) 2205 #define ADC_CR1_EOCIE ((uint32_t)0x00000020) 2206 #define ADC_CR1_AWDIE ((uint32_t)0x00000040) 2207 #define ADC_CR1_JEOCIE ((uint32_t)0x00000080) 2208 #define ADC_CR1_SCAN ((uint32_t)0x00000100) 2209 #define ADC_CR1_AWDSGL ((uint32_t)0x00000200) 2210 #define ADC_CR1_JAUTO ((uint32_t)0x00000400) 2211 #define ADC_CR1_DISCEN ((uint32_t)0x00000800) 2212 #define ADC_CR1_JDISCEN ((uint32_t)0x00001000) 2213 #define ADC_CR1_DISCNUM ((uint32_t)0x0000E000) 2214 #define ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) 2215 #define ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) 2216 #define ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) 2217 #define ADC_CR1_JAWDEN ((uint32_t)0x00400000) 2218 #define ADC_CR1_AWDEN ((uint32_t)0x00800000) 2219 #define ADC_CR1_RES ((uint32_t)0x03000000) 2220 #define ADC_CR1_RES_0 ((uint32_t)0x01000000) 2221 #define ADC_CR1_RES_1 ((uint32_t)0x02000000) 2222 #define ADC_CR1_OVRIE ((uint32_t)0x04000000) 2225 #define ADC_CR2_ADON ((uint32_t)0x00000001) 2226 #define ADC_CR2_CONT ((uint32_t)0x00000002) 2227 #define ADC_CR2_DMA ((uint32_t)0x00000100) 2228 #define ADC_CR2_DDS ((uint32_t)0x00000200) 2229 #define ADC_CR2_EOCS ((uint32_t)0x00000400) 2230 #define ADC_CR2_ALIGN ((uint32_t)0x00000800) 2231 #define ADC_CR2_JEXTSEL ((uint32_t)0x000F0000) 2232 #define ADC_CR2_JEXTSEL_0 ((uint32_t)0x00010000) 2233 #define ADC_CR2_JEXTSEL_1 ((uint32_t)0x00020000) 2234 #define ADC_CR2_JEXTSEL_2 ((uint32_t)0x00040000) 2235 #define ADC_CR2_JEXTSEL_3 ((uint32_t)0x00080000) 2236 #define ADC_CR2_JEXTEN ((uint32_t)0x00300000) 2237 #define ADC_CR2_JEXTEN_0 ((uint32_t)0x00100000) 2238 #define ADC_CR2_JEXTEN_1 ((uint32_t)0x00200000) 2239 #define ADC_CR2_JSWSTART ((uint32_t)0x00400000) 2240 #define ADC_CR2_EXTSEL ((uint32_t)0x0F000000) 2241 #define ADC_CR2_EXTSEL_0 ((uint32_t)0x01000000) 2242 #define ADC_CR2_EXTSEL_1 ((uint32_t)0x02000000) 2243 #define ADC_CR2_EXTSEL_2 ((uint32_t)0x04000000) 2244 #define ADC_CR2_EXTSEL_3 ((uint32_t)0x08000000) 2245 #define ADC_CR2_EXTEN ((uint32_t)0x30000000) 2246 #define ADC_CR2_EXTEN_0 ((uint32_t)0x10000000) 2247 #define ADC_CR2_EXTEN_1 ((uint32_t)0x20000000) 2248 #define ADC_CR2_SWSTART ((uint32_t)0x40000000) 2251 #define ADC_SMPR1_SMP10 ((uint32_t)0x00000007) 2252 #define ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) 2253 #define ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) 2254 #define ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) 2255 #define ADC_SMPR1_SMP11 ((uint32_t)0x00000038) 2256 #define ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) 2257 #define ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) 2258 #define ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) 2259 #define ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) 2260 #define ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) 2261 #define ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) 2262 #define ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) 2263 #define ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) 2264 #define ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) 2265 #define ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) 2266 #define ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) 2267 #define ADC_SMPR1_SMP14 ((uint32_t)0x00007000) 2268 #define ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) 2269 #define ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) 2270 #define ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) 2271 #define ADC_SMPR1_SMP15 ((uint32_t)0x00038000) 2272 #define ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) 2273 #define ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) 2274 #define ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) 2275 #define ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) 2276 #define ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) 2277 #define ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) 2278 #define ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) 2279 #define ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) 2280 #define ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) 2281 #define ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) 2282 #define ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) 2283 #define ADC_SMPR1_SMP18 ((uint32_t)0x07000000) 2284 #define ADC_SMPR1_SMP18_0 ((uint32_t)0x01000000) 2285 #define ADC_SMPR1_SMP18_1 ((uint32_t)0x02000000) 2286 #define ADC_SMPR1_SMP18_2 ((uint32_t)0x04000000) 2289 #define ADC_SMPR2_SMP0 ((uint32_t)0x00000007) 2290 #define ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) 2291 #define ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) 2292 #define ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) 2293 #define ADC_SMPR2_SMP1 ((uint32_t)0x00000038) 2294 #define ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) 2295 #define ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) 2296 #define ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) 2297 #define ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) 2298 #define ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) 2299 #define ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) 2300 #define ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) 2301 #define ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) 2302 #define ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) 2303 #define ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) 2304 #define ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) 2305 #define ADC_SMPR2_SMP4 ((uint32_t)0x00007000) 2306 #define ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) 2307 #define ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) 2308 #define ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) 2309 #define ADC_SMPR2_SMP5 ((uint32_t)0x00038000) 2310 #define ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) 2311 #define ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) 2312 #define ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) 2313 #define ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) 2314 #define ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) 2315 #define ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) 2316 #define ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) 2317 #define ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) 2318 #define ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) 2319 #define ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) 2320 #define ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) 2321 #define ADC_SMPR2_SMP8 ((uint32_t)0x07000000) 2322 #define ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) 2323 #define ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) 2324 #define ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) 2325 #define ADC_SMPR2_SMP9 ((uint32_t)0x38000000) 2326 #define ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) 2327 #define ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) 2328 #define ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) 2331 #define ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) 2334 #define ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) 2337 #define ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) 2340 #define ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) 2343 #define ADC_HTR_HT ((uint16_t)0x0FFF) 2346 #define ADC_LTR_LT ((uint16_t)0x0FFF) 2349 #define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) 2350 #define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) 2351 #define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) 2352 #define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) 2353 #define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) 2354 #define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) 2355 #define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) 2356 #define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) 2357 #define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) 2358 #define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) 2359 #define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) 2360 #define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) 2361 #define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) 2362 #define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) 2363 #define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) 2364 #define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) 2365 #define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) 2366 #define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) 2367 #define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) 2368 #define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) 2369 #define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) 2370 #define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) 2371 #define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) 2372 #define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) 2373 #define ADC_SQR1_L ((uint32_t)0x00F00000) 2374 #define ADC_SQR1_L_0 ((uint32_t)0x00100000) 2375 #define ADC_SQR1_L_1 ((uint32_t)0x00200000) 2376 #define ADC_SQR1_L_2 ((uint32_t)0x00400000) 2377 #define ADC_SQR1_L_3 ((uint32_t)0x00800000) 2380 #define ADC_SQR2_SQ7 ((uint32_t)0x0000001F) 2381 #define ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) 2382 #define ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) 2383 #define ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) 2384 #define ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) 2385 #define ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) 2386 #define ADC_SQR2_SQ8 ((uint32_t)0x000003E0) 2387 #define ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) 2388 #define ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) 2389 #define ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) 2390 #define ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) 2391 #define ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) 2392 #define ADC_SQR2_SQ9 ((uint32_t)0x00007C00) 2393 #define ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) 2394 #define ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) 2395 #define ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) 2396 #define ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) 2397 #define ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) 2398 #define ADC_SQR2_SQ10 ((uint32_t)0x000F8000) 2399 #define ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) 2400 #define ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) 2401 #define ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) 2402 #define ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) 2403 #define ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) 2404 #define ADC_SQR2_SQ11 ((uint32_t)0x01F00000) 2405 #define ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) 2406 #define ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) 2407 #define ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) 2408 #define ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) 2409 #define ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) 2410 #define ADC_SQR2_SQ12 ((uint32_t)0x3E000000) 2411 #define ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) 2412 #define ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) 2413 #define ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) 2414 #define ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) 2415 #define ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) 2418 #define ADC_SQR3_SQ1 ((uint32_t)0x0000001F) 2419 #define ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) 2420 #define ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) 2421 #define ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) 2422 #define ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) 2423 #define ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) 2424 #define ADC_SQR3_SQ2 ((uint32_t)0x000003E0) 2425 #define ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) 2426 #define ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) 2427 #define ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) 2428 #define ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) 2429 #define ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) 2430 #define ADC_SQR3_SQ3 ((uint32_t)0x00007C00) 2431 #define ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) 2432 #define ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) 2433 #define ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) 2434 #define ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) 2435 #define ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) 2436 #define ADC_SQR3_SQ4 ((uint32_t)0x000F8000) 2437 #define ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) 2438 #define ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) 2439 #define ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) 2440 #define ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) 2441 #define ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) 2442 #define ADC_SQR3_SQ5 ((uint32_t)0x01F00000) 2443 #define ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) 2444 #define ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) 2445 #define ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) 2446 #define ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) 2447 #define ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) 2448 #define ADC_SQR3_SQ6 ((uint32_t)0x3E000000) 2449 #define ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) 2450 #define ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) 2451 #define ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) 2452 #define ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) 2453 #define ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) 2456 #define ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) 2457 #define ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) 2458 #define ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) 2459 #define ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) 2460 #define ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) 2461 #define ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) 2462 #define ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) 2463 #define ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) 2464 #define ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) 2465 #define ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) 2466 #define ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) 2467 #define ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) 2468 #define ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) 2469 #define ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) 2470 #define ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) 2471 #define ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) 2472 #define ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) 2473 #define ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) 2474 #define ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) 2475 #define ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) 2476 #define ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) 2477 #define ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) 2478 #define ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) 2479 #define ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) 2480 #define ADC_JSQR_JL ((uint32_t)0x00300000) 2481 #define ADC_JSQR_JL_0 ((uint32_t)0x00100000) 2482 #define ADC_JSQR_JL_1 ((uint32_t)0x00200000) 2485 #define ADC_JDR1_JDATA ((uint16_t)0xFFFF) 2488 #define ADC_JDR2_JDATA ((uint16_t)0xFFFF) 2491 #define ADC_JDR3_JDATA ((uint16_t)0xFFFF) 2494 #define ADC_JDR4_JDATA ((uint16_t)0xFFFF) 2497 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) 2498 #define ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) 2501 #define ADC_CSR_AWD1 ((uint32_t)0x00000001) 2502 #define ADC_CSR_EOC1 ((uint32_t)0x00000002) 2503 #define ADC_CSR_JEOC1 ((uint32_t)0x00000004) 2504 #define ADC_CSR_JSTRT1 ((uint32_t)0x00000008) 2505 #define ADC_CSR_STRT1 ((uint32_t)0x00000010) 2506 #define ADC_CSR_DOVR1 ((uint32_t)0x00000020) 2507 #define ADC_CSR_AWD2 ((uint32_t)0x00000100) 2508 #define ADC_CSR_EOC2 ((uint32_t)0x00000200) 2509 #define ADC_CSR_JEOC2 ((uint32_t)0x00000400) 2510 #define ADC_CSR_JSTRT2 ((uint32_t)0x00000800) 2511 #define ADC_CSR_STRT2 ((uint32_t)0x00001000) 2512 #define ADC_CSR_DOVR2 ((uint32_t)0x00002000) 2513 #define ADC_CSR_AWD3 ((uint32_t)0x00010000) 2514 #define ADC_CSR_EOC3 ((uint32_t)0x00020000) 2515 #define ADC_CSR_JEOC3 ((uint32_t)0x00040000) 2516 #define ADC_CSR_JSTRT3 ((uint32_t)0x00080000) 2517 #define ADC_CSR_STRT3 ((uint32_t)0x00100000) 2518 #define ADC_CSR_DOVR3 ((uint32_t)0x00200000) 2521 #define ADC_CCR_MULTI ((uint32_t)0x0000001F) 2522 #define ADC_CCR_MULTI_0 ((uint32_t)0x00000001) 2523 #define ADC_CCR_MULTI_1 ((uint32_t)0x00000002) 2524 #define ADC_CCR_MULTI_2 ((uint32_t)0x00000004) 2525 #define ADC_CCR_MULTI_3 ((uint32_t)0x00000008) 2526 #define ADC_CCR_MULTI_4 ((uint32_t)0x00000010) 2527 #define ADC_CCR_DELAY ((uint32_t)0x00000F00) 2528 #define ADC_CCR_DELAY_0 ((uint32_t)0x00000100) 2529 #define ADC_CCR_DELAY_1 ((uint32_t)0x00000200) 2530 #define ADC_CCR_DELAY_2 ((uint32_t)0x00000400) 2531 #define ADC_CCR_DELAY_3 ((uint32_t)0x00000800) 2532 #define ADC_CCR_DDS ((uint32_t)0x00002000) 2533 #define ADC_CCR_DMA ((uint32_t)0x0000C000) 2534 #define ADC_CCR_DMA_0 ((uint32_t)0x00004000) 2535 #define ADC_CCR_DMA_1 ((uint32_t)0x00008000) 2536 #define ADC_CCR_ADCPRE ((uint32_t)0x00030000) 2537 #define ADC_CCR_ADCPRE_0 ((uint32_t)0x00010000) 2538 #define ADC_CCR_ADCPRE_1 ((uint32_t)0x00020000) 2539 #define ADC_CCR_VBATE ((uint32_t)0x00400000) 2540 #define ADC_CCR_TSVREFE ((uint32_t)0x00800000) 2543 #define ADC_CDR_DATA1 ((uint32_t)0x0000FFFF) 2544 #define ADC_CDR_DATA2 ((uint32_t)0xFFFF0000) 2553 #define CAN_MCR_INRQ ((uint16_t)0x0001) 2554 #define CAN_MCR_SLEEP ((uint16_t)0x0002) 2555 #define CAN_MCR_TXFP ((uint16_t)0x0004) 2556 #define CAN_MCR_RFLM ((uint16_t)0x0008) 2557 #define CAN_MCR_NART ((uint16_t)0x0010) 2558 #define CAN_MCR_AWUM ((uint16_t)0x0020) 2559 #define CAN_MCR_ABOM ((uint16_t)0x0040) 2560 #define CAN_MCR_TTCM ((uint16_t)0x0080) 2561 #define CAN_MCR_RESET ((uint16_t)0x8000) 2564 #define CAN_MSR_INAK ((uint16_t)0x0001) 2565 #define CAN_MSR_SLAK ((uint16_t)0x0002) 2566 #define CAN_MSR_ERRI ((uint16_t)0x0004) 2567 #define CAN_MSR_WKUI ((uint16_t)0x0008) 2568 #define CAN_MSR_SLAKI ((uint16_t)0x0010) 2569 #define CAN_MSR_TXM ((uint16_t)0x0100) 2570 #define CAN_MSR_RXM ((uint16_t)0x0200) 2571 #define CAN_MSR_SAMP ((uint16_t)0x0400) 2572 #define CAN_MSR_RX ((uint16_t)0x0800) 2575 #define CAN_TSR_RQCP0 ((uint32_t)0x00000001) 2576 #define CAN_TSR_TXOK0 ((uint32_t)0x00000002) 2577 #define CAN_TSR_ALST0 ((uint32_t)0x00000004) 2578 #define CAN_TSR_TERR0 ((uint32_t)0x00000008) 2579 #define CAN_TSR_ABRQ0 ((uint32_t)0x00000080) 2580 #define CAN_TSR_RQCP1 ((uint32_t)0x00000100) 2581 #define CAN_TSR_TXOK1 ((uint32_t)0x00000200) 2582 #define CAN_TSR_ALST1 ((uint32_t)0x00000400) 2583 #define CAN_TSR_TERR1 ((uint32_t)0x00000800) 2584 #define CAN_TSR_ABRQ1 ((uint32_t)0x00008000) 2585 #define CAN_TSR_RQCP2 ((uint32_t)0x00010000) 2586 #define CAN_TSR_TXOK2 ((uint32_t)0x00020000) 2587 #define CAN_TSR_ALST2 ((uint32_t)0x00040000) 2588 #define CAN_TSR_TERR2 ((uint32_t)0x00080000) 2589 #define CAN_TSR_ABRQ2 ((uint32_t)0x00800000) 2590 #define CAN_TSR_CODE ((uint32_t)0x03000000) 2592 #define CAN_TSR_TME ((uint32_t)0x1C000000) 2593 #define CAN_TSR_TME0 ((uint32_t)0x04000000) 2594 #define CAN_TSR_TME1 ((uint32_t)0x08000000) 2595 #define CAN_TSR_TME2 ((uint32_t)0x10000000) 2597 #define CAN_TSR_LOW ((uint32_t)0xE0000000) 2598 #define CAN_TSR_LOW0 ((uint32_t)0x20000000) 2599 #define CAN_TSR_LOW1 ((uint32_t)0x40000000) 2600 #define CAN_TSR_LOW2 ((uint32_t)0x80000000) 2603 #define CAN_RF0R_FMP0 ((uint8_t)0x03) 2604 #define CAN_RF0R_FULL0 ((uint8_t)0x08) 2605 #define CAN_RF0R_FOVR0 ((uint8_t)0x10) 2606 #define CAN_RF0R_RFOM0 ((uint8_t)0x20) 2609 #define CAN_RF1R_FMP1 ((uint8_t)0x03) 2610 #define CAN_RF1R_FULL1 ((uint8_t)0x08) 2611 #define CAN_RF1R_FOVR1 ((uint8_t)0x10) 2612 #define CAN_RF1R_RFOM1 ((uint8_t)0x20) 2615 #define CAN_IER_TMEIE ((uint32_t)0x00000001) 2616 #define CAN_IER_FMPIE0 ((uint32_t)0x00000002) 2617 #define CAN_IER_FFIE0 ((uint32_t)0x00000004) 2618 #define CAN_IER_FOVIE0 ((uint32_t)0x00000008) 2619 #define CAN_IER_FMPIE1 ((uint32_t)0x00000010) 2620 #define CAN_IER_FFIE1 ((uint32_t)0x00000020) 2621 #define CAN_IER_FOVIE1 ((uint32_t)0x00000040) 2622 #define CAN_IER_EWGIE ((uint32_t)0x00000100) 2623 #define CAN_IER_EPVIE ((uint32_t)0x00000200) 2624 #define CAN_IER_BOFIE ((uint32_t)0x00000400) 2625 #define CAN_IER_LECIE ((uint32_t)0x00000800) 2626 #define CAN_IER_ERRIE ((uint32_t)0x00008000) 2627 #define CAN_IER_WKUIE ((uint32_t)0x00010000) 2628 #define CAN_IER_SLKIE ((uint32_t)0x00020000) 2631 #define CAN_ESR_EWGF ((uint32_t)0x00000001) 2632 #define CAN_ESR_EPVF ((uint32_t)0x00000002) 2633 #define CAN_ESR_BOFF ((uint32_t)0x00000004) 2635 #define CAN_ESR_LEC ((uint32_t)0x00000070) 2636 #define CAN_ESR_LEC_0 ((uint32_t)0x00000010) 2637 #define CAN_ESR_LEC_1 ((uint32_t)0x00000020) 2638 #define CAN_ESR_LEC_2 ((uint32_t)0x00000040) 2640 #define CAN_ESR_TEC ((uint32_t)0x00FF0000) 2641 #define CAN_ESR_REC ((uint32_t)0xFF000000) 2644 #define CAN_BTR_BRP ((uint32_t)0x000003FF) 2645 #define CAN_BTR_TS1 ((uint32_t)0x000F0000) 2646 #define CAN_BTR_TS2 ((uint32_t)0x00700000) 2647 #define CAN_BTR_SJW ((uint32_t)0x03000000) 2648 #define CAN_BTR_LBKM ((uint32_t)0x40000000) 2649 #define CAN_BTR_SILM ((uint32_t)0x80000000) 2653 #define CAN_TI0R_TXRQ ((uint32_t)0x00000001) 2654 #define CAN_TI0R_RTR ((uint32_t)0x00000002) 2655 #define CAN_TI0R_IDE ((uint32_t)0x00000004) 2656 #define CAN_TI0R_EXID ((uint32_t)0x001FFFF8) 2657 #define CAN_TI0R_STID ((uint32_t)0xFFE00000) 2660 #define CAN_TDT0R_DLC ((uint32_t)0x0000000F) 2661 #define CAN_TDT0R_TGT ((uint32_t)0x00000100) 2662 #define CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) 2665 #define CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) 2666 #define CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) 2667 #define CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) 2668 #define CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) 2671 #define CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) 2672 #define CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) 2673 #define CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) 2674 #define CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) 2677 #define CAN_TI1R_TXRQ ((uint32_t)0x00000001) 2678 #define CAN_TI1R_RTR ((uint32_t)0x00000002) 2679 #define CAN_TI1R_IDE ((uint32_t)0x00000004) 2680 #define CAN_TI1R_EXID ((uint32_t)0x001FFFF8) 2681 #define CAN_TI1R_STID ((uint32_t)0xFFE00000) 2684 #define CAN_TDT1R_DLC ((uint32_t)0x0000000F) 2685 #define CAN_TDT1R_TGT ((uint32_t)0x00000100) 2686 #define CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) 2689 #define CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) 2690 #define CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) 2691 #define CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) 2692 #define CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) 2695 #define CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) 2696 #define CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) 2697 #define CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) 2698 #define CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) 2701 #define CAN_TI2R_TXRQ ((uint32_t)0x00000001) 2702 #define CAN_TI2R_RTR ((uint32_t)0x00000002) 2703 #define CAN_TI2R_IDE ((uint32_t)0x00000004) 2704 #define CAN_TI2R_EXID ((uint32_t)0x001FFFF8) 2705 #define CAN_TI2R_STID ((uint32_t)0xFFE00000) 2708 #define CAN_TDT2R_DLC ((uint32_t)0x0000000F) 2709 #define CAN_TDT2R_TGT ((uint32_t)0x00000100) 2710 #define CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) 2713 #define CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) 2714 #define CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) 2715 #define CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) 2716 #define CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) 2719 #define CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) 2720 #define CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) 2721 #define CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) 2722 #define CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) 2725 #define CAN_RI0R_RTR ((uint32_t)0x00000002) 2726 #define CAN_RI0R_IDE ((uint32_t)0x00000004) 2727 #define CAN_RI0R_EXID ((uint32_t)0x001FFFF8) 2728 #define CAN_RI0R_STID ((uint32_t)0xFFE00000) 2731 #define CAN_RDT0R_DLC ((uint32_t)0x0000000F) 2732 #define CAN_RDT0R_FMI ((uint32_t)0x0000FF00) 2733 #define CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) 2736 #define CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) 2737 #define CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) 2738 #define CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) 2739 #define CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) 2742 #define CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) 2743 #define CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) 2744 #define CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) 2745 #define CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) 2748 #define CAN_RI1R_RTR ((uint32_t)0x00000002) 2749 #define CAN_RI1R_IDE ((uint32_t)0x00000004) 2750 #define CAN_RI1R_EXID ((uint32_t)0x001FFFF8) 2751 #define CAN_RI1R_STID ((uint32_t)0xFFE00000) 2754 #define CAN_RDT1R_DLC ((uint32_t)0x0000000F) 2755 #define CAN_RDT1R_FMI ((uint32_t)0x0000FF00) 2756 #define CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) 2759 #define CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) 2760 #define CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) 2761 #define CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) 2762 #define CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) 2765 #define CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) 2766 #define CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) 2767 #define CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) 2768 #define CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) 2772 #define CAN_FMR_FINIT ((uint8_t)0x01) 2775 #define CAN_FM1R_FBM ((uint16_t)0x3FFF) 2776 #define CAN_FM1R_FBM0 ((uint16_t)0x0001) 2777 #define CAN_FM1R_FBM1 ((uint16_t)0x0002) 2778 #define CAN_FM1R_FBM2 ((uint16_t)0x0004) 2779 #define CAN_FM1R_FBM3 ((uint16_t)0x0008) 2780 #define CAN_FM1R_FBM4 ((uint16_t)0x0010) 2781 #define CAN_FM1R_FBM5 ((uint16_t)0x0020) 2782 #define CAN_FM1R_FBM6 ((uint16_t)0x0040) 2783 #define CAN_FM1R_FBM7 ((uint16_t)0x0080) 2784 #define CAN_FM1R_FBM8 ((uint16_t)0x0100) 2785 #define CAN_FM1R_FBM9 ((uint16_t)0x0200) 2786 #define CAN_FM1R_FBM10 ((uint16_t)0x0400) 2787 #define CAN_FM1R_FBM11 ((uint16_t)0x0800) 2788 #define CAN_FM1R_FBM12 ((uint16_t)0x1000) 2789 #define CAN_FM1R_FBM13 ((uint16_t)0x2000) 2792 #define CAN_FS1R_FSC ((uint16_t)0x3FFF) 2793 #define CAN_FS1R_FSC0 ((uint16_t)0x0001) 2794 #define CAN_FS1R_FSC1 ((uint16_t)0x0002) 2795 #define CAN_FS1R_FSC2 ((uint16_t)0x0004) 2796 #define CAN_FS1R_FSC3 ((uint16_t)0x0008) 2797 #define CAN_FS1R_FSC4 ((uint16_t)0x0010) 2798 #define CAN_FS1R_FSC5 ((uint16_t)0x0020) 2799 #define CAN_FS1R_FSC6 ((uint16_t)0x0040) 2800 #define CAN_FS1R_FSC7 ((uint16_t)0x0080) 2801 #define CAN_FS1R_FSC8 ((uint16_t)0x0100) 2802 #define CAN_FS1R_FSC9 ((uint16_t)0x0200) 2803 #define CAN_FS1R_FSC10 ((uint16_t)0x0400) 2804 #define CAN_FS1R_FSC11 ((uint16_t)0x0800) 2805 #define CAN_FS1R_FSC12 ((uint16_t)0x1000) 2806 #define CAN_FS1R_FSC13 ((uint16_t)0x2000) 2809 #define CAN_FFA1R_FFA ((uint16_t)0x3FFF) 2810 #define CAN_FFA1R_FFA0 ((uint16_t)0x0001) 2811 #define CAN_FFA1R_FFA1 ((uint16_t)0x0002) 2812 #define CAN_FFA1R_FFA2 ((uint16_t)0x0004) 2813 #define CAN_FFA1R_FFA3 ((uint16_t)0x0008) 2814 #define CAN_FFA1R_FFA4 ((uint16_t)0x0010) 2815 #define CAN_FFA1R_FFA5 ((uint16_t)0x0020) 2816 #define CAN_FFA1R_FFA6 ((uint16_t)0x0040) 2817 #define CAN_FFA1R_FFA7 ((uint16_t)0x0080) 2818 #define CAN_FFA1R_FFA8 ((uint16_t)0x0100) 2819 #define CAN_FFA1R_FFA9 ((uint16_t)0x0200) 2820 #define CAN_FFA1R_FFA10 ((uint16_t)0x0400) 2821 #define CAN_FFA1R_FFA11 ((uint16_t)0x0800) 2822 #define CAN_FFA1R_FFA12 ((uint16_t)0x1000) 2823 #define CAN_FFA1R_FFA13 ((uint16_t)0x2000) 2826 #define CAN_FA1R_FACT ((uint16_t)0x3FFF) 2827 #define CAN_FA1R_FACT0 ((uint16_t)0x0001) 2828 #define CAN_FA1R_FACT1 ((uint16_t)0x0002) 2829 #define CAN_FA1R_FACT2 ((uint16_t)0x0004) 2830 #define CAN_FA1R_FACT3 ((uint16_t)0x0008) 2831 #define CAN_FA1R_FACT4 ((uint16_t)0x0010) 2832 #define CAN_FA1R_FACT5 ((uint16_t)0x0020) 2833 #define CAN_FA1R_FACT6 ((uint16_t)0x0040) 2834 #define CAN_FA1R_FACT7 ((uint16_t)0x0080) 2835 #define CAN_FA1R_FACT8 ((uint16_t)0x0100) 2836 #define CAN_FA1R_FACT9 ((uint16_t)0x0200) 2837 #define CAN_FA1R_FACT10 ((uint16_t)0x0400) 2838 #define CAN_FA1R_FACT11 ((uint16_t)0x0800) 2839 #define CAN_FA1R_FACT12 ((uint16_t)0x1000) 2840 #define CAN_FA1R_FACT13 ((uint16_t)0x2000) 2843 #define CAN_F0R1_FB0 ((uint32_t)0x00000001) 2844 #define CAN_F0R1_FB1 ((uint32_t)0x00000002) 2845 #define CAN_F0R1_FB2 ((uint32_t)0x00000004) 2846 #define CAN_F0R1_FB3 ((uint32_t)0x00000008) 2847 #define CAN_F0R1_FB4 ((uint32_t)0x00000010) 2848 #define CAN_F0R1_FB5 ((uint32_t)0x00000020) 2849 #define CAN_F0R1_FB6 ((uint32_t)0x00000040) 2850 #define CAN_F0R1_FB7 ((uint32_t)0x00000080) 2851 #define CAN_F0R1_FB8 ((uint32_t)0x00000100) 2852 #define CAN_F0R1_FB9 ((uint32_t)0x00000200) 2853 #define CAN_F0R1_FB10 ((uint32_t)0x00000400) 2854 #define CAN_F0R1_FB11 ((uint32_t)0x00000800) 2855 #define CAN_F0R1_FB12 ((uint32_t)0x00001000) 2856 #define CAN_F0R1_FB13 ((uint32_t)0x00002000) 2857 #define CAN_F0R1_FB14 ((uint32_t)0x00004000) 2858 #define CAN_F0R1_FB15 ((uint32_t)0x00008000) 2859 #define CAN_F0R1_FB16 ((uint32_t)0x00010000) 2860 #define CAN_F0R1_FB17 ((uint32_t)0x00020000) 2861 #define CAN_F0R1_FB18 ((uint32_t)0x00040000) 2862 #define CAN_F0R1_FB19 ((uint32_t)0x00080000) 2863 #define CAN_F0R1_FB20 ((uint32_t)0x00100000) 2864 #define CAN_F0R1_FB21 ((uint32_t)0x00200000) 2865 #define CAN_F0R1_FB22 ((uint32_t)0x00400000) 2866 #define CAN_F0R1_FB23 ((uint32_t)0x00800000) 2867 #define CAN_F0R1_FB24 ((uint32_t)0x01000000) 2868 #define CAN_F0R1_FB25 ((uint32_t)0x02000000) 2869 #define CAN_F0R1_FB26 ((uint32_t)0x04000000) 2870 #define CAN_F0R1_FB27 ((uint32_t)0x08000000) 2871 #define CAN_F0R1_FB28 ((uint32_t)0x10000000) 2872 #define CAN_F0R1_FB29 ((uint32_t)0x20000000) 2873 #define CAN_F0R1_FB30 ((uint32_t)0x40000000) 2874 #define CAN_F0R1_FB31 ((uint32_t)0x80000000) 2877 #define CAN_F1R1_FB0 ((uint32_t)0x00000001) 2878 #define CAN_F1R1_FB1 ((uint32_t)0x00000002) 2879 #define CAN_F1R1_FB2 ((uint32_t)0x00000004) 2880 #define CAN_F1R1_FB3 ((uint32_t)0x00000008) 2881 #define CAN_F1R1_FB4 ((uint32_t)0x00000010) 2882 #define CAN_F1R1_FB5 ((uint32_t)0x00000020) 2883 #define CAN_F1R1_FB6 ((uint32_t)0x00000040) 2884 #define CAN_F1R1_FB7 ((uint32_t)0x00000080) 2885 #define CAN_F1R1_FB8 ((uint32_t)0x00000100) 2886 #define CAN_F1R1_FB9 ((uint32_t)0x00000200) 2887 #define CAN_F1R1_FB10 ((uint32_t)0x00000400) 2888 #define CAN_F1R1_FB11 ((uint32_t)0x00000800) 2889 #define CAN_F1R1_FB12 ((uint32_t)0x00001000) 2890 #define CAN_F1R1_FB13 ((uint32_t)0x00002000) 2891 #define CAN_F1R1_FB14 ((uint32_t)0x00004000) 2892 #define CAN_F1R1_FB15 ((uint32_t)0x00008000) 2893 #define CAN_F1R1_FB16 ((uint32_t)0x00010000) 2894 #define CAN_F1R1_FB17 ((uint32_t)0x00020000) 2895 #define CAN_F1R1_FB18 ((uint32_t)0x00040000) 2896 #define CAN_F1R1_FB19 ((uint32_t)0x00080000) 2897 #define CAN_F1R1_FB20 ((uint32_t)0x00100000) 2898 #define CAN_F1R1_FB21 ((uint32_t)0x00200000) 2899 #define CAN_F1R1_FB22 ((uint32_t)0x00400000) 2900 #define CAN_F1R1_FB23 ((uint32_t)0x00800000) 2901 #define CAN_F1R1_FB24 ((uint32_t)0x01000000) 2902 #define CAN_F1R1_FB25 ((uint32_t)0x02000000) 2903 #define CAN_F1R1_FB26 ((uint32_t)0x04000000) 2904 #define CAN_F1R1_FB27 ((uint32_t)0x08000000) 2905 #define CAN_F1R1_FB28 ((uint32_t)0x10000000) 2906 #define CAN_F1R1_FB29 ((uint32_t)0x20000000) 2907 #define CAN_F1R1_FB30 ((uint32_t)0x40000000) 2908 #define CAN_F1R1_FB31 ((uint32_t)0x80000000) 2911 #define CAN_F2R1_FB0 ((uint32_t)0x00000001) 2912 #define CAN_F2R1_FB1 ((uint32_t)0x00000002) 2913 #define CAN_F2R1_FB2 ((uint32_t)0x00000004) 2914 #define CAN_F2R1_FB3 ((uint32_t)0x00000008) 2915 #define CAN_F2R1_FB4 ((uint32_t)0x00000010) 2916 #define CAN_F2R1_FB5 ((uint32_t)0x00000020) 2917 #define CAN_F2R1_FB6 ((uint32_t)0x00000040) 2918 #define CAN_F2R1_FB7 ((uint32_t)0x00000080) 2919 #define CAN_F2R1_FB8 ((uint32_t)0x00000100) 2920 #define CAN_F2R1_FB9 ((uint32_t)0x00000200) 2921 #define CAN_F2R1_FB10 ((uint32_t)0x00000400) 2922 #define CAN_F2R1_FB11 ((uint32_t)0x00000800) 2923 #define CAN_F2R1_FB12 ((uint32_t)0x00001000) 2924 #define CAN_F2R1_FB13 ((uint32_t)0x00002000) 2925 #define CAN_F2R1_FB14 ((uint32_t)0x00004000) 2926 #define CAN_F2R1_FB15 ((uint32_t)0x00008000) 2927 #define CAN_F2R1_FB16 ((uint32_t)0x00010000) 2928 #define CAN_F2R1_FB17 ((uint32_t)0x00020000) 2929 #define CAN_F2R1_FB18 ((uint32_t)0x00040000) 2930 #define CAN_F2R1_FB19 ((uint32_t)0x00080000) 2931 #define CAN_F2R1_FB20 ((uint32_t)0x00100000) 2932 #define CAN_F2R1_FB21 ((uint32_t)0x00200000) 2933 #define CAN_F2R1_FB22 ((uint32_t)0x00400000) 2934 #define CAN_F2R1_FB23 ((uint32_t)0x00800000) 2935 #define CAN_F2R1_FB24 ((uint32_t)0x01000000) 2936 #define CAN_F2R1_FB25 ((uint32_t)0x02000000) 2937 #define CAN_F2R1_FB26 ((uint32_t)0x04000000) 2938 #define CAN_F2R1_FB27 ((uint32_t)0x08000000) 2939 #define CAN_F2R1_FB28 ((uint32_t)0x10000000) 2940 #define CAN_F2R1_FB29 ((uint32_t)0x20000000) 2941 #define CAN_F2R1_FB30 ((uint32_t)0x40000000) 2942 #define CAN_F2R1_FB31 ((uint32_t)0x80000000) 2945 #define CAN_F3R1_FB0 ((uint32_t)0x00000001) 2946 #define CAN_F3R1_FB1 ((uint32_t)0x00000002) 2947 #define CAN_F3R1_FB2 ((uint32_t)0x00000004) 2948 #define CAN_F3R1_FB3 ((uint32_t)0x00000008) 2949 #define CAN_F3R1_FB4 ((uint32_t)0x00000010) 2950 #define CAN_F3R1_FB5 ((uint32_t)0x00000020) 2951 #define CAN_F3R1_FB6 ((uint32_t)0x00000040) 2952 #define CAN_F3R1_FB7 ((uint32_t)0x00000080) 2953 #define CAN_F3R1_FB8 ((uint32_t)0x00000100) 2954 #define CAN_F3R1_FB9 ((uint32_t)0x00000200) 2955 #define CAN_F3R1_FB10 ((uint32_t)0x00000400) 2956 #define CAN_F3R1_FB11 ((uint32_t)0x00000800) 2957 #define CAN_F3R1_FB12 ((uint32_t)0x00001000) 2958 #define CAN_F3R1_FB13 ((uint32_t)0x00002000) 2959 #define CAN_F3R1_FB14 ((uint32_t)0x00004000) 2960 #define CAN_F3R1_FB15 ((uint32_t)0x00008000) 2961 #define CAN_F3R1_FB16 ((uint32_t)0x00010000) 2962 #define CAN_F3R1_FB17 ((uint32_t)0x00020000) 2963 #define CAN_F3R1_FB18 ((uint32_t)0x00040000) 2964 #define CAN_F3R1_FB19 ((uint32_t)0x00080000) 2965 #define CAN_F3R1_FB20 ((uint32_t)0x00100000) 2966 #define CAN_F3R1_FB21 ((uint32_t)0x00200000) 2967 #define CAN_F3R1_FB22 ((uint32_t)0x00400000) 2968 #define CAN_F3R1_FB23 ((uint32_t)0x00800000) 2969 #define CAN_F3R1_FB24 ((uint32_t)0x01000000) 2970 #define CAN_F3R1_FB25 ((uint32_t)0x02000000) 2971 #define CAN_F3R1_FB26 ((uint32_t)0x04000000) 2972 #define CAN_F3R1_FB27 ((uint32_t)0x08000000) 2973 #define CAN_F3R1_FB28 ((uint32_t)0x10000000) 2974 #define CAN_F3R1_FB29 ((uint32_t)0x20000000) 2975 #define CAN_F3R1_FB30 ((uint32_t)0x40000000) 2976 #define CAN_F3R1_FB31 ((uint32_t)0x80000000) 2979 #define CAN_F4R1_FB0 ((uint32_t)0x00000001) 2980 #define CAN_F4R1_FB1 ((uint32_t)0x00000002) 2981 #define CAN_F4R1_FB2 ((uint32_t)0x00000004) 2982 #define CAN_F4R1_FB3 ((uint32_t)0x00000008) 2983 #define CAN_F4R1_FB4 ((uint32_t)0x00000010) 2984 #define CAN_F4R1_FB5 ((uint32_t)0x00000020) 2985 #define CAN_F4R1_FB6 ((uint32_t)0x00000040) 2986 #define CAN_F4R1_FB7 ((uint32_t)0x00000080) 2987 #define CAN_F4R1_FB8 ((uint32_t)0x00000100) 2988 #define CAN_F4R1_FB9 ((uint32_t)0x00000200) 2989 #define CAN_F4R1_FB10 ((uint32_t)0x00000400) 2990 #define CAN_F4R1_FB11 ((uint32_t)0x00000800) 2991 #define CAN_F4R1_FB12 ((uint32_t)0x00001000) 2992 #define CAN_F4R1_FB13 ((uint32_t)0x00002000) 2993 #define CAN_F4R1_FB14 ((uint32_t)0x00004000) 2994 #define CAN_F4R1_FB15 ((uint32_t)0x00008000) 2995 #define CAN_F4R1_FB16 ((uint32_t)0x00010000) 2996 #define CAN_F4R1_FB17 ((uint32_t)0x00020000) 2997 #define CAN_F4R1_FB18 ((uint32_t)0x00040000) 2998 #define CAN_F4R1_FB19 ((uint32_t)0x00080000) 2999 #define CAN_F4R1_FB20 ((uint32_t)0x00100000) 3000 #define CAN_F4R1_FB21 ((uint32_t)0x00200000) 3001 #define CAN_F4R1_FB22 ((uint32_t)0x00400000) 3002 #define CAN_F4R1_FB23 ((uint32_t)0x00800000) 3003 #define CAN_F4R1_FB24 ((uint32_t)0x01000000) 3004 #define CAN_F4R1_FB25 ((uint32_t)0x02000000) 3005 #define CAN_F4R1_FB26 ((uint32_t)0x04000000) 3006 #define CAN_F4R1_FB27 ((uint32_t)0x08000000) 3007 #define CAN_F4R1_FB28 ((uint32_t)0x10000000) 3008 #define CAN_F4R1_FB29 ((uint32_t)0x20000000) 3009 #define CAN_F4R1_FB30 ((uint32_t)0x40000000) 3010 #define CAN_F4R1_FB31 ((uint32_t)0x80000000) 3013 #define CAN_F5R1_FB0 ((uint32_t)0x00000001) 3014 #define CAN_F5R1_FB1 ((uint32_t)0x00000002) 3015 #define CAN_F5R1_FB2 ((uint32_t)0x00000004) 3016 #define CAN_F5R1_FB3 ((uint32_t)0x00000008) 3017 #define CAN_F5R1_FB4 ((uint32_t)0x00000010) 3018 #define CAN_F5R1_FB5 ((uint32_t)0x00000020) 3019 #define CAN_F5R1_FB6 ((uint32_t)0x00000040) 3020 #define CAN_F5R1_FB7 ((uint32_t)0x00000080) 3021 #define CAN_F5R1_FB8 ((uint32_t)0x00000100) 3022 #define CAN_F5R1_FB9 ((uint32_t)0x00000200) 3023 #define CAN_F5R1_FB10 ((uint32_t)0x00000400) 3024 #define CAN_F5R1_FB11 ((uint32_t)0x00000800) 3025 #define CAN_F5R1_FB12 ((uint32_t)0x00001000) 3026 #define CAN_F5R1_FB13 ((uint32_t)0x00002000) 3027 #define CAN_F5R1_FB14 ((uint32_t)0x00004000) 3028 #define CAN_F5R1_FB15 ((uint32_t)0x00008000) 3029 #define CAN_F5R1_FB16 ((uint32_t)0x00010000) 3030 #define CAN_F5R1_FB17 ((uint32_t)0x00020000) 3031 #define CAN_F5R1_FB18 ((uint32_t)0x00040000) 3032 #define CAN_F5R1_FB19 ((uint32_t)0x00080000) 3033 #define CAN_F5R1_FB20 ((uint32_t)0x00100000) 3034 #define CAN_F5R1_FB21 ((uint32_t)0x00200000) 3035 #define CAN_F5R1_FB22 ((uint32_t)0x00400000) 3036 #define CAN_F5R1_FB23 ((uint32_t)0x00800000) 3037 #define CAN_F5R1_FB24 ((uint32_t)0x01000000) 3038 #define CAN_F5R1_FB25 ((uint32_t)0x02000000) 3039 #define CAN_F5R1_FB26 ((uint32_t)0x04000000) 3040 #define CAN_F5R1_FB27 ((uint32_t)0x08000000) 3041 #define CAN_F5R1_FB28 ((uint32_t)0x10000000) 3042 #define CAN_F5R1_FB29 ((uint32_t)0x20000000) 3043 #define CAN_F5R1_FB30 ((uint32_t)0x40000000) 3044 #define CAN_F5R1_FB31 ((uint32_t)0x80000000) 3047 #define CAN_F6R1_FB0 ((uint32_t)0x00000001) 3048 #define CAN_F6R1_FB1 ((uint32_t)0x00000002) 3049 #define CAN_F6R1_FB2 ((uint32_t)0x00000004) 3050 #define CAN_F6R1_FB3 ((uint32_t)0x00000008) 3051 #define CAN_F6R1_FB4 ((uint32_t)0x00000010) 3052 #define CAN_F6R1_FB5 ((uint32_t)0x00000020) 3053 #define CAN_F6R1_FB6 ((uint32_t)0x00000040) 3054 #define CAN_F6R1_FB7 ((uint32_t)0x00000080) 3055 #define CAN_F6R1_FB8 ((uint32_t)0x00000100) 3056 #define CAN_F6R1_FB9 ((uint32_t)0x00000200) 3057 #define CAN_F6R1_FB10 ((uint32_t)0x00000400) 3058 #define CAN_F6R1_FB11 ((uint32_t)0x00000800) 3059 #define CAN_F6R1_FB12 ((uint32_t)0x00001000) 3060 #define CAN_F6R1_FB13 ((uint32_t)0x00002000) 3061 #define CAN_F6R1_FB14 ((uint32_t)0x00004000) 3062 #define CAN_F6R1_FB15 ((uint32_t)0x00008000) 3063 #define CAN_F6R1_FB16 ((uint32_t)0x00010000) 3064 #define CAN_F6R1_FB17 ((uint32_t)0x00020000) 3065 #define CAN_F6R1_FB18 ((uint32_t)0x00040000) 3066 #define CAN_F6R1_FB19 ((uint32_t)0x00080000) 3067 #define CAN_F6R1_FB20 ((uint32_t)0x00100000) 3068 #define CAN_F6R1_FB21 ((uint32_t)0x00200000) 3069 #define CAN_F6R1_FB22 ((uint32_t)0x00400000) 3070 #define CAN_F6R1_FB23 ((uint32_t)0x00800000) 3071 #define CAN_F6R1_FB24 ((uint32_t)0x01000000) 3072 #define CAN_F6R1_FB25 ((uint32_t)0x02000000) 3073 #define CAN_F6R1_FB26 ((uint32_t)0x04000000) 3074 #define CAN_F6R1_FB27 ((uint32_t)0x08000000) 3075 #define CAN_F6R1_FB28 ((uint32_t)0x10000000) 3076 #define CAN_F6R1_FB29 ((uint32_t)0x20000000) 3077 #define CAN_F6R1_FB30 ((uint32_t)0x40000000) 3078 #define CAN_F6R1_FB31 ((uint32_t)0x80000000) 3081 #define CAN_F7R1_FB0 ((uint32_t)0x00000001) 3082 #define CAN_F7R1_FB1 ((uint32_t)0x00000002) 3083 #define CAN_F7R1_FB2 ((uint32_t)0x00000004) 3084 #define CAN_F7R1_FB3 ((uint32_t)0x00000008) 3085 #define CAN_F7R1_FB4 ((uint32_t)0x00000010) 3086 #define CAN_F7R1_FB5 ((uint32_t)0x00000020) 3087 #define CAN_F7R1_FB6 ((uint32_t)0x00000040) 3088 #define CAN_F7R1_FB7 ((uint32_t)0x00000080) 3089 #define CAN_F7R1_FB8 ((uint32_t)0x00000100) 3090 #define CAN_F7R1_FB9 ((uint32_t)0x00000200) 3091 #define CAN_F7R1_FB10 ((uint32_t)0x00000400) 3092 #define CAN_F7R1_FB11 ((uint32_t)0x00000800) 3093 #define CAN_F7R1_FB12 ((uint32_t)0x00001000) 3094 #define CAN_F7R1_FB13 ((uint32_t)0x00002000) 3095 #define CAN_F7R1_FB14 ((uint32_t)0x00004000) 3096 #define CAN_F7R1_FB15 ((uint32_t)0x00008000) 3097 #define CAN_F7R1_FB16 ((uint32_t)0x00010000) 3098 #define CAN_F7R1_FB17 ((uint32_t)0x00020000) 3099 #define CAN_F7R1_FB18 ((uint32_t)0x00040000) 3100 #define CAN_F7R1_FB19 ((uint32_t)0x00080000) 3101 #define CAN_F7R1_FB20 ((uint32_t)0x00100000) 3102 #define CAN_F7R1_FB21 ((uint32_t)0x00200000) 3103 #define CAN_F7R1_FB22 ((uint32_t)0x00400000) 3104 #define CAN_F7R1_FB23 ((uint32_t)0x00800000) 3105 #define CAN_F7R1_FB24 ((uint32_t)0x01000000) 3106 #define CAN_F7R1_FB25 ((uint32_t)0x02000000) 3107 #define CAN_F7R1_FB26 ((uint32_t)0x04000000) 3108 #define CAN_F7R1_FB27 ((uint32_t)0x08000000) 3109 #define CAN_F7R1_FB28 ((uint32_t)0x10000000) 3110 #define CAN_F7R1_FB29 ((uint32_t)0x20000000) 3111 #define CAN_F7R1_FB30 ((uint32_t)0x40000000) 3112 #define CAN_F7R1_FB31 ((uint32_t)0x80000000) 3115 #define CAN_F8R1_FB0 ((uint32_t)0x00000001) 3116 #define CAN_F8R1_FB1 ((uint32_t)0x00000002) 3117 #define CAN_F8R1_FB2 ((uint32_t)0x00000004) 3118 #define CAN_F8R1_FB3 ((uint32_t)0x00000008) 3119 #define CAN_F8R1_FB4 ((uint32_t)0x00000010) 3120 #define CAN_F8R1_FB5 ((uint32_t)0x00000020) 3121 #define CAN_F8R1_FB6 ((uint32_t)0x00000040) 3122 #define CAN_F8R1_FB7 ((uint32_t)0x00000080) 3123 #define CAN_F8R1_FB8 ((uint32_t)0x00000100) 3124 #define CAN_F8R1_FB9 ((uint32_t)0x00000200) 3125 #define CAN_F8R1_FB10 ((uint32_t)0x00000400) 3126 #define CAN_F8R1_FB11 ((uint32_t)0x00000800) 3127 #define CAN_F8R1_FB12 ((uint32_t)0x00001000) 3128 #define CAN_F8R1_FB13 ((uint32_t)0x00002000) 3129 #define CAN_F8R1_FB14 ((uint32_t)0x00004000) 3130 #define CAN_F8R1_FB15 ((uint32_t)0x00008000) 3131 #define CAN_F8R1_FB16 ((uint32_t)0x00010000) 3132 #define CAN_F8R1_FB17 ((uint32_t)0x00020000) 3133 #define CAN_F8R1_FB18 ((uint32_t)0x00040000) 3134 #define CAN_F8R1_FB19 ((uint32_t)0x00080000) 3135 #define CAN_F8R1_FB20 ((uint32_t)0x00100000) 3136 #define CAN_F8R1_FB21 ((uint32_t)0x00200000) 3137 #define CAN_F8R1_FB22 ((uint32_t)0x00400000) 3138 #define CAN_F8R1_FB23 ((uint32_t)0x00800000) 3139 #define CAN_F8R1_FB24 ((uint32_t)0x01000000) 3140 #define CAN_F8R1_FB25 ((uint32_t)0x02000000) 3141 #define CAN_F8R1_FB26 ((uint32_t)0x04000000) 3142 #define CAN_F8R1_FB27 ((uint32_t)0x08000000) 3143 #define CAN_F8R1_FB28 ((uint32_t)0x10000000) 3144 #define CAN_F8R1_FB29 ((uint32_t)0x20000000) 3145 #define CAN_F8R1_FB30 ((uint32_t)0x40000000) 3146 #define CAN_F8R1_FB31 ((uint32_t)0x80000000) 3149 #define CAN_F9R1_FB0 ((uint32_t)0x00000001) 3150 #define CAN_F9R1_FB1 ((uint32_t)0x00000002) 3151 #define CAN_F9R1_FB2 ((uint32_t)0x00000004) 3152 #define CAN_F9R1_FB3 ((uint32_t)0x00000008) 3153 #define CAN_F9R1_FB4 ((uint32_t)0x00000010) 3154 #define CAN_F9R1_FB5 ((uint32_t)0x00000020) 3155 #define CAN_F9R1_FB6 ((uint32_t)0x00000040) 3156 #define CAN_F9R1_FB7 ((uint32_t)0x00000080) 3157 #define CAN_F9R1_FB8 ((uint32_t)0x00000100) 3158 #define CAN_F9R1_FB9 ((uint32_t)0x00000200) 3159 #define CAN_F9R1_FB10 ((uint32_t)0x00000400) 3160 #define CAN_F9R1_FB11 ((uint32_t)0x00000800) 3161 #define CAN_F9R1_FB12 ((uint32_t)0x00001000) 3162 #define CAN_F9R1_FB13 ((uint32_t)0x00002000) 3163 #define CAN_F9R1_FB14 ((uint32_t)0x00004000) 3164 #define CAN_F9R1_FB15 ((uint32_t)0x00008000) 3165 #define CAN_F9R1_FB16 ((uint32_t)0x00010000) 3166 #define CAN_F9R1_FB17 ((uint32_t)0x00020000) 3167 #define CAN_F9R1_FB18 ((uint32_t)0x00040000) 3168 #define CAN_F9R1_FB19 ((uint32_t)0x00080000) 3169 #define CAN_F9R1_FB20 ((uint32_t)0x00100000) 3170 #define CAN_F9R1_FB21 ((uint32_t)0x00200000) 3171 #define CAN_F9R1_FB22 ((uint32_t)0x00400000) 3172 #define CAN_F9R1_FB23 ((uint32_t)0x00800000) 3173 #define CAN_F9R1_FB24 ((uint32_t)0x01000000) 3174 #define CAN_F9R1_FB25 ((uint32_t)0x02000000) 3175 #define CAN_F9R1_FB26 ((uint32_t)0x04000000) 3176 #define CAN_F9R1_FB27 ((uint32_t)0x08000000) 3177 #define CAN_F9R1_FB28 ((uint32_t)0x10000000) 3178 #define CAN_F9R1_FB29 ((uint32_t)0x20000000) 3179 #define CAN_F9R1_FB30 ((uint32_t)0x40000000) 3180 #define CAN_F9R1_FB31 ((uint32_t)0x80000000) 3183 #define CAN_F10R1_FB0 ((uint32_t)0x00000001) 3184 #define CAN_F10R1_FB1 ((uint32_t)0x00000002) 3185 #define CAN_F10R1_FB2 ((uint32_t)0x00000004) 3186 #define CAN_F10R1_FB3 ((uint32_t)0x00000008) 3187 #define CAN_F10R1_FB4 ((uint32_t)0x00000010) 3188 #define CAN_F10R1_FB5 ((uint32_t)0x00000020) 3189 #define CAN_F10R1_FB6 ((uint32_t)0x00000040) 3190 #define CAN_F10R1_FB7 ((uint32_t)0x00000080) 3191 #define CAN_F10R1_FB8 ((uint32_t)0x00000100) 3192 #define CAN_F10R1_FB9 ((uint32_t)0x00000200) 3193 #define CAN_F10R1_FB10 ((uint32_t)0x00000400) 3194 #define CAN_F10R1_FB11 ((uint32_t)0x00000800) 3195 #define CAN_F10R1_FB12 ((uint32_t)0x00001000) 3196 #define CAN_F10R1_FB13 ((uint32_t)0x00002000) 3197 #define CAN_F10R1_FB14 ((uint32_t)0x00004000) 3198 #define CAN_F10R1_FB15 ((uint32_t)0x00008000) 3199 #define CAN_F10R1_FB16 ((uint32_t)0x00010000) 3200 #define CAN_F10R1_FB17 ((uint32_t)0x00020000) 3201 #define CAN_F10R1_FB18 ((uint32_t)0x00040000) 3202 #define CAN_F10R1_FB19 ((uint32_t)0x00080000) 3203 #define CAN_F10R1_FB20 ((uint32_t)0x00100000) 3204 #define CAN_F10R1_FB21 ((uint32_t)0x00200000) 3205 #define CAN_F10R1_FB22 ((uint32_t)0x00400000) 3206 #define CAN_F10R1_FB23 ((uint32_t)0x00800000) 3207 #define CAN_F10R1_FB24 ((uint32_t)0x01000000) 3208 #define CAN_F10R1_FB25 ((uint32_t)0x02000000) 3209 #define CAN_F10R1_FB26 ((uint32_t)0x04000000) 3210 #define CAN_F10R1_FB27 ((uint32_t)0x08000000) 3211 #define CAN_F10R1_FB28 ((uint32_t)0x10000000) 3212 #define CAN_F10R1_FB29 ((uint32_t)0x20000000) 3213 #define CAN_F10R1_FB30 ((uint32_t)0x40000000) 3214 #define CAN_F10R1_FB31 ((uint32_t)0x80000000) 3217 #define CAN_F11R1_FB0 ((uint32_t)0x00000001) 3218 #define CAN_F11R1_FB1 ((uint32_t)0x00000002) 3219 #define CAN_F11R1_FB2 ((uint32_t)0x00000004) 3220 #define CAN_F11R1_FB3 ((uint32_t)0x00000008) 3221 #define CAN_F11R1_FB4 ((uint32_t)0x00000010) 3222 #define CAN_F11R1_FB5 ((uint32_t)0x00000020) 3223 #define CAN_F11R1_FB6 ((uint32_t)0x00000040) 3224 #define CAN_F11R1_FB7 ((uint32_t)0x00000080) 3225 #define CAN_F11R1_FB8 ((uint32_t)0x00000100) 3226 #define CAN_F11R1_FB9 ((uint32_t)0x00000200) 3227 #define CAN_F11R1_FB10 ((uint32_t)0x00000400) 3228 #define CAN_F11R1_FB11 ((uint32_t)0x00000800) 3229 #define CAN_F11R1_FB12 ((uint32_t)0x00001000) 3230 #define CAN_F11R1_FB13 ((uint32_t)0x00002000) 3231 #define CAN_F11R1_FB14 ((uint32_t)0x00004000) 3232 #define CAN_F11R1_FB15 ((uint32_t)0x00008000) 3233 #define CAN_F11R1_FB16 ((uint32_t)0x00010000) 3234 #define CAN_F11R1_FB17 ((uint32_t)0x00020000) 3235 #define CAN_F11R1_FB18 ((uint32_t)0x00040000) 3236 #define CAN_F11R1_FB19 ((uint32_t)0x00080000) 3237 #define CAN_F11R1_FB20 ((uint32_t)0x00100000) 3238 #define CAN_F11R1_FB21 ((uint32_t)0x00200000) 3239 #define CAN_F11R1_FB22 ((uint32_t)0x00400000) 3240 #define CAN_F11R1_FB23 ((uint32_t)0x00800000) 3241 #define CAN_F11R1_FB24 ((uint32_t)0x01000000) 3242 #define CAN_F11R1_FB25 ((uint32_t)0x02000000) 3243 #define CAN_F11R1_FB26 ((uint32_t)0x04000000) 3244 #define CAN_F11R1_FB27 ((uint32_t)0x08000000) 3245 #define CAN_F11R1_FB28 ((uint32_t)0x10000000) 3246 #define CAN_F11R1_FB29 ((uint32_t)0x20000000) 3247 #define CAN_F11R1_FB30 ((uint32_t)0x40000000) 3248 #define CAN_F11R1_FB31 ((uint32_t)0x80000000) 3251 #define CAN_F12R1_FB0 ((uint32_t)0x00000001) 3252 #define CAN_F12R1_FB1 ((uint32_t)0x00000002) 3253 #define CAN_F12R1_FB2 ((uint32_t)0x00000004) 3254 #define CAN_F12R1_FB3 ((uint32_t)0x00000008) 3255 #define CAN_F12R1_FB4 ((uint32_t)0x00000010) 3256 #define CAN_F12R1_FB5 ((uint32_t)0x00000020) 3257 #define CAN_F12R1_FB6 ((uint32_t)0x00000040) 3258 #define CAN_F12R1_FB7 ((uint32_t)0x00000080) 3259 #define CAN_F12R1_FB8 ((uint32_t)0x00000100) 3260 #define CAN_F12R1_FB9 ((uint32_t)0x00000200) 3261 #define CAN_F12R1_FB10 ((uint32_t)0x00000400) 3262 #define CAN_F12R1_FB11 ((uint32_t)0x00000800) 3263 #define CAN_F12R1_FB12 ((uint32_t)0x00001000) 3264 #define CAN_F12R1_FB13 ((uint32_t)0x00002000) 3265 #define CAN_F12R1_FB14 ((uint32_t)0x00004000) 3266 #define CAN_F12R1_FB15 ((uint32_t)0x00008000) 3267 #define CAN_F12R1_FB16 ((uint32_t)0x00010000) 3268 #define CAN_F12R1_FB17 ((uint32_t)0x00020000) 3269 #define CAN_F12R1_FB18 ((uint32_t)0x00040000) 3270 #define CAN_F12R1_FB19 ((uint32_t)0x00080000) 3271 #define CAN_F12R1_FB20 ((uint32_t)0x00100000) 3272 #define CAN_F12R1_FB21 ((uint32_t)0x00200000) 3273 #define CAN_F12R1_FB22 ((uint32_t)0x00400000) 3274 #define CAN_F12R1_FB23 ((uint32_t)0x00800000) 3275 #define CAN_F12R1_FB24 ((uint32_t)0x01000000) 3276 #define CAN_F12R1_FB25 ((uint32_t)0x02000000) 3277 #define CAN_F12R1_FB26 ((uint32_t)0x04000000) 3278 #define CAN_F12R1_FB27 ((uint32_t)0x08000000) 3279 #define CAN_F12R1_FB28 ((uint32_t)0x10000000) 3280 #define CAN_F12R1_FB29 ((uint32_t)0x20000000) 3281 #define CAN_F12R1_FB30 ((uint32_t)0x40000000) 3282 #define CAN_F12R1_FB31 ((uint32_t)0x80000000) 3285 #define CAN_F13R1_FB0 ((uint32_t)0x00000001) 3286 #define CAN_F13R1_FB1 ((uint32_t)0x00000002) 3287 #define CAN_F13R1_FB2 ((uint32_t)0x00000004) 3288 #define CAN_F13R1_FB3 ((uint32_t)0x00000008) 3289 #define CAN_F13R1_FB4 ((uint32_t)0x00000010) 3290 #define CAN_F13R1_FB5 ((uint32_t)0x00000020) 3291 #define CAN_F13R1_FB6 ((uint32_t)0x00000040) 3292 #define CAN_F13R1_FB7 ((uint32_t)0x00000080) 3293 #define CAN_F13R1_FB8 ((uint32_t)0x00000100) 3294 #define CAN_F13R1_FB9 ((uint32_t)0x00000200) 3295 #define CAN_F13R1_FB10 ((uint32_t)0x00000400) 3296 #define CAN_F13R1_FB11 ((uint32_t)0x00000800) 3297 #define CAN_F13R1_FB12 ((uint32_t)0x00001000) 3298 #define CAN_F13R1_FB13 ((uint32_t)0x00002000) 3299 #define CAN_F13R1_FB14 ((uint32_t)0x00004000) 3300 #define CAN_F13R1_FB15 ((uint32_t)0x00008000) 3301 #define CAN_F13R1_FB16 ((uint32_t)0x00010000) 3302 #define CAN_F13R1_FB17 ((uint32_t)0x00020000) 3303 #define CAN_F13R1_FB18 ((uint32_t)0x00040000) 3304 #define CAN_F13R1_FB19 ((uint32_t)0x00080000) 3305 #define CAN_F13R1_FB20 ((uint32_t)0x00100000) 3306 #define CAN_F13R1_FB21 ((uint32_t)0x00200000) 3307 #define CAN_F13R1_FB22 ((uint32_t)0x00400000) 3308 #define CAN_F13R1_FB23 ((uint32_t)0x00800000) 3309 #define CAN_F13R1_FB24 ((uint32_t)0x01000000) 3310 #define CAN_F13R1_FB25 ((uint32_t)0x02000000) 3311 #define CAN_F13R1_FB26 ((uint32_t)0x04000000) 3312 #define CAN_F13R1_FB27 ((uint32_t)0x08000000) 3313 #define CAN_F13R1_FB28 ((uint32_t)0x10000000) 3314 #define CAN_F13R1_FB29 ((uint32_t)0x20000000) 3315 #define CAN_F13R1_FB30 ((uint32_t)0x40000000) 3316 #define CAN_F13R1_FB31 ((uint32_t)0x80000000) 3319 #define CAN_F0R2_FB0 ((uint32_t)0x00000001) 3320 #define CAN_F0R2_FB1 ((uint32_t)0x00000002) 3321 #define CAN_F0R2_FB2 ((uint32_t)0x00000004) 3322 #define CAN_F0R2_FB3 ((uint32_t)0x00000008) 3323 #define CAN_F0R2_FB4 ((uint32_t)0x00000010) 3324 #define CAN_F0R2_FB5 ((uint32_t)0x00000020) 3325 #define CAN_F0R2_FB6 ((uint32_t)0x00000040) 3326 #define CAN_F0R2_FB7 ((uint32_t)0x00000080) 3327 #define CAN_F0R2_FB8 ((uint32_t)0x00000100) 3328 #define CAN_F0R2_FB9 ((uint32_t)0x00000200) 3329 #define CAN_F0R2_FB10 ((uint32_t)0x00000400) 3330 #define CAN_F0R2_FB11 ((uint32_t)0x00000800) 3331 #define CAN_F0R2_FB12 ((uint32_t)0x00001000) 3332 #define CAN_F0R2_FB13 ((uint32_t)0x00002000) 3333 #define CAN_F0R2_FB14 ((uint32_t)0x00004000) 3334 #define CAN_F0R2_FB15 ((uint32_t)0x00008000) 3335 #define CAN_F0R2_FB16 ((uint32_t)0x00010000) 3336 #define CAN_F0R2_FB17 ((uint32_t)0x00020000) 3337 #define CAN_F0R2_FB18 ((uint32_t)0x00040000) 3338 #define CAN_F0R2_FB19 ((uint32_t)0x00080000) 3339 #define CAN_F0R2_FB20 ((uint32_t)0x00100000) 3340 #define CAN_F0R2_FB21 ((uint32_t)0x00200000) 3341 #define CAN_F0R2_FB22 ((uint32_t)0x00400000) 3342 #define CAN_F0R2_FB23 ((uint32_t)0x00800000) 3343 #define CAN_F0R2_FB24 ((uint32_t)0x01000000) 3344 #define CAN_F0R2_FB25 ((uint32_t)0x02000000) 3345 #define CAN_F0R2_FB26 ((uint32_t)0x04000000) 3346 #define CAN_F0R2_FB27 ((uint32_t)0x08000000) 3347 #define CAN_F0R2_FB28 ((uint32_t)0x10000000) 3348 #define CAN_F0R2_FB29 ((uint32_t)0x20000000) 3349 #define CAN_F0R2_FB30 ((uint32_t)0x40000000) 3350 #define CAN_F0R2_FB31 ((uint32_t)0x80000000) 3353 #define CAN_F1R2_FB0 ((uint32_t)0x00000001) 3354 #define CAN_F1R2_FB1 ((uint32_t)0x00000002) 3355 #define CAN_F1R2_FB2 ((uint32_t)0x00000004) 3356 #define CAN_F1R2_FB3 ((uint32_t)0x00000008) 3357 #define CAN_F1R2_FB4 ((uint32_t)0x00000010) 3358 #define CAN_F1R2_FB5 ((uint32_t)0x00000020) 3359 #define CAN_F1R2_FB6 ((uint32_t)0x00000040) 3360 #define CAN_F1R2_FB7 ((uint32_t)0x00000080) 3361 #define CAN_F1R2_FB8 ((uint32_t)0x00000100) 3362 #define CAN_F1R2_FB9 ((uint32_t)0x00000200) 3363 #define CAN_F1R2_FB10 ((uint32_t)0x00000400) 3364 #define CAN_F1R2_FB11 ((uint32_t)0x00000800) 3365 #define CAN_F1R2_FB12 ((uint32_t)0x00001000) 3366 #define CAN_F1R2_FB13 ((uint32_t)0x00002000) 3367 #define CAN_F1R2_FB14 ((uint32_t)0x00004000) 3368 #define CAN_F1R2_FB15 ((uint32_t)0x00008000) 3369 #define CAN_F1R2_FB16 ((uint32_t)0x00010000) 3370 #define CAN_F1R2_FB17 ((uint32_t)0x00020000) 3371 #define CAN_F1R2_FB18 ((uint32_t)0x00040000) 3372 #define CAN_F1R2_FB19 ((uint32_t)0x00080000) 3373 #define CAN_F1R2_FB20 ((uint32_t)0x00100000) 3374 #define CAN_F1R2_FB21 ((uint32_t)0x00200000) 3375 #define CAN_F1R2_FB22 ((uint32_t)0x00400000) 3376 #define CAN_F1R2_FB23 ((uint32_t)0x00800000) 3377 #define CAN_F1R2_FB24 ((uint32_t)0x01000000) 3378 #define CAN_F1R2_FB25 ((uint32_t)0x02000000) 3379 #define CAN_F1R2_FB26 ((uint32_t)0x04000000) 3380 #define CAN_F1R2_FB27 ((uint32_t)0x08000000) 3381 #define CAN_F1R2_FB28 ((uint32_t)0x10000000) 3382 #define CAN_F1R2_FB29 ((uint32_t)0x20000000) 3383 #define CAN_F1R2_FB30 ((uint32_t)0x40000000) 3384 #define CAN_F1R2_FB31 ((uint32_t)0x80000000) 3387 #define CAN_F2R2_FB0 ((uint32_t)0x00000001) 3388 #define CAN_F2R2_FB1 ((uint32_t)0x00000002) 3389 #define CAN_F2R2_FB2 ((uint32_t)0x00000004) 3390 #define CAN_F2R2_FB3 ((uint32_t)0x00000008) 3391 #define CAN_F2R2_FB4 ((uint32_t)0x00000010) 3392 #define CAN_F2R2_FB5 ((uint32_t)0x00000020) 3393 #define CAN_F2R2_FB6 ((uint32_t)0x00000040) 3394 #define CAN_F2R2_FB7 ((uint32_t)0x00000080) 3395 #define CAN_F2R2_FB8 ((uint32_t)0x00000100) 3396 #define CAN_F2R2_FB9 ((uint32_t)0x00000200) 3397 #define CAN_F2R2_FB10 ((uint32_t)0x00000400) 3398 #define CAN_F2R2_FB11 ((uint32_t)0x00000800) 3399 #define CAN_F2R2_FB12 ((uint32_t)0x00001000) 3400 #define CAN_F2R2_FB13 ((uint32_t)0x00002000) 3401 #define CAN_F2R2_FB14 ((uint32_t)0x00004000) 3402 #define CAN_F2R2_FB15 ((uint32_t)0x00008000) 3403 #define CAN_F2R2_FB16 ((uint32_t)0x00010000) 3404 #define CAN_F2R2_FB17 ((uint32_t)0x00020000) 3405 #define CAN_F2R2_FB18 ((uint32_t)0x00040000) 3406 #define CAN_F2R2_FB19 ((uint32_t)0x00080000) 3407 #define CAN_F2R2_FB20 ((uint32_t)0x00100000) 3408 #define CAN_F2R2_FB21 ((uint32_t)0x00200000) 3409 #define CAN_F2R2_FB22 ((uint32_t)0x00400000) 3410 #define CAN_F2R2_FB23 ((uint32_t)0x00800000) 3411 #define CAN_F2R2_FB24 ((uint32_t)0x01000000) 3412 #define CAN_F2R2_FB25 ((uint32_t)0x02000000) 3413 #define CAN_F2R2_FB26 ((uint32_t)0x04000000) 3414 #define CAN_F2R2_FB27 ((uint32_t)0x08000000) 3415 #define CAN_F2R2_FB28 ((uint32_t)0x10000000) 3416 #define CAN_F2R2_FB29 ((uint32_t)0x20000000) 3417 #define CAN_F2R2_FB30 ((uint32_t)0x40000000) 3418 #define CAN_F2R2_FB31 ((uint32_t)0x80000000) 3421 #define CAN_F3R2_FB0 ((uint32_t)0x00000001) 3422 #define CAN_F3R2_FB1 ((uint32_t)0x00000002) 3423 #define CAN_F3R2_FB2 ((uint32_t)0x00000004) 3424 #define CAN_F3R2_FB3 ((uint32_t)0x00000008) 3425 #define CAN_F3R2_FB4 ((uint32_t)0x00000010) 3426 #define CAN_F3R2_FB5 ((uint32_t)0x00000020) 3427 #define CAN_F3R2_FB6 ((uint32_t)0x00000040) 3428 #define CAN_F3R2_FB7 ((uint32_t)0x00000080) 3429 #define CAN_F3R2_FB8 ((uint32_t)0x00000100) 3430 #define CAN_F3R2_FB9 ((uint32_t)0x00000200) 3431 #define CAN_F3R2_FB10 ((uint32_t)0x00000400) 3432 #define CAN_F3R2_FB11 ((uint32_t)0x00000800) 3433 #define CAN_F3R2_FB12 ((uint32_t)0x00001000) 3434 #define CAN_F3R2_FB13 ((uint32_t)0x00002000) 3435 #define CAN_F3R2_FB14 ((uint32_t)0x00004000) 3436 #define CAN_F3R2_FB15 ((uint32_t)0x00008000) 3437 #define CAN_F3R2_FB16 ((uint32_t)0x00010000) 3438 #define CAN_F3R2_FB17 ((uint32_t)0x00020000) 3439 #define CAN_F3R2_FB18 ((uint32_t)0x00040000) 3440 #define CAN_F3R2_FB19 ((uint32_t)0x00080000) 3441 #define CAN_F3R2_FB20 ((uint32_t)0x00100000) 3442 #define CAN_F3R2_FB21 ((uint32_t)0x00200000) 3443 #define CAN_F3R2_FB22 ((uint32_t)0x00400000) 3444 #define CAN_F3R2_FB23 ((uint32_t)0x00800000) 3445 #define CAN_F3R2_FB24 ((uint32_t)0x01000000) 3446 #define CAN_F3R2_FB25 ((uint32_t)0x02000000) 3447 #define CAN_F3R2_FB26 ((uint32_t)0x04000000) 3448 #define CAN_F3R2_FB27 ((uint32_t)0x08000000) 3449 #define CAN_F3R2_FB28 ((uint32_t)0x10000000) 3450 #define CAN_F3R2_FB29 ((uint32_t)0x20000000) 3451 #define CAN_F3R2_FB30 ((uint32_t)0x40000000) 3452 #define CAN_F3R2_FB31 ((uint32_t)0x80000000) 3455 #define CAN_F4R2_FB0 ((uint32_t)0x00000001) 3456 #define CAN_F4R2_FB1 ((uint32_t)0x00000002) 3457 #define CAN_F4R2_FB2 ((uint32_t)0x00000004) 3458 #define CAN_F4R2_FB3 ((uint32_t)0x00000008) 3459 #define CAN_F4R2_FB4 ((uint32_t)0x00000010) 3460 #define CAN_F4R2_FB5 ((uint32_t)0x00000020) 3461 #define CAN_F4R2_FB6 ((uint32_t)0x00000040) 3462 #define CAN_F4R2_FB7 ((uint32_t)0x00000080) 3463 #define CAN_F4R2_FB8 ((uint32_t)0x00000100) 3464 #define CAN_F4R2_FB9 ((uint32_t)0x00000200) 3465 #define CAN_F4R2_FB10 ((uint32_t)0x00000400) 3466 #define CAN_F4R2_FB11 ((uint32_t)0x00000800) 3467 #define CAN_F4R2_FB12 ((uint32_t)0x00001000) 3468 #define CAN_F4R2_FB13 ((uint32_t)0x00002000) 3469 #define CAN_F4R2_FB14 ((uint32_t)0x00004000) 3470 #define CAN_F4R2_FB15 ((uint32_t)0x00008000) 3471 #define CAN_F4R2_FB16 ((uint32_t)0x00010000) 3472 #define CAN_F4R2_FB17 ((uint32_t)0x00020000) 3473 #define CAN_F4R2_FB18 ((uint32_t)0x00040000) 3474 #define CAN_F4R2_FB19 ((uint32_t)0x00080000) 3475 #define CAN_F4R2_FB20 ((uint32_t)0x00100000) 3476 #define CAN_F4R2_FB21 ((uint32_t)0x00200000) 3477 #define CAN_F4R2_FB22 ((uint32_t)0x00400000) 3478 #define CAN_F4R2_FB23 ((uint32_t)0x00800000) 3479 #define CAN_F4R2_FB24 ((uint32_t)0x01000000) 3480 #define CAN_F4R2_FB25 ((uint32_t)0x02000000) 3481 #define CAN_F4R2_FB26 ((uint32_t)0x04000000) 3482 #define CAN_F4R2_FB27 ((uint32_t)0x08000000) 3483 #define CAN_F4R2_FB28 ((uint32_t)0x10000000) 3484 #define CAN_F4R2_FB29 ((uint32_t)0x20000000) 3485 #define CAN_F4R2_FB30 ((uint32_t)0x40000000) 3486 #define CAN_F4R2_FB31 ((uint32_t)0x80000000) 3489 #define CAN_F5R2_FB0 ((uint32_t)0x00000001) 3490 #define CAN_F5R2_FB1 ((uint32_t)0x00000002) 3491 #define CAN_F5R2_FB2 ((uint32_t)0x00000004) 3492 #define CAN_F5R2_FB3 ((uint32_t)0x00000008) 3493 #define CAN_F5R2_FB4 ((uint32_t)0x00000010) 3494 #define CAN_F5R2_FB5 ((uint32_t)0x00000020) 3495 #define CAN_F5R2_FB6 ((uint32_t)0x00000040) 3496 #define CAN_F5R2_FB7 ((uint32_t)0x00000080) 3497 #define CAN_F5R2_FB8 ((uint32_t)0x00000100) 3498 #define CAN_F5R2_FB9 ((uint32_t)0x00000200) 3499 #define CAN_F5R2_FB10 ((uint32_t)0x00000400) 3500 #define CAN_F5R2_FB11 ((uint32_t)0x00000800) 3501 #define CAN_F5R2_FB12 ((uint32_t)0x00001000) 3502 #define CAN_F5R2_FB13 ((uint32_t)0x00002000) 3503 #define CAN_F5R2_FB14 ((uint32_t)0x00004000) 3504 #define CAN_F5R2_FB15 ((uint32_t)0x00008000) 3505 #define CAN_F5R2_FB16 ((uint32_t)0x00010000) 3506 #define CAN_F5R2_FB17 ((uint32_t)0x00020000) 3507 #define CAN_F5R2_FB18 ((uint32_t)0x00040000) 3508 #define CAN_F5R2_FB19 ((uint32_t)0x00080000) 3509 #define CAN_F5R2_FB20 ((uint32_t)0x00100000) 3510 #define CAN_F5R2_FB21 ((uint32_t)0x00200000) 3511 #define CAN_F5R2_FB22 ((uint32_t)0x00400000) 3512 #define CAN_F5R2_FB23 ((uint32_t)0x00800000) 3513 #define CAN_F5R2_FB24 ((uint32_t)0x01000000) 3514 #define CAN_F5R2_FB25 ((uint32_t)0x02000000) 3515 #define CAN_F5R2_FB26 ((uint32_t)0x04000000) 3516 #define CAN_F5R2_FB27 ((uint32_t)0x08000000) 3517 #define CAN_F5R2_FB28 ((uint32_t)0x10000000) 3518 #define CAN_F5R2_FB29 ((uint32_t)0x20000000) 3519 #define CAN_F5R2_FB30 ((uint32_t)0x40000000) 3520 #define CAN_F5R2_FB31 ((uint32_t)0x80000000) 3523 #define CAN_F6R2_FB0 ((uint32_t)0x00000001) 3524 #define CAN_F6R2_FB1 ((uint32_t)0x00000002) 3525 #define CAN_F6R2_FB2 ((uint32_t)0x00000004) 3526 #define CAN_F6R2_FB3 ((uint32_t)0x00000008) 3527 #define CAN_F6R2_FB4 ((uint32_t)0x00000010) 3528 #define CAN_F6R2_FB5 ((uint32_t)0x00000020) 3529 #define CAN_F6R2_FB6 ((uint32_t)0x00000040) 3530 #define CAN_F6R2_FB7 ((uint32_t)0x00000080) 3531 #define CAN_F6R2_FB8 ((uint32_t)0x00000100) 3532 #define CAN_F6R2_FB9 ((uint32_t)0x00000200) 3533 #define CAN_F6R2_FB10 ((uint32_t)0x00000400) 3534 #define CAN_F6R2_FB11 ((uint32_t)0x00000800) 3535 #define CAN_F6R2_FB12 ((uint32_t)0x00001000) 3536 #define CAN_F6R2_FB13 ((uint32_t)0x00002000) 3537 #define CAN_F6R2_FB14 ((uint32_t)0x00004000) 3538 #define CAN_F6R2_FB15 ((uint32_t)0x00008000) 3539 #define CAN_F6R2_FB16 ((uint32_t)0x00010000) 3540 #define CAN_F6R2_FB17 ((uint32_t)0x00020000) 3541 #define CAN_F6R2_FB18 ((uint32_t)0x00040000) 3542 #define CAN_F6R2_FB19 ((uint32_t)0x00080000) 3543 #define CAN_F6R2_FB20 ((uint32_t)0x00100000) 3544 #define CAN_F6R2_FB21 ((uint32_t)0x00200000) 3545 #define CAN_F6R2_FB22 ((uint32_t)0x00400000) 3546 #define CAN_F6R2_FB23 ((uint32_t)0x00800000) 3547 #define CAN_F6R2_FB24 ((uint32_t)0x01000000) 3548 #define CAN_F6R2_FB25 ((uint32_t)0x02000000) 3549 #define CAN_F6R2_FB26 ((uint32_t)0x04000000) 3550 #define CAN_F6R2_FB27 ((uint32_t)0x08000000) 3551 #define CAN_F6R2_FB28 ((uint32_t)0x10000000) 3552 #define CAN_F6R2_FB29 ((uint32_t)0x20000000) 3553 #define CAN_F6R2_FB30 ((uint32_t)0x40000000) 3554 #define CAN_F6R2_FB31 ((uint32_t)0x80000000) 3557 #define CAN_F7R2_FB0 ((uint32_t)0x00000001) 3558 #define CAN_F7R2_FB1 ((uint32_t)0x00000002) 3559 #define CAN_F7R2_FB2 ((uint32_t)0x00000004) 3560 #define CAN_F7R2_FB3 ((uint32_t)0x00000008) 3561 #define CAN_F7R2_FB4 ((uint32_t)0x00000010) 3562 #define CAN_F7R2_FB5 ((uint32_t)0x00000020) 3563 #define CAN_F7R2_FB6 ((uint32_t)0x00000040) 3564 #define CAN_F7R2_FB7 ((uint32_t)0x00000080) 3565 #define CAN_F7R2_FB8 ((uint32_t)0x00000100) 3566 #define CAN_F7R2_FB9 ((uint32_t)0x00000200) 3567 #define CAN_F7R2_FB10 ((uint32_t)0x00000400) 3568 #define CAN_F7R2_FB11 ((uint32_t)0x00000800) 3569 #define CAN_F7R2_FB12 ((uint32_t)0x00001000) 3570 #define CAN_F7R2_FB13 ((uint32_t)0x00002000) 3571 #define CAN_F7R2_FB14 ((uint32_t)0x00004000) 3572 #define CAN_F7R2_FB15 ((uint32_t)0x00008000) 3573 #define CAN_F7R2_FB16 ((uint32_t)0x00010000) 3574 #define CAN_F7R2_FB17 ((uint32_t)0x00020000) 3575 #define CAN_F7R2_FB18 ((uint32_t)0x00040000) 3576 #define CAN_F7R2_FB19 ((uint32_t)0x00080000) 3577 #define CAN_F7R2_FB20 ((uint32_t)0x00100000) 3578 #define CAN_F7R2_FB21 ((uint32_t)0x00200000) 3579 #define CAN_F7R2_FB22 ((uint32_t)0x00400000) 3580 #define CAN_F7R2_FB23 ((uint32_t)0x00800000) 3581 #define CAN_F7R2_FB24 ((uint32_t)0x01000000) 3582 #define CAN_F7R2_FB25 ((uint32_t)0x02000000) 3583 #define CAN_F7R2_FB26 ((uint32_t)0x04000000) 3584 #define CAN_F7R2_FB27 ((uint32_t)0x08000000) 3585 #define CAN_F7R2_FB28 ((uint32_t)0x10000000) 3586 #define CAN_F7R2_FB29 ((uint32_t)0x20000000) 3587 #define CAN_F7R2_FB30 ((uint32_t)0x40000000) 3588 #define CAN_F7R2_FB31 ((uint32_t)0x80000000) 3591 #define CAN_F8R2_FB0 ((uint32_t)0x00000001) 3592 #define CAN_F8R2_FB1 ((uint32_t)0x00000002) 3593 #define CAN_F8R2_FB2 ((uint32_t)0x00000004) 3594 #define CAN_F8R2_FB3 ((uint32_t)0x00000008) 3595 #define CAN_F8R2_FB4 ((uint32_t)0x00000010) 3596 #define CAN_F8R2_FB5 ((uint32_t)0x00000020) 3597 #define CAN_F8R2_FB6 ((uint32_t)0x00000040) 3598 #define CAN_F8R2_FB7 ((uint32_t)0x00000080) 3599 #define CAN_F8R2_FB8 ((uint32_t)0x00000100) 3600 #define CAN_F8R2_FB9 ((uint32_t)0x00000200) 3601 #define CAN_F8R2_FB10 ((uint32_t)0x00000400) 3602 #define CAN_F8R2_FB11 ((uint32_t)0x00000800) 3603 #define CAN_F8R2_FB12 ((uint32_t)0x00001000) 3604 #define CAN_F8R2_FB13 ((uint32_t)0x00002000) 3605 #define CAN_F8R2_FB14 ((uint32_t)0x00004000) 3606 #define CAN_F8R2_FB15 ((uint32_t)0x00008000) 3607 #define CAN_F8R2_FB16 ((uint32_t)0x00010000) 3608 #define CAN_F8R2_FB17 ((uint32_t)0x00020000) 3609 #define CAN_F8R2_FB18 ((uint32_t)0x00040000) 3610 #define CAN_F8R2_FB19 ((uint32_t)0x00080000) 3611 #define CAN_F8R2_FB20 ((uint32_t)0x00100000) 3612 #define CAN_F8R2_FB21 ((uint32_t)0x00200000) 3613 #define CAN_F8R2_FB22 ((uint32_t)0x00400000) 3614 #define CAN_F8R2_FB23 ((uint32_t)0x00800000) 3615 #define CAN_F8R2_FB24 ((uint32_t)0x01000000) 3616 #define CAN_F8R2_FB25 ((uint32_t)0x02000000) 3617 #define CAN_F8R2_FB26 ((uint32_t)0x04000000) 3618 #define CAN_F8R2_FB27 ((uint32_t)0x08000000) 3619 #define CAN_F8R2_FB28 ((uint32_t)0x10000000) 3620 #define CAN_F8R2_FB29 ((uint32_t)0x20000000) 3621 #define CAN_F8R2_FB30 ((uint32_t)0x40000000) 3622 #define CAN_F8R2_FB31 ((uint32_t)0x80000000) 3625 #define CAN_F9R2_FB0 ((uint32_t)0x00000001) 3626 #define CAN_F9R2_FB1 ((uint32_t)0x00000002) 3627 #define CAN_F9R2_FB2 ((uint32_t)0x00000004) 3628 #define CAN_F9R2_FB3 ((uint32_t)0x00000008) 3629 #define CAN_F9R2_FB4 ((uint32_t)0x00000010) 3630 #define CAN_F9R2_FB5 ((uint32_t)0x00000020) 3631 #define CAN_F9R2_FB6 ((uint32_t)0x00000040) 3632 #define CAN_F9R2_FB7 ((uint32_t)0x00000080) 3633 #define CAN_F9R2_FB8 ((uint32_t)0x00000100) 3634 #define CAN_F9R2_FB9 ((uint32_t)0x00000200) 3635 #define CAN_F9R2_FB10 ((uint32_t)0x00000400) 3636 #define CAN_F9R2_FB11 ((uint32_t)0x00000800) 3637 #define CAN_F9R2_FB12 ((uint32_t)0x00001000) 3638 #define CAN_F9R2_FB13 ((uint32_t)0x00002000) 3639 #define CAN_F9R2_FB14 ((uint32_t)0x00004000) 3640 #define CAN_F9R2_FB15 ((uint32_t)0x00008000) 3641 #define CAN_F9R2_FB16 ((uint32_t)0x00010000) 3642 #define CAN_F9R2_FB17 ((uint32_t)0x00020000) 3643 #define CAN_F9R2_FB18 ((uint32_t)0x00040000) 3644 #define CAN_F9R2_FB19 ((uint32_t)0x00080000) 3645 #define CAN_F9R2_FB20 ((uint32_t)0x00100000) 3646 #define CAN_F9R2_FB21 ((uint32_t)0x00200000) 3647 #define CAN_F9R2_FB22 ((uint32_t)0x00400000) 3648 #define CAN_F9R2_FB23 ((uint32_t)0x00800000) 3649 #define CAN_F9R2_FB24 ((uint32_t)0x01000000) 3650 #define CAN_F9R2_FB25 ((uint32_t)0x02000000) 3651 #define CAN_F9R2_FB26 ((uint32_t)0x04000000) 3652 #define CAN_F9R2_FB27 ((uint32_t)0x08000000) 3653 #define CAN_F9R2_FB28 ((uint32_t)0x10000000) 3654 #define CAN_F9R2_FB29 ((uint32_t)0x20000000) 3655 #define CAN_F9R2_FB30 ((uint32_t)0x40000000) 3656 #define CAN_F9R2_FB31 ((uint32_t)0x80000000) 3659 #define CAN_F10R2_FB0 ((uint32_t)0x00000001) 3660 #define CAN_F10R2_FB1 ((uint32_t)0x00000002) 3661 #define CAN_F10R2_FB2 ((uint32_t)0x00000004) 3662 #define CAN_F10R2_FB3 ((uint32_t)0x00000008) 3663 #define CAN_F10R2_FB4 ((uint32_t)0x00000010) 3664 #define CAN_F10R2_FB5 ((uint32_t)0x00000020) 3665 #define CAN_F10R2_FB6 ((uint32_t)0x00000040) 3666 #define CAN_F10R2_FB7 ((uint32_t)0x00000080) 3667 #define CAN_F10R2_FB8 ((uint32_t)0x00000100) 3668 #define CAN_F10R2_FB9 ((uint32_t)0x00000200) 3669 #define CAN_F10R2_FB10 ((uint32_t)0x00000400) 3670 #define CAN_F10R2_FB11 ((uint32_t)0x00000800) 3671 #define CAN_F10R2_FB12 ((uint32_t)0x00001000) 3672 #define CAN_F10R2_FB13 ((uint32_t)0x00002000) 3673 #define CAN_F10R2_FB14 ((uint32_t)0x00004000) 3674 #define CAN_F10R2_FB15 ((uint32_t)0x00008000) 3675 #define CAN_F10R2_FB16 ((uint32_t)0x00010000) 3676 #define CAN_F10R2_FB17 ((uint32_t)0x00020000) 3677 #define CAN_F10R2_FB18 ((uint32_t)0x00040000) 3678 #define CAN_F10R2_FB19 ((uint32_t)0x00080000) 3679 #define CAN_F10R2_FB20 ((uint32_t)0x00100000) 3680 #define CAN_F10R2_FB21 ((uint32_t)0x00200000) 3681 #define CAN_F10R2_FB22 ((uint32_t)0x00400000) 3682 #define CAN_F10R2_FB23 ((uint32_t)0x00800000) 3683 #define CAN_F10R2_FB24 ((uint32_t)0x01000000) 3684 #define CAN_F10R2_FB25 ((uint32_t)0x02000000) 3685 #define CAN_F10R2_FB26 ((uint32_t)0x04000000) 3686 #define CAN_F10R2_FB27 ((uint32_t)0x08000000) 3687 #define CAN_F10R2_FB28 ((uint32_t)0x10000000) 3688 #define CAN_F10R2_FB29 ((uint32_t)0x20000000) 3689 #define CAN_F10R2_FB30 ((uint32_t)0x40000000) 3690 #define CAN_F10R2_FB31 ((uint32_t)0x80000000) 3693 #define CAN_F11R2_FB0 ((uint32_t)0x00000001) 3694 #define CAN_F11R2_FB1 ((uint32_t)0x00000002) 3695 #define CAN_F11R2_FB2 ((uint32_t)0x00000004) 3696 #define CAN_F11R2_FB3 ((uint32_t)0x00000008) 3697 #define CAN_F11R2_FB4 ((uint32_t)0x00000010) 3698 #define CAN_F11R2_FB5 ((uint32_t)0x00000020) 3699 #define CAN_F11R2_FB6 ((uint32_t)0x00000040) 3700 #define CAN_F11R2_FB7 ((uint32_t)0x00000080) 3701 #define CAN_F11R2_FB8 ((uint32_t)0x00000100) 3702 #define CAN_F11R2_FB9 ((uint32_t)0x00000200) 3703 #define CAN_F11R2_FB10 ((uint32_t)0x00000400) 3704 #define CAN_F11R2_FB11 ((uint32_t)0x00000800) 3705 #define CAN_F11R2_FB12 ((uint32_t)0x00001000) 3706 #define CAN_F11R2_FB13 ((uint32_t)0x00002000) 3707 #define CAN_F11R2_FB14 ((uint32_t)0x00004000) 3708 #define CAN_F11R2_FB15 ((uint32_t)0x00008000) 3709 #define CAN_F11R2_FB16 ((uint32_t)0x00010000) 3710 #define CAN_F11R2_FB17 ((uint32_t)0x00020000) 3711 #define CAN_F11R2_FB18 ((uint32_t)0x00040000) 3712 #define CAN_F11R2_FB19 ((uint32_t)0x00080000) 3713 #define CAN_F11R2_FB20 ((uint32_t)0x00100000) 3714 #define CAN_F11R2_FB21 ((uint32_t)0x00200000) 3715 #define CAN_F11R2_FB22 ((uint32_t)0x00400000) 3716 #define CAN_F11R2_FB23 ((uint32_t)0x00800000) 3717 #define CAN_F11R2_FB24 ((uint32_t)0x01000000) 3718 #define CAN_F11R2_FB25 ((uint32_t)0x02000000) 3719 #define CAN_F11R2_FB26 ((uint32_t)0x04000000) 3720 #define CAN_F11R2_FB27 ((uint32_t)0x08000000) 3721 #define CAN_F11R2_FB28 ((uint32_t)0x10000000) 3722 #define CAN_F11R2_FB29 ((uint32_t)0x20000000) 3723 #define CAN_F11R2_FB30 ((uint32_t)0x40000000) 3724 #define CAN_F11R2_FB31 ((uint32_t)0x80000000) 3727 #define CAN_F12R2_FB0 ((uint32_t)0x00000001) 3728 #define CAN_F12R2_FB1 ((uint32_t)0x00000002) 3729 #define CAN_F12R2_FB2 ((uint32_t)0x00000004) 3730 #define CAN_F12R2_FB3 ((uint32_t)0x00000008) 3731 #define CAN_F12R2_FB4 ((uint32_t)0x00000010) 3732 #define CAN_F12R2_FB5 ((uint32_t)0x00000020) 3733 #define CAN_F12R2_FB6 ((uint32_t)0x00000040) 3734 #define CAN_F12R2_FB7 ((uint32_t)0x00000080) 3735 #define CAN_F12R2_FB8 ((uint32_t)0x00000100) 3736 #define CAN_F12R2_FB9 ((uint32_t)0x00000200) 3737 #define CAN_F12R2_FB10 ((uint32_t)0x00000400) 3738 #define CAN_F12R2_FB11 ((uint32_t)0x00000800) 3739 #define CAN_F12R2_FB12 ((uint32_t)0x00001000) 3740 #define CAN_F12R2_FB13 ((uint32_t)0x00002000) 3741 #define CAN_F12R2_FB14 ((uint32_t)0x00004000) 3742 #define CAN_F12R2_FB15 ((uint32_t)0x00008000) 3743 #define CAN_F12R2_FB16 ((uint32_t)0x00010000) 3744 #define CAN_F12R2_FB17 ((uint32_t)0x00020000) 3745 #define CAN_F12R2_FB18 ((uint32_t)0x00040000) 3746 #define CAN_F12R2_FB19 ((uint32_t)0x00080000) 3747 #define CAN_F12R2_FB20 ((uint32_t)0x00100000) 3748 #define CAN_F12R2_FB21 ((uint32_t)0x00200000) 3749 #define CAN_F12R2_FB22 ((uint32_t)0x00400000) 3750 #define CAN_F12R2_FB23 ((uint32_t)0x00800000) 3751 #define CAN_F12R2_FB24 ((uint32_t)0x01000000) 3752 #define CAN_F12R2_FB25 ((uint32_t)0x02000000) 3753 #define CAN_F12R2_FB26 ((uint32_t)0x04000000) 3754 #define CAN_F12R2_FB27 ((uint32_t)0x08000000) 3755 #define CAN_F12R2_FB28 ((uint32_t)0x10000000) 3756 #define CAN_F12R2_FB29 ((uint32_t)0x20000000) 3757 #define CAN_F12R2_FB30 ((uint32_t)0x40000000) 3758 #define CAN_F12R2_FB31 ((uint32_t)0x80000000) 3761 #define CAN_F13R2_FB0 ((uint32_t)0x00000001) 3762 #define CAN_F13R2_FB1 ((uint32_t)0x00000002) 3763 #define CAN_F13R2_FB2 ((uint32_t)0x00000004) 3764 #define CAN_F13R2_FB3 ((uint32_t)0x00000008) 3765 #define CAN_F13R2_FB4 ((uint32_t)0x00000010) 3766 #define CAN_F13R2_FB5 ((uint32_t)0x00000020) 3767 #define CAN_F13R2_FB6 ((uint32_t)0x00000040) 3768 #define CAN_F13R2_FB7 ((uint32_t)0x00000080) 3769 #define CAN_F13R2_FB8 ((uint32_t)0x00000100) 3770 #define CAN_F13R2_FB9 ((uint32_t)0x00000200) 3771 #define CAN_F13R2_FB10 ((uint32_t)0x00000400) 3772 #define CAN_F13R2_FB11 ((uint32_t)0x00000800) 3773 #define CAN_F13R2_FB12 ((uint32_t)0x00001000) 3774 #define CAN_F13R2_FB13 ((uint32_t)0x00002000) 3775 #define CAN_F13R2_FB14 ((uint32_t)0x00004000) 3776 #define CAN_F13R2_FB15 ((uint32_t)0x00008000) 3777 #define CAN_F13R2_FB16 ((uint32_t)0x00010000) 3778 #define CAN_F13R2_FB17 ((uint32_t)0x00020000) 3779 #define CAN_F13R2_FB18 ((uint32_t)0x00040000) 3780 #define CAN_F13R2_FB19 ((uint32_t)0x00080000) 3781 #define CAN_F13R2_FB20 ((uint32_t)0x00100000) 3782 #define CAN_F13R2_FB21 ((uint32_t)0x00200000) 3783 #define CAN_F13R2_FB22 ((uint32_t)0x00400000) 3784 #define CAN_F13R2_FB23 ((uint32_t)0x00800000) 3785 #define CAN_F13R2_FB24 ((uint32_t)0x01000000) 3786 #define CAN_F13R2_FB25 ((uint32_t)0x02000000) 3787 #define CAN_F13R2_FB26 ((uint32_t)0x04000000) 3788 #define CAN_F13R2_FB27 ((uint32_t)0x08000000) 3789 #define CAN_F13R2_FB28 ((uint32_t)0x10000000) 3790 #define CAN_F13R2_FB29 ((uint32_t)0x20000000) 3791 #define CAN_F13R2_FB30 ((uint32_t)0x40000000) 3792 #define CAN_F13R2_FB31 ((uint32_t)0x80000000) 3794 #if defined(STM32F446xx) 3802 #define CEC_CR_CECEN ((uint32_t)0x00000001) 3803 #define CEC_CR_TXSOM ((uint32_t)0x00000002) 3804 #define CEC_CR_TXEOM ((uint32_t)0x00000004) 3807 #define CEC_CFGR_SFT ((uint32_t)0x00000007) 3808 #define CEC_CFGR_RXTOL ((uint32_t)0x00000008) 3809 #define CEC_CFGR_BRESTP ((uint32_t)0x00000010) 3810 #define CEC_CFGR_BREGEN ((uint32_t)0x00000020) 3811 #define CEC_CFGR_LREGEN ((uint32_t)0x00000040) 3812 #define CEC_CFGR_SFTOPT ((uint32_t)0x00000100) 3813 #define CEC_CFGR_BRDNOGEN ((uint32_t)0x00000080) 3814 #define CEC_CFGR_OAR ((uint32_t)0x7FFF0000) 3815 #define CEC_CFGR_LSTN ((uint32_t)0x80000000) 3818 #define CEC_TXDR_TXD ((uint32_t)0x000000FF) 3821 #define CEC_TXDR_RXD ((uint32_t)0x000000FF) 3824 #define CEC_ISR_RXBR ((uint32_t)0x00000001) 3825 #define CEC_ISR_RXEND ((uint32_t)0x00000002) 3826 #define CEC_ISR_RXOVR ((uint32_t)0x00000004) 3827 #define CEC_ISR_BRE ((uint32_t)0x00000008) 3828 #define CEC_ISR_SBPE ((uint32_t)0x00000010) 3829 #define CEC_ISR_LBPE ((uint32_t)0x00000020) 3830 #define CEC_ISR_RXACKE ((uint32_t)0x00000040) 3831 #define CEC_ISR_ARBLST ((uint32_t)0x00000080) 3832 #define CEC_ISR_TXBR ((uint32_t)0x00000100) 3833 #define CEC_ISR_TXEND ((uint32_t)0x00000200) 3834 #define CEC_ISR_TXUDR ((uint32_t)0x00000400) 3835 #define CEC_ISR_TXERR ((uint32_t)0x00000800) 3836 #define CEC_ISR_TXACKE ((uint32_t)0x00001000) 3839 #define CEC_IER_RXBRIE ((uint32_t)0x00000001) 3840 #define CEC_IER_RXENDIE ((uint32_t)0x00000002) 3841 #define CEC_IER_RXOVRIE ((uint32_t)0x00000004) 3842 #define CEC_IER_BREIEIE ((uint32_t)0x00000008) 3843 #define CEC_IER_SBPEIE ((uint32_t)0x00000010) 3844 #define CEC_IER_LBPEIE ((uint32_t)0x00000020) 3845 #define CEC_IER_RXACKEIE ((uint32_t)0x00000040) 3846 #define CEC_IER_ARBLSTIE ((uint32_t)0x00000080) 3847 #define CEC_IER_TXBRIE ((uint32_t)0x00000100) 3848 #define CEC_IER_TXENDIE ((uint32_t)0x00000200) 3849 #define CEC_IER_TXUDRIE ((uint32_t)0x00000400) 3850 #define CEC_IER_TXERRIE ((uint32_t)0x00000800) 3851 #define CEC_IER_TXACKEIE ((uint32_t)0x00001000) 3860 #define CRC_DR_DR ((uint32_t)0xFFFFFFFF) 3864 #define CRC_IDR_IDR ((uint8_t)0xFF) 3868 #define CRC_CR_RESET ((uint8_t)0x01) 3876 #define CRYP_CR_ALGODIR ((uint32_t)0x00000004) 3878 #define CRYP_CR_ALGOMODE ((uint32_t)0x00080038) 3879 #define CRYP_CR_ALGOMODE_0 ((uint32_t)0x00000008) 3880 #define CRYP_CR_ALGOMODE_1 ((uint32_t)0x00000010) 3881 #define CRYP_CR_ALGOMODE_2 ((uint32_t)0x00000020) 3882 #define CRYP_CR_ALGOMODE_TDES_ECB ((uint32_t)0x00000000) 3883 #define CRYP_CR_ALGOMODE_TDES_CBC ((uint32_t)0x00000008) 3884 #define CRYP_CR_ALGOMODE_DES_ECB ((uint32_t)0x00000010) 3885 #define CRYP_CR_ALGOMODE_DES_CBC ((uint32_t)0x00000018) 3886 #define CRYP_CR_ALGOMODE_AES_ECB ((uint32_t)0x00000020) 3887 #define CRYP_CR_ALGOMODE_AES_CBC ((uint32_t)0x00000028) 3888 #define CRYP_CR_ALGOMODE_AES_CTR ((uint32_t)0x00000030) 3889 #define CRYP_CR_ALGOMODE_AES_KEY ((uint32_t)0x00000038) 3891 #define CRYP_CR_DATATYPE ((uint32_t)0x000000C0) 3892 #define CRYP_CR_DATATYPE_0 ((uint32_t)0x00000040) 3893 #define CRYP_CR_DATATYPE_1 ((uint32_t)0x00000080) 3894 #define CRYP_CR_KEYSIZE ((uint32_t)0x00000300) 3895 #define CRYP_CR_KEYSIZE_0 ((uint32_t)0x00000100) 3896 #define CRYP_CR_KEYSIZE_1 ((uint32_t)0x00000200) 3897 #define CRYP_CR_FFLUSH ((uint32_t)0x00004000) 3898 #define CRYP_CR_CRYPEN ((uint32_t)0x00008000) 3900 #define CRYP_CR_GCM_CCMPH ((uint32_t)0x00030000) 3901 #define CRYP_CR_GCM_CCMPH_0 ((uint32_t)0x00010000) 3902 #define CRYP_CR_GCM_CCMPH_1 ((uint32_t)0x00020000) 3903 #define CRYP_CR_ALGOMODE_3 ((uint32_t)0x00080000) 3906 #define CRYP_SR_IFEM ((uint32_t)0x00000001) 3907 #define CRYP_SR_IFNF ((uint32_t)0x00000002) 3908 #define CRYP_SR_OFNE ((uint32_t)0x00000004) 3909 #define CRYP_SR_OFFU ((uint32_t)0x00000008) 3910 #define CRYP_SR_BUSY ((uint32_t)0x00000010) 3912 #define CRYP_DMACR_DIEN ((uint32_t)0x00000001) 3913 #define CRYP_DMACR_DOEN ((uint32_t)0x00000002) 3915 #define CRYP_IMSCR_INIM ((uint32_t)0x00000001) 3916 #define CRYP_IMSCR_OUTIM ((uint32_t)0x00000002) 3918 #define CRYP_RISR_OUTRIS ((uint32_t)0x00000001) 3919 #define CRYP_RISR_INRIS ((uint32_t)0x00000002) 3921 #define CRYP_MISR_INMIS ((uint32_t)0x00000001) 3922 #define CRYP_MISR_OUTMIS ((uint32_t)0x00000002) 3930 #define DAC_CR_EN1 ((uint32_t)0x00000001) 3931 #define DAC_CR_BOFF1 ((uint32_t)0x00000002) 3932 #define DAC_CR_TEN1 ((uint32_t)0x00000004) 3934 #define DAC_CR_TSEL1 ((uint32_t)0x00000038) 3935 #define DAC_CR_TSEL1_0 ((uint32_t)0x00000008) 3936 #define DAC_CR_TSEL1_1 ((uint32_t)0x00000010) 3937 #define DAC_CR_TSEL1_2 ((uint32_t)0x00000020) 3939 #define DAC_CR_WAVE1 ((uint32_t)0x000000C0) 3940 #define DAC_CR_WAVE1_0 ((uint32_t)0x00000040) 3941 #define DAC_CR_WAVE1_1 ((uint32_t)0x00000080) 3943 #define DAC_CR_MAMP1 ((uint32_t)0x00000F00) 3944 #define DAC_CR_MAMP1_0 ((uint32_t)0x00000100) 3945 #define DAC_CR_MAMP1_1 ((uint32_t)0x00000200) 3946 #define DAC_CR_MAMP1_2 ((uint32_t)0x00000400) 3947 #define DAC_CR_MAMP1_3 ((uint32_t)0x00000800) 3949 #define DAC_CR_DMAEN1 ((uint32_t)0x00001000) 3950 #define DAC_CR_EN2 ((uint32_t)0x00010000) 3951 #define DAC_CR_BOFF2 ((uint32_t)0x00020000) 3952 #define DAC_CR_TEN2 ((uint32_t)0x00040000) 3954 #define DAC_CR_TSEL2 ((uint32_t)0x00380000) 3955 #define DAC_CR_TSEL2_0 ((uint32_t)0x00080000) 3956 #define DAC_CR_TSEL2_1 ((uint32_t)0x00100000) 3957 #define DAC_CR_TSEL2_2 ((uint32_t)0x00200000) 3959 #define DAC_CR_WAVE2 ((uint32_t)0x00C00000) 3960 #define DAC_CR_WAVE2_0 ((uint32_t)0x00400000) 3961 #define DAC_CR_WAVE2_1 ((uint32_t)0x00800000) 3963 #define DAC_CR_MAMP2 ((uint32_t)0x0F000000) 3964 #define DAC_CR_MAMP2_0 ((uint32_t)0x01000000) 3965 #define DAC_CR_MAMP2_1 ((uint32_t)0x02000000) 3966 #define DAC_CR_MAMP2_2 ((uint32_t)0x04000000) 3967 #define DAC_CR_MAMP2_3 ((uint32_t)0x08000000) 3969 #define DAC_CR_DMAEN2 ((uint32_t)0x10000000) 3972 #define DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) 3973 #define DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) 3976 #define DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) 3979 #define DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) 3982 #define DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) 3985 #define DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) 3988 #define DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) 3991 #define DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) 3994 #define DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) 3995 #define DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) 3998 #define DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) 3999 #define DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) 4002 #define DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) 4003 #define DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) 4006 #define DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) 4009 #define DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) 4012 #define DAC_SR_DMAUDR1 ((uint32_t)0x00002000) 4013 #define DAC_SR_DMAUDR2 ((uint32_t)0x20000000) 4027 #define DCMI_CR_CAPTURE ((uint32_t)0x00000001) 4028 #define DCMI_CR_CM ((uint32_t)0x00000002) 4029 #define DCMI_CR_CROP ((uint32_t)0x00000004) 4030 #define DCMI_CR_JPEG ((uint32_t)0x00000008) 4031 #define DCMI_CR_ESS ((uint32_t)0x00000010) 4032 #define DCMI_CR_PCKPOL ((uint32_t)0x00000020) 4033 #define DCMI_CR_HSPOL ((uint32_t)0x00000040) 4034 #define DCMI_CR_VSPOL ((uint32_t)0x00000080) 4035 #define DCMI_CR_FCRC_0 ((uint32_t)0x00000100) 4036 #define DCMI_CR_FCRC_1 ((uint32_t)0x00000200) 4037 #define DCMI_CR_EDM_0 ((uint32_t)0x00000400) 4038 #define DCMI_CR_EDM_1 ((uint32_t)0x00000800) 4039 #define DCMI_CR_CRE ((uint32_t)0x00001000) 4040 #define DCMI_CR_ENABLE ((uint32_t)0x00004000) 4043 #define DCMI_SR_HSYNC ((uint32_t)0x00000001) 4044 #define DCMI_SR_VSYNC ((uint32_t)0x00000002) 4045 #define DCMI_SR_FNE ((uint32_t)0x00000004) 4048 #define DCMI_RISR_FRAME_RIS ((uint32_t)0x00000001) 4049 #define DCMI_RISR_OVF_RIS ((uint32_t)0x00000002) 4050 #define DCMI_RISR_ERR_RIS ((uint32_t)0x00000004) 4051 #define DCMI_RISR_VSYNC_RIS ((uint32_t)0x00000008) 4052 #define DCMI_RISR_LINE_RIS ((uint32_t)0x00000010) 4055 #define DCMI_IER_FRAME_IE ((uint32_t)0x00000001) 4056 #define DCMI_IER_OVF_IE ((uint32_t)0x00000002) 4057 #define DCMI_IER_ERR_IE ((uint32_t)0x00000004) 4058 #define DCMI_IER_VSYNC_IE ((uint32_t)0x00000008) 4059 #define DCMI_IER_LINE_IE ((uint32_t)0x00000010) 4062 #define DCMI_MISR_FRAME_MIS ((uint32_t)0x00000001) 4063 #define DCMI_MISR_OVF_MIS ((uint32_t)0x00000002) 4064 #define DCMI_MISR_ERR_MIS ((uint32_t)0x00000004) 4065 #define DCMI_MISR_VSYNC_MIS ((uint32_t)0x00000008) 4066 #define DCMI_MISR_LINE_MIS ((uint32_t)0x00000010) 4069 #define DCMI_ICR_FRAME_ISC ((uint32_t)0x00000001) 4070 #define DCMI_ICR_OVF_ISC ((uint32_t)0x00000002) 4071 #define DCMI_ICR_ERR_ISC ((uint32_t)0x00000004) 4072 #define DCMI_ICR_VSYNC_ISC ((uint32_t)0x00000008) 4073 #define DCMI_ICR_LINE_ISC ((uint32_t)0x00000010) 4081 #define DMA_SxCR_CHSEL ((uint32_t)0x0E000000) 4082 #define DMA_SxCR_CHSEL_0 ((uint32_t)0x02000000) 4083 #define DMA_SxCR_CHSEL_1 ((uint32_t)0x04000000) 4084 #define DMA_SxCR_CHSEL_2 ((uint32_t)0x08000000) 4085 #define DMA_SxCR_MBURST ((uint32_t)0x01800000) 4086 #define DMA_SxCR_MBURST_0 ((uint32_t)0x00800000) 4087 #define DMA_SxCR_MBURST_1 ((uint32_t)0x01000000) 4088 #define DMA_SxCR_PBURST ((uint32_t)0x00600000) 4089 #define DMA_SxCR_PBURST_0 ((uint32_t)0x00200000) 4090 #define DMA_SxCR_PBURST_1 ((uint32_t)0x00400000) 4091 #define DMA_SxCR_ACK ((uint32_t)0x00100000) 4092 #define DMA_SxCR_CT ((uint32_t)0x00080000) 4093 #define DMA_SxCR_DBM ((uint32_t)0x00040000) 4094 #define DMA_SxCR_PL ((uint32_t)0x00030000) 4095 #define DMA_SxCR_PL_0 ((uint32_t)0x00010000) 4096 #define DMA_SxCR_PL_1 ((uint32_t)0x00020000) 4097 #define DMA_SxCR_PINCOS ((uint32_t)0x00008000) 4098 #define DMA_SxCR_MSIZE ((uint32_t)0x00006000) 4099 #define DMA_SxCR_MSIZE_0 ((uint32_t)0x00002000) 4100 #define DMA_SxCR_MSIZE_1 ((uint32_t)0x00004000) 4101 #define DMA_SxCR_PSIZE ((uint32_t)0x00001800) 4102 #define DMA_SxCR_PSIZE_0 ((uint32_t)0x00000800) 4103 #define DMA_SxCR_PSIZE_1 ((uint32_t)0x00001000) 4104 #define DMA_SxCR_MINC ((uint32_t)0x00000400) 4105 #define DMA_SxCR_PINC ((uint32_t)0x00000200) 4106 #define DMA_SxCR_CIRC ((uint32_t)0x00000100) 4107 #define DMA_SxCR_DIR ((uint32_t)0x000000C0) 4108 #define DMA_SxCR_DIR_0 ((uint32_t)0x00000040) 4109 #define DMA_SxCR_DIR_1 ((uint32_t)0x00000080) 4110 #define DMA_SxCR_PFCTRL ((uint32_t)0x00000020) 4111 #define DMA_SxCR_TCIE ((uint32_t)0x00000010) 4112 #define DMA_SxCR_HTIE ((uint32_t)0x00000008) 4113 #define DMA_SxCR_TEIE ((uint32_t)0x00000004) 4114 #define DMA_SxCR_DMEIE ((uint32_t)0x00000002) 4115 #define DMA_SxCR_EN ((uint32_t)0x00000001) 4118 #define DMA_SxNDT ((uint32_t)0x0000FFFF) 4119 #define DMA_SxNDT_0 ((uint32_t)0x00000001) 4120 #define DMA_SxNDT_1 ((uint32_t)0x00000002) 4121 #define DMA_SxNDT_2 ((uint32_t)0x00000004) 4122 #define DMA_SxNDT_3 ((uint32_t)0x00000008) 4123 #define DMA_SxNDT_4 ((uint32_t)0x00000010) 4124 #define DMA_SxNDT_5 ((uint32_t)0x00000020) 4125 #define DMA_SxNDT_6 ((uint32_t)0x00000040) 4126 #define DMA_SxNDT_7 ((uint32_t)0x00000080) 4127 #define DMA_SxNDT_8 ((uint32_t)0x00000100) 4128 #define DMA_SxNDT_9 ((uint32_t)0x00000200) 4129 #define DMA_SxNDT_10 ((uint32_t)0x00000400) 4130 #define DMA_SxNDT_11 ((uint32_t)0x00000800) 4131 #define DMA_SxNDT_12 ((uint32_t)0x00001000) 4132 #define DMA_SxNDT_13 ((uint32_t)0x00002000) 4133 #define DMA_SxNDT_14 ((uint32_t)0x00004000) 4134 #define DMA_SxNDT_15 ((uint32_t)0x00008000) 4137 #define DMA_SxFCR_FEIE ((uint32_t)0x00000080) 4138 #define DMA_SxFCR_FS ((uint32_t)0x00000038) 4139 #define DMA_SxFCR_FS_0 ((uint32_t)0x00000008) 4140 #define DMA_SxFCR_FS_1 ((uint32_t)0x00000010) 4141 #define DMA_SxFCR_FS_2 ((uint32_t)0x00000020) 4142 #define DMA_SxFCR_DMDIS ((uint32_t)0x00000004) 4143 #define DMA_SxFCR_FTH ((uint32_t)0x00000003) 4144 #define DMA_SxFCR_FTH_0 ((uint32_t)0x00000001) 4145 #define DMA_SxFCR_FTH_1 ((uint32_t)0x00000002) 4148 #define DMA_LISR_TCIF3 ((uint32_t)0x08000000) 4149 #define DMA_LISR_HTIF3 ((uint32_t)0x04000000) 4150 #define DMA_LISR_TEIF3 ((uint32_t)0x02000000) 4151 #define DMA_LISR_DMEIF3 ((uint32_t)0x01000000) 4152 #define DMA_LISR_FEIF3 ((uint32_t)0x00400000) 4153 #define DMA_LISR_TCIF2 ((uint32_t)0x00200000) 4154 #define DMA_LISR_HTIF2 ((uint32_t)0x00100000) 4155 #define DMA_LISR_TEIF2 ((uint32_t)0x00080000) 4156 #define DMA_LISR_DMEIF2 ((uint32_t)0x00040000) 4157 #define DMA_LISR_FEIF2 ((uint32_t)0x00010000) 4158 #define DMA_LISR_TCIF1 ((uint32_t)0x00000800) 4159 #define DMA_LISR_HTIF1 ((uint32_t)0x00000400) 4160 #define DMA_LISR_TEIF1 ((uint32_t)0x00000200) 4161 #define DMA_LISR_DMEIF1 ((uint32_t)0x00000100) 4162 #define DMA_LISR_FEIF1 ((uint32_t)0x00000040) 4163 #define DMA_LISR_TCIF0 ((uint32_t)0x00000020) 4164 #define DMA_LISR_HTIF0 ((uint32_t)0x00000010) 4165 #define DMA_LISR_TEIF0 ((uint32_t)0x00000008) 4166 #define DMA_LISR_DMEIF0 ((uint32_t)0x00000004) 4167 #define DMA_LISR_FEIF0 ((uint32_t)0x00000001) 4170 #define DMA_HISR_TCIF7 ((uint32_t)0x08000000) 4171 #define DMA_HISR_HTIF7 ((uint32_t)0x04000000) 4172 #define DMA_HISR_TEIF7 ((uint32_t)0x02000000) 4173 #define DMA_HISR_DMEIF7 ((uint32_t)0x01000000) 4174 #define DMA_HISR_FEIF7 ((uint32_t)0x00400000) 4175 #define DMA_HISR_TCIF6 ((uint32_t)0x00200000) 4176 #define DMA_HISR_HTIF6 ((uint32_t)0x00100000) 4177 #define DMA_HISR_TEIF6 ((uint32_t)0x00080000) 4178 #define DMA_HISR_DMEIF6 ((uint32_t)0x00040000) 4179 #define DMA_HISR_FEIF6 ((uint32_t)0x00010000) 4180 #define DMA_HISR_TCIF5 ((uint32_t)0x00000800) 4181 #define DMA_HISR_HTIF5 ((uint32_t)0x00000400) 4182 #define DMA_HISR_TEIF5 ((uint32_t)0x00000200) 4183 #define DMA_HISR_DMEIF5 ((uint32_t)0x00000100) 4184 #define DMA_HISR_FEIF5 ((uint32_t)0x00000040) 4185 #define DMA_HISR_TCIF4 ((uint32_t)0x00000020) 4186 #define DMA_HISR_HTIF4 ((uint32_t)0x00000010) 4187 #define DMA_HISR_TEIF4 ((uint32_t)0x00000008) 4188 #define DMA_HISR_DMEIF4 ((uint32_t)0x00000004) 4189 #define DMA_HISR_FEIF4 ((uint32_t)0x00000001) 4192 #define DMA_LIFCR_CTCIF3 ((uint32_t)0x08000000) 4193 #define DMA_LIFCR_CHTIF3 ((uint32_t)0x04000000) 4194 #define DMA_LIFCR_CTEIF3 ((uint32_t)0x02000000) 4195 #define DMA_LIFCR_CDMEIF3 ((uint32_t)0x01000000) 4196 #define DMA_LIFCR_CFEIF3 ((uint32_t)0x00400000) 4197 #define DMA_LIFCR_CTCIF2 ((uint32_t)0x00200000) 4198 #define DMA_LIFCR_CHTIF2 ((uint32_t)0x00100000) 4199 #define DMA_LIFCR_CTEIF2 ((uint32_t)0x00080000) 4200 #define DMA_LIFCR_CDMEIF2 ((uint32_t)0x00040000) 4201 #define DMA_LIFCR_CFEIF2 ((uint32_t)0x00010000) 4202 #define DMA_LIFCR_CTCIF1 ((uint32_t)0x00000800) 4203 #define DMA_LIFCR_CHTIF1 ((uint32_t)0x00000400) 4204 #define DMA_LIFCR_CTEIF1 ((uint32_t)0x00000200) 4205 #define DMA_LIFCR_CDMEIF1 ((uint32_t)0x00000100) 4206 #define DMA_LIFCR_CFEIF1 ((uint32_t)0x00000040) 4207 #define DMA_LIFCR_CTCIF0 ((uint32_t)0x00000020) 4208 #define DMA_LIFCR_CHTIF0 ((uint32_t)0x00000010) 4209 #define DMA_LIFCR_CTEIF0 ((uint32_t)0x00000008) 4210 #define DMA_LIFCR_CDMEIF0 ((uint32_t)0x00000004) 4211 #define DMA_LIFCR_CFEIF0 ((uint32_t)0x00000001) 4214 #define DMA_HIFCR_CTCIF7 ((uint32_t)0x08000000) 4215 #define DMA_HIFCR_CHTIF7 ((uint32_t)0x04000000) 4216 #define DMA_HIFCR_CTEIF7 ((uint32_t)0x02000000) 4217 #define DMA_HIFCR_CDMEIF7 ((uint32_t)0x01000000) 4218 #define DMA_HIFCR_CFEIF7 ((uint32_t)0x00400000) 4219 #define DMA_HIFCR_CTCIF6 ((uint32_t)0x00200000) 4220 #define DMA_HIFCR_CHTIF6 ((uint32_t)0x00100000) 4221 #define DMA_HIFCR_CTEIF6 ((uint32_t)0x00080000) 4222 #define DMA_HIFCR_CDMEIF6 ((uint32_t)0x00040000) 4223 #define DMA_HIFCR_CFEIF6 ((uint32_t)0x00010000) 4224 #define DMA_HIFCR_CTCIF5 ((uint32_t)0x00000800) 4225 #define DMA_HIFCR_CHTIF5 ((uint32_t)0x00000400) 4226 #define DMA_HIFCR_CTEIF5 ((uint32_t)0x00000200) 4227 #define DMA_HIFCR_CDMEIF5 ((uint32_t)0x00000100) 4228 #define DMA_HIFCR_CFEIF5 ((uint32_t)0x00000040) 4229 #define DMA_HIFCR_CTCIF4 ((uint32_t)0x00000020) 4230 #define DMA_HIFCR_CHTIF4 ((uint32_t)0x00000010) 4231 #define DMA_HIFCR_CTEIF4 ((uint32_t)0x00000008) 4232 #define DMA_HIFCR_CDMEIF4 ((uint32_t)0x00000004) 4233 #define DMA_HIFCR_CFEIF4 ((uint32_t)0x00000001) 4243 #define DMA2D_CR_START ((uint32_t)0x00000001) 4244 #define DMA2D_CR_SUSP ((uint32_t)0x00000002) 4245 #define DMA2D_CR_ABORT ((uint32_t)0x00000004) 4246 #define DMA2D_CR_TEIE ((uint32_t)0x00000100) 4247 #define DMA2D_CR_TCIE ((uint32_t)0x00000200) 4248 #define DMA2D_CR_TWIE ((uint32_t)0x00000400) 4249 #define DMA2D_CR_CAEIE ((uint32_t)0x00000800) 4250 #define DMA2D_CR_CTCIE ((uint32_t)0x00001000) 4251 #define DMA2D_CR_CEIE ((uint32_t)0x00002000) 4252 #define DMA2D_CR_MODE ((uint32_t)0x00030000) 4256 #define DMA2D_ISR_TEIF ((uint32_t)0x00000001) 4257 #define DMA2D_ISR_TCIF ((uint32_t)0x00000002) 4258 #define DMA2D_ISR_TWIF ((uint32_t)0x00000004) 4259 #define DMA2D_ISR_CAEIF ((uint32_t)0x00000008) 4260 #define DMA2D_ISR_CTCIF ((uint32_t)0x00000010) 4261 #define DMA2D_ISR_CEIF ((uint32_t)0x00000020) 4265 #define DMA2D_IFSR_CTEIF ((uint32_t)0x00000001) 4266 #define DMA2D_IFSR_CTCIF ((uint32_t)0x00000002) 4267 #define DMA2D_IFSR_CTWIF ((uint32_t)0x00000004) 4268 #define DMA2D_IFSR_CCAEIF ((uint32_t)0x00000008) 4269 #define DMA2D_IFSR_CCTCIF ((uint32_t)0x00000010) 4270 #define DMA2D_IFSR_CCEIF ((uint32_t)0x00000020) 4274 #define DMA2D_FGMAR_MA ((uint32_t)0xFFFFFFFF) 4278 #define DMA2D_FGOR_LO ((uint32_t)0x00003FFF) 4282 #define DMA2D_BGMAR_MA ((uint32_t)0xFFFFFFFF) 4286 #define DMA2D_BGOR_LO ((uint32_t)0x00003FFF) 4290 #define DMA2D_FGPFCCR_CM ((uint32_t)0x0000000F) 4291 #define DMA2D_FGPFCCR_CCM ((uint32_t)0x00000010) 4292 #define DMA2D_FGPFCCR_START ((uint32_t)0x00000020) 4293 #define DMA2D_FGPFCCR_CS ((uint32_t)0x0000FF00) 4294 #define DMA2D_FGPFCCR_AM ((uint32_t)0x00030000) 4295 #define DMA2D_FGPFCCR_ALPHA ((uint32_t)0xFF000000) 4299 #define DMA2D_FGCOLR_BLUE ((uint32_t)0x000000FF) 4300 #define DMA2D_FGCOLR_GREEN ((uint32_t)0x0000FF00) 4301 #define DMA2D_FGCOLR_RED ((uint32_t)0x00FF0000) 4305 #define DMA2D_BGPFCCR_CM ((uint32_t)0x0000000F) 4306 #define DMA2D_BGPFCCR_CCM ((uint32_t)0x00000010) 4307 #define DMA2D_BGPFCCR_START ((uint32_t)0x00000020) 4308 #define DMA2D_BGPFCCR_CS ((uint32_t)0x0000FF00) 4309 #define DMA2D_BGPFCCR_AM ((uint32_t)0x00030000) 4310 #define DMA2D_BGPFCCR_ALPHA ((uint32_t)0xFF000000) 4314 #define DMA2D_BGCOLR_BLUE ((uint32_t)0x000000FF) 4315 #define DMA2D_BGCOLR_GREEN ((uint32_t)0x0000FF00) 4316 #define DMA2D_BGCOLR_RED ((uint32_t)0x00FF0000) 4320 #define DMA2D_FGCMAR_MA ((uint32_t)0xFFFFFFFF) 4324 #define DMA2D_BGCMAR_MA ((uint32_t)0xFFFFFFFF) 4328 #define DMA2D_OPFCCR_CM ((uint32_t)0x00000007) 4334 #define DMA2D_OCOLR_BLUE_1 ((uint32_t)0x000000FF) 4335 #define DMA2D_OCOLR_GREEN_1 ((uint32_t)0x0000FF00) 4336 #define DMA2D_OCOLR_RED_1 ((uint32_t)0x00FF0000) 4337 #define DMA2D_OCOLR_ALPHA_1 ((uint32_t)0xFF000000) 4340 #define DMA2D_OCOLR_BLUE_2 ((uint32_t)0x0000001F) 4341 #define DMA2D_OCOLR_GREEN_2 ((uint32_t)0x000007E0) 4342 #define DMA2D_OCOLR_RED_2 ((uint32_t)0x0000F800) 4345 #define DMA2D_OCOLR_BLUE_3 ((uint32_t)0x0000001F) 4346 #define DMA2D_OCOLR_GREEN_3 ((uint32_t)0x000003E0) 4347 #define DMA2D_OCOLR_RED_3 ((uint32_t)0x00007C00) 4348 #define DMA2D_OCOLR_ALPHA_3 ((uint32_t)0x00008000) 4351 #define DMA2D_OCOLR_BLUE_4 ((uint32_t)0x0000000F) 4352 #define DMA2D_OCOLR_GREEN_4 ((uint32_t)0x000000F0) 4353 #define DMA2D_OCOLR_RED_4 ((uint32_t)0x00000F00) 4354 #define DMA2D_OCOLR_ALPHA_4 ((uint32_t)0x0000F000) 4358 #define DMA2D_OMAR_MA ((uint32_t)0xFFFFFFFF) 4362 #define DMA2D_OOR_LO ((uint32_t)0x00003FFF) 4366 #define DMA2D_NLR_NL ((uint32_t)0x0000FFFF) 4367 #define DMA2D_NLR_PL ((uint32_t)0x3FFF0000) 4371 #define DMA2D_LWR_LW ((uint32_t)0x0000FFFF) 4375 #define DMA2D_AMTCR_EN ((uint32_t)0x00000001) 4376 #define DMA2D_AMTCR_DT ((uint32_t)0x0000FF00) 4391 #define EXTI_IMR_MR0 ((uint32_t)0x00000001) 4392 #define EXTI_IMR_MR1 ((uint32_t)0x00000002) 4393 #define EXTI_IMR_MR2 ((uint32_t)0x00000004) 4394 #define EXTI_IMR_MR3 ((uint32_t)0x00000008) 4395 #define EXTI_IMR_MR4 ((uint32_t)0x00000010) 4396 #define EXTI_IMR_MR5 ((uint32_t)0x00000020) 4397 #define EXTI_IMR_MR6 ((uint32_t)0x00000040) 4398 #define EXTI_IMR_MR7 ((uint32_t)0x00000080) 4399 #define EXTI_IMR_MR8 ((uint32_t)0x00000100) 4400 #define EXTI_IMR_MR9 ((uint32_t)0x00000200) 4401 #define EXTI_IMR_MR10 ((uint32_t)0x00000400) 4402 #define EXTI_IMR_MR11 ((uint32_t)0x00000800) 4403 #define EXTI_IMR_MR12 ((uint32_t)0x00001000) 4404 #define EXTI_IMR_MR13 ((uint32_t)0x00002000) 4405 #define EXTI_IMR_MR14 ((uint32_t)0x00004000) 4406 #define EXTI_IMR_MR15 ((uint32_t)0x00008000) 4407 #define EXTI_IMR_MR16 ((uint32_t)0x00010000) 4408 #define EXTI_IMR_MR17 ((uint32_t)0x00020000) 4409 #define EXTI_IMR_MR18 ((uint32_t)0x00040000) 4410 #define EXTI_IMR_MR19 ((uint32_t)0x00080000) 4411 #define EXTI_IMR_MR23 ((uint32_t)0x00800000) 4414 #define EXTI_EMR_MR0 ((uint32_t)0x00000001) 4415 #define EXTI_EMR_MR1 ((uint32_t)0x00000002) 4416 #define EXTI_EMR_MR2 ((uint32_t)0x00000004) 4417 #define EXTI_EMR_MR3 ((uint32_t)0x00000008) 4418 #define EXTI_EMR_MR4 ((uint32_t)0x00000010) 4419 #define EXTI_EMR_MR5 ((uint32_t)0x00000020) 4420 #define EXTI_EMR_MR6 ((uint32_t)0x00000040) 4421 #define EXTI_EMR_MR7 ((uint32_t)0x00000080) 4422 #define EXTI_EMR_MR8 ((uint32_t)0x00000100) 4423 #define EXTI_EMR_MR9 ((uint32_t)0x00000200) 4424 #define EXTI_EMR_MR10 ((uint32_t)0x00000400) 4425 #define EXTI_EMR_MR11 ((uint32_t)0x00000800) 4426 #define EXTI_EMR_MR12 ((uint32_t)0x00001000) 4427 #define EXTI_EMR_MR13 ((uint32_t)0x00002000) 4428 #define EXTI_EMR_MR14 ((uint32_t)0x00004000) 4429 #define EXTI_EMR_MR15 ((uint32_t)0x00008000) 4430 #define EXTI_EMR_MR16 ((uint32_t)0x00010000) 4431 #define EXTI_EMR_MR17 ((uint32_t)0x00020000) 4432 #define EXTI_EMR_MR18 ((uint32_t)0x00040000) 4433 #define EXTI_EMR_MR19 ((uint32_t)0x00080000) 4434 #define EXTI_EMR_MR23 ((uint32_t)0x00800000) 4437 #define EXTI_RTSR_TR0 ((uint32_t)0x00000001) 4438 #define EXTI_RTSR_TR1 ((uint32_t)0x00000002) 4439 #define EXTI_RTSR_TR2 ((uint32_t)0x00000004) 4440 #define EXTI_RTSR_TR3 ((uint32_t)0x00000008) 4441 #define EXTI_RTSR_TR4 ((uint32_t)0x00000010) 4442 #define EXTI_RTSR_TR5 ((uint32_t)0x00000020) 4443 #define EXTI_RTSR_TR6 ((uint32_t)0x00000040) 4444 #define EXTI_RTSR_TR7 ((uint32_t)0x00000080) 4445 #define EXTI_RTSR_TR8 ((uint32_t)0x00000100) 4446 #define EXTI_RTSR_TR9 ((uint32_t)0x00000200) 4447 #define EXTI_RTSR_TR10 ((uint32_t)0x00000400) 4448 #define EXTI_RTSR_TR11 ((uint32_t)0x00000800) 4449 #define EXTI_RTSR_TR12 ((uint32_t)0x00001000) 4450 #define EXTI_RTSR_TR13 ((uint32_t)0x00002000) 4451 #define EXTI_RTSR_TR14 ((uint32_t)0x00004000) 4452 #define EXTI_RTSR_TR15 ((uint32_t)0x00008000) 4453 #define EXTI_RTSR_TR16 ((uint32_t)0x00010000) 4454 #define EXTI_RTSR_TR17 ((uint32_t)0x00020000) 4455 #define EXTI_RTSR_TR18 ((uint32_t)0x00040000) 4456 #define EXTI_RTSR_TR19 ((uint32_t)0x00080000) 4457 #define EXTI_RTSR_TR23 ((uint32_t)0x00800000) 4460 #define EXTI_FTSR_TR0 ((uint32_t)0x00000001) 4461 #define EXTI_FTSR_TR1 ((uint32_t)0x00000002) 4462 #define EXTI_FTSR_TR2 ((uint32_t)0x00000004) 4463 #define EXTI_FTSR_TR3 ((uint32_t)0x00000008) 4464 #define EXTI_FTSR_TR4 ((uint32_t)0x00000010) 4465 #define EXTI_FTSR_TR5 ((uint32_t)0x00000020) 4466 #define EXTI_FTSR_TR6 ((uint32_t)0x00000040) 4467 #define EXTI_FTSR_TR7 ((uint32_t)0x00000080) 4468 #define EXTI_FTSR_TR8 ((uint32_t)0x00000100) 4469 #define EXTI_FTSR_TR9 ((uint32_t)0x00000200) 4470 #define EXTI_FTSR_TR10 ((uint32_t)0x00000400) 4471 #define EXTI_FTSR_TR11 ((uint32_t)0x00000800) 4472 #define EXTI_FTSR_TR12 ((uint32_t)0x00001000) 4473 #define EXTI_FTSR_TR13 ((uint32_t)0x00002000) 4474 #define EXTI_FTSR_TR14 ((uint32_t)0x00004000) 4475 #define EXTI_FTSR_TR15 ((uint32_t)0x00008000) 4476 #define EXTI_FTSR_TR16 ((uint32_t)0x00010000) 4477 #define EXTI_FTSR_TR17 ((uint32_t)0x00020000) 4478 #define EXTI_FTSR_TR18 ((uint32_t)0x00040000) 4479 #define EXTI_FTSR_TR19 ((uint32_t)0x00080000) 4480 #define EXTI_FTSR_TR23 ((uint32_t)0x00800000) 4483 #define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) 4484 #define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) 4485 #define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) 4486 #define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) 4487 #define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) 4488 #define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) 4489 #define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) 4490 #define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) 4491 #define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) 4492 #define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) 4493 #define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) 4494 #define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) 4495 #define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) 4496 #define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) 4497 #define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) 4498 #define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) 4499 #define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) 4500 #define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) 4501 #define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) 4502 #define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) 4503 #define EXTI_SWIER_SWIER23 ((uint32_t)0x00800000) 4506 #define EXTI_PR_PR0 ((uint32_t)0x00000001) 4507 #define EXTI_PR_PR1 ((uint32_t)0x00000002) 4508 #define EXTI_PR_PR2 ((uint32_t)0x00000004) 4509 #define EXTI_PR_PR3 ((uint32_t)0x00000008) 4510 #define EXTI_PR_PR4 ((uint32_t)0x00000010) 4511 #define EXTI_PR_PR5 ((uint32_t)0x00000020) 4512 #define EXTI_PR_PR6 ((uint32_t)0x00000040) 4513 #define EXTI_PR_PR7 ((uint32_t)0x00000080) 4514 #define EXTI_PR_PR8 ((uint32_t)0x00000100) 4515 #define EXTI_PR_PR9 ((uint32_t)0x00000200) 4516 #define EXTI_PR_PR10 ((uint32_t)0x00000400) 4517 #define EXTI_PR_PR11 ((uint32_t)0x00000800) 4518 #define EXTI_PR_PR12 ((uint32_t)0x00001000) 4519 #define EXTI_PR_PR13 ((uint32_t)0x00002000) 4520 #define EXTI_PR_PR14 ((uint32_t)0x00004000) 4521 #define EXTI_PR_PR15 ((uint32_t)0x00008000) 4522 #define EXTI_PR_PR16 ((uint32_t)0x00010000) 4523 #define EXTI_PR_PR17 ((uint32_t)0x00020000) 4524 #define EXTI_PR_PR18 ((uint32_t)0x00040000) 4525 #define EXTI_PR_PR19 ((uint32_t)0x00080000) 4526 #define EXTI_PR_PR23 ((uint32_t)0x00800000) 4534 #define FLASH_ACR_LATENCY ((uint32_t)0x0000000F) 4535 #define FLASH_ACR_LATENCY_0WS ((uint32_t)0x00000000) 4536 #define FLASH_ACR_LATENCY_1WS ((uint32_t)0x00000001) 4537 #define FLASH_ACR_LATENCY_2WS ((uint32_t)0x00000002) 4538 #define FLASH_ACR_LATENCY_3WS ((uint32_t)0x00000003) 4539 #define FLASH_ACR_LATENCY_4WS ((uint32_t)0x00000004) 4540 #define FLASH_ACR_LATENCY_5WS ((uint32_t)0x00000005) 4541 #define FLASH_ACR_LATENCY_6WS ((uint32_t)0x00000006) 4542 #define FLASH_ACR_LATENCY_7WS ((uint32_t)0x00000007) 4543 #define FLASH_ACR_LATENCY_8WS ((uint32_t)0x00000008) 4544 #define FLASH_ACR_LATENCY_9WS ((uint32_t)0x00000009) 4545 #define FLASH_ACR_LATENCY_10WS ((uint32_t)0x0000000A) 4546 #define FLASH_ACR_LATENCY_11WS ((uint32_t)0x0000000B) 4547 #define FLASH_ACR_LATENCY_12WS ((uint32_t)0x0000000C) 4548 #define FLASH_ACR_LATENCY_13WS ((uint32_t)0x0000000D) 4549 #define FLASH_ACR_LATENCY_14WS ((uint32_t)0x0000000E) 4550 #define FLASH_ACR_LATENCY_15WS ((uint32_t)0x0000000F) 4552 #define FLASH_ACR_PRFTEN ((uint32_t)0x00000100) 4553 #define FLASH_ACR_ICEN ((uint32_t)0x00000200) 4554 #define FLASH_ACR_DCEN ((uint32_t)0x00000400) 4555 #define FLASH_ACR_ICRST ((uint32_t)0x00000800) 4556 #define FLASH_ACR_DCRST ((uint32_t)0x00001000) 4557 #define FLASH_ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00) 4558 #define FLASH_ACR_BYTE2_ADDRESS ((uint32_t)0x40023C03) 4561 #define FLASH_SR_EOP ((uint32_t)0x00000001) 4562 #define FLASH_SR_SOP ((uint32_t)0x00000002) 4563 #define FLASH_SR_WRPERR ((uint32_t)0x00000010) 4564 #define FLASH_SR_PGAERR ((uint32_t)0x00000020) 4565 #define FLASH_SR_PGPERR ((uint32_t)0x00000040) 4566 #define FLASH_SR_PGSERR ((uint32_t)0x00000080) 4567 #define FLASH_SR_BSY ((uint32_t)0x00010000) 4570 #define FLASH_CR_PG ((uint32_t)0x00000001) 4571 #define FLASH_CR_SER ((uint32_t)0x00000002) 4572 #define FLASH_CR_MER ((uint32_t)0x00000004) 4573 #define FLASH_CR_MER1 FLASH_CR_MER 4574 #define FLASH_CR_SNB ((uint32_t)0x000000F8) 4575 #define FLASH_CR_SNB_0 ((uint32_t)0x00000008) 4576 #define FLASH_CR_SNB_1 ((uint32_t)0x00000010) 4577 #define FLASH_CR_SNB_2 ((uint32_t)0x00000020) 4578 #define FLASH_CR_SNB_3 ((uint32_t)0x00000040) 4579 #define FLASH_CR_SNB_4 ((uint32_t)0x00000040) 4580 #define FLASH_CR_PSIZE ((uint32_t)0x00000300) 4581 #define FLASH_CR_PSIZE_0 ((uint32_t)0x00000100) 4582 #define FLASH_CR_PSIZE_1 ((uint32_t)0x00000200) 4583 #define FLASH_CR_MER2 ((uint32_t)0x00008000) 4584 #define FLASH_CR_STRT ((uint32_t)0x00010000) 4585 #define FLASH_CR_EOPIE ((uint32_t)0x01000000) 4586 #define FLASH_CR_LOCK ((uint32_t)0x80000000) 4589 #define FLASH_OPTCR_OPTLOCK ((uint32_t)0x00000001) 4590 #define FLASH_OPTCR_OPTSTRT ((uint32_t)0x00000002) 4591 #define FLASH_OPTCR_BOR_LEV_0 ((uint32_t)0x00000004) 4592 #define FLASH_OPTCR_BOR_LEV_1 ((uint32_t)0x00000008) 4593 #define FLASH_OPTCR_BOR_LEV ((uint32_t)0x0000000C) 4594 #define FLASH_OPTCR_BFB2 ((uint32_t)0x00000010) 4596 #define FLASH_OPTCR_WDG_SW ((uint32_t)0x00000020) 4597 #define FLASH_OPTCR_nRST_STOP ((uint32_t)0x00000040) 4598 #define FLASH_OPTCR_nRST_STDBY ((uint32_t)0x00000080) 4599 #define FLASH_OPTCR_RDP ((uint32_t)0x0000FF00) 4600 #define FLASH_OPTCR_RDP_0 ((uint32_t)0x00000100) 4601 #define FLASH_OPTCR_RDP_1 ((uint32_t)0x00000200) 4602 #define FLASH_OPTCR_RDP_2 ((uint32_t)0x00000400) 4603 #define FLASH_OPTCR_RDP_3 ((uint32_t)0x00000800) 4604 #define FLASH_OPTCR_RDP_4 ((uint32_t)0x00001000) 4605 #define FLASH_OPTCR_RDP_5 ((uint32_t)0x00002000) 4606 #define FLASH_OPTCR_RDP_6 ((uint32_t)0x00004000) 4607 #define FLASH_OPTCR_RDP_7 ((uint32_t)0x00008000) 4608 #define FLASH_OPTCR_nWRP ((uint32_t)0x0FFF0000) 4609 #define FLASH_OPTCR_nWRP_0 ((uint32_t)0x00010000) 4610 #define FLASH_OPTCR_nWRP_1 ((uint32_t)0x00020000) 4611 #define FLASH_OPTCR_nWRP_2 ((uint32_t)0x00040000) 4612 #define FLASH_OPTCR_nWRP_3 ((uint32_t)0x00080000) 4613 #define FLASH_OPTCR_nWRP_4 ((uint32_t)0x00100000) 4614 #define FLASH_OPTCR_nWRP_5 ((uint32_t)0x00200000) 4615 #define FLASH_OPTCR_nWRP_6 ((uint32_t)0x00400000) 4616 #define FLASH_OPTCR_nWRP_7 ((uint32_t)0x00800000) 4617 #define FLASH_OPTCR_nWRP_8 ((uint32_t)0x01000000) 4618 #define FLASH_OPTCR_nWRP_9 ((uint32_t)0x02000000) 4619 #define FLASH_OPTCR_nWRP_10 ((uint32_t)0x04000000) 4620 #define FLASH_OPTCR_nWRP_11 ((uint32_t)0x08000000) 4622 #define FLASH_OPTCR_DB1M ((uint32_t)0x40000000) 4623 #define FLASH_OPTCR_SPRMOD ((uint32_t)0x80000000) 4626 #define FLASH_OPTCR1_nWRP ((uint32_t)0x0FFF0000) 4627 #define FLASH_OPTCR1_nWRP_0 ((uint32_t)0x00010000) 4628 #define FLASH_OPTCR1_nWRP_1 ((uint32_t)0x00020000) 4629 #define FLASH_OPTCR1_nWRP_2 ((uint32_t)0x00040000) 4630 #define FLASH_OPTCR1_nWRP_3 ((uint32_t)0x00080000) 4631 #define FLASH_OPTCR1_nWRP_4 ((uint32_t)0x00100000) 4632 #define FLASH_OPTCR1_nWRP_5 ((uint32_t)0x00200000) 4633 #define FLASH_OPTCR1_nWRP_6 ((uint32_t)0x00400000) 4634 #define FLASH_OPTCR1_nWRP_7 ((uint32_t)0x00800000) 4635 #define FLASH_OPTCR1_nWRP_8 ((uint32_t)0x01000000) 4636 #define FLASH_OPTCR1_nWRP_9 ((uint32_t)0x02000000) 4637 #define FLASH_OPTCR1_nWRP_10 ((uint32_t)0x04000000) 4638 #define FLASH_OPTCR1_nWRP_11 ((uint32_t)0x08000000) 4640 #if defined(STM32F40_41xxx) 4647 #define FSMC_BCR1_MBKEN ((uint32_t)0x00000001) 4648 #define FSMC_BCR1_MUXEN ((uint32_t)0x00000002) 4650 #define FSMC_BCR1_MTYP ((uint32_t)0x0000000C) 4651 #define FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) 4652 #define FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) 4654 #define FSMC_BCR1_MWID ((uint32_t)0x00000030) 4655 #define FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) 4656 #define FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) 4658 #define FSMC_BCR1_FACCEN ((uint32_t)0x00000040) 4659 #define FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) 4660 #define FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) 4661 #define FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) 4662 #define FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) 4663 #define FSMC_BCR1_WREN ((uint32_t)0x00001000) 4664 #define FSMC_BCR1_WAITEN ((uint32_t)0x00002000) 4665 #define FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) 4666 #define FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) 4667 #define FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) 4670 #define FSMC_BCR2_MBKEN ((uint32_t)0x00000001) 4671 #define FSMC_BCR2_MUXEN ((uint32_t)0x00000002) 4673 #define FSMC_BCR2_MTYP ((uint32_t)0x0000000C) 4674 #define FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) 4675 #define FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) 4677 #define FSMC_BCR2_MWID ((uint32_t)0x00000030) 4678 #define FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) 4679 #define FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) 4681 #define FSMC_BCR2_FACCEN ((uint32_t)0x00000040) 4682 #define FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) 4683 #define FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) 4684 #define FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) 4685 #define FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) 4686 #define FSMC_BCR2_WREN ((uint32_t)0x00001000) 4687 #define FSMC_BCR2_WAITEN ((uint32_t)0x00002000) 4688 #define FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) 4689 #define FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) 4690 #define FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) 4693 #define FSMC_BCR3_MBKEN ((uint32_t)0x00000001) 4694 #define FSMC_BCR3_MUXEN ((uint32_t)0x00000002) 4696 #define FSMC_BCR3_MTYP ((uint32_t)0x0000000C) 4697 #define FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) 4698 #define FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) 4700 #define FSMC_BCR3_MWID ((uint32_t)0x00000030) 4701 #define FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) 4702 #define FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) 4704 #define FSMC_BCR3_FACCEN ((uint32_t)0x00000040) 4705 #define FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) 4706 #define FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) 4707 #define FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) 4708 #define FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) 4709 #define FSMC_BCR3_WREN ((uint32_t)0x00001000) 4710 #define FSMC_BCR3_WAITEN ((uint32_t)0x00002000) 4711 #define FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) 4712 #define FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) 4713 #define FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) 4716 #define FSMC_BCR4_MBKEN ((uint32_t)0x00000001) 4717 #define FSMC_BCR4_MUXEN ((uint32_t)0x00000002) 4719 #define FSMC_BCR4_MTYP ((uint32_t)0x0000000C) 4720 #define FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) 4721 #define FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) 4723 #define FSMC_BCR4_MWID ((uint32_t)0x00000030) 4724 #define FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) 4725 #define FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) 4727 #define FSMC_BCR4_FACCEN ((uint32_t)0x00000040) 4728 #define FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) 4729 #define FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) 4730 #define FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) 4731 #define FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) 4732 #define FSMC_BCR4_WREN ((uint32_t)0x00001000) 4733 #define FSMC_BCR4_WAITEN ((uint32_t)0x00002000) 4734 #define FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) 4735 #define FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) 4736 #define FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) 4739 #define FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) 4740 #define FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) 4741 #define FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) 4742 #define FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) 4743 #define FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) 4745 #define FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) 4746 #define FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) 4747 #define FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) 4748 #define FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) 4749 #define FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) 4751 #define FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) 4752 #define FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) 4753 #define FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) 4754 #define FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) 4755 #define FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) 4757 #define FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) 4758 #define FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) 4759 #define FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) 4760 #define FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) 4761 #define FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) 4763 #define FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) 4764 #define FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) 4765 #define FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) 4766 #define FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) 4767 #define FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) 4769 #define FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) 4770 #define FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) 4771 #define FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) 4772 #define FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) 4773 #define FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) 4775 #define FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) 4776 #define FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) 4777 #define FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) 4780 #define FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) 4781 #define FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) 4782 #define FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) 4783 #define FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) 4784 #define FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) 4786 #define FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) 4787 #define FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) 4788 #define FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) 4789 #define FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) 4790 #define FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) 4792 #define FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) 4793 #define FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) 4794 #define FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) 4795 #define FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) 4796 #define FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) 4798 #define FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) 4799 #define FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) 4800 #define FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) 4801 #define FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) 4802 #define FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) 4804 #define FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) 4805 #define FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) 4806 #define FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) 4807 #define FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) 4808 #define FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) 4810 #define FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) 4811 #define FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) 4812 #define FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) 4813 #define FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) 4814 #define FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) 4816 #define FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) 4817 #define FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) 4818 #define FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) 4821 #define FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) 4822 #define FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) 4823 #define FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) 4824 #define FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) 4825 #define FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) 4827 #define FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) 4828 #define FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) 4829 #define FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) 4830 #define FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) 4831 #define FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) 4833 #define FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) 4834 #define FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) 4835 #define FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) 4836 #define FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) 4837 #define FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) 4839 #define FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) 4840 #define FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) 4841 #define FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) 4842 #define FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) 4843 #define FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) 4845 #define FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) 4846 #define FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) 4847 #define FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) 4848 #define FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) 4849 #define FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) 4851 #define FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) 4852 #define FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) 4853 #define FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) 4854 #define FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) 4855 #define FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) 4857 #define FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) 4858 #define FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) 4859 #define FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) 4862 #define FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) 4863 #define FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) 4864 #define FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) 4865 #define FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) 4866 #define FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) 4868 #define FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) 4869 #define FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) 4870 #define FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) 4871 #define FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) 4872 #define FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) 4874 #define FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) 4875 #define FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) 4876 #define FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) 4877 #define FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) 4878 #define FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) 4880 #define FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) 4881 #define FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) 4882 #define FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) 4883 #define FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) 4884 #define FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) 4886 #define FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) 4887 #define FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) 4888 #define FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) 4889 #define FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) 4890 #define FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) 4892 #define FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) 4893 #define FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) 4894 #define FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) 4895 #define FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) 4896 #define FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) 4898 #define FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) 4899 #define FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) 4900 #define FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) 4903 #define FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) 4904 #define FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) 4905 #define FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) 4906 #define FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) 4907 #define FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) 4909 #define FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) 4910 #define FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) 4911 #define FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) 4912 #define FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) 4913 #define FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) 4915 #define FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) 4916 #define FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) 4917 #define FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) 4918 #define FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) 4919 #define FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) 4921 #define FSMC_BWTR1_BUSTURN ((uint32_t)0x000F0000) 4922 #define FSMC_BWTR1_BUSTURN_0 ((uint32_t)0x00010000) 4923 #define FSMC_BWTR1_BUSTURN_1 ((uint32_t)0x00020000) 4924 #define FSMC_BWTR1_BUSTURN_2 ((uint32_t)0x00040000) 4925 #define FSMC_BWTR1_BUSTURN_3 ((uint32_t)0x00080000) 4927 #define FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) 4928 #define FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) 4929 #define FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) 4932 #define FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) 4933 #define FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) 4934 #define FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) 4935 #define FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) 4936 #define FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) 4938 #define FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) 4939 #define FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) 4940 #define FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) 4941 #define FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) 4942 #define FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) 4944 #define FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) 4945 #define FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) 4946 #define FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) 4947 #define FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) 4948 #define FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) 4950 #define FSMC_BWTR2_BUSTURN ((uint32_t)0x000F0000) 4951 #define FSMC_BWTR2_BUSTURN_0 ((uint32_t)0x00010000) 4952 #define FSMC_BWTR2_BUSTURN_1 ((uint32_t)0x00020000) 4953 #define FSMC_BWTR2_BUSTURN_2 ((uint32_t)0x00040000) 4954 #define FSMC_BWTR2_BUSTURN_3 ((uint32_t)0x00080000) 4956 #define FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) 4957 #define FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) 4958 #define FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) 4961 #define FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) 4962 #define FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) 4963 #define FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) 4964 #define FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) 4965 #define FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) 4967 #define FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) 4968 #define FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) 4969 #define FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) 4970 #define FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) 4971 #define FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) 4973 #define FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) 4974 #define FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) 4975 #define FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) 4976 #define FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) 4977 #define FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) 4979 #define FSMC_BWTR3_BUSTURN ((uint32_t)0x000F0000) 4980 #define FSMC_BWTR3_BUSTURN_0 ((uint32_t)0x00010000) 4981 #define FSMC_BWTR3_BUSTURN_1 ((uint32_t)0x00020000) 4982 #define FSMC_BWTR3_BUSTURN_2 ((uint32_t)0x00040000) 4983 #define FSMC_BWTR3_BUSTURN_3 ((uint32_t)0x00080000) 4985 #define FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) 4986 #define FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) 4987 #define FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) 4990 #define FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) 4991 #define FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) 4992 #define FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) 4993 #define FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) 4994 #define FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) 4996 #define FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) 4997 #define FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) 4998 #define FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) 4999 #define FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) 5000 #define FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) 5002 #define FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) 5003 #define FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) 5004 #define FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) 5005 #define FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) 5006 #define FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) 5008 #define FSMC_BWTR4_BUSTURN ((uint32_t)0x000F0000) 5009 #define FSMC_BWTR4_BUSTURN_0 ((uint32_t)0x00010000) 5010 #define FSMC_BWTR4_BUSTURN_1 ((uint32_t)0x00020000) 5011 #define FSMC_BWTR4_BUSTURN_2 ((uint32_t)0x00040000) 5012 #define FSMC_BWTR4_BUSTURN_3 ((uint32_t)0x00080000) 5014 #define FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) 5015 #define FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) 5016 #define FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) 5019 #define FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) 5020 #define FSMC_PCR2_PBKEN ((uint32_t)0x00000004) 5021 #define FSMC_PCR2_PTYP ((uint32_t)0x00000008) 5023 #define FSMC_PCR2_PWID ((uint32_t)0x00000030) 5024 #define FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) 5025 #define FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) 5027 #define FSMC_PCR2_ECCEN ((uint32_t)0x00000040) 5029 #define FSMC_PCR2_TCLR ((uint32_t)0x00001E00) 5030 #define FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) 5031 #define FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) 5032 #define FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) 5033 #define FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) 5035 #define FSMC_PCR2_TAR ((uint32_t)0x0001E000) 5036 #define FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) 5037 #define FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) 5038 #define FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) 5039 #define FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) 5041 #define FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) 5042 #define FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) 5043 #define FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) 5044 #define FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) 5047 #define FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) 5048 #define FSMC_PCR3_PBKEN ((uint32_t)0x00000004) 5049 #define FSMC_PCR3_PTYP ((uint32_t)0x00000008) 5051 #define FSMC_PCR3_PWID ((uint32_t)0x00000030) 5052 #define FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) 5053 #define FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) 5055 #define FSMC_PCR3_ECCEN ((uint32_t)0x00000040) 5057 #define FSMC_PCR3_TCLR ((uint32_t)0x00001E00) 5058 #define FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) 5059 #define FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) 5060 #define FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) 5061 #define FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) 5063 #define FSMC_PCR3_TAR ((uint32_t)0x0001E000) 5064 #define FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) 5065 #define FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) 5066 #define FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) 5067 #define FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) 5069 #define FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) 5070 #define FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) 5071 #define FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) 5072 #define FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) 5075 #define FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) 5076 #define FSMC_PCR4_PBKEN ((uint32_t)0x00000004) 5077 #define FSMC_PCR4_PTYP ((uint32_t)0x00000008) 5079 #define FSMC_PCR4_PWID ((uint32_t)0x00000030) 5080 #define FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) 5081 #define FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) 5083 #define FSMC_PCR4_ECCEN ((uint32_t)0x00000040) 5085 #define FSMC_PCR4_TCLR ((uint32_t)0x00001E00) 5086 #define FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) 5087 #define FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) 5088 #define FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) 5089 #define FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) 5091 #define FSMC_PCR4_TAR ((uint32_t)0x0001E000) 5092 #define FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) 5093 #define FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) 5094 #define FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) 5095 #define FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) 5097 #define FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) 5098 #define FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) 5099 #define FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) 5100 #define FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) 5103 #define FSMC_SR2_IRS ((uint8_t)0x01) 5104 #define FSMC_SR2_ILS ((uint8_t)0x02) 5105 #define FSMC_SR2_IFS ((uint8_t)0x04) 5106 #define FSMC_SR2_IREN ((uint8_t)0x08) 5107 #define FSMC_SR2_ILEN ((uint8_t)0x10) 5108 #define FSMC_SR2_IFEN ((uint8_t)0x20) 5109 #define FSMC_SR2_FEMPT ((uint8_t)0x40) 5112 #define FSMC_SR3_IRS ((uint8_t)0x01) 5113 #define FSMC_SR3_ILS ((uint8_t)0x02) 5114 #define FSMC_SR3_IFS ((uint8_t)0x04) 5115 #define FSMC_SR3_IREN ((uint8_t)0x08) 5116 #define FSMC_SR3_ILEN ((uint8_t)0x10) 5117 #define FSMC_SR3_IFEN ((uint8_t)0x20) 5118 #define FSMC_SR3_FEMPT ((uint8_t)0x40) 5121 #define FSMC_SR4_IRS ((uint8_t)0x01) 5122 #define FSMC_SR4_ILS ((uint8_t)0x02) 5123 #define FSMC_SR4_IFS ((uint8_t)0x04) 5124 #define FSMC_SR4_IREN ((uint8_t)0x08) 5125 #define FSMC_SR4_ILEN ((uint8_t)0x10) 5126 #define FSMC_SR4_IFEN ((uint8_t)0x20) 5127 #define FSMC_SR4_FEMPT ((uint8_t)0x40) 5130 #define FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) 5131 #define FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) 5132 #define FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) 5133 #define FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) 5134 #define FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) 5135 #define FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) 5136 #define FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) 5137 #define FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) 5138 #define FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) 5140 #define FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) 5141 #define FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) 5142 #define FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) 5143 #define FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) 5144 #define FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) 5145 #define FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) 5146 #define FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) 5147 #define FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) 5148 #define FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) 5150 #define FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) 5151 #define FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) 5152 #define FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) 5153 #define FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) 5154 #define FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) 5155 #define FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) 5156 #define FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) 5157 #define FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) 5158 #define FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) 5160 #define FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) 5161 #define FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) 5162 #define FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) 5163 #define FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) 5164 #define FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) 5165 #define FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) 5166 #define FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) 5167 #define FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) 5168 #define FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) 5171 #define FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) 5172 #define FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) 5173 #define FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) 5174 #define FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) 5175 #define FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) 5176 #define FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) 5177 #define FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) 5178 #define FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) 5179 #define FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) 5181 #define FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) 5182 #define FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) 5183 #define FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) 5184 #define FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) 5185 #define FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) 5186 #define FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) 5187 #define FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) 5188 #define FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) 5189 #define FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) 5191 #define FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) 5192 #define FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) 5193 #define FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) 5194 #define FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) 5195 #define FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) 5196 #define FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) 5197 #define FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) 5198 #define FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) 5199 #define FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) 5201 #define FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) 5202 #define FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) 5203 #define FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) 5204 #define FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) 5205 #define FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) 5206 #define FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) 5207 #define FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) 5208 #define FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) 5209 #define FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) 5212 #define FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) 5213 #define FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) 5214 #define FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) 5215 #define FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) 5216 #define FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) 5217 #define FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) 5218 #define FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) 5219 #define FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) 5220 #define FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) 5222 #define FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) 5223 #define FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) 5224 #define FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) 5225 #define FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) 5226 #define FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) 5227 #define FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) 5228 #define FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) 5229 #define FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) 5230 #define FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) 5232 #define FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) 5233 #define FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) 5234 #define FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) 5235 #define FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) 5236 #define FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) 5237 #define FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) 5238 #define FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) 5239 #define FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) 5240 #define FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) 5242 #define FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) 5243 #define FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) 5244 #define FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) 5245 #define FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) 5246 #define FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) 5247 #define FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) 5248 #define FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) 5249 #define FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) 5250 #define FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) 5253 #define FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) 5254 #define FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) 5255 #define FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) 5256 #define FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) 5257 #define FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) 5258 #define FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) 5259 #define FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) 5260 #define FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) 5261 #define FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) 5263 #define FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) 5264 #define FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) 5265 #define FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) 5266 #define FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) 5267 #define FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) 5268 #define FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) 5269 #define FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) 5270 #define FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) 5271 #define FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) 5273 #define FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) 5274 #define FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) 5275 #define FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) 5276 #define FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) 5277 #define FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) 5278 #define FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) 5279 #define FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) 5280 #define FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) 5281 #define FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) 5283 #define FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) 5284 #define FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) 5285 #define FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) 5286 #define FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) 5287 #define FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) 5288 #define FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) 5289 #define FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) 5290 #define FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) 5291 #define FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) 5294 #define FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) 5295 #define FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) 5296 #define FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) 5297 #define FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) 5298 #define FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) 5299 #define FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) 5300 #define FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) 5301 #define FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) 5302 #define FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) 5304 #define FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) 5305 #define FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) 5306 #define FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) 5307 #define FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) 5308 #define FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) 5309 #define FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) 5310 #define FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) 5311 #define FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) 5312 #define FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) 5314 #define FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) 5315 #define FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) 5316 #define FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) 5317 #define FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) 5318 #define FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) 5319 #define FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) 5320 #define FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) 5321 #define FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) 5322 #define FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) 5324 #define FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) 5325 #define FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) 5326 #define FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) 5327 #define FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) 5328 #define FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) 5329 #define FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) 5330 #define FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) 5331 #define FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) 5332 #define FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) 5335 #define FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) 5336 #define FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) 5337 #define FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) 5338 #define FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) 5339 #define FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) 5340 #define FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) 5341 #define FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) 5342 #define FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) 5343 #define FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) 5345 #define FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) 5346 #define FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) 5347 #define FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) 5348 #define FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) 5349 #define FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) 5350 #define FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) 5351 #define FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) 5352 #define FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) 5353 #define FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) 5355 #define FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) 5356 #define FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) 5357 #define FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) 5358 #define FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) 5359 #define FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) 5360 #define FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) 5361 #define FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) 5362 #define FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) 5363 #define FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) 5365 #define FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) 5366 #define FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) 5367 #define FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) 5368 #define FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) 5369 #define FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) 5370 #define FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) 5371 #define FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) 5372 #define FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) 5373 #define FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) 5376 #define FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) 5377 #define FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) 5378 #define FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) 5379 #define FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) 5380 #define FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) 5381 #define FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) 5382 #define FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) 5383 #define FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) 5384 #define FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) 5386 #define FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) 5387 #define FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) 5388 #define FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) 5389 #define FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) 5390 #define FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) 5391 #define FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) 5392 #define FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) 5393 #define FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) 5394 #define FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) 5396 #define FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) 5397 #define FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) 5398 #define FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) 5399 #define FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) 5400 #define FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) 5401 #define FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) 5402 #define FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) 5403 #define FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) 5404 #define FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) 5406 #define FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) 5407 #define FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) 5408 #define FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) 5409 #define FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) 5410 #define FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) 5411 #define FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) 5412 #define FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) 5413 #define FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) 5414 #define FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) 5417 #define FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) 5420 #define FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) 5423 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 5430 #define FMC_BCR1_MBKEN ((uint32_t)0x00000001) 5431 #define FMC_BCR1_MUXEN ((uint32_t)0x00000002) 5433 #define FMC_BCR1_MTYP ((uint32_t)0x0000000C) 5434 #define FMC_BCR1_MTYP_0 ((uint32_t)0x00000004) 5435 #define FMC_BCR1_MTYP_1 ((uint32_t)0x00000008) 5437 #define FMC_BCR1_MWID ((uint32_t)0x00000030) 5438 #define FMC_BCR1_MWID_0 ((uint32_t)0x00000010) 5439 #define FMC_BCR1_MWID_1 ((uint32_t)0x00000020) 5441 #define FMC_BCR1_FACCEN ((uint32_t)0x00000040) 5442 #define FMC_BCR1_BURSTEN ((uint32_t)0x00000100) 5443 #define FMC_BCR1_WAITPOL ((uint32_t)0x00000200) 5444 #define FMC_BCR1_WRAPMOD ((uint32_t)0x00000400) 5445 #define FMC_BCR1_WAITCFG ((uint32_t)0x00000800) 5446 #define FMC_BCR1_WREN ((uint32_t)0x00001000) 5447 #define FMC_BCR1_WAITEN ((uint32_t)0x00002000) 5448 #define FMC_BCR1_EXTMOD ((uint32_t)0x00004000) 5449 #define FMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) 5450 #define FMC_BCR1_CBURSTRW ((uint32_t)0x00080000) 5451 #define FMC_BCR1_CCLKEN ((uint32_t)0x00100000) 5454 #define FMC_BCR2_MBKEN ((uint32_t)0x00000001) 5455 #define FMC_BCR2_MUXEN ((uint32_t)0x00000002) 5457 #define FMC_BCR2_MTYP ((uint32_t)0x0000000C) 5458 #define FMC_BCR2_MTYP_0 ((uint32_t)0x00000004) 5459 #define FMC_BCR2_MTYP_1 ((uint32_t)0x00000008) 5461 #define FMC_BCR2_MWID ((uint32_t)0x00000030) 5462 #define FMC_BCR2_MWID_0 ((uint32_t)0x00000010) 5463 #define FMC_BCR2_MWID_1 ((uint32_t)0x00000020) 5465 #define FMC_BCR2_FACCEN ((uint32_t)0x00000040) 5466 #define FMC_BCR2_BURSTEN ((uint32_t)0x00000100) 5467 #define FMC_BCR2_WAITPOL ((uint32_t)0x00000200) 5468 #define FMC_BCR2_WRAPMOD ((uint32_t)0x00000400) 5469 #define FMC_BCR2_WAITCFG ((uint32_t)0x00000800) 5470 #define FMC_BCR2_WREN ((uint32_t)0x00001000) 5471 #define FMC_BCR2_WAITEN ((uint32_t)0x00002000) 5472 #define FMC_BCR2_EXTMOD ((uint32_t)0x00004000) 5473 #define FMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) 5474 #define FMC_BCR2_CBURSTRW ((uint32_t)0x00080000) 5477 #define FMC_BCR3_MBKEN ((uint32_t)0x00000001) 5478 #define FMC_BCR3_MUXEN ((uint32_t)0x00000002) 5480 #define FMC_BCR3_MTYP ((uint32_t)0x0000000C) 5481 #define FMC_BCR3_MTYP_0 ((uint32_t)0x00000004) 5482 #define FMC_BCR3_MTYP_1 ((uint32_t)0x00000008) 5484 #define FMC_BCR3_MWID ((uint32_t)0x00000030) 5485 #define FMC_BCR3_MWID_0 ((uint32_t)0x00000010) 5486 #define FMC_BCR3_MWID_1 ((uint32_t)0x00000020) 5488 #define FMC_BCR3_FACCEN ((uint32_t)0x00000040) 5489 #define FMC_BCR3_BURSTEN ((uint32_t)0x00000100) 5490 #define FMC_BCR3_WAITPOL ((uint32_t)0x00000200) 5491 #define FMC_BCR3_WRAPMOD ((uint32_t)0x00000400) 5492 #define FMC_BCR3_WAITCFG ((uint32_t)0x00000800) 5493 #define FMC_BCR3_WREN ((uint32_t)0x00001000) 5494 #define FMC_BCR3_WAITEN ((uint32_t)0x00002000) 5495 #define FMC_BCR3_EXTMOD ((uint32_t)0x00004000) 5496 #define FMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) 5497 #define FMC_BCR3_CBURSTRW ((uint32_t)0x00080000) 5500 #define FMC_BCR4_MBKEN ((uint32_t)0x00000001) 5501 #define FMC_BCR4_MUXEN ((uint32_t)0x00000002) 5503 #define FMC_BCR4_MTYP ((uint32_t)0x0000000C) 5504 #define FMC_BCR4_MTYP_0 ((uint32_t)0x00000004) 5505 #define FMC_BCR4_MTYP_1 ((uint32_t)0x00000008) 5507 #define FMC_BCR4_MWID ((uint32_t)0x00000030) 5508 #define FMC_BCR4_MWID_0 ((uint32_t)0x00000010) 5509 #define FMC_BCR4_MWID_1 ((uint32_t)0x00000020) 5511 #define FMC_BCR4_FACCEN ((uint32_t)0x00000040) 5512 #define FMC_BCR4_BURSTEN ((uint32_t)0x00000100) 5513 #define FMC_BCR4_WAITPOL ((uint32_t)0x00000200) 5514 #define FMC_BCR4_WRAPMOD ((uint32_t)0x00000400) 5515 #define FMC_BCR4_WAITCFG ((uint32_t)0x00000800) 5516 #define FMC_BCR4_WREN ((uint32_t)0x00001000) 5517 #define FMC_BCR4_WAITEN ((uint32_t)0x00002000) 5518 #define FMC_BCR4_EXTMOD ((uint32_t)0x00004000) 5519 #define FMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) 5520 #define FMC_BCR4_CBURSTRW ((uint32_t)0x00080000) 5523 #define FMC_BTR1_ADDSET ((uint32_t)0x0000000F) 5524 #define FMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) 5525 #define FMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) 5526 #define FMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) 5527 #define FMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) 5529 #define FMC_BTR1_ADDHLD ((uint32_t)0x000000F0) 5530 #define FMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) 5531 #define FMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) 5532 #define FMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) 5533 #define FMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) 5535 #define FMC_BTR1_DATAST ((uint32_t)0x0000FF00) 5536 #define FMC_BTR1_DATAST_0 ((uint32_t)0x00000100) 5537 #define FMC_BTR1_DATAST_1 ((uint32_t)0x00000200) 5538 #define FMC_BTR1_DATAST_2 ((uint32_t)0x00000400) 5539 #define FMC_BTR1_DATAST_3 ((uint32_t)0x00000800) 5540 #define FMC_BTR1_DATAST_4 ((uint32_t)0x00001000) 5541 #define FMC_BTR1_DATAST_5 ((uint32_t)0x00002000) 5542 #define FMC_BTR1_DATAST_6 ((uint32_t)0x00004000) 5543 #define FMC_BTR1_DATAST_7 ((uint32_t)0x00008000) 5545 #define FMC_BTR1_BUSTURN ((uint32_t)0x000F0000) 5546 #define FMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) 5547 #define FMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) 5548 #define FMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) 5549 #define FMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) 5551 #define FMC_BTR1_CLKDIV ((uint32_t)0x00F00000) 5552 #define FMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) 5553 #define FMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) 5554 #define FMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) 5555 #define FMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) 5557 #define FMC_BTR1_DATLAT ((uint32_t)0x0F000000) 5558 #define FMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) 5559 #define FMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) 5560 #define FMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) 5561 #define FMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) 5563 #define FMC_BTR1_ACCMOD ((uint32_t)0x30000000) 5564 #define FMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) 5565 #define FMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) 5568 #define FMC_BTR2_ADDSET ((uint32_t)0x0000000F) 5569 #define FMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) 5570 #define FMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) 5571 #define FMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) 5572 #define FMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) 5574 #define FMC_BTR2_ADDHLD ((uint32_t)0x000000F0) 5575 #define FMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) 5576 #define FMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) 5577 #define FMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) 5578 #define FMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) 5580 #define FMC_BTR2_DATAST ((uint32_t)0x0000FF00) 5581 #define FMC_BTR2_DATAST_0 ((uint32_t)0x00000100) 5582 #define FMC_BTR2_DATAST_1 ((uint32_t)0x00000200) 5583 #define FMC_BTR2_DATAST_2 ((uint32_t)0x00000400) 5584 #define FMC_BTR2_DATAST_3 ((uint32_t)0x00000800) 5585 #define FMC_BTR2_DATAST_4 ((uint32_t)0x00001000) 5586 #define FMC_BTR2_DATAST_5 ((uint32_t)0x00002000) 5587 #define FMC_BTR2_DATAST_6 ((uint32_t)0x00004000) 5588 #define FMC_BTR2_DATAST_7 ((uint32_t)0x00008000) 5590 #define FMC_BTR2_BUSTURN ((uint32_t)0x000F0000) 5591 #define FMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) 5592 #define FMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) 5593 #define FMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) 5594 #define FMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) 5596 #define FMC_BTR2_CLKDIV ((uint32_t)0x00F00000) 5597 #define FMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) 5598 #define FMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) 5599 #define FMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) 5600 #define FMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) 5602 #define FMC_BTR2_DATLAT ((uint32_t)0x0F000000) 5603 #define FMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) 5604 #define FMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) 5605 #define FMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) 5606 #define FMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) 5608 #define FMC_BTR2_ACCMOD ((uint32_t)0x30000000) 5609 #define FMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) 5610 #define FMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) 5613 #define FMC_BTR3_ADDSET ((uint32_t)0x0000000F) 5614 #define FMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) 5615 #define FMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) 5616 #define FMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) 5617 #define FMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) 5619 #define FMC_BTR3_ADDHLD ((uint32_t)0x000000F0) 5620 #define FMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) 5621 #define FMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) 5622 #define FMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) 5623 #define FMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) 5625 #define FMC_BTR3_DATAST ((uint32_t)0x0000FF00) 5626 #define FMC_BTR3_DATAST_0 ((uint32_t)0x00000100) 5627 #define FMC_BTR3_DATAST_1 ((uint32_t)0x00000200) 5628 #define FMC_BTR3_DATAST_2 ((uint32_t)0x00000400) 5629 #define FMC_BTR3_DATAST_3 ((uint32_t)0x00000800) 5630 #define FMC_BTR3_DATAST_4 ((uint32_t)0x00001000) 5631 #define FMC_BTR3_DATAST_5 ((uint32_t)0x00002000) 5632 #define FMC_BTR3_DATAST_6 ((uint32_t)0x00004000) 5633 #define FMC_BTR3_DATAST_7 ((uint32_t)0x00008000) 5635 #define FMC_BTR3_BUSTURN ((uint32_t)0x000F0000) 5636 #define FMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) 5637 #define FMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) 5638 #define FMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) 5639 #define FMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) 5641 #define FMC_BTR3_CLKDIV ((uint32_t)0x00F00000) 5642 #define FMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) 5643 #define FMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) 5644 #define FMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) 5645 #define FMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) 5647 #define FMC_BTR3_DATLAT ((uint32_t)0x0F000000) 5648 #define FMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) 5649 #define FMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) 5650 #define FMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) 5651 #define FMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) 5653 #define FMC_BTR3_ACCMOD ((uint32_t)0x30000000) 5654 #define FMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) 5655 #define FMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) 5658 #define FMC_BTR4_ADDSET ((uint32_t)0x0000000F) 5659 #define FMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) 5660 #define FMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) 5661 #define FMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) 5662 #define FMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) 5664 #define FMC_BTR4_ADDHLD ((uint32_t)0x000000F0) 5665 #define FMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) 5666 #define FMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) 5667 #define FMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) 5668 #define FMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) 5670 #define FMC_BTR4_DATAST ((uint32_t)0x0000FF00) 5671 #define FMC_BTR4_DATAST_0 ((uint32_t)0x00000100) 5672 #define FMC_BTR4_DATAST_1 ((uint32_t)0x00000200) 5673 #define FMC_BTR4_DATAST_2 ((uint32_t)0x00000400) 5674 #define FMC_BTR4_DATAST_3 ((uint32_t)0x00000800) 5675 #define FMC_BTR4_DATAST_4 ((uint32_t)0x00001000) 5676 #define FMC_BTR4_DATAST_5 ((uint32_t)0x00002000) 5677 #define FMC_BTR4_DATAST_6 ((uint32_t)0x00004000) 5678 #define FMC_BTR4_DATAST_7 ((uint32_t)0x00008000) 5680 #define FMC_BTR4_BUSTURN ((uint32_t)0x000F0000) 5681 #define FMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) 5682 #define FMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) 5683 #define FMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) 5684 #define FMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) 5686 #define FMC_BTR4_CLKDIV ((uint32_t)0x00F00000) 5687 #define FMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) 5688 #define FMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) 5689 #define FMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) 5690 #define FMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) 5692 #define FMC_BTR4_DATLAT ((uint32_t)0x0F000000) 5693 #define FMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) 5694 #define FMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) 5695 #define FMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) 5696 #define FMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) 5698 #define FMC_BTR4_ACCMOD ((uint32_t)0x30000000) 5699 #define FMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) 5700 #define FMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) 5703 #define FMC_BWTR1_ADDSET ((uint32_t)0x0000000F) 5704 #define FMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) 5705 #define FMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) 5706 #define FMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) 5707 #define FMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) 5709 #define FMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) 5710 #define FMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) 5711 #define FMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) 5712 #define FMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) 5713 #define FMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) 5715 #define FMC_BWTR1_DATAST ((uint32_t)0x0000FF00) 5716 #define FMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) 5717 #define FMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) 5718 #define FMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) 5719 #define FMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) 5720 #define FMC_BWTR1_DATAST_4 ((uint32_t)0x00001000) 5721 #define FMC_BWTR1_DATAST_5 ((uint32_t)0x00002000) 5722 #define FMC_BWTR1_DATAST_6 ((uint32_t)0x00004000) 5723 #define FMC_BWTR1_DATAST_7 ((uint32_t)0x00008000) 5725 #define FMC_BWTR1_BUSTURN ((uint32_t)0x000F0000) 5726 #define FMC_BWTR1_BUSTURN_0 ((uint32_t)0x00010000) 5727 #define FMC_BWTR1_BUSTURN_1 ((uint32_t)0x00020000) 5728 #define FMC_BWTR1_BUSTURN_2 ((uint32_t)0x00040000) 5729 #define FMC_BWTR1_BUSTURN_3 ((uint32_t)0x00080000) 5731 #define FMC_BWTR1_ACCMOD ((uint32_t)0x30000000) 5732 #define FMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) 5733 #define FMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) 5736 #define FMC_BWTR2_ADDSET ((uint32_t)0x0000000F) 5737 #define FMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) 5738 #define FMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) 5739 #define FMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) 5740 #define FMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) 5742 #define FMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) 5743 #define FMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) 5744 #define FMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) 5745 #define FMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) 5746 #define FMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) 5748 #define FMC_BWTR2_DATAST ((uint32_t)0x0000FF00) 5749 #define FMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) 5750 #define FMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) 5751 #define FMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) 5752 #define FMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) 5753 #define FMC_BWTR2_DATAST_4 ((uint32_t)0x00001000) 5754 #define FMC_BWTR2_DATAST_5 ((uint32_t)0x00002000) 5755 #define FMC_BWTR2_DATAST_6 ((uint32_t)0x00004000) 5756 #define FMC_BWTR2_DATAST_7 ((uint32_t)0x00008000) 5758 #define FMC_BWTR2_BUSTURN ((uint32_t)0x000F0000) 5759 #define FMC_BWTR2_BUSTURN_0 ((uint32_t)0x00010000) 5760 #define FMC_BWTR2_BUSTURN_1 ((uint32_t)0x00020000) 5761 #define FMC_BWTR2_BUSTURN_2 ((uint32_t)0x00040000) 5762 #define FMC_BWTR2_BUSTURN_3 ((uint32_t)0x00080000) 5764 #define FMC_BWTR2_ACCMOD ((uint32_t)0x30000000) 5765 #define FMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) 5766 #define FMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) 5769 #define FMC_BWTR3_ADDSET ((uint32_t)0x0000000F) 5770 #define FMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) 5771 #define FMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) 5772 #define FMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) 5773 #define FMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) 5775 #define FMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) 5776 #define FMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) 5777 #define FMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) 5778 #define FMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) 5779 #define FMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) 5781 #define FMC_BWTR3_DATAST ((uint32_t)0x0000FF00) 5782 #define FMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) 5783 #define FMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) 5784 #define FMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) 5785 #define FMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) 5786 #define FMC_BWTR3_DATAST_4 ((uint32_t)0x00001000) 5787 #define FMC_BWTR3_DATAST_5 ((uint32_t)0x00002000) 5788 #define FMC_BWTR3_DATAST_6 ((uint32_t)0x00004000) 5789 #define FMC_BWTR3_DATAST_7 ((uint32_t)0x00008000) 5791 #define FMC_BWTR3_BUSTURN ((uint32_t)0x000F0000) 5792 #define FMC_BWTR3_BUSTURN_0 ((uint32_t)0x00010000) 5793 #define FMC_BWTR3_BUSTURN_1 ((uint32_t)0x00020000) 5794 #define FMC_BWTR3_BUSTURN_2 ((uint32_t)0x00040000) 5795 #define FMC_BWTR3_BUSTURN_3 ((uint32_t)0x00080000) 5797 #define FMC_BWTR3_ACCMOD ((uint32_t)0x30000000) 5798 #define FMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) 5799 #define FMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) 5802 #define FMC_BWTR4_ADDSET ((uint32_t)0x0000000F) 5803 #define FMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) 5804 #define FMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) 5805 #define FMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) 5806 #define FMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) 5808 #define FMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) 5809 #define FMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) 5810 #define FMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) 5811 #define FMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) 5812 #define FMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) 5814 #define FMC_BWTR4_DATAST ((uint32_t)0x0000FF00) 5815 #define FMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) 5816 #define FMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) 5817 #define FMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) 5818 #define FMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) 5819 #define FMC_BWTR4_DATAST_4 ((uint32_t)0x00001000) 5820 #define FMC_BWTR4_DATAST_5 ((uint32_t)0x00002000) 5821 #define FMC_BWTR4_DATAST_6 ((uint32_t)0x00004000) 5822 #define FMC_BWTR4_DATAST_7 ((uint32_t)0x00008000) 5824 #define FMC_BWTR4_BUSTURN ((uint32_t)0x000F0000) 5825 #define FMC_BWTR4_BUSTURN_0 ((uint32_t)0x00010000) 5826 #define FMC_BWTR4_BUSTURN_1 ((uint32_t)0x00020000) 5827 #define FMC_BWTR4_BUSTURN_2 ((uint32_t)0x00040000) 5828 #define FMC_BWTR4_BUSTURN_3 ((uint32_t)0x00080000) 5830 #define FMC_BWTR4_ACCMOD ((uint32_t)0x30000000) 5831 #define FMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) 5832 #define FMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) 5835 #define FMC_PCR2_PWAITEN ((uint32_t)0x00000002) 5836 #define FMC_PCR2_PBKEN ((uint32_t)0x00000004) 5837 #define FMC_PCR2_PTYP ((uint32_t)0x00000008) 5839 #define FMC_PCR2_PWID ((uint32_t)0x00000030) 5840 #define FMC_PCR2_PWID_0 ((uint32_t)0x00000010) 5841 #define FMC_PCR2_PWID_1 ((uint32_t)0x00000020) 5843 #define FMC_PCR2_ECCEN ((uint32_t)0x00000040) 5845 #define FMC_PCR2_TCLR ((uint32_t)0x00001E00) 5846 #define FMC_PCR2_TCLR_0 ((uint32_t)0x00000200) 5847 #define FMC_PCR2_TCLR_1 ((uint32_t)0x00000400) 5848 #define FMC_PCR2_TCLR_2 ((uint32_t)0x00000800) 5849 #define FMC_PCR2_TCLR_3 ((uint32_t)0x00001000) 5851 #define FMC_PCR2_TAR ((uint32_t)0x0001E000) 5852 #define FMC_PCR2_TAR_0 ((uint32_t)0x00002000) 5853 #define FMC_PCR2_TAR_1 ((uint32_t)0x00004000) 5854 #define FMC_PCR2_TAR_2 ((uint32_t)0x00008000) 5855 #define FMC_PCR2_TAR_3 ((uint32_t)0x00010000) 5857 #define FMC_PCR2_ECCPS ((uint32_t)0x000E0000) 5858 #define FMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) 5859 #define FMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) 5860 #define FMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) 5863 #define FMC_PCR3_PWAITEN ((uint32_t)0x00000002) 5864 #define FMC_PCR3_PBKEN ((uint32_t)0x00000004) 5865 #define FMC_PCR3_PTYP ((uint32_t)0x00000008) 5867 #define FMC_PCR3_PWID ((uint32_t)0x00000030) 5868 #define FMC_PCR3_PWID_0 ((uint32_t)0x00000010) 5869 #define FMC_PCR3_PWID_1 ((uint32_t)0x00000020) 5871 #define FMC_PCR3_ECCEN ((uint32_t)0x00000040) 5873 #define FMC_PCR3_TCLR ((uint32_t)0x00001E00) 5874 #define FMC_PCR3_TCLR_0 ((uint32_t)0x00000200) 5875 #define FMC_PCR3_TCLR_1 ((uint32_t)0x00000400) 5876 #define FMC_PCR3_TCLR_2 ((uint32_t)0x00000800) 5877 #define FMC_PCR3_TCLR_3 ((uint32_t)0x00001000) 5879 #define FMC_PCR3_TAR ((uint32_t)0x0001E000) 5880 #define FMC_PCR3_TAR_0 ((uint32_t)0x00002000) 5881 #define FMC_PCR3_TAR_1 ((uint32_t)0x00004000) 5882 #define FMC_PCR3_TAR_2 ((uint32_t)0x00008000) 5883 #define FMC_PCR3_TAR_3 ((uint32_t)0x00010000) 5885 #define FMC_PCR3_ECCPS ((uint32_t)0x000E0000) 5886 #define FMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) 5887 #define FMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) 5888 #define FMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) 5891 #define FMC_PCR4_PWAITEN ((uint32_t)0x00000002) 5892 #define FMC_PCR4_PBKEN ((uint32_t)0x00000004) 5893 #define FMC_PCR4_PTYP ((uint32_t)0x00000008) 5895 #define FMC_PCR4_PWID ((uint32_t)0x00000030) 5896 #define FMC_PCR4_PWID_0 ((uint32_t)0x00000010) 5897 #define FMC_PCR4_PWID_1 ((uint32_t)0x00000020) 5899 #define FMC_PCR4_ECCEN ((uint32_t)0x00000040) 5901 #define FMC_PCR4_TCLR ((uint32_t)0x00001E00) 5902 #define FMC_PCR4_TCLR_0 ((uint32_t)0x00000200) 5903 #define FMC_PCR4_TCLR_1 ((uint32_t)0x00000400) 5904 #define FMC_PCR4_TCLR_2 ((uint32_t)0x00000800) 5905 #define FMC_PCR4_TCLR_3 ((uint32_t)0x00001000) 5907 #define FMC_PCR4_TAR ((uint32_t)0x0001E000) 5908 #define FMC_PCR4_TAR_0 ((uint32_t)0x00002000) 5909 #define FMC_PCR4_TAR_1 ((uint32_t)0x00004000) 5910 #define FMC_PCR4_TAR_2 ((uint32_t)0x00008000) 5911 #define FMC_PCR4_TAR_3 ((uint32_t)0x00010000) 5913 #define FMC_PCR4_ECCPS ((uint32_t)0x000E0000) 5914 #define FMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) 5915 #define FMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) 5916 #define FMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) 5919 #define FMC_SR2_IRS ((uint8_t)0x01) 5920 #define FMC_SR2_ILS ((uint8_t)0x02) 5921 #define FMC_SR2_IFS ((uint8_t)0x04) 5922 #define FMC_SR2_IREN ((uint8_t)0x08) 5923 #define FMC_SR2_ILEN ((uint8_t)0x10) 5924 #define FMC_SR2_IFEN ((uint8_t)0x20) 5925 #define FMC_SR2_FEMPT ((uint8_t)0x40) 5928 #define FMC_SR3_IRS ((uint8_t)0x01) 5929 #define FMC_SR3_ILS ((uint8_t)0x02) 5930 #define FMC_SR3_IFS ((uint8_t)0x04) 5931 #define FMC_SR3_IREN ((uint8_t)0x08) 5932 #define FMC_SR3_ILEN ((uint8_t)0x10) 5933 #define FMC_SR3_IFEN ((uint8_t)0x20) 5934 #define FMC_SR3_FEMPT ((uint8_t)0x40) 5937 #define FMC_SR4_IRS ((uint8_t)0x01) 5938 #define FMC_SR4_ILS ((uint8_t)0x02) 5939 #define FMC_SR4_IFS ((uint8_t)0x04) 5940 #define FMC_SR4_IREN ((uint8_t)0x08) 5941 #define FMC_SR4_ILEN ((uint8_t)0x10) 5942 #define FMC_SR4_IFEN ((uint8_t)0x20) 5943 #define FMC_SR4_FEMPT ((uint8_t)0x40) 5946 #define FMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) 5947 #define FMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) 5948 #define FMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) 5949 #define FMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) 5950 #define FMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) 5951 #define FMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) 5952 #define FMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) 5953 #define FMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) 5954 #define FMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) 5956 #define FMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) 5957 #define FMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) 5958 #define FMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) 5959 #define FMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) 5960 #define FMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) 5961 #define FMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) 5962 #define FMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) 5963 #define FMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) 5964 #define FMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) 5966 #define FMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) 5967 #define FMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) 5968 #define FMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) 5969 #define FMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) 5970 #define FMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) 5971 #define FMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) 5972 #define FMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) 5973 #define FMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) 5974 #define FMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) 5976 #define FMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) 5977 #define FMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) 5978 #define FMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) 5979 #define FMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) 5980 #define FMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) 5981 #define FMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) 5982 #define FMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) 5983 #define FMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) 5984 #define FMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) 5987 #define FMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) 5988 #define FMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) 5989 #define FMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) 5990 #define FMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) 5991 #define FMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) 5992 #define FMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) 5993 #define FMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) 5994 #define FMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) 5995 #define FMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) 5997 #define FMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) 5998 #define FMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) 5999 #define FMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) 6000 #define FMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) 6001 #define FMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) 6002 #define FMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) 6003 #define FMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) 6004 #define FMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) 6005 #define FMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) 6007 #define FMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) 6008 #define FMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) 6009 #define FMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) 6010 #define FMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) 6011 #define FMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) 6012 #define FMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) 6013 #define FMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) 6014 #define FMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) 6015 #define FMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) 6017 #define FMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) 6018 #define FMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) 6019 #define FMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) 6020 #define FMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) 6021 #define FMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) 6022 #define FMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) 6023 #define FMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) 6024 #define FMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) 6025 #define FMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) 6028 #define FMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) 6029 #define FMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) 6030 #define FMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) 6031 #define FMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) 6032 #define FMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) 6033 #define FMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) 6034 #define FMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) 6035 #define FMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) 6036 #define FMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) 6038 #define FMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) 6039 #define FMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) 6040 #define FMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) 6041 #define FMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) 6042 #define FMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) 6043 #define FMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) 6044 #define FMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) 6045 #define FMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) 6046 #define FMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) 6048 #define FMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) 6049 #define FMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) 6050 #define FMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) 6051 #define FMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) 6052 #define FMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) 6053 #define FMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) 6054 #define FMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) 6055 #define FMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) 6056 #define FMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) 6058 #define FMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) 6059 #define FMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) 6060 #define FMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) 6061 #define FMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) 6062 #define FMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) 6063 #define FMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) 6064 #define FMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) 6065 #define FMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) 6066 #define FMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) 6069 #define FMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) 6070 #define FMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) 6071 #define FMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) 6072 #define FMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) 6073 #define FMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) 6074 #define FMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) 6075 #define FMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) 6076 #define FMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) 6077 #define FMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) 6079 #define FMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) 6080 #define FMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) 6081 #define FMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) 6082 #define FMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) 6083 #define FMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) 6084 #define FMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) 6085 #define FMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) 6086 #define FMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) 6087 #define FMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) 6089 #define FMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) 6090 #define FMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) 6091 #define FMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) 6092 #define FMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) 6093 #define FMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) 6094 #define FMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) 6095 #define FMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) 6096 #define FMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) 6097 #define FMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) 6099 #define FMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) 6100 #define FMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) 6101 #define FMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) 6102 #define FMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) 6103 #define FMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) 6104 #define FMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) 6105 #define FMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) 6106 #define FMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) 6107 #define FMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) 6110 #define FMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) 6111 #define FMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) 6112 #define FMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) 6113 #define FMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) 6114 #define FMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) 6115 #define FMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) 6116 #define FMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) 6117 #define FMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) 6118 #define FMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) 6120 #define FMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) 6121 #define FMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) 6122 #define FMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) 6123 #define FMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) 6124 #define FMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) 6125 #define FMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) 6126 #define FMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) 6127 #define FMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) 6128 #define FMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) 6130 #define FMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) 6131 #define FMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) 6132 #define FMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) 6133 #define FMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) 6134 #define FMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) 6135 #define FMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) 6136 #define FMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) 6137 #define FMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) 6138 #define FMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) 6140 #define FMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) 6141 #define FMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) 6142 #define FMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) 6143 #define FMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) 6144 #define FMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) 6145 #define FMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) 6146 #define FMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) 6147 #define FMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) 6148 #define FMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) 6151 #define FMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) 6152 #define FMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) 6153 #define FMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) 6154 #define FMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) 6155 #define FMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) 6156 #define FMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) 6157 #define FMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) 6158 #define FMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) 6159 #define FMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) 6161 #define FMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) 6162 #define FMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) 6163 #define FMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) 6164 #define FMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) 6165 #define FMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) 6166 #define FMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) 6167 #define FMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) 6168 #define FMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) 6169 #define FMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) 6171 #define FMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) 6172 #define FMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) 6173 #define FMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) 6174 #define FMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) 6175 #define FMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) 6176 #define FMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) 6177 #define FMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) 6178 #define FMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) 6179 #define FMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) 6181 #define FMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) 6182 #define FMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) 6183 #define FMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) 6184 #define FMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) 6185 #define FMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) 6186 #define FMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) 6187 #define FMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) 6188 #define FMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) 6189 #define FMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) 6192 #define FMC_PIO4_IOSET4 ((uint32_t)0x000000FF) 6193 #define FMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) 6194 #define FMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) 6195 #define FMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) 6196 #define FMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) 6197 #define FMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) 6198 #define FMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) 6199 #define FMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) 6200 #define FMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) 6202 #define FMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) 6203 #define FMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) 6204 #define FMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) 6205 #define FMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) 6206 #define FMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) 6207 #define FMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) 6208 #define FMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) 6209 #define FMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) 6210 #define FMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) 6212 #define FMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) 6213 #define FMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) 6214 #define FMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) 6215 #define FMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) 6216 #define FMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) 6217 #define FMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) 6218 #define FMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) 6219 #define FMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) 6220 #define FMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) 6222 #define FMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) 6223 #define FMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) 6224 #define FMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) 6225 #define FMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) 6226 #define FMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) 6227 #define FMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) 6228 #define FMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) 6229 #define FMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) 6230 #define FMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) 6233 #define FMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) 6236 #define FMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) 6239 #define FMC_SDCR1_NC ((uint32_t)0x00000003) 6240 #define FMC_SDCR1_NC_0 ((uint32_t)0x00000001) 6241 #define FMC_SDCR1_NC_1 ((uint32_t)0x00000002) 6243 #define FMC_SDCR1_NR ((uint32_t)0x0000000C) 6244 #define FMC_SDCR1_NR_0 ((uint32_t)0x00000004) 6245 #define FMC_SDCR1_NR_1 ((uint32_t)0x00000008) 6247 #define FMC_SDCR1_MWID ((uint32_t)0x00000030) 6248 #define FMC_SDCR1_MWID_0 ((uint32_t)0x00000010) 6249 #define FMC_SDCR1_MWID_1 ((uint32_t)0x00000020) 6251 #define FMC_SDCR1_NB ((uint32_t)0x00000040) 6253 #define FMC_SDCR1_CAS ((uint32_t)0x00000180) 6254 #define FMC_SDCR1_CAS_0 ((uint32_t)0x00000080) 6255 #define FMC_SDCR1_CAS_1 ((uint32_t)0x00000100) 6257 #define FMC_SDCR1_WP ((uint32_t)0x00000200) 6259 #define FMC_SDCR1_SDCLK ((uint32_t)0x00000C00) 6260 #define FMC_SDCR1_SDCLK_0 ((uint32_t)0x00000400) 6261 #define FMC_SDCR1_SDCLK_1 ((uint32_t)0x00000800) 6263 #define FMC_SDCR1_RBURST ((uint32_t)0x00001000) 6265 #define FMC_SDCR1_RPIPE ((uint32_t)0x00006000) 6266 #define FMC_SDCR1_RPIPE_0 ((uint32_t)0x00002000) 6267 #define FMC_SDCR1_RPIPE_1 ((uint32_t)0x00004000) 6270 #define FMC_SDCR2_NC ((uint32_t)0x00000003) 6271 #define FMC_SDCR2_NC_0 ((uint32_t)0x00000001) 6272 #define FMC_SDCR2_NC_1 ((uint32_t)0x00000002) 6274 #define FMC_SDCR2_NR ((uint32_t)0x0000000C) 6275 #define FMC_SDCR2_NR_0 ((uint32_t)0x00000004) 6276 #define FMC_SDCR2_NR_1 ((uint32_t)0x00000008) 6278 #define FMC_SDCR2_MWID ((uint32_t)0x00000030) 6279 #define FMC_SDCR2_MWID_0 ((uint32_t)0x00000010) 6280 #define FMC_SDCR2_MWID_1 ((uint32_t)0x00000020) 6282 #define FMC_SDCR2_NB ((uint32_t)0x00000040) 6284 #define FMC_SDCR2_CAS ((uint32_t)0x00000180) 6285 #define FMC_SDCR2_CAS_0 ((uint32_t)0x00000080) 6286 #define FMC_SDCR2_CAS_1 ((uint32_t)0x00000100) 6288 #define FMC_SDCR2_WP ((uint32_t)0x00000200) 6290 #define FMC_SDCR2_SDCLK ((uint32_t)0x00000C00) 6291 #define FMC_SDCR2_SDCLK_0 ((uint32_t)0x00000400) 6292 #define FMC_SDCR2_SDCLK_1 ((uint32_t)0x00000800) 6294 #define FMC_SDCR2_RBURST ((uint32_t)0x00001000) 6296 #define FMC_SDCR2_RPIPE ((uint32_t)0x00006000) 6297 #define FMC_SDCR2_RPIPE_0 ((uint32_t)0x00002000) 6298 #define FMC_SDCR2_RPIPE_1 ((uint32_t)0x00004000) 6301 #define FMC_SDTR1_TMRD ((uint32_t)0x0000000F) 6302 #define FMC_SDTR1_TMRD_0 ((uint32_t)0x00000001) 6303 #define FMC_SDTR1_TMRD_1 ((uint32_t)0x00000002) 6304 #define FMC_SDTR1_TMRD_2 ((uint32_t)0x00000004) 6305 #define FMC_SDTR1_TMRD_3 ((uint32_t)0x00000008) 6307 #define FMC_SDTR1_TXSR ((uint32_t)0x000000F0) 6308 #define FMC_SDTR1_TXSR_0 ((uint32_t)0x00000010) 6309 #define FMC_SDTR1_TXSR_1 ((uint32_t)0x00000020) 6310 #define FMC_SDTR1_TXSR_2 ((uint32_t)0x00000040) 6311 #define FMC_SDTR1_TXSR_3 ((uint32_t)0x00000080) 6313 #define FMC_SDTR1_TRAS ((uint32_t)0x00000F00) 6314 #define FMC_SDTR1_TRAS_0 ((uint32_t)0x00000100) 6315 #define FMC_SDTR1_TRAS_1 ((uint32_t)0x00000200) 6316 #define FMC_SDTR1_TRAS_2 ((uint32_t)0x00000400) 6317 #define FMC_SDTR1_TRAS_3 ((uint32_t)0x00000800) 6319 #define FMC_SDTR1_TRC ((uint32_t)0x0000F000) 6320 #define FMC_SDTR1_TRC_0 ((uint32_t)0x00001000) 6321 #define FMC_SDTR1_TRC_1 ((uint32_t)0x00002000) 6322 #define FMC_SDTR1_TRC_2 ((uint32_t)0x00004000) 6324 #define FMC_SDTR1_TWR ((uint32_t)0x000F0000) 6325 #define FMC_SDTR1_TWR_0 ((uint32_t)0x00010000) 6326 #define FMC_SDTR1_TWR_1 ((uint32_t)0x00020000) 6327 #define FMC_SDTR1_TWR_2 ((uint32_t)0x00040000) 6329 #define FMC_SDTR1_TRP ((uint32_t)0x00F00000) 6330 #define FMC_SDTR1_TRP_0 ((uint32_t)0x00100000) 6331 #define FMC_SDTR1_TRP_1 ((uint32_t)0x00200000) 6332 #define FMC_SDTR1_TRP_2 ((uint32_t)0x00400000) 6334 #define FMC_SDTR1_TRCD ((uint32_t)0x0F000000) 6335 #define FMC_SDTR1_TRCD_0 ((uint32_t)0x01000000) 6336 #define FMC_SDTR1_TRCD_1 ((uint32_t)0x02000000) 6337 #define FMC_SDTR1_TRCD_2 ((uint32_t)0x04000000) 6340 #define FMC_SDTR2_TMRD ((uint32_t)0x0000000F) 6341 #define FMC_SDTR2_TMRD_0 ((uint32_t)0x00000001) 6342 #define FMC_SDTR2_TMRD_1 ((uint32_t)0x00000002) 6343 #define FMC_SDTR2_TMRD_2 ((uint32_t)0x00000004) 6344 #define FMC_SDTR2_TMRD_3 ((uint32_t)0x00000008) 6346 #define FMC_SDTR2_TXSR ((uint32_t)0x000000F0) 6347 #define FMC_SDTR2_TXSR_0 ((uint32_t)0x00000010) 6348 #define FMC_SDTR2_TXSR_1 ((uint32_t)0x00000020) 6349 #define FMC_SDTR2_TXSR_2 ((uint32_t)0x00000040) 6350 #define FMC_SDTR2_TXSR_3 ((uint32_t)0x00000080) 6352 #define FMC_SDTR2_TRAS ((uint32_t)0x00000F00) 6353 #define FMC_SDTR2_TRAS_0 ((uint32_t)0x00000100) 6354 #define FMC_SDTR2_TRAS_1 ((uint32_t)0x00000200) 6355 #define FMC_SDTR2_TRAS_2 ((uint32_t)0x00000400) 6356 #define FMC_SDTR2_TRAS_3 ((uint32_t)0x00000800) 6358 #define FMC_SDTR2_TRC ((uint32_t)0x0000F000) 6359 #define FMC_SDTR2_TRC_0 ((uint32_t)0x00001000) 6360 #define FMC_SDTR2_TRC_1 ((uint32_t)0x00002000) 6361 #define FMC_SDTR2_TRC_2 ((uint32_t)0x00004000) 6363 #define FMC_SDTR2_TWR ((uint32_t)0x000F0000) 6364 #define FMC_SDTR2_TWR_0 ((uint32_t)0x00010000) 6365 #define FMC_SDTR2_TWR_1 ((uint32_t)0x00020000) 6366 #define FMC_SDTR2_TWR_2 ((uint32_t)0x00040000) 6368 #define FMC_SDTR2_TRP ((uint32_t)0x00F00000) 6369 #define FMC_SDTR2_TRP_0 ((uint32_t)0x00100000) 6370 #define FMC_SDTR2_TRP_1 ((uint32_t)0x00200000) 6371 #define FMC_SDTR2_TRP_2 ((uint32_t)0x00400000) 6373 #define FMC_SDTR2_TRCD ((uint32_t)0x0F000000) 6374 #define FMC_SDTR2_TRCD_0 ((uint32_t)0x01000000) 6375 #define FMC_SDTR2_TRCD_1 ((uint32_t)0x02000000) 6376 #define FMC_SDTR2_TRCD_2 ((uint32_t)0x04000000) 6379 #define FMC_SDCMR_MODE ((uint32_t)0x00000007) 6380 #define FMC_SDCMR_MODE_0 ((uint32_t)0x00000001) 6381 #define FMC_SDCMR_MODE_1 ((uint32_t)0x00000002) 6382 #define FMC_SDCMR_MODE_2 ((uint32_t)0x00000003) 6384 #define FMC_SDCMR_CTB2 ((uint32_t)0x00000008) 6386 #define FMC_SDCMR_CTB1 ((uint32_t)0x00000010) 6388 #define FMC_SDCMR_NRFS ((uint32_t)0x000001E0) 6389 #define FMC_SDCMR_NRFS_0 ((uint32_t)0x00000020) 6390 #define FMC_SDCMR_NRFS_1 ((uint32_t)0x00000040) 6391 #define FMC_SDCMR_NRFS_2 ((uint32_t)0x00000080) 6392 #define FMC_SDCMR_NRFS_3 ((uint32_t)0x00000100) 6394 #define FMC_SDCMR_MRD ((uint32_t)0x003FFE00) 6397 #define FMC_SDRTR_CRE ((uint32_t)0x00000001) 6399 #define FMC_SDRTR_COUNT ((uint32_t)0x00003FFE) 6401 #define FMC_SDRTR_REIE ((uint32_t)0x00004000) 6404 #define FMC_SDSR_RE ((uint32_t)0x00000001) 6406 #define FMC_SDSR_MODES1 ((uint32_t)0x00000006) 6407 #define FMC_SDSR_MODES1_0 ((uint32_t)0x00000002) 6408 #define FMC_SDSR_MODES1_1 ((uint32_t)0x00000004) 6410 #define FMC_SDSR_MODES2 ((uint32_t)0x00000018) 6411 #define FMC_SDSR_MODES2_0 ((uint32_t)0x00000008) 6412 #define FMC_SDSR_MODES2_1 ((uint32_t)0x00000010) 6414 #define FMC_SDSR_BUSY ((uint32_t)0x00000020) 6424 #define GPIO_MODER_MODER0 ((uint32_t)0x00000003) 6425 #define GPIO_MODER_MODER0_0 ((uint32_t)0x00000001) 6426 #define GPIO_MODER_MODER0_1 ((uint32_t)0x00000002) 6428 #define GPIO_MODER_MODER1 ((uint32_t)0x0000000C) 6429 #define GPIO_MODER_MODER1_0 ((uint32_t)0x00000004) 6430 #define GPIO_MODER_MODER1_1 ((uint32_t)0x00000008) 6432 #define GPIO_MODER_MODER2 ((uint32_t)0x00000030) 6433 #define GPIO_MODER_MODER2_0 ((uint32_t)0x00000010) 6434 #define GPIO_MODER_MODER2_1 ((uint32_t)0x00000020) 6436 #define GPIO_MODER_MODER3 ((uint32_t)0x000000C0) 6437 #define GPIO_MODER_MODER3_0 ((uint32_t)0x00000040) 6438 #define GPIO_MODER_MODER3_1 ((uint32_t)0x00000080) 6440 #define GPIO_MODER_MODER4 ((uint32_t)0x00000300) 6441 #define GPIO_MODER_MODER4_0 ((uint32_t)0x00000100) 6442 #define GPIO_MODER_MODER4_1 ((uint32_t)0x00000200) 6444 #define GPIO_MODER_MODER5 ((uint32_t)0x00000C00) 6445 #define GPIO_MODER_MODER5_0 ((uint32_t)0x00000400) 6446 #define GPIO_MODER_MODER5_1 ((uint32_t)0x00000800) 6448 #define GPIO_MODER_MODER6 ((uint32_t)0x00003000) 6449 #define GPIO_MODER_MODER6_0 ((uint32_t)0x00001000) 6450 #define GPIO_MODER_MODER6_1 ((uint32_t)0x00002000) 6452 #define GPIO_MODER_MODER7 ((uint32_t)0x0000C000) 6453 #define GPIO_MODER_MODER7_0 ((uint32_t)0x00004000) 6454 #define GPIO_MODER_MODER7_1 ((uint32_t)0x00008000) 6456 #define GPIO_MODER_MODER8 ((uint32_t)0x00030000) 6457 #define GPIO_MODER_MODER8_0 ((uint32_t)0x00010000) 6458 #define GPIO_MODER_MODER8_1 ((uint32_t)0x00020000) 6460 #define GPIO_MODER_MODER9 ((uint32_t)0x000C0000) 6461 #define GPIO_MODER_MODER9_0 ((uint32_t)0x00040000) 6462 #define GPIO_MODER_MODER9_1 ((uint32_t)0x00080000) 6464 #define GPIO_MODER_MODER10 ((uint32_t)0x00300000) 6465 #define GPIO_MODER_MODER10_0 ((uint32_t)0x00100000) 6466 #define GPIO_MODER_MODER10_1 ((uint32_t)0x00200000) 6468 #define GPIO_MODER_MODER11 ((uint32_t)0x00C00000) 6469 #define GPIO_MODER_MODER11_0 ((uint32_t)0x00400000) 6470 #define GPIO_MODER_MODER11_1 ((uint32_t)0x00800000) 6472 #define GPIO_MODER_MODER12 ((uint32_t)0x03000000) 6473 #define GPIO_MODER_MODER12_0 ((uint32_t)0x01000000) 6474 #define GPIO_MODER_MODER12_1 ((uint32_t)0x02000000) 6476 #define GPIO_MODER_MODER13 ((uint32_t)0x0C000000) 6477 #define GPIO_MODER_MODER13_0 ((uint32_t)0x04000000) 6478 #define GPIO_MODER_MODER13_1 ((uint32_t)0x08000000) 6480 #define GPIO_MODER_MODER14 ((uint32_t)0x30000000) 6481 #define GPIO_MODER_MODER14_0 ((uint32_t)0x10000000) 6482 #define GPIO_MODER_MODER14_1 ((uint32_t)0x20000000) 6484 #define GPIO_MODER_MODER15 ((uint32_t)0xC0000000) 6485 #define GPIO_MODER_MODER15_0 ((uint32_t)0x40000000) 6486 #define GPIO_MODER_MODER15_1 ((uint32_t)0x80000000) 6489 #define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001) 6490 #define GPIO_OTYPER_OT_1 ((uint32_t)0x00000002) 6491 #define GPIO_OTYPER_OT_2 ((uint32_t)0x00000004) 6492 #define GPIO_OTYPER_OT_3 ((uint32_t)0x00000008) 6493 #define GPIO_OTYPER_OT_4 ((uint32_t)0x00000010) 6494 #define GPIO_OTYPER_OT_5 ((uint32_t)0x00000020) 6495 #define GPIO_OTYPER_OT_6 ((uint32_t)0x00000040) 6496 #define GPIO_OTYPER_OT_7 ((uint32_t)0x00000080) 6497 #define GPIO_OTYPER_OT_8 ((uint32_t)0x00000100) 6498 #define GPIO_OTYPER_OT_9 ((uint32_t)0x00000200) 6499 #define GPIO_OTYPER_OT_10 ((uint32_t)0x00000400) 6500 #define GPIO_OTYPER_OT_11 ((uint32_t)0x00000800) 6501 #define GPIO_OTYPER_OT_12 ((uint32_t)0x00001000) 6502 #define GPIO_OTYPER_OT_13 ((uint32_t)0x00002000) 6503 #define GPIO_OTYPER_OT_14 ((uint32_t)0x00004000) 6504 #define GPIO_OTYPER_OT_15 ((uint32_t)0x00008000) 6507 #define GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003) 6508 #define GPIO_OSPEEDER_OSPEEDR0_0 ((uint32_t)0x00000001) 6509 #define GPIO_OSPEEDER_OSPEEDR0_1 ((uint32_t)0x00000002) 6511 #define GPIO_OSPEEDER_OSPEEDR1 ((uint32_t)0x0000000C) 6512 #define GPIO_OSPEEDER_OSPEEDR1_0 ((uint32_t)0x00000004) 6513 #define GPIO_OSPEEDER_OSPEEDR1_1 ((uint32_t)0x00000008) 6515 #define GPIO_OSPEEDER_OSPEEDR2 ((uint32_t)0x00000030) 6516 #define GPIO_OSPEEDER_OSPEEDR2_0 ((uint32_t)0x00000010) 6517 #define GPIO_OSPEEDER_OSPEEDR2_1 ((uint32_t)0x00000020) 6519 #define GPIO_OSPEEDER_OSPEEDR3 ((uint32_t)0x000000C0) 6520 #define GPIO_OSPEEDER_OSPEEDR3_0 ((uint32_t)0x00000040) 6521 #define GPIO_OSPEEDER_OSPEEDR3_1 ((uint32_t)0x00000080) 6523 #define GPIO_OSPEEDER_OSPEEDR4 ((uint32_t)0x00000300) 6524 #define GPIO_OSPEEDER_OSPEEDR4_0 ((uint32_t)0x00000100) 6525 #define GPIO_OSPEEDER_OSPEEDR4_1 ((uint32_t)0x00000200) 6527 #define GPIO_OSPEEDER_OSPEEDR5 ((uint32_t)0x00000C00) 6528 #define GPIO_OSPEEDER_OSPEEDR5_0 ((uint32_t)0x00000400) 6529 #define GPIO_OSPEEDER_OSPEEDR5_1 ((uint32_t)0x00000800) 6531 #define GPIO_OSPEEDER_OSPEEDR6 ((uint32_t)0x00003000) 6532 #define GPIO_OSPEEDER_OSPEEDR6_0 ((uint32_t)0x00001000) 6533 #define GPIO_OSPEEDER_OSPEEDR6_1 ((uint32_t)0x00002000) 6535 #define GPIO_OSPEEDER_OSPEEDR7 ((uint32_t)0x0000C000) 6536 #define GPIO_OSPEEDER_OSPEEDR7_0 ((uint32_t)0x00004000) 6537 #define GPIO_OSPEEDER_OSPEEDR7_1 ((uint32_t)0x00008000) 6539 #define GPIO_OSPEEDER_OSPEEDR8 ((uint32_t)0x00030000) 6540 #define GPIO_OSPEEDER_OSPEEDR8_0 ((uint32_t)0x00010000) 6541 #define GPIO_OSPEEDER_OSPEEDR8_1 ((uint32_t)0x00020000) 6543 #define GPIO_OSPEEDER_OSPEEDR9 ((uint32_t)0x000C0000) 6544 #define GPIO_OSPEEDER_OSPEEDR9_0 ((uint32_t)0x00040000) 6545 #define GPIO_OSPEEDER_OSPEEDR9_1 ((uint32_t)0x00080000) 6547 #define GPIO_OSPEEDER_OSPEEDR10 ((uint32_t)0x00300000) 6548 #define GPIO_OSPEEDER_OSPEEDR10_0 ((uint32_t)0x00100000) 6549 #define GPIO_OSPEEDER_OSPEEDR10_1 ((uint32_t)0x00200000) 6551 #define GPIO_OSPEEDER_OSPEEDR11 ((uint32_t)0x00C00000) 6552 #define GPIO_OSPEEDER_OSPEEDR11_0 ((uint32_t)0x00400000) 6553 #define GPIO_OSPEEDER_OSPEEDR11_1 ((uint32_t)0x00800000) 6555 #define GPIO_OSPEEDER_OSPEEDR12 ((uint32_t)0x03000000) 6556 #define GPIO_OSPEEDER_OSPEEDR12_0 ((uint32_t)0x01000000) 6557 #define GPIO_OSPEEDER_OSPEEDR12_1 ((uint32_t)0x02000000) 6559 #define GPIO_OSPEEDER_OSPEEDR13 ((uint32_t)0x0C000000) 6560 #define GPIO_OSPEEDER_OSPEEDR13_0 ((uint32_t)0x04000000) 6561 #define GPIO_OSPEEDER_OSPEEDR13_1 ((uint32_t)0x08000000) 6563 #define GPIO_OSPEEDER_OSPEEDR14 ((uint32_t)0x30000000) 6564 #define GPIO_OSPEEDER_OSPEEDR14_0 ((uint32_t)0x10000000) 6565 #define GPIO_OSPEEDER_OSPEEDR14_1 ((uint32_t)0x20000000) 6567 #define GPIO_OSPEEDER_OSPEEDR15 ((uint32_t)0xC0000000) 6568 #define GPIO_OSPEEDER_OSPEEDR15_0 ((uint32_t)0x40000000) 6569 #define GPIO_OSPEEDER_OSPEEDR15_1 ((uint32_t)0x80000000) 6572 #define GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003) 6573 #define GPIO_PUPDR_PUPDR0_0 ((uint32_t)0x00000001) 6574 #define GPIO_PUPDR_PUPDR0_1 ((uint32_t)0x00000002) 6576 #define GPIO_PUPDR_PUPDR1 ((uint32_t)0x0000000C) 6577 #define GPIO_PUPDR_PUPDR1_0 ((uint32_t)0x00000004) 6578 #define GPIO_PUPDR_PUPDR1_1 ((uint32_t)0x00000008) 6580 #define GPIO_PUPDR_PUPDR2 ((uint32_t)0x00000030) 6581 #define GPIO_PUPDR_PUPDR2_0 ((uint32_t)0x00000010) 6582 #define GPIO_PUPDR_PUPDR2_1 ((uint32_t)0x00000020) 6584 #define GPIO_PUPDR_PUPDR3 ((uint32_t)0x000000C0) 6585 #define GPIO_PUPDR_PUPDR3_0 ((uint32_t)0x00000040) 6586 #define GPIO_PUPDR_PUPDR3_1 ((uint32_t)0x00000080) 6588 #define GPIO_PUPDR_PUPDR4 ((uint32_t)0x00000300) 6589 #define GPIO_PUPDR_PUPDR4_0 ((uint32_t)0x00000100) 6590 #define GPIO_PUPDR_PUPDR4_1 ((uint32_t)0x00000200) 6592 #define GPIO_PUPDR_PUPDR5 ((uint32_t)0x00000C00) 6593 #define GPIO_PUPDR_PUPDR5_0 ((uint32_t)0x00000400) 6594 #define GPIO_PUPDR_PUPDR5_1 ((uint32_t)0x00000800) 6596 #define GPIO_PUPDR_PUPDR6 ((uint32_t)0x00003000) 6597 #define GPIO_PUPDR_PUPDR6_0 ((uint32_t)0x00001000) 6598 #define GPIO_PUPDR_PUPDR6_1 ((uint32_t)0x00002000) 6600 #define GPIO_PUPDR_PUPDR7 ((uint32_t)0x0000C000) 6601 #define GPIO_PUPDR_PUPDR7_0 ((uint32_t)0x00004000) 6602 #define GPIO_PUPDR_PUPDR7_1 ((uint32_t)0x00008000) 6604 #define GPIO_PUPDR_PUPDR8 ((uint32_t)0x00030000) 6605 #define GPIO_PUPDR_PUPDR8_0 ((uint32_t)0x00010000) 6606 #define GPIO_PUPDR_PUPDR8_1 ((uint32_t)0x00020000) 6608 #define GPIO_PUPDR_PUPDR9 ((uint32_t)0x000C0000) 6609 #define GPIO_PUPDR_PUPDR9_0 ((uint32_t)0x00040000) 6610 #define GPIO_PUPDR_PUPDR9_1 ((uint32_t)0x00080000) 6612 #define GPIO_PUPDR_PUPDR10 ((uint32_t)0x00300000) 6613 #define GPIO_PUPDR_PUPDR10_0 ((uint32_t)0x00100000) 6614 #define GPIO_PUPDR_PUPDR10_1 ((uint32_t)0x00200000) 6616 #define GPIO_PUPDR_PUPDR11 ((uint32_t)0x00C00000) 6617 #define GPIO_PUPDR_PUPDR11_0 ((uint32_t)0x00400000) 6618 #define GPIO_PUPDR_PUPDR11_1 ((uint32_t)0x00800000) 6620 #define GPIO_PUPDR_PUPDR12 ((uint32_t)0x03000000) 6621 #define GPIO_PUPDR_PUPDR12_0 ((uint32_t)0x01000000) 6622 #define GPIO_PUPDR_PUPDR12_1 ((uint32_t)0x02000000) 6624 #define GPIO_PUPDR_PUPDR13 ((uint32_t)0x0C000000) 6625 #define GPIO_PUPDR_PUPDR13_0 ((uint32_t)0x04000000) 6626 #define GPIO_PUPDR_PUPDR13_1 ((uint32_t)0x08000000) 6628 #define GPIO_PUPDR_PUPDR14 ((uint32_t)0x30000000) 6629 #define GPIO_PUPDR_PUPDR14_0 ((uint32_t)0x10000000) 6630 #define GPIO_PUPDR_PUPDR14_1 ((uint32_t)0x20000000) 6632 #define GPIO_PUPDR_PUPDR15 ((uint32_t)0xC0000000) 6633 #define GPIO_PUPDR_PUPDR15_0 ((uint32_t)0x40000000) 6634 #define GPIO_PUPDR_PUPDR15_1 ((uint32_t)0x80000000) 6637 #define GPIO_IDR_IDR_0 ((uint32_t)0x00000001) 6638 #define GPIO_IDR_IDR_1 ((uint32_t)0x00000002) 6639 #define GPIO_IDR_IDR_2 ((uint32_t)0x00000004) 6640 #define GPIO_IDR_IDR_3 ((uint32_t)0x00000008) 6641 #define GPIO_IDR_IDR_4 ((uint32_t)0x00000010) 6642 #define GPIO_IDR_IDR_5 ((uint32_t)0x00000020) 6643 #define GPIO_IDR_IDR_6 ((uint32_t)0x00000040) 6644 #define GPIO_IDR_IDR_7 ((uint32_t)0x00000080) 6645 #define GPIO_IDR_IDR_8 ((uint32_t)0x00000100) 6646 #define GPIO_IDR_IDR_9 ((uint32_t)0x00000200) 6647 #define GPIO_IDR_IDR_10 ((uint32_t)0x00000400) 6648 #define GPIO_IDR_IDR_11 ((uint32_t)0x00000800) 6649 #define GPIO_IDR_IDR_12 ((uint32_t)0x00001000) 6650 #define GPIO_IDR_IDR_13 ((uint32_t)0x00002000) 6651 #define GPIO_IDR_IDR_14 ((uint32_t)0x00004000) 6652 #define GPIO_IDR_IDR_15 ((uint32_t)0x00008000) 6654 #define GPIO_OTYPER_IDR_0 GPIO_IDR_IDR_0 6655 #define GPIO_OTYPER_IDR_1 GPIO_IDR_IDR_1 6656 #define GPIO_OTYPER_IDR_2 GPIO_IDR_IDR_2 6657 #define GPIO_OTYPER_IDR_3 GPIO_IDR_IDR_3 6658 #define GPIO_OTYPER_IDR_4 GPIO_IDR_IDR_4 6659 #define GPIO_OTYPER_IDR_5 GPIO_IDR_IDR_5 6660 #define GPIO_OTYPER_IDR_6 GPIO_IDR_IDR_6 6661 #define GPIO_OTYPER_IDR_7 GPIO_IDR_IDR_7 6662 #define GPIO_OTYPER_IDR_8 GPIO_IDR_IDR_8 6663 #define GPIO_OTYPER_IDR_9 GPIO_IDR_IDR_9 6664 #define GPIO_OTYPER_IDR_10 GPIO_IDR_IDR_10 6665 #define GPIO_OTYPER_IDR_11 GPIO_IDR_IDR_11 6666 #define GPIO_OTYPER_IDR_12 GPIO_IDR_IDR_12 6667 #define GPIO_OTYPER_IDR_13 GPIO_IDR_IDR_13 6668 #define GPIO_OTYPER_IDR_14 GPIO_IDR_IDR_14 6669 #define GPIO_OTYPER_IDR_15 GPIO_IDR_IDR_15 6672 #define GPIO_ODR_ODR_0 ((uint32_t)0x00000001) 6673 #define GPIO_ODR_ODR_1 ((uint32_t)0x00000002) 6674 #define GPIO_ODR_ODR_2 ((uint32_t)0x00000004) 6675 #define GPIO_ODR_ODR_3 ((uint32_t)0x00000008) 6676 #define GPIO_ODR_ODR_4 ((uint32_t)0x00000010) 6677 #define GPIO_ODR_ODR_5 ((uint32_t)0x00000020) 6678 #define GPIO_ODR_ODR_6 ((uint32_t)0x00000040) 6679 #define GPIO_ODR_ODR_7 ((uint32_t)0x00000080) 6680 #define GPIO_ODR_ODR_8 ((uint32_t)0x00000100) 6681 #define GPIO_ODR_ODR_9 ((uint32_t)0x00000200) 6682 #define GPIO_ODR_ODR_10 ((uint32_t)0x00000400) 6683 #define GPIO_ODR_ODR_11 ((uint32_t)0x00000800) 6684 #define GPIO_ODR_ODR_12 ((uint32_t)0x00001000) 6685 #define GPIO_ODR_ODR_13 ((uint32_t)0x00002000) 6686 #define GPIO_ODR_ODR_14 ((uint32_t)0x00004000) 6687 #define GPIO_ODR_ODR_15 ((uint32_t)0x00008000) 6689 #define GPIO_OTYPER_ODR_0 GPIO_ODR_ODR_0 6690 #define GPIO_OTYPER_ODR_1 GPIO_ODR_ODR_1 6691 #define GPIO_OTYPER_ODR_2 GPIO_ODR_ODR_2 6692 #define GPIO_OTYPER_ODR_3 GPIO_ODR_ODR_3 6693 #define GPIO_OTYPER_ODR_4 GPIO_ODR_ODR_4 6694 #define GPIO_OTYPER_ODR_5 GPIO_ODR_ODR_5 6695 #define GPIO_OTYPER_ODR_6 GPIO_ODR_ODR_6 6696 #define GPIO_OTYPER_ODR_7 GPIO_ODR_ODR_7 6697 #define GPIO_OTYPER_ODR_8 GPIO_ODR_ODR_8 6698 #define GPIO_OTYPER_ODR_9 GPIO_ODR_ODR_9 6699 #define GPIO_OTYPER_ODR_10 GPIO_ODR_ODR_10 6700 #define GPIO_OTYPER_ODR_11 GPIO_ODR_ODR_11 6701 #define GPIO_OTYPER_ODR_12 GPIO_ODR_ODR_12 6702 #define GPIO_OTYPER_ODR_13 GPIO_ODR_ODR_13 6703 #define GPIO_OTYPER_ODR_14 GPIO_ODR_ODR_14 6704 #define GPIO_OTYPER_ODR_15 GPIO_ODR_ODR_15 6707 #define GPIO_BSRR_BS_0 ((uint32_t)0x00000001) 6708 #define GPIO_BSRR_BS_1 ((uint32_t)0x00000002) 6709 #define GPIO_BSRR_BS_2 ((uint32_t)0x00000004) 6710 #define GPIO_BSRR_BS_3 ((uint32_t)0x00000008) 6711 #define GPIO_BSRR_BS_4 ((uint32_t)0x00000010) 6712 #define GPIO_BSRR_BS_5 ((uint32_t)0x00000020) 6713 #define GPIO_BSRR_BS_6 ((uint32_t)0x00000040) 6714 #define GPIO_BSRR_BS_7 ((uint32_t)0x00000080) 6715 #define GPIO_BSRR_BS_8 ((uint32_t)0x00000100) 6716 #define GPIO_BSRR_BS_9 ((uint32_t)0x00000200) 6717 #define GPIO_BSRR_BS_10 ((uint32_t)0x00000400) 6718 #define GPIO_BSRR_BS_11 ((uint32_t)0x00000800) 6719 #define GPIO_BSRR_BS_12 ((uint32_t)0x00001000) 6720 #define GPIO_BSRR_BS_13 ((uint32_t)0x00002000) 6721 #define GPIO_BSRR_BS_14 ((uint32_t)0x00004000) 6722 #define GPIO_BSRR_BS_15 ((uint32_t)0x00008000) 6723 #define GPIO_BSRR_BR_0 ((uint32_t)0x00010000) 6724 #define GPIO_BSRR_BR_1 ((uint32_t)0x00020000) 6725 #define GPIO_BSRR_BR_2 ((uint32_t)0x00040000) 6726 #define GPIO_BSRR_BR_3 ((uint32_t)0x00080000) 6727 #define GPIO_BSRR_BR_4 ((uint32_t)0x00100000) 6728 #define GPIO_BSRR_BR_5 ((uint32_t)0x00200000) 6729 #define GPIO_BSRR_BR_6 ((uint32_t)0x00400000) 6730 #define GPIO_BSRR_BR_7 ((uint32_t)0x00800000) 6731 #define GPIO_BSRR_BR_8 ((uint32_t)0x01000000) 6732 #define GPIO_BSRR_BR_9 ((uint32_t)0x02000000) 6733 #define GPIO_BSRR_BR_10 ((uint32_t)0x04000000) 6734 #define GPIO_BSRR_BR_11 ((uint32_t)0x08000000) 6735 #define GPIO_BSRR_BR_12 ((uint32_t)0x10000000) 6736 #define GPIO_BSRR_BR_13 ((uint32_t)0x20000000) 6737 #define GPIO_BSRR_BR_14 ((uint32_t)0x40000000) 6738 #define GPIO_BSRR_BR_15 ((uint32_t)0x80000000) 6746 #define HASH_CR_INIT ((uint32_t)0x00000004) 6747 #define HASH_CR_DMAE ((uint32_t)0x00000008) 6748 #define HASH_CR_DATATYPE ((uint32_t)0x00000030) 6749 #define HASH_CR_DATATYPE_0 ((uint32_t)0x00000010) 6750 #define HASH_CR_DATATYPE_1 ((uint32_t)0x00000020) 6751 #define HASH_CR_MODE ((uint32_t)0x00000040) 6752 #define HASH_CR_ALGO ((uint32_t)0x00040080) 6753 #define HASH_CR_ALGO_0 ((uint32_t)0x00000080) 6754 #define HASH_CR_ALGO_1 ((uint32_t)0x00040000) 6755 #define HASH_CR_NBW ((uint32_t)0x00000F00) 6756 #define HASH_CR_NBW_0 ((uint32_t)0x00000100) 6757 #define HASH_CR_NBW_1 ((uint32_t)0x00000200) 6758 #define HASH_CR_NBW_2 ((uint32_t)0x00000400) 6759 #define HASH_CR_NBW_3 ((uint32_t)0x00000800) 6760 #define HASH_CR_DINNE ((uint32_t)0x00001000) 6761 #define HASH_CR_MDMAT ((uint32_t)0x00002000) 6762 #define HASH_CR_LKEY ((uint32_t)0x00010000) 6765 #define HASH_STR_NBW ((uint32_t)0x0000001F) 6766 #define HASH_STR_NBW_0 ((uint32_t)0x00000001) 6767 #define HASH_STR_NBW_1 ((uint32_t)0x00000002) 6768 #define HASH_STR_NBW_2 ((uint32_t)0x00000004) 6769 #define HASH_STR_NBW_3 ((uint32_t)0x00000008) 6770 #define HASH_STR_NBW_4 ((uint32_t)0x00000010) 6771 #define HASH_STR_DCAL ((uint32_t)0x00000100) 6774 #define HASH_IMR_DINIM ((uint32_t)0x00000001) 6775 #define HASH_IMR_DCIM ((uint32_t)0x00000002) 6778 #define HASH_SR_DINIS ((uint32_t)0x00000001) 6779 #define HASH_SR_DCIS ((uint32_t)0x00000002) 6780 #define HASH_SR_DMAS ((uint32_t)0x00000004) 6781 #define HASH_SR_BUSY ((uint32_t)0x00000008) 6789 #define I2C_CR1_PE ((uint16_t)0x0001) 6790 #define I2C_CR1_SMBUS ((uint16_t)0x0002) 6791 #define I2C_CR1_SMBTYPE ((uint16_t)0x0008) 6792 #define I2C_CR1_ENARP ((uint16_t)0x0010) 6793 #define I2C_CR1_ENPEC ((uint16_t)0x0020) 6794 #define I2C_CR1_ENGC ((uint16_t)0x0040) 6795 #define I2C_CR1_NOSTRETCH ((uint16_t)0x0080) 6796 #define I2C_CR1_START ((uint16_t)0x0100) 6797 #define I2C_CR1_STOP ((uint16_t)0x0200) 6798 #define I2C_CR1_ACK ((uint16_t)0x0400) 6799 #define I2C_CR1_POS ((uint16_t)0x0800) 6800 #define I2C_CR1_PEC ((uint16_t)0x1000) 6801 #define I2C_CR1_ALERT ((uint16_t)0x2000) 6802 #define I2C_CR1_SWRST ((uint16_t)0x8000) 6805 #define I2C_CR2_FREQ ((uint16_t)0x003F) 6806 #define I2C_CR2_FREQ_0 ((uint16_t)0x0001) 6807 #define I2C_CR2_FREQ_1 ((uint16_t)0x0002) 6808 #define I2C_CR2_FREQ_2 ((uint16_t)0x0004) 6809 #define I2C_CR2_FREQ_3 ((uint16_t)0x0008) 6810 #define I2C_CR2_FREQ_4 ((uint16_t)0x0010) 6811 #define I2C_CR2_FREQ_5 ((uint16_t)0x0020) 6813 #define I2C_CR2_ITERREN ((uint16_t)0x0100) 6814 #define I2C_CR2_ITEVTEN ((uint16_t)0x0200) 6815 #define I2C_CR2_ITBUFEN ((uint16_t)0x0400) 6816 #define I2C_CR2_DMAEN ((uint16_t)0x0800) 6817 #define I2C_CR2_LAST ((uint16_t)0x1000) 6820 #define I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) 6821 #define I2C_OAR1_ADD8_9 ((uint16_t)0x0300) 6823 #define I2C_OAR1_ADD0 ((uint16_t)0x0001) 6824 #define I2C_OAR1_ADD1 ((uint16_t)0x0002) 6825 #define I2C_OAR1_ADD2 ((uint16_t)0x0004) 6826 #define I2C_OAR1_ADD3 ((uint16_t)0x0008) 6827 #define I2C_OAR1_ADD4 ((uint16_t)0x0010) 6828 #define I2C_OAR1_ADD5 ((uint16_t)0x0020) 6829 #define I2C_OAR1_ADD6 ((uint16_t)0x0040) 6830 #define I2C_OAR1_ADD7 ((uint16_t)0x0080) 6831 #define I2C_OAR1_ADD8 ((uint16_t)0x0100) 6832 #define I2C_OAR1_ADD9 ((uint16_t)0x0200) 6834 #define I2C_OAR1_ADDMODE ((uint16_t)0x8000) 6837 #define I2C_OAR2_ENDUAL ((uint8_t)0x01) 6838 #define I2C_OAR2_ADD2 ((uint8_t)0xFE) 6841 #define I2C_DR_DR ((uint8_t)0xFF) 6844 #define I2C_SR1_SB ((uint16_t)0x0001) 6845 #define I2C_SR1_ADDR ((uint16_t)0x0002) 6846 #define I2C_SR1_BTF ((uint16_t)0x0004) 6847 #define I2C_SR1_ADD10 ((uint16_t)0x0008) 6848 #define I2C_SR1_STOPF ((uint16_t)0x0010) 6849 #define I2C_SR1_RXNE ((uint16_t)0x0040) 6850 #define I2C_SR1_TXE ((uint16_t)0x0080) 6851 #define I2C_SR1_BERR ((uint16_t)0x0100) 6852 #define I2C_SR1_ARLO ((uint16_t)0x0200) 6853 #define I2C_SR1_AF ((uint16_t)0x0400) 6854 #define I2C_SR1_OVR ((uint16_t)0x0800) 6855 #define I2C_SR1_PECERR ((uint16_t)0x1000) 6856 #define I2C_SR1_TIMEOUT ((uint16_t)0x4000) 6857 #define I2C_SR1_SMBALERT ((uint16_t)0x8000) 6860 #define I2C_SR2_MSL ((uint16_t)0x0001) 6861 #define I2C_SR2_BUSY ((uint16_t)0x0002) 6862 #define I2C_SR2_TRA ((uint16_t)0x0004) 6863 #define I2C_SR2_GENCALL ((uint16_t)0x0010) 6864 #define I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) 6865 #define I2C_SR2_SMBHOST ((uint16_t)0x0040) 6866 #define I2C_SR2_DUALF ((uint16_t)0x0080) 6867 #define I2C_SR2_PEC ((uint16_t)0xFF00) 6870 #define I2C_CCR_CCR ((uint16_t)0x0FFF) 6871 #define I2C_CCR_DUTY ((uint16_t)0x4000) 6872 #define I2C_CCR_FS ((uint16_t)0x8000) 6875 #define I2C_TRISE_TRISE ((uint8_t)0x3F) 6878 #define I2C_FLTR_DNF ((uint8_t)0x0F) 6879 #define I2C_FLTR_ANOFF ((uint8_t)0x10) 6881 #if defined(STM32F410xx) || defined(STM32F446xx) 6888 #define FMPI2C_CR1_PE ((uint32_t)0x00000001) 6889 #define FMPI2C_CR1_TXIE ((uint32_t)0x00000002) 6890 #define FMPI2C_CR1_RXIE ((uint32_t)0x00000004) 6891 #define FMPI2C_CR1_ADDRIE ((uint32_t)0x00000008) 6892 #define FMPI2C_CR1_NACKIE ((uint32_t)0x00000010) 6893 #define FMPI2C_CR1_STOPIE ((uint32_t)0x00000020) 6894 #define FMPI2C_CR1_TCIE ((uint32_t)0x00000040) 6895 #define FMPI2C_CR1_ERRIE ((uint32_t)0x00000080) 6896 #define FMPI2C_CR1_DFN ((uint32_t)0x00000F00) 6897 #define FMPI2C_CR1_ANFOFF ((uint32_t)0x00001000) 6898 #define FMPI2C_CR1_SWRST ((uint32_t)0x00002000) 6899 #define FMPI2C_CR1_TXDMAEN ((uint32_t)0x00004000) 6900 #define FMPI2C_CR1_RXDMAEN ((uint32_t)0x00008000) 6901 #define FMPI2C_CR1_SBC ((uint32_t)0x00010000) 6902 #define FMPI2C_CR1_NOSTRETCH ((uint32_t)0x00020000) 6903 #define FMPI2C_CR1_WUPEN ((uint32_t)0x00040000) 6904 #define FMPI2C_CR1_GCEN ((uint32_t)0x00080000) 6905 #define FMPI2C_CR1_SMBHEN ((uint32_t)0x00100000) 6906 #define FMPI2C_CR1_SMBDEN ((uint32_t)0x00200000) 6907 #define FMPI2C_CR1_ALERTEN ((uint32_t)0x00400000) 6908 #define FMPI2C_CR1_PECEN ((uint32_t)0x00800000) 6911 #define FMPI2C_CR2_SADD ((uint32_t)0x000003FF) 6912 #define FMPI2C_CR2_RD_WRN ((uint32_t)0x00000400) 6913 #define FMPI2C_CR2_ADD10 ((uint32_t)0x00000800) 6914 #define FMPI2C_CR2_HEAD10R ((uint32_t)0x00001000) 6915 #define FMPI2C_CR2_START ((uint32_t)0x00002000) 6916 #define FMPI2C_CR2_STOP ((uint32_t)0x00004000) 6917 #define FMPI2C_CR2_NACK ((uint32_t)0x00008000) 6918 #define FMPI2C_CR2_NBYTES ((uint32_t)0x00FF0000) 6919 #define FMPI2C_CR2_RELOAD ((uint32_t)0x01000000) 6920 #define FMPI2C_CR2_AUTOEND ((uint32_t)0x02000000) 6921 #define FMPI2C_CR2_PECBYTE ((uint32_t)0x04000000) 6924 #define FMPI2C_OAR1_OA1 ((uint32_t)0x000003FF) 6925 #define FMPI2C_OAR1_OA1MODE ((uint32_t)0x00000400) 6926 #define FMPI2C_OAR1_OA1EN ((uint32_t)0x00008000) 6929 #define FMPI2C_OAR2_OA2 ((uint32_t)0x000000FE) 6930 #define FMPI2C_OAR2_OA2MSK ((uint32_t)0x00000700) 6931 #define FMPI2C_OAR2_OA2EN ((uint32_t)0x00008000) 6934 #define FMPI2C_TIMINGR_SCLL ((uint32_t)0x000000FF) 6935 #define FMPI2C_TIMINGR_SCLH ((uint32_t)0x0000FF00) 6936 #define FMPI2C_TIMINGR_SDADEL ((uint32_t)0x000F0000) 6937 #define FMPI2C_TIMINGR_SCLDEL ((uint32_t)0x00F00000) 6938 #define FMPI2C_TIMINGR_PRESC ((uint32_t)0xF0000000) 6941 #define FMPI2C_TIMEOUTR_TIMEOUTA ((uint32_t)0x00000FFF) 6942 #define FMPI2C_TIMEOUTR_TIDLE ((uint32_t)0x00001000) 6943 #define FMPI2C_TIMEOUTR_TIMOUTEN ((uint32_t)0x00008000) 6944 #define FMPI2C_TIMEOUTR_TIMEOUTB ((uint32_t)0x0FFF0000) 6945 #define FMPI2C_TIMEOUTR_TEXTEN ((uint32_t)0x80000000) 6948 #define FMPI2C_ISR_TXE ((uint32_t)0x00000001) 6949 #define FMPI2C_ISR_TXIS ((uint32_t)0x00000002) 6950 #define FMPI2C_ISR_RXNE ((uint32_t)0x00000004) 6951 #define FMPI2C_ISR_ADDR ((uint32_t)0x00000008) 6952 #define FMPI2C_ISR_NACKF ((uint32_t)0x00000010) 6953 #define FMPI2C_ISR_STOPF ((uint32_t)0x00000020) 6954 #define FMPI2C_ISR_TC ((uint32_t)0x00000040) 6955 #define FMPI2C_ISR_TCR ((uint32_t)0x00000080) 6956 #define FMPI2C_ISR_BERR ((uint32_t)0x00000100) 6957 #define FMPI2C_ISR_ARLO ((uint32_t)0x00000200) 6958 #define FMPI2C_ISR_OVR ((uint32_t)0x00000400) 6959 #define FMPI2C_ISR_PECERR ((uint32_t)0x00000800) 6960 #define FMPI2C_ISR_TIMEOUT ((uint32_t)0x00001000) 6961 #define FMPI2C_ISR_ALERT ((uint32_t)0x00002000) 6962 #define FMPI2C_ISR_BUSY ((uint32_t)0x00008000) 6963 #define FMPI2C_ISR_DIR ((uint32_t)0x00010000) 6964 #define FMPI2C_ISR_ADDCODE ((uint32_t)0x00FE0000) 6967 #define FMPI2C_ICR_ADDRCF ((uint32_t)0x00000008) 6968 #define FMPI2C_ICR_NACKCF ((uint32_t)0x00000010) 6969 #define FMPI2C_ICR_STOPCF ((uint32_t)0x00000020) 6970 #define FMPI2C_ICR_BERRCF ((uint32_t)0x00000100) 6971 #define FMPI2C_ICR_ARLOCF ((uint32_t)0x00000200) 6972 #define FMPI2C_ICR_OVRCF ((uint32_t)0x00000400) 6973 #define FMPI2C_ICR_PECCF ((uint32_t)0x00000800) 6974 #define FMPI2C_ICR_TIMOUTCF ((uint32_t)0x00001000) 6975 #define FMPI2C_ICR_ALERTCF ((uint32_t)0x00002000) 6978 #define FMPI2C_PECR_PEC ((uint32_t)0x000000FF) 6981 #define FMPI2C_RXDR_RXDATA ((uint32_t)0x000000FF) 6984 #define FMPI2C_TXDR_TXDATA ((uint32_t)0x000000FF) 6992 #define IWDG_KR_KEY ((uint16_t)0xFFFF) 6995 #define IWDG_PR_PR ((uint8_t)0x07) 6996 #define IWDG_PR_PR_0 ((uint8_t)0x01) 6997 #define IWDG_PR_PR_1 ((uint8_t)0x02) 6998 #define IWDG_PR_PR_2 ((uint8_t)0x04) 7001 #define IWDG_RLR_RL ((uint16_t)0x0FFF) 7004 #define IWDG_SR_PVU ((uint8_t)0x01) 7005 #define IWDG_SR_RVU ((uint8_t)0x02) 7015 #define LTDC_SSCR_VSH ((uint32_t)0x000007FF) 7016 #define LTDC_SSCR_HSW ((uint32_t)0x0FFF0000) 7020 #define LTDC_BPCR_AVBP ((uint32_t)0x000007FF) 7021 #define LTDC_BPCR_AHBP ((uint32_t)0x0FFF0000) 7025 #define LTDC_AWCR_AAH ((uint32_t)0x000007FF) 7026 #define LTDC_AWCR_AAW ((uint32_t)0x0FFF0000) 7030 #define LTDC_TWCR_TOTALH ((uint32_t)0x000007FF) 7031 #define LTDC_TWCR_TOTALW ((uint32_t)0x0FFF0000) 7035 #define LTDC_GCR_LTDCEN ((uint32_t)0x00000001) 7036 #define LTDC_GCR_DBW ((uint32_t)0x00000070) 7037 #define LTDC_GCR_DGW ((uint32_t)0x00000700) 7038 #define LTDC_GCR_DRW ((uint32_t)0x00007000) 7039 #define LTDC_GCR_DTEN ((uint32_t)0x00010000) 7040 #define LTDC_GCR_PCPOL ((uint32_t)0x10000000) 7041 #define LTDC_GCR_DEPOL ((uint32_t)0x20000000) 7042 #define LTDC_GCR_VSPOL ((uint32_t)0x40000000) 7043 #define LTDC_GCR_HSPOL ((uint32_t)0x80000000) 7047 #define LTDC_SRCR_IMR ((uint32_t)0x00000001) 7048 #define LTDC_SRCR_VBR ((uint32_t)0x00000002) 7052 #define LTDC_BCCR_BCBLUE ((uint32_t)0x000000FF) 7053 #define LTDC_BCCR_BCGREEN ((uint32_t)0x0000FF00) 7054 #define LTDC_BCCR_BCRED ((uint32_t)0x00FF0000) 7058 #define LTDC_IER_LIE ((uint32_t)0x00000001) 7059 #define LTDC_IER_FUIE ((uint32_t)0x00000002) 7060 #define LTDC_IER_TERRIE ((uint32_t)0x00000004) 7061 #define LTDC_IER_RRIE ((uint32_t)0x00000008) 7065 #define LTDC_ISR_LIF ((uint32_t)0x00000001) 7066 #define LTDC_ISR_FUIF ((uint32_t)0x00000002) 7067 #define LTDC_ISR_TERRIF ((uint32_t)0x00000004) 7068 #define LTDC_ISR_RRIF ((uint32_t)0x00000008) 7072 #define LTDC_ICR_CLIF ((uint32_t)0x00000001) 7073 #define LTDC_ICR_CFUIF ((uint32_t)0x00000002) 7074 #define LTDC_ICR_CTERRIF ((uint32_t)0x00000004) 7075 #define LTDC_ICR_CRRIF ((uint32_t)0x00000008) 7079 #define LTDC_LIPCR_LIPOS ((uint32_t)0x000007FF) 7083 #define LTDC_CPSR_CYPOS ((uint32_t)0x0000FFFF) 7084 #define LTDC_CPSR_CXPOS ((uint32_t)0xFFFF0000) 7088 #define LTDC_CDSR_VDES ((uint32_t)0x00000001) 7089 #define LTDC_CDSR_HDES ((uint32_t)0x00000002) 7090 #define LTDC_CDSR_VSYNCS ((uint32_t)0x00000004) 7091 #define LTDC_CDSR_HSYNCS ((uint32_t)0x00000008) 7095 #define LTDC_LxCR_LEN ((uint32_t)0x00000001) 7096 #define LTDC_LxCR_COLKEN ((uint32_t)0x00000002) 7097 #define LTDC_LxCR_CLUTEN ((uint32_t)0x00000010) 7101 #define LTDC_LxWHPCR_WHSTPOS ((uint32_t)0x00000FFF) 7102 #define LTDC_LxWHPCR_WHSPPOS ((uint32_t)0xFFFF0000) 7106 #define LTDC_LxWVPCR_WVSTPOS ((uint32_t)0x00000FFF) 7107 #define LTDC_LxWVPCR_WVSPPOS ((uint32_t)0xFFFF0000) 7111 #define LTDC_LxCKCR_CKBLUE ((uint32_t)0x000000FF) 7112 #define LTDC_LxCKCR_CKGREEN ((uint32_t)0x0000FF00) 7113 #define LTDC_LxCKCR_CKRED ((uint32_t)0x00FF0000) 7117 #define LTDC_LxPFCR_PF ((uint32_t)0x00000007) 7121 #define LTDC_LxCACR_CONSTA ((uint32_t)0x000000FF) 7125 #define LTDC_LxDCCR_DCBLUE ((uint32_t)0x000000FF) 7126 #define LTDC_LxDCCR_DCGREEN ((uint32_t)0x0000FF00) 7127 #define LTDC_LxDCCR_DCRED ((uint32_t)0x00FF0000) 7128 #define LTDC_LxDCCR_DCALPHA ((uint32_t)0xFF000000) 7132 #define LTDC_LxBFCR_BF2 ((uint32_t)0x00000007) 7133 #define LTDC_LxBFCR_BF1 ((uint32_t)0x00000700) 7137 #define LTDC_LxCFBAR_CFBADD ((uint32_t)0xFFFFFFFF) 7141 #define LTDC_LxCFBLR_CFBLL ((uint32_t)0x00001FFF) 7142 #define LTDC_LxCFBLR_CFBP ((uint32_t)0x1FFF0000) 7146 #define LTDC_LxCFBLNR_CFBLNBR ((uint32_t)0x000007FF) 7150 #define LTDC_LxCLUTWR_BLUE ((uint32_t)0x000000FF) 7151 #define LTDC_LxCLUTWR_GREEN ((uint32_t)0x0000FF00) 7152 #define LTDC_LxCLUTWR_RED ((uint32_t)0x00FF0000) 7153 #define LTDC_LxCLUTWR_CLUTADD ((uint32_t)0xFF000000) 7155 #if defined(STM32F469_479xx) 7162 #define DSI_VR ((uint32_t)0x3133302A) 7165 #define DSI_CR_EN ((uint32_t)0x00000001) 7168 #define DSI_CCR_TXECKDIV ((uint32_t)0x000000FF) 7169 #define DSI_CCR_TXECKDIV0 ((uint32_t)0x00000001) 7170 #define DSI_CCR_TXECKDIV1 ((uint32_t)0x00000002) 7171 #define DSI_CCR_TXECKDIV2 ((uint32_t)0x00000004) 7172 #define DSI_CCR_TXECKDIV3 ((uint32_t)0x00000008) 7173 #define DSI_CCR_TXECKDIV4 ((uint32_t)0x00000010) 7174 #define DSI_CCR_TXECKDIV5 ((uint32_t)0x00000020) 7175 #define DSI_CCR_TXECKDIV6 ((uint32_t)0x00000040) 7176 #define DSI_CCR_TXECKDIV7 ((uint32_t)0x00000080) 7178 #define DSI_CCR_TOCKDIV ((uint32_t)0x0000FF00) 7179 #define DSI_CCR_TOCKDIV0 ((uint32_t)0x00000100) 7180 #define DSI_CCR_TOCKDIV1 ((uint32_t)0x00000200) 7181 #define DSI_CCR_TOCKDIV2 ((uint32_t)0x00000400) 7182 #define DSI_CCR_TOCKDIV3 ((uint32_t)0x00000800) 7183 #define DSI_CCR_TOCKDIV4 ((uint32_t)0x00001000) 7184 #define DSI_CCR_TOCKDIV5 ((uint32_t)0x00002000) 7185 #define DSI_CCR_TOCKDIV6 ((uint32_t)0x00004000) 7186 #define DSI_CCR_TOCKDIV7 ((uint32_t)0x00008000) 7189 #define DSI_LVCIDR_VCID ((uint32_t)0x00000003) 7190 #define DSI_LVCIDR_VCID0 ((uint32_t)0x00000001) 7191 #define DSI_LVCIDR_VCID1 ((uint32_t)0x00000002) 7194 #define DSI_LCOLCR_COLC ((uint32_t)0x0000000F) 7195 #define DSI_LCOLCR_COLC0 ((uint32_t)0x00000001) 7196 #define DSI_LCOLCR_COLC1 ((uint32_t)0x00000020) 7197 #define DSI_LCOLCR_COLC2 ((uint32_t)0x00000040) 7198 #define DSI_LCOLCR_COLC3 ((uint32_t)0x00000080) 7200 #define DSI_LCOLCR_LPE ((uint32_t)0x00000100) 7203 #define DSI_LPCR_DEP ((uint32_t)0x00000001) 7204 #define DSI_LPCR_VSP ((uint32_t)0x00000002) 7205 #define DSI_LPCR_HSP ((uint32_t)0x00000004) 7208 #define DSI_LPMCR_VLPSIZE ((uint32_t)0x000000FF) 7209 #define DSI_LPMCR_VLPSIZE0 ((uint32_t)0x00000001) 7210 #define DSI_LPMCR_VLPSIZE1 ((uint32_t)0x00000002) 7211 #define DSI_LPMCR_VLPSIZE2 ((uint32_t)0x00000004) 7212 #define DSI_LPMCR_VLPSIZE3 ((uint32_t)0x00000008) 7213 #define DSI_LPMCR_VLPSIZE4 ((uint32_t)0x00000010) 7214 #define DSI_LPMCR_VLPSIZE5 ((uint32_t)0x00000020) 7215 #define DSI_LPMCR_VLPSIZE6 ((uint32_t)0x00000040) 7216 #define DSI_LPMCR_VLPSIZE7 ((uint32_t)0x00000080) 7218 #define DSI_LPMCR_LPSIZE ((uint32_t)0x00FF0000) 7219 #define DSI_LPMCR_LPSIZE0 ((uint32_t)0x00010000) 7220 #define DSI_LPMCR_LPSIZE1 ((uint32_t)0x00020000) 7221 #define DSI_LPMCR_LPSIZE2 ((uint32_t)0x00040000) 7222 #define DSI_LPMCR_LPSIZE3 ((uint32_t)0x00080000) 7223 #define DSI_LPMCR_LPSIZE4 ((uint32_t)0x00100000) 7224 #define DSI_LPMCR_LPSIZE5 ((uint32_t)0x00200000) 7225 #define DSI_LPMCR_LPSIZE6 ((uint32_t)0x00400000) 7226 #define DSI_LPMCR_LPSIZE7 ((uint32_t)0x00800000) 7229 #define DSI_PCR_ETTXE ((uint32_t)0x00000001) 7230 #define DSI_PCR_ETRXE ((uint32_t)0x00000002) 7231 #define DSI_PCR_BTAE ((uint32_t)0x00000004) 7232 #define DSI_PCR_ECCRXE ((uint32_t)0x00000008) 7233 #define DSI_PCR_CRCRXE ((uint32_t)0x00000010) 7236 #define DSI_GVCIDR_VCID ((uint32_t)0x00000003) 7237 #define DSI_GVCIDR_VCID0 ((uint32_t)0x00000001) 7238 #define DSI_GVCIDR_VCID1 ((uint32_t)0x00000002) 7241 #define DSI_MCR_CMDM ((uint32_t)0x00000001) 7244 #define DSI_VMCR_VMT ((uint32_t)0x00000003) 7245 #define DSI_VMCR_VMT0 ((uint32_t)0x00000001) 7246 #define DSI_VMCR_VMT1 ((uint32_t)0x00000002) 7248 #define DSI_VMCR_LPVSAE ((uint32_t)0x00000100) 7249 #define DSI_VMCR_LPVBPE ((uint32_t)0x00000200) 7250 #define DSI_VMCR_LPVFPE ((uint32_t)0x00000400) 7251 #define DSI_VMCR_LPVAE ((uint32_t)0x00000800) 7252 #define DSI_VMCR_LPHBPE ((uint32_t)0x00001000) 7253 #define DSI_VMCR_LPHFPE ((uint32_t)0x00002000) 7254 #define DSI_VMCR_FBTAAE ((uint32_t)0x00004000) 7255 #define DSI_VMCR_LPCE ((uint32_t)0x00008000) 7256 #define DSI_VMCR_PGE ((uint32_t)0x00010000) 7257 #define DSI_VMCR_PGM ((uint32_t)0x00100000) 7258 #define DSI_VMCR_PGO ((uint32_t)0x01000000) 7261 #define DSI_VPCR_VPSIZE ((uint32_t)0x00003FFF) 7262 #define DSI_VPCR_VPSIZE0 ((uint32_t)0x00000001) 7263 #define DSI_VPCR_VPSIZE1 ((uint32_t)0x00000002) 7264 #define DSI_VPCR_VPSIZE2 ((uint32_t)0x00000004) 7265 #define DSI_VPCR_VPSIZE3 ((uint32_t)0x00000008) 7266 #define DSI_VPCR_VPSIZE4 ((uint32_t)0x00000010) 7267 #define DSI_VPCR_VPSIZE5 ((uint32_t)0x00000020) 7268 #define DSI_VPCR_VPSIZE6 ((uint32_t)0x00000040) 7269 #define DSI_VPCR_VPSIZE7 ((uint32_t)0x00000080) 7270 #define DSI_VPCR_VPSIZE8 ((uint32_t)0x00000100) 7271 #define DSI_VPCR_VPSIZE9 ((uint32_t)0x00000200) 7272 #define DSI_VPCR_VPSIZE10 ((uint32_t)0x00000400) 7273 #define DSI_VPCR_VPSIZE11 ((uint32_t)0x00000800) 7274 #define DSI_VPCR_VPSIZE12 ((uint32_t)0x00001000) 7275 #define DSI_VPCR_VPSIZE13 ((uint32_t)0x00002000) 7278 #define DSI_VCCR_NUMC ((uint32_t)0x00001FFF) 7279 #define DSI_VCCR_NUMC0 ((uint32_t)0x00000001) 7280 #define DSI_VCCR_NUMC1 ((uint32_t)0x00000002) 7281 #define DSI_VCCR_NUMC2 ((uint32_t)0x00000004) 7282 #define DSI_VCCR_NUMC3 ((uint32_t)0x00000008) 7283 #define DSI_VCCR_NUMC4 ((uint32_t)0x00000010) 7284 #define DSI_VCCR_NUMC5 ((uint32_t)0x00000020) 7285 #define DSI_VCCR_NUMC6 ((uint32_t)0x00000040) 7286 #define DSI_VCCR_NUMC7 ((uint32_t)0x00000080) 7287 #define DSI_VCCR_NUMC8 ((uint32_t)0x00000100) 7288 #define DSI_VCCR_NUMC9 ((uint32_t)0x00000200) 7289 #define DSI_VCCR_NUMC10 ((uint32_t)0x00000400) 7290 #define DSI_VCCR_NUMC11 ((uint32_t)0x00000800) 7291 #define DSI_VCCR_NUMC12 ((uint32_t)0x00001000) 7294 #define DSI_VNPCR_NPSIZE ((uint32_t)0x00001FFF) 7295 #define DSI_VNPCR_NPSIZE0 ((uint32_t)0x00000001) 7296 #define DSI_VNPCR_NPSIZE1 ((uint32_t)0x00000002) 7297 #define DSI_VNPCR_NPSIZE2 ((uint32_t)0x00000004) 7298 #define DSI_VNPCR_NPSIZE3 ((uint32_t)0x00000008) 7299 #define DSI_VNPCR_NPSIZE4 ((uint32_t)0x00000010) 7300 #define DSI_VNPCR_NPSIZE5 ((uint32_t)0x00000020) 7301 #define DSI_VNPCR_NPSIZE6 ((uint32_t)0x00000040) 7302 #define DSI_VNPCR_NPSIZE7 ((uint32_t)0x00000080) 7303 #define DSI_VNPCR_NPSIZE8 ((uint32_t)0x00000100) 7304 #define DSI_VNPCR_NPSIZE9 ((uint32_t)0x00000200) 7305 #define DSI_VNPCR_NPSIZE10 ((uint32_t)0x00000400) 7306 #define DSI_VNPCR_NPSIZE11 ((uint32_t)0x00000800) 7307 #define DSI_VNPCR_NPSIZE12 ((uint32_t)0x00001000) 7310 #define DSI_VHSACR_HSA ((uint32_t)0x00000FFF) 7311 #define DSI_VHSACR_HSA0 ((uint32_t)0x00000001) 7312 #define DSI_VHSACR_HSA1 ((uint32_t)0x00000002) 7313 #define DSI_VHSACR_HSA2 ((uint32_t)0x00000004) 7314 #define DSI_VHSACR_HSA3 ((uint32_t)0x00000008) 7315 #define DSI_VHSACR_HSA4 ((uint32_t)0x00000010) 7316 #define DSI_VHSACR_HSA5 ((uint32_t)0x00000020) 7317 #define DSI_VHSACR_HSA6 ((uint32_t)0x00000040) 7318 #define DSI_VHSACR_HSA7 ((uint32_t)0x00000080) 7319 #define DSI_VHSACR_HSA8 ((uint32_t)0x00000100) 7320 #define DSI_VHSACR_HSA9 ((uint32_t)0x00000200) 7321 #define DSI_VHSACR_HSA10 ((uint32_t)0x00000400) 7322 #define DSI_VHSACR_HSA11 ((uint32_t)0x00000800) 7325 #define DSI_VHBPCR_HBP ((uint32_t)0x00000FFF) 7326 #define DSI_VHBPCR_HBP0 ((uint32_t)0x00000001) 7327 #define DSI_VHBPCR_HBP1 ((uint32_t)0x00000002) 7328 #define DSI_VHBPCR_HBP2 ((uint32_t)0x00000004) 7329 #define DSI_VHBPCR_HBP3 ((uint32_t)0x00000008) 7330 #define DSI_VHBPCR_HBP4 ((uint32_t)0x00000010) 7331 #define DSI_VHBPCR_HBP5 ((uint32_t)0x00000020) 7332 #define DSI_VHBPCR_HBP6 ((uint32_t)0x00000040) 7333 #define DSI_VHBPCR_HBP7 ((uint32_t)0x00000080) 7334 #define DSI_VHBPCR_HBP8 ((uint32_t)0x00000100) 7335 #define DSI_VHBPCR_HBP9 ((uint32_t)0x00000200) 7336 #define DSI_VHBPCR_HBP10 ((uint32_t)0x00000400) 7337 #define DSI_VHBPCR_HBP11 ((uint32_t)0x00000800) 7340 #define DSI_VLCR_HLINE ((uint32_t)0x00007FFF) 7341 #define DSI_VLCR_HLINE0 ((uint32_t)0x00000001) 7342 #define DSI_VLCR_HLINE1 ((uint32_t)0x00000002) 7343 #define DSI_VLCR_HLINE2 ((uint32_t)0x00000004) 7344 #define DSI_VLCR_HLINE3 ((uint32_t)0x00000008) 7345 #define DSI_VLCR_HLINE4 ((uint32_t)0x00000010) 7346 #define DSI_VLCR_HLINE5 ((uint32_t)0x00000020) 7347 #define DSI_VLCR_HLINE6 ((uint32_t)0x00000040) 7348 #define DSI_VLCR_HLINE7 ((uint32_t)0x00000080) 7349 #define DSI_VLCR_HLINE8 ((uint32_t)0x00000100) 7350 #define DSI_VLCR_HLINE9 ((uint32_t)0x00000200) 7351 #define DSI_VLCR_HLINE10 ((uint32_t)0x00000400) 7352 #define DSI_VLCR_HLINE11 ((uint32_t)0x00000800) 7353 #define DSI_VLCR_HLINE12 ((uint32_t)0x00001000) 7354 #define DSI_VLCR_HLINE13 ((uint32_t)0x00002000) 7355 #define DSI_VLCR_HLINE14 ((uint32_t)0x00004000) 7358 #define DSI_VVSACR_VSA ((uint32_t)0x000003FF) 7359 #define DSI_VVSACR_VSA0 ((uint32_t)0x00000001) 7360 #define DSI_VVSACR_VSA1 ((uint32_t)0x00000002) 7361 #define DSI_VVSACR_VSA2 ((uint32_t)0x00000004) 7362 #define DSI_VVSACR_VSA3 ((uint32_t)0x00000008) 7363 #define DSI_VVSACR_VSA4 ((uint32_t)0x00000010) 7364 #define DSI_VVSACR_VSA5 ((uint32_t)0x00000020) 7365 #define DSI_VVSACR_VSA6 ((uint32_t)0x00000040) 7366 #define DSI_VVSACR_VSA7 ((uint32_t)0x00000080) 7367 #define DSI_VVSACR_VSA8 ((uint32_t)0x00000100) 7368 #define DSI_VVSACR_VSA9 ((uint32_t)0x00000200) 7371 #define DSI_VVBPCR_VBP ((uint32_t)0x000003FF) 7372 #define DSI_VVBPCR_VBP0 ((uint32_t)0x00000001) 7373 #define DSI_VVBPCR_VBP1 ((uint32_t)0x00000002) 7374 #define DSI_VVBPCR_VBP2 ((uint32_t)0x00000004) 7375 #define DSI_VVBPCR_VBP3 ((uint32_t)0x00000008) 7376 #define DSI_VVBPCR_VBP4 ((uint32_t)0x00000010) 7377 #define DSI_VVBPCR_VBP5 ((uint32_t)0x00000020) 7378 #define DSI_VVBPCR_VBP6 ((uint32_t)0x00000040) 7379 #define DSI_VVBPCR_VBP7 ((uint32_t)0x00000080) 7380 #define DSI_VVBPCR_VBP8 ((uint32_t)0x00000100) 7381 #define DSI_VVBPCR_VBP9 ((uint32_t)0x00000200) 7384 #define DSI_VVFPCR_VFP ((uint32_t)0x000003FF) 7385 #define DSI_VVFPCR_VFP0 ((uint32_t)0x00000001) 7386 #define DSI_VVFPCR_VFP1 ((uint32_t)0x00000002) 7387 #define DSI_VVFPCR_VFP2 ((uint32_t)0x00000004) 7388 #define DSI_VVFPCR_VFP3 ((uint32_t)0x00000008) 7389 #define DSI_VVFPCR_VFP4 ((uint32_t)0x00000010) 7390 #define DSI_VVFPCR_VFP5 ((uint32_t)0x00000020) 7391 #define DSI_VVFPCR_VFP6 ((uint32_t)0x00000040) 7392 #define DSI_VVFPCR_VFP7 ((uint32_t)0x00000080) 7393 #define DSI_VVFPCR_VFP8 ((uint32_t)0x00000100) 7394 #define DSI_VVFPCR_VFP9 ((uint32_t)0x00000200) 7397 #define DSI_VVACR_VA ((uint32_t)0x00003FFF) 7398 #define DSI_VVACR_VA0 ((uint32_t)0x00000001) 7399 #define DSI_VVACR_VA1 ((uint32_t)0x00000002) 7400 #define DSI_VVACR_VA2 ((uint32_t)0x00000004) 7401 #define DSI_VVACR_VA3 ((uint32_t)0x00000008) 7402 #define DSI_VVACR_VA4 ((uint32_t)0x00000010) 7403 #define DSI_VVACR_VA5 ((uint32_t)0x00000020) 7404 #define DSI_VVACR_VA6 ((uint32_t)0x00000040) 7405 #define DSI_VVACR_VA7 ((uint32_t)0x00000080) 7406 #define DSI_VVACR_VA8 ((uint32_t)0x00000100) 7407 #define DSI_VVACR_VA9 ((uint32_t)0x00000200) 7408 #define DSI_VVACR_VA10 ((uint32_t)0x00000400) 7409 #define DSI_VVACR_VA11 ((uint32_t)0x00000800) 7410 #define DSI_VVACR_VA12 ((uint32_t)0x00001000) 7411 #define DSI_VVACR_VA13 ((uint32_t)0x00002000) 7414 #define DSI_LCCR_CMDSIZE ((uint32_t)0x0000FFFF) 7415 #define DSI_LCCR_CMDSIZE0 ((uint32_t)0x00000001) 7416 #define DSI_LCCR_CMDSIZE1 ((uint32_t)0x00000002) 7417 #define DSI_LCCR_CMDSIZE2 ((uint32_t)0x00000004) 7418 #define DSI_LCCR_CMDSIZE3 ((uint32_t)0x00000008) 7419 #define DSI_LCCR_CMDSIZE4 ((uint32_t)0x00000010) 7420 #define DSI_LCCR_CMDSIZE5 ((uint32_t)0x00000020) 7421 #define DSI_LCCR_CMDSIZE6 ((uint32_t)0x00000040) 7422 #define DSI_LCCR_CMDSIZE7 ((uint32_t)0x00000080) 7423 #define DSI_LCCR_CMDSIZE8 ((uint32_t)0x00000100) 7424 #define DSI_LCCR_CMDSIZE9 ((uint32_t)0x00000200) 7425 #define DSI_LCCR_CMDSIZE10 ((uint32_t)0x00000400) 7426 #define DSI_LCCR_CMDSIZE11 ((uint32_t)0x00000800) 7427 #define DSI_LCCR_CMDSIZE12 ((uint32_t)0x00001000) 7428 #define DSI_LCCR_CMDSIZE13 ((uint32_t)0x00002000) 7429 #define DSI_LCCR_CMDSIZE14 ((uint32_t)0x00004000) 7430 #define DSI_LCCR_CMDSIZE15 ((uint32_t)0x00008000) 7433 #define DSI_CMCR_TEARE ((uint32_t)0x00000001) 7434 #define DSI_CMCR_ARE ((uint32_t)0x00000002) 7435 #define DSI_CMCR_GSW0TX ((uint32_t)0x00000100) 7436 #define DSI_CMCR_GSW1TX ((uint32_t)0x00000200) 7437 #define DSI_CMCR_GSW2TX ((uint32_t)0x00000400) 7438 #define DSI_CMCR_GSR0TX ((uint32_t)0x00000800) 7439 #define DSI_CMCR_GSR1TX ((uint32_t)0x00001000) 7440 #define DSI_CMCR_GSR2TX ((uint32_t)0x00002000) 7441 #define DSI_CMCR_GLWTX ((uint32_t)0x00004000) 7442 #define DSI_CMCR_DSW0TX ((uint32_t)0x00010000) 7443 #define DSI_CMCR_DSW1TX ((uint32_t)0x00020000) 7444 #define DSI_CMCR_DSR0TX ((uint32_t)0x00040000) 7445 #define DSI_CMCR_DLWTX ((uint32_t)0x00080000) 7446 #define DSI_CMCR_MRDPS ((uint32_t)0x01000000) 7449 #define DSI_GHCR_DT ((uint32_t)0x0000003F) 7450 #define DSI_GHCR_DT0 ((uint32_t)0x00000001) 7451 #define DSI_GHCR_DT1 ((uint32_t)0x00000002) 7452 #define DSI_GHCR_DT2 ((uint32_t)0x00000004) 7453 #define DSI_GHCR_DT3 ((uint32_t)0x00000008) 7454 #define DSI_GHCR_DT4 ((uint32_t)0x00000010) 7455 #define DSI_GHCR_DT5 ((uint32_t)0x00000020) 7457 #define DSI_GHCR_VCID ((uint32_t)0x000000C0) 7458 #define DSI_GHCR_VCID0 ((uint32_t)0x00000040) 7459 #define DSI_GHCR_VCID1 ((uint32_t)0x00000080) 7461 #define DSI_GHCR_WCLSB ((uint32_t)0x0000FF00) 7462 #define DSI_GHCR_WCLSB0 ((uint32_t)0x00000100) 7463 #define DSI_GHCR_WCLSB1 ((uint32_t)0x00000200) 7464 #define DSI_GHCR_WCLSB2 ((uint32_t)0x00000400) 7465 #define DSI_GHCR_WCLSB3 ((uint32_t)0x00000800) 7466 #define DSI_GHCR_WCLSB4 ((uint32_t)0x00001000) 7467 #define DSI_GHCR_WCLSB5 ((uint32_t)0x00002000) 7468 #define DSI_GHCR_WCLSB6 ((uint32_t)0x00004000) 7469 #define DSI_GHCR_WCLSB7 ((uint32_t)0x00008000) 7471 #define DSI_GHCR_WCMSB ((uint32_t)0x00FF0000) 7472 #define DSI_GHCR_WCMSB0 ((uint32_t)0x00010000) 7473 #define DSI_GHCR_WCMSB1 ((uint32_t)0x00020000) 7474 #define DSI_GHCR_WCMSB2 ((uint32_t)0x00040000) 7475 #define DSI_GHCR_WCMSB3 ((uint32_t)0x00080000) 7476 #define DSI_GHCR_WCMSB4 ((uint32_t)0x00100000) 7477 #define DSI_GHCR_WCMSB5 ((uint32_t)0x00200000) 7478 #define DSI_GHCR_WCMSB6 ((uint32_t)0x00400000) 7479 #define DSI_GHCR_WCMSB7 ((uint32_t)0x00800000) 7482 #define DSI_GPDR_DATA1 ((uint32_t)0x000000FF) 7483 #define DSI_GPDR_DATA1_0 ((uint32_t)0x00000001) 7484 #define DSI_GPDR_DATA1_1 ((uint32_t)0x00000002) 7485 #define DSI_GPDR_DATA1_2 ((uint32_t)0x00000004) 7486 #define DSI_GPDR_DATA1_3 ((uint32_t)0x00000008) 7487 #define DSI_GPDR_DATA1_4 ((uint32_t)0x00000010) 7488 #define DSI_GPDR_DATA1_5 ((uint32_t)0x00000020) 7489 #define DSI_GPDR_DATA1_6 ((uint32_t)0x00000040) 7490 #define DSI_GPDR_DATA1_7 ((uint32_t)0x00000080) 7492 #define DSI_GPDR_DATA2 ((uint32_t)0x0000FF00) 7493 #define DSI_GPDR_DATA2_0 ((uint32_t)0x00000100) 7494 #define DSI_GPDR_DATA2_1 ((uint32_t)0x00000200) 7495 #define DSI_GPDR_DATA2_2 ((uint32_t)0x00000400) 7496 #define DSI_GPDR_DATA2_3 ((uint32_t)0x00000800) 7497 #define DSI_GPDR_DATA2_4 ((uint32_t)0x00001000) 7498 #define DSI_GPDR_DATA2_5 ((uint32_t)0x00002000) 7499 #define DSI_GPDR_DATA2_6 ((uint32_t)0x00004000) 7500 #define DSI_GPDR_DATA2_7 ((uint32_t)0x00008000) 7502 #define DSI_GPDR_DATA3 ((uint32_t)0x00FF0000) 7503 #define DSI_GPDR_DATA3_0 ((uint32_t)0x00010000) 7504 #define DSI_GPDR_DATA3_1 ((uint32_t)0x00020000) 7505 #define DSI_GPDR_DATA3_2 ((uint32_t)0x00040000) 7506 #define DSI_GPDR_DATA3_3 ((uint32_t)0x00080000) 7507 #define DSI_GPDR_DATA3_4 ((uint32_t)0x00100000) 7508 #define DSI_GPDR_DATA3_5 ((uint32_t)0x00200000) 7509 #define DSI_GPDR_DATA3_6 ((uint32_t)0x00400000) 7510 #define DSI_GPDR_DATA3_7 ((uint32_t)0x00800000) 7512 #define DSI_GPDR_DATA4 ((uint32_t)0xFF000000) 7513 #define DSI_GPDR_DATA4_0 ((uint32_t)0x01000000) 7514 #define DSI_GPDR_DATA4_1 ((uint32_t)0x02000000) 7515 #define DSI_GPDR_DATA4_2 ((uint32_t)0x04000000) 7516 #define DSI_GPDR_DATA4_3 ((uint32_t)0x08000000) 7517 #define DSI_GPDR_DATA4_4 ((uint32_t)0x10000000) 7518 #define DSI_GPDR_DATA4_5 ((uint32_t)0x20000000) 7519 #define DSI_GPDR_DATA4_6 ((uint32_t)0x40000000) 7520 #define DSI_GPDR_DATA4_7 ((uint32_t)0x80000000) 7523 #define DSI_GPSR_CMDFE ((uint32_t)0x00000001) 7524 #define DSI_GPSR_CMDFF ((uint32_t)0x00000002) 7525 #define DSI_GPSR_PWRFE ((uint32_t)0x00000004) 7526 #define DSI_GPSR_PWRFF ((uint32_t)0x00000008) 7527 #define DSI_GPSR_PRDFE ((uint32_t)0x00000010) 7528 #define DSI_GPSR_PRDFF ((uint32_t)0x00000020) 7529 #define DSI_GPSR_RCB ((uint32_t)0x00000040) 7532 #define DSI_TCCR0_LPRX_TOCNT ((uint32_t)0x0000FFFF) 7533 #define DSI_TCCR0_LPRX_TOCNT0 ((uint32_t)0x00000001) 7534 #define DSI_TCCR0_LPRX_TOCNT1 ((uint32_t)0x00000002) 7535 #define DSI_TCCR0_LPRX_TOCNT2 ((uint32_t)0x00000004) 7536 #define DSI_TCCR0_LPRX_TOCNT3 ((uint32_t)0x00000008) 7537 #define DSI_TCCR0_LPRX_TOCNT4 ((uint32_t)0x00000010) 7538 #define DSI_TCCR0_LPRX_TOCNT5 ((uint32_t)0x00000020) 7539 #define DSI_TCCR0_LPRX_TOCNT6 ((uint32_t)0x00000040) 7540 #define DSI_TCCR0_LPRX_TOCNT7 ((uint32_t)0x00000080) 7541 #define DSI_TCCR0_LPRX_TOCNT8 ((uint32_t)0x00000100) 7542 #define DSI_TCCR0_LPRX_TOCNT9 ((uint32_t)0x00000200) 7543 #define DSI_TCCR0_LPRX_TOCNT10 ((uint32_t)0x00000400) 7544 #define DSI_TCCR0_LPRX_TOCNT11 ((uint32_t)0x00000800) 7545 #define DSI_TCCR0_LPRX_TOCNT12 ((uint32_t)0x00001000) 7546 #define DSI_TCCR0_LPRX_TOCNT13 ((uint32_t)0x00002000) 7547 #define DSI_TCCR0_LPRX_TOCNT14 ((uint32_t)0x00004000) 7548 #define DSI_TCCR0_LPRX_TOCNT15 ((uint32_t)0x00008000) 7550 #define DSI_TCCR0_HSTX_TOCNT ((uint32_t)0xFFFF0000) 7551 #define DSI_TCCR0_HSTX_TOCNT0 ((uint32_t)0x00010000) 7552 #define DSI_TCCR0_HSTX_TOCNT1 ((uint32_t)0x00020000) 7553 #define DSI_TCCR0_HSTX_TOCNT2 ((uint32_t)0x00040000) 7554 #define DSI_TCCR0_HSTX_TOCNT3 ((uint32_t)0x00080000) 7555 #define DSI_TCCR0_HSTX_TOCNT4 ((uint32_t)0x00100000) 7556 #define DSI_TCCR0_HSTX_TOCNT5 ((uint32_t)0x00200000) 7557 #define DSI_TCCR0_HSTX_TOCNT6 ((uint32_t)0x00400000) 7558 #define DSI_TCCR0_HSTX_TOCNT7 ((uint32_t)0x00800000) 7559 #define DSI_TCCR0_HSTX_TOCNT8 ((uint32_t)0x01000000) 7560 #define DSI_TCCR0_HSTX_TOCNT9 ((uint32_t)0x02000000) 7561 #define DSI_TCCR0_HSTX_TOCNT10 ((uint32_t)0x04000000) 7562 #define DSI_TCCR0_HSTX_TOCNT11 ((uint32_t)0x08000000) 7563 #define DSI_TCCR0_HSTX_TOCNT12 ((uint32_t)0x10000000) 7564 #define DSI_TCCR0_HSTX_TOCNT13 ((uint32_t)0x20000000) 7565 #define DSI_TCCR0_HSTX_TOCNT14 ((uint32_t)0x40000000) 7566 #define DSI_TCCR0_HSTX_TOCNT15 ((uint32_t)0x80000000) 7569 #define DSI_TCCR1_HSRD_TOCNT ((uint32_t)0x0000FFFF) 7570 #define DSI_TCCR1_HSRD_TOCNT0 ((uint32_t)0x00000001) 7571 #define DSI_TCCR1_HSRD_TOCNT1 ((uint32_t)0x00000002) 7572 #define DSI_TCCR1_HSRD_TOCNT2 ((uint32_t)0x00000004) 7573 #define DSI_TCCR1_HSRD_TOCNT3 ((uint32_t)0x00000008) 7574 #define DSI_TCCR1_HSRD_TOCNT4 ((uint32_t)0x00000010) 7575 #define DSI_TCCR1_HSRD_TOCNT5 ((uint32_t)0x00000020) 7576 #define DSI_TCCR1_HSRD_TOCNT6 ((uint32_t)0x00000040) 7577 #define DSI_TCCR1_HSRD_TOCNT7 ((uint32_t)0x00000080) 7578 #define DSI_TCCR1_HSRD_TOCNT8 ((uint32_t)0x00000100) 7579 #define DSI_TCCR1_HSRD_TOCNT9 ((uint32_t)0x00000200) 7580 #define DSI_TCCR1_HSRD_TOCNT10 ((uint32_t)0x00000400) 7581 #define DSI_TCCR1_HSRD_TOCNT11 ((uint32_t)0x00000800) 7582 #define DSI_TCCR1_HSRD_TOCNT12 ((uint32_t)0x00001000) 7583 #define DSI_TCCR1_HSRD_TOCNT13 ((uint32_t)0x00002000) 7584 #define DSI_TCCR1_HSRD_TOCNT14 ((uint32_t)0x00004000) 7585 #define DSI_TCCR1_HSRD_TOCNT15 ((uint32_t)0x00008000) 7588 #define DSI_TCCR2_LPRD_TOCNT ((uint32_t)0x0000FFFF) 7589 #define DSI_TCCR2_LPRD_TOCNT0 ((uint32_t)0x00000001) 7590 #define DSI_TCCR2_LPRD_TOCNT1 ((uint32_t)0x00000002) 7591 #define DSI_TCCR2_LPRD_TOCNT2 ((uint32_t)0x00000004) 7592 #define DSI_TCCR2_LPRD_TOCNT3 ((uint32_t)0x00000008) 7593 #define DSI_TCCR2_LPRD_TOCNT4 ((uint32_t)0x00000010) 7594 #define DSI_TCCR2_LPRD_TOCNT5 ((uint32_t)0x00000020) 7595 #define DSI_TCCR2_LPRD_TOCNT6 ((uint32_t)0x00000040) 7596 #define DSI_TCCR2_LPRD_TOCNT7 ((uint32_t)0x00000080) 7597 #define DSI_TCCR2_LPRD_TOCNT8 ((uint32_t)0x00000100) 7598 #define DSI_TCCR2_LPRD_TOCNT9 ((uint32_t)0x00000200) 7599 #define DSI_TCCR2_LPRD_TOCNT10 ((uint32_t)0x00000400) 7600 #define DSI_TCCR2_LPRD_TOCNT11 ((uint32_t)0x00000800) 7601 #define DSI_TCCR2_LPRD_TOCNT12 ((uint32_t)0x00001000) 7602 #define DSI_TCCR2_LPRD_TOCNT13 ((uint32_t)0x00002000) 7603 #define DSI_TCCR2_LPRD_TOCNT14 ((uint32_t)0x00004000) 7604 #define DSI_TCCR2_LPRD_TOCNT15 ((uint32_t)0x00008000) 7607 #define DSI_TCCR3_HSWR_TOCNT ((uint32_t)0x0000FFFF) 7608 #define DSI_TCCR3_HSWR_TOCNT0 ((uint32_t)0x00000001) 7609 #define DSI_TCCR3_HSWR_TOCNT1 ((uint32_t)0x00000002) 7610 #define DSI_TCCR3_HSWR_TOCNT2 ((uint32_t)0x00000004) 7611 #define DSI_TCCR3_HSWR_TOCNT3 ((uint32_t)0x00000008) 7612 #define DSI_TCCR3_HSWR_TOCNT4 ((uint32_t)0x00000010) 7613 #define DSI_TCCR3_HSWR_TOCNT5 ((uint32_t)0x00000020) 7614 #define DSI_TCCR3_HSWR_TOCNT6 ((uint32_t)0x00000040) 7615 #define DSI_TCCR3_HSWR_TOCNT7 ((uint32_t)0x00000080) 7616 #define DSI_TCCR3_HSWR_TOCNT8 ((uint32_t)0x00000100) 7617 #define DSI_TCCR3_HSWR_TOCNT9 ((uint32_t)0x00000200) 7618 #define DSI_TCCR3_HSWR_TOCNT10 ((uint32_t)0x00000400) 7619 #define DSI_TCCR3_HSWR_TOCNT11 ((uint32_t)0x00000800) 7620 #define DSI_TCCR3_HSWR_TOCNT12 ((uint32_t)0x00001000) 7621 #define DSI_TCCR3_HSWR_TOCNT13 ((uint32_t)0x00002000) 7622 #define DSI_TCCR3_HSWR_TOCNT14 ((uint32_t)0x00004000) 7623 #define DSI_TCCR3_HSWR_TOCNT15 ((uint32_t)0x00008000) 7625 #define DSI_TCCR3_PM ((uint32_t)0x01000000) 7628 #define DSI_TCCR4_LPWR_TOCNT ((uint32_t)0x0000FFFF) 7629 #define DSI_TCCR4_LPWR_TOCNT0 ((uint32_t)0x00000001) 7630 #define DSI_TCCR4_LPWR_TOCNT1 ((uint32_t)0x00000002) 7631 #define DSI_TCCR4_LPWR_TOCNT2 ((uint32_t)0x00000004) 7632 #define DSI_TCCR4_LPWR_TOCNT3 ((uint32_t)0x00000008) 7633 #define DSI_TCCR4_LPWR_TOCNT4 ((uint32_t)0x00000010) 7634 #define DSI_TCCR4_LPWR_TOCNT5 ((uint32_t)0x00000020) 7635 #define DSI_TCCR4_LPWR_TOCNT6 ((uint32_t)0x00000040) 7636 #define DSI_TCCR4_LPWR_TOCNT7 ((uint32_t)0x00000080) 7637 #define DSI_TCCR4_LPWR_TOCNT8 ((uint32_t)0x00000100) 7638 #define DSI_TCCR4_LPWR_TOCNT9 ((uint32_t)0x00000200) 7639 #define DSI_TCCR4_LPWR_TOCNT10 ((uint32_t)0x00000400) 7640 #define DSI_TCCR4_LPWR_TOCNT11 ((uint32_t)0x00000800) 7641 #define DSI_TCCR4_LPWR_TOCNT12 ((uint32_t)0x00001000) 7642 #define DSI_TCCR4_LPWR_TOCNT13 ((uint32_t)0x00002000) 7643 #define DSI_TCCR4_LPWR_TOCNT14 ((uint32_t)0x00004000) 7644 #define DSI_TCCR4_LPWR_TOCNT15 ((uint32_t)0x00008000) 7647 #define DSI_TCCR5_BTA_TOCNT ((uint32_t)0x0000FFFF) 7648 #define DSI_TCCR5_BTA_TOCNT0 ((uint32_t)0x00000001) 7649 #define DSI_TCCR5_BTA_TOCNT1 ((uint32_t)0x00000002) 7650 #define DSI_TCCR5_BTA_TOCNT2 ((uint32_t)0x00000004) 7651 #define DSI_TCCR5_BTA_TOCNT3 ((uint32_t)0x00000008) 7652 #define DSI_TCCR5_BTA_TOCNT4 ((uint32_t)0x00000010) 7653 #define DSI_TCCR5_BTA_TOCNT5 ((uint32_t)0x00000020) 7654 #define DSI_TCCR5_BTA_TOCNT6 ((uint32_t)0x00000040) 7655 #define DSI_TCCR5_BTA_TOCNT7 ((uint32_t)0x00000080) 7656 #define DSI_TCCR5_BTA_TOCNT8 ((uint32_t)0x00000100) 7657 #define DSI_TCCR5_BTA_TOCNT9 ((uint32_t)0x00000200) 7658 #define DSI_TCCR5_BTA_TOCNT10 ((uint32_t)0x00000400) 7659 #define DSI_TCCR5_BTA_TOCNT11 ((uint32_t)0x00000800) 7660 #define DSI_TCCR5_BTA_TOCNT12 ((uint32_t)0x00001000) 7661 #define DSI_TCCR5_BTA_TOCNT13 ((uint32_t)0x00002000) 7662 #define DSI_TCCR5_BTA_TOCNT14 ((uint32_t)0x00004000) 7663 #define DSI_TCCR5_BTA_TOCNT15 ((uint32_t)0x00008000) 7666 #define DSI_TDCR_3DM ((uint32_t)0x00000003) 7667 #define DSI_TDCR_3DM0 ((uint32_t)0x00000001) 7668 #define DSI_TDCR_3DM1 ((uint32_t)0x00000002) 7670 #define DSI_TDCR_3DF ((uint32_t)0x0000000C) 7671 #define DSI_TDCR_3DF0 ((uint32_t)0x00000004) 7672 #define DSI_TDCR_3DF1 ((uint32_t)0x00000008) 7674 #define DSI_TDCR_SVS ((uint32_t)0x00000010) 7675 #define DSI_TDCR_RF ((uint32_t)0x00000020) 7676 #define DSI_TDCR_S3DC ((uint32_t)0x00010000) 7679 #define DSI_CLCR_DPCC ((uint32_t)0x00000001) 7680 #define DSI_CLCR_ACR ((uint32_t)0x00000002) 7683 #define DSI_CLTCR_LP2HS_TIME ((uint32_t)0x000003FF) 7684 #define DSI_CLTCR_LP2HS_TIME0 ((uint32_t)0x00000001) 7685 #define DSI_CLTCR_LP2HS_TIME1 ((uint32_t)0x00000002) 7686 #define DSI_CLTCR_LP2HS_TIME2 ((uint32_t)0x00000004) 7687 #define DSI_CLTCR_LP2HS_TIME3 ((uint32_t)0x00000008) 7688 #define DSI_CLTCR_LP2HS_TIME4 ((uint32_t)0x00000010) 7689 #define DSI_CLTCR_LP2HS_TIME5 ((uint32_t)0x00000020) 7690 #define DSI_CLTCR_LP2HS_TIME6 ((uint32_t)0x00000040) 7691 #define DSI_CLTCR_LP2HS_TIME7 ((uint32_t)0x00000080) 7692 #define DSI_CLTCR_LP2HS_TIME8 ((uint32_t)0x00000100) 7693 #define DSI_CLTCR_LP2HS_TIME9 ((uint32_t)0x00000200) 7695 #define DSI_CLTCR_HS2LP_TIME ((uint32_t)0x03FF0000) 7696 #define DSI_CLTCR_HS2LP_TIME0 ((uint32_t)0x00010000) 7697 #define DSI_CLTCR_HS2LP_TIME1 ((uint32_t)0x00020000) 7698 #define DSI_CLTCR_HS2LP_TIME2 ((uint32_t)0x00040000) 7699 #define DSI_CLTCR_HS2LP_TIME3 ((uint32_t)0x00080000) 7700 #define DSI_CLTCR_HS2LP_TIME4 ((uint32_t)0x00100000) 7701 #define DSI_CLTCR_HS2LP_TIME5 ((uint32_t)0x00200000) 7702 #define DSI_CLTCR_HS2LP_TIME6 ((uint32_t)0x00400000) 7703 #define DSI_CLTCR_HS2LP_TIME7 ((uint32_t)0x00800000) 7704 #define DSI_CLTCR_HS2LP_TIME8 ((uint32_t)0x01000000) 7705 #define DSI_CLTCR_HS2LP_TIME9 ((uint32_t)0x02000000) 7708 #define DSI_DLTCR_MRD_TIME ((uint32_t)0x00007FFF) 7709 #define DSI_DLTCR_MRD_TIME0 ((uint32_t)0x00000001) 7710 #define DSI_DLTCR_MRD_TIME1 ((uint32_t)0x00000002) 7711 #define DSI_DLTCR_MRD_TIME2 ((uint32_t)0x00000004) 7712 #define DSI_DLTCR_MRD_TIME3 ((uint32_t)0x00000008) 7713 #define DSI_DLTCR_MRD_TIME4 ((uint32_t)0x00000010) 7714 #define DSI_DLTCR_MRD_TIME5 ((uint32_t)0x00000020) 7715 #define DSI_DLTCR_MRD_TIME6 ((uint32_t)0x00000040) 7716 #define DSI_DLTCR_MRD_TIME7 ((uint32_t)0x00000080) 7717 #define DSI_DLTCR_MRD_TIME8 ((uint32_t)0x00000100) 7718 #define DSI_DLTCR_MRD_TIME9 ((uint32_t)0x00000200) 7719 #define DSI_DLTCR_MRD_TIME10 ((uint32_t)0x00000400) 7720 #define DSI_DLTCR_MRD_TIME11 ((uint32_t)0x00000800) 7721 #define DSI_DLTCR_MRD_TIME12 ((uint32_t)0x00001000) 7722 #define DSI_DLTCR_MRD_TIME13 ((uint32_t)0x00002000) 7723 #define DSI_DLTCR_MRD_TIME14 ((uint32_t)0x00004000) 7725 #define DSI_DLTCR_LP2HS_TIME ((uint32_t)0x00FF0000) 7726 #define DSI_DLTCR_LP2HS_TIME0 ((uint32_t)0x00010000) 7727 #define DSI_DLTCR_LP2HS_TIME1 ((uint32_t)0x00020000) 7728 #define DSI_DLTCR_LP2HS_TIME2 ((uint32_t)0x00040000) 7729 #define DSI_DLTCR_LP2HS_TIME3 ((uint32_t)0x00080000) 7730 #define DSI_DLTCR_LP2HS_TIME4 ((uint32_t)0x00100000) 7731 #define DSI_DLTCR_LP2HS_TIME5 ((uint32_t)0x00200000) 7732 #define DSI_DLTCR_LP2HS_TIME6 ((uint32_t)0x00400000) 7733 #define DSI_DLTCR_LP2HS_TIME7 ((uint32_t)0x00800000) 7735 #define DSI_DLTCR_HS2LP_TIME ((uint32_t)0xFF000000) 7736 #define DSI_DLTCR_HS2LP_TIME0 ((uint32_t)0x01000000) 7737 #define DSI_DLTCR_HS2LP_TIME1 ((uint32_t)0x02000000) 7738 #define DSI_DLTCR_HS2LP_TIME2 ((uint32_t)0x04000000) 7739 #define DSI_DLTCR_HS2LP_TIME3 ((uint32_t)0x08000000) 7740 #define DSI_DLTCR_HS2LP_TIME4 ((uint32_t)0x10000000) 7741 #define DSI_DLTCR_HS2LP_TIME5 ((uint32_t)0x20000000) 7742 #define DSI_DLTCR_HS2LP_TIME6 ((uint32_t)0x40000000) 7743 #define DSI_DLTCR_HS2LP_TIME7 ((uint32_t)0x80000000) 7746 #define DSI_PCTLR_DEN ((uint32_t)0x00000002) 7747 #define DSI_PCTLR_CKE ((uint32_t)0x00000004) 7750 #define DSI_PCONFR_NL ((uint32_t)0x00000003) 7751 #define DSI_PCONFR_NL0 ((uint32_t)0x00000001) 7752 #define DSI_PCONFR_NL1 ((uint32_t)0x00000002) 7754 #define DSI_PCONFR_SW_TIME ((uint32_t)0x0000FF00) 7755 #define DSI_PCONFR_SW_TIME0 ((uint32_t)0x00000100) 7756 #define DSI_PCONFR_SW_TIME1 ((uint32_t)0x00000200) 7757 #define DSI_PCONFR_SW_TIME2 ((uint32_t)0x00000400) 7758 #define DSI_PCONFR_SW_TIME3 ((uint32_t)0x00000800) 7759 #define DSI_PCONFR_SW_TIME4 ((uint32_t)0x00001000) 7760 #define DSI_PCONFR_SW_TIME5 ((uint32_t)0x00002000) 7761 #define DSI_PCONFR_SW_TIME6 ((uint32_t)0x00004000) 7762 #define DSI_PCONFR_SW_TIME7 ((uint32_t)0x00008000) 7765 #define DSI_PUCR_URCL ((uint32_t)0x00000001) 7766 #define DSI_PUCR_UECL ((uint32_t)0x00000002) 7767 #define DSI_PUCR_URDL ((uint32_t)0x00000004) 7768 #define DSI_PUCR_UEDL ((uint32_t)0x00000008) 7771 #define DSI_PTTCR_TX_TRIG ((uint32_t)0x0000000F) 7772 #define DSI_PTTCR_TX_TRIG0 ((uint32_t)0x00000001) 7773 #define DSI_PTTCR_TX_TRIG1 ((uint32_t)0x00000002) 7774 #define DSI_PTTCR_TX_TRIG2 ((uint32_t)0x00000004) 7775 #define DSI_PTTCR_TX_TRIG3 ((uint32_t)0x00000008) 7778 #define DSI_PSR_PD ((uint32_t)0x00000002) 7779 #define DSI_PSR_PSSC ((uint32_t)0x00000004) 7780 #define DSI_PSR_UANC ((uint32_t)0x00000008) 7781 #define DSI_PSR_PSS0 ((uint32_t)0x00000010) 7782 #define DSI_PSR_UAN0 ((uint32_t)0x00000020) 7783 #define DSI_PSR_RUE0 ((uint32_t)0x00000040) 7784 #define DSI_PSR_PSS1 ((uint32_t)0x00000080) 7785 #define DSI_PSR_UAN1 ((uint32_t)0x00000100) 7788 #define DSI_ISR0_AE0 ((uint32_t)0x00000001) 7789 #define DSI_ISR0_AE1 ((uint32_t)0x00000002) 7790 #define DSI_ISR0_AE2 ((uint32_t)0x00000004) 7791 #define DSI_ISR0_AE3 ((uint32_t)0x00000008) 7792 #define DSI_ISR0_AE4 ((uint32_t)0x00000010) 7793 #define DSI_ISR0_AE5 ((uint32_t)0x00000020) 7794 #define DSI_ISR0_AE6 ((uint32_t)0x00000040) 7795 #define DSI_ISR0_AE7 ((uint32_t)0x00000080) 7796 #define DSI_ISR0_AE8 ((uint32_t)0x00000100) 7797 #define DSI_ISR0_AE9 ((uint32_t)0x00000200) 7798 #define DSI_ISR0_AE10 ((uint32_t)0x00000400) 7799 #define DSI_ISR0_AE11 ((uint32_t)0x00000800) 7800 #define DSI_ISR0_AE12 ((uint32_t)0x00001000) 7801 #define DSI_ISR0_AE13 ((uint32_t)0x00002000) 7802 #define DSI_ISR0_AE14 ((uint32_t)0x00004000) 7803 #define DSI_ISR0_AE15 ((uint32_t)0x00008000) 7804 #define DSI_ISR0_PE0 ((uint32_t)0x00010000) 7805 #define DSI_ISR0_PE1 ((uint32_t)0x00020000) 7806 #define DSI_ISR0_PE2 ((uint32_t)0x00040000) 7807 #define DSI_ISR0_PE3 ((uint32_t)0x00080000) 7808 #define DSI_ISR0_PE4 ((uint32_t)0x00100000) 7811 #define DSI_ISR1_TOHSTX ((uint32_t)0x00000001) 7812 #define DSI_ISR1_TOLPRX ((uint32_t)0x00000002) 7813 #define DSI_ISR1_ECCSE ((uint32_t)0x00000004) 7814 #define DSI_ISR1_ECCME ((uint32_t)0x00000008) 7815 #define DSI_ISR1_CRCE ((uint32_t)0x00000010) 7816 #define DSI_ISR1_PSE ((uint32_t)0x00000020) 7817 #define DSI_ISR1_EOTPE ((uint32_t)0x00000040) 7818 #define DSI_ISR1_LPWRE ((uint32_t)0x00000080) 7819 #define DSI_ISR1_GCWRE ((uint32_t)0x00000100) 7820 #define DSI_ISR1_GPWRE ((uint32_t)0x00000200) 7821 #define DSI_ISR1_GPTXE ((uint32_t)0x00000400) 7822 #define DSI_ISR1_GPRDE ((uint32_t)0x00000800) 7823 #define DSI_ISR1_GPRXE ((uint32_t)0x00001000) 7826 #define DSI_IER0_AE0IE ((uint32_t)0x00000001) 7827 #define DSI_IER0_AE1IE ((uint32_t)0x00000002) 7828 #define DSI_IER0_AE2IE ((uint32_t)0x00000004) 7829 #define DSI_IER0_AE3IE ((uint32_t)0x00000008) 7830 #define DSI_IER0_AE4IE ((uint32_t)0x00000010) 7831 #define DSI_IER0_AE5IE ((uint32_t)0x00000020) 7832 #define DSI_IER0_AE6IE ((uint32_t)0x00000040) 7833 #define DSI_IER0_AE7IE ((uint32_t)0x00000080) 7834 #define DSI_IER0_AE8IE ((uint32_t)0x00000100) 7835 #define DSI_IER0_AE9IE ((uint32_t)0x00000200) 7836 #define DSI_IER0_AE10IE ((uint32_t)0x00000400) 7837 #define DSI_IER0_AE11IE ((uint32_t)0x00000800) 7838 #define DSI_IER0_AE12IE ((uint32_t)0x00001000) 7839 #define DSI_IER0_AE13IE ((uint32_t)0x00002000) 7840 #define DSI_IER0_AE14IE ((uint32_t)0x00004000) 7841 #define DSI_IER0_AE15IE ((uint32_t)0x00008000) 7842 #define DSI_IER0_PE0IE ((uint32_t)0x00010000) 7843 #define DSI_IER0_PE1IE ((uint32_t)0x00020000) 7844 #define DSI_IER0_PE2IE ((uint32_t)0x00040000) 7845 #define DSI_IER0_PE3IE ((uint32_t)0x00080000) 7846 #define DSI_IER0_PE4IE ((uint32_t)0x00100000) 7849 #define DSI_IER1_TOHSTXIE ((uint32_t)0x00000001) 7850 #define DSI_IER1_TOLPRXIE ((uint32_t)0x00000002) 7851 #define DSI_IER1_ECCSEIE ((uint32_t)0x00000004) 7852 #define DSI_IER1_ECCMEIE ((uint32_t)0x00000008) 7853 #define DSI_IER1_CRCEIE ((uint32_t)0x00000010) 7854 #define DSI_IER1_PSEIE ((uint32_t)0x00000020) 7855 #define DSI_IER1_EOTPEIE ((uint32_t)0x00000040) 7856 #define DSI_IER1_LPWREIE ((uint32_t)0x00000080) 7857 #define DSI_IER1_GCWREIE ((uint32_t)0x00000100) 7858 #define DSI_IER1_GPWREIE ((uint32_t)0x00000200) 7859 #define DSI_IER1_GPTXEIE ((uint32_t)0x00000400) 7860 #define DSI_IER1_GPRDEIE ((uint32_t)0x00000800) 7861 #define DSI_IER1_GPRXEIE ((uint32_t)0x00001000) 7864 #define DSI_FIR0_FAE0 ((uint32_t)0x00000001) 7865 #define DSI_FIR0_FAE1 ((uint32_t)0x00000002) 7866 #define DSI_FIR0_FAE2 ((uint32_t)0x00000004) 7867 #define DSI_FIR0_FAE3 ((uint32_t)0x00000008) 7868 #define DSI_FIR0_FAE4 ((uint32_t)0x00000010) 7869 #define DSI_FIR0_FAE5 ((uint32_t)0x00000020) 7870 #define DSI_FIR0_FAE6 ((uint32_t)0x00000040) 7871 #define DSI_FIR0_FAE7 ((uint32_t)0x00000080) 7872 #define DSI_FIR0_FAE8 ((uint32_t)0x00000100) 7873 #define DSI_FIR0_FAE9 ((uint32_t)0x00000200) 7874 #define DSI_FIR0_FAE10 ((uint32_t)0x00000400) 7875 #define DSI_FIR0_FAE11 ((uint32_t)0x00000800) 7876 #define DSI_FIR0_FAE12 ((uint32_t)0x00001000) 7877 #define DSI_FIR0_FAE13 ((uint32_t)0x00002000) 7878 #define DSI_FIR0_FAE14 ((uint32_t)0x00004000) 7879 #define DSI_FIR0_FAE15 ((uint32_t)0x00008000) 7880 #define DSI_FIR0_FPE0 ((uint32_t)0x00010000) 7881 #define DSI_FIR0_FPE1 ((uint32_t)0x00020000) 7882 #define DSI_FIR0_FPE2 ((uint32_t)0x00040000) 7883 #define DSI_FIR0_FPE3 ((uint32_t)0x00080000) 7884 #define DSI_FIR0_FPE4 ((uint32_t)0x00100000) 7887 #define DSI_FIR1_FTOHSTX ((uint32_t)0x00000001) 7888 #define DSI_FIR1_FTOLPRX ((uint32_t)0x00000002) 7889 #define DSI_FIR1_FECCSE ((uint32_t)0x00000004) 7890 #define DSI_FIR1_FECCME ((uint32_t)0x00000008) 7891 #define DSI_FIR1_FCRCE ((uint32_t)0x00000010) 7892 #define DSI_FIR1_FPSE ((uint32_t)0x00000020) 7893 #define DSI_FIR1_FEOTPE ((uint32_t)0x00000040) 7894 #define DSI_FIR1_FLPWRE ((uint32_t)0x00000080) 7895 #define DSI_FIR1_FGCWRE ((uint32_t)0x00000100) 7896 #define DSI_FIR1_FGPWRE ((uint32_t)0x00000200) 7897 #define DSI_FIR1_FGPTXE ((uint32_t)0x00000400) 7898 #define DSI_FIR1_FGPRDE ((uint32_t)0x00000800) 7899 #define DSI_FIR1_FGPRXE ((uint32_t)0x00001000) 7902 #define DSI_VSCR_EN ((uint32_t)0x00000001) 7903 #define DSI_VSCR_UR ((uint32_t)0x00000100) 7906 #define DSI_LCVCIDR_VCID ((uint32_t)0x00000003) 7907 #define DSI_LCVCIDR_VCID0 ((uint32_t)0x00000001) 7908 #define DSI_LCVCIDR_VCID1 ((uint32_t)0x00000002) 7911 #define DSI_LCCCR_COLC ((uint32_t)0x0000000F) 7912 #define DSI_LCCCR_COLC0 ((uint32_t)0x00000001) 7913 #define DSI_LCCCR_COLC1 ((uint32_t)0x00000002) 7914 #define DSI_LCCCR_COLC2 ((uint32_t)0x00000004) 7915 #define DSI_LCCCR_COLC3 ((uint32_t)0x00000008) 7917 #define DSI_LCCCR_LPE ((uint32_t)0x00000100) 7920 #define DSI_LPMCCR_VLPSIZE ((uint32_t)0x000000FF) 7921 #define DSI_LPMCCR_VLPSIZE0 ((uint32_t)0x00000001) 7922 #define DSI_LPMCCR_VLPSIZE1 ((uint32_t)0x00000002) 7923 #define DSI_LPMCCR_VLPSIZE2 ((uint32_t)0x00000004) 7924 #define DSI_LPMCCR_VLPSIZE3 ((uint32_t)0x00000008) 7925 #define DSI_LPMCCR_VLPSIZE4 ((uint32_t)0x00000010) 7926 #define DSI_LPMCCR_VLPSIZE5 ((uint32_t)0x00000020) 7927 #define DSI_LPMCCR_VLPSIZE6 ((uint32_t)0x00000040) 7928 #define DSI_LPMCCR_VLPSIZE7 ((uint32_t)0x00000080) 7930 #define DSI_LPMCCR_LPSIZE ((uint32_t)0x00FF0000) 7931 #define DSI_LPMCCR_LPSIZE0 ((uint32_t)0x00010000) 7932 #define DSI_LPMCCR_LPSIZE1 ((uint32_t)0x00020000) 7933 #define DSI_LPMCCR_LPSIZE2 ((uint32_t)0x00040000) 7934 #define DSI_LPMCCR_LPSIZE3 ((uint32_t)0x00080000) 7935 #define DSI_LPMCCR_LPSIZE4 ((uint32_t)0x00100000) 7936 #define DSI_LPMCCR_LPSIZE5 ((uint32_t)0x00200000) 7937 #define DSI_LPMCCR_LPSIZE6 ((uint32_t)0x00400000) 7938 #define DSI_LPMCCR_LPSIZE7 ((uint32_t)0x00800000) 7941 #define DSI_VMCCR_VMT ((uint32_t)0x00000003) 7942 #define DSI_VMCCR_VMT0 ((uint32_t)0x00000001) 7943 #define DSI_VMCCR_VMT1 ((uint32_t)0x00000002) 7945 #define DSI_VMCCR_LPVSAE ((uint32_t)0x00000100) 7946 #define DSI_VMCCR_LPVBPE ((uint32_t)0x00000200) 7947 #define DSI_VMCCR_LPVFPE ((uint32_t)0x00000400) 7948 #define DSI_VMCCR_LPVAE ((uint32_t)0x00000800) 7949 #define DSI_VMCCR_LPHBPE ((uint32_t)0x00001000) 7950 #define DSI_VMCCR_LPHFE ((uint32_t)0x00002000) 7951 #define DSI_VMCCR_FBTAAE ((uint32_t)0x00004000) 7952 #define DSI_VMCCR_LPCE ((uint32_t)0x00008000) 7955 #define DSI_VPCCR_VPSIZE ((uint32_t)0x00003FFF) 7956 #define DSI_VPCCR_VPSIZE0 ((uint32_t)0x00000001) 7957 #define DSI_VPCCR_VPSIZE1 ((uint32_t)0x00000002) 7958 #define DSI_VPCCR_VPSIZE2 ((uint32_t)0x00000004) 7959 #define DSI_VPCCR_VPSIZE3 ((uint32_t)0x00000008) 7960 #define DSI_VPCCR_VPSIZE4 ((uint32_t)0x00000010) 7961 #define DSI_VPCCR_VPSIZE5 ((uint32_t)0x00000020) 7962 #define DSI_VPCCR_VPSIZE6 ((uint32_t)0x00000040) 7963 #define DSI_VPCCR_VPSIZE7 ((uint32_t)0x00000080) 7964 #define DSI_VPCCR_VPSIZE8 ((uint32_t)0x00000100) 7965 #define DSI_VPCCR_VPSIZE9 ((uint32_t)0x00000200) 7966 #define DSI_VPCCR_VPSIZE10 ((uint32_t)0x00000400) 7967 #define DSI_VPCCR_VPSIZE11 ((uint32_t)0x00000800) 7968 #define DSI_VPCCR_VPSIZE12 ((uint32_t)0x00001000) 7969 #define DSI_VPCCR_VPSIZE13 ((uint32_t)0x00002000) 7972 #define DSI_VCCCR_NUMC ((uint32_t)0x00001FFF) 7973 #define DSI_VCCCR_NUMC0 ((uint32_t)0x00000001) 7974 #define DSI_VCCCR_NUMC1 ((uint32_t)0x00000002) 7975 #define DSI_VCCCR_NUMC2 ((uint32_t)0x00000004) 7976 #define DSI_VCCCR_NUMC3 ((uint32_t)0x00000008) 7977 #define DSI_VCCCR_NUMC4 ((uint32_t)0x00000010) 7978 #define DSI_VCCCR_NUMC5 ((uint32_t)0x00000020) 7979 #define DSI_VCCCR_NUMC6 ((uint32_t)0x00000040) 7980 #define DSI_VCCCR_NUMC7 ((uint32_t)0x00000080) 7981 #define DSI_VCCCR_NUMC8 ((uint32_t)0x00000100) 7982 #define DSI_VCCCR_NUMC9 ((uint32_t)0x00000200) 7983 #define DSI_VCCCR_NUMC10 ((uint32_t)0x00000400) 7984 #define DSI_VCCCR_NUMC11 ((uint32_t)0x00000800) 7985 #define DSI_VCCCR_NUMC12 ((uint32_t)0x00001000) 7988 #define DSI_VNPCCR_NPSIZE ((uint32_t)0x00001FFF) 7989 #define DSI_VNPCCR_NPSIZE0 ((uint32_t)0x00000001) 7990 #define DSI_VNPCCR_NPSIZE1 ((uint32_t)0x00000002) 7991 #define DSI_VNPCCR_NPSIZE2 ((uint32_t)0x00000004) 7992 #define DSI_VNPCCR_NPSIZE3 ((uint32_t)0x00000008) 7993 #define DSI_VNPCCR_NPSIZE4 ((uint32_t)0x00000010) 7994 #define DSI_VNPCCR_NPSIZE5 ((uint32_t)0x00000020) 7995 #define DSI_VNPCCR_NPSIZE6 ((uint32_t)0x00000040) 7996 #define DSI_VNPCCR_NPSIZE7 ((uint32_t)0x00000080) 7997 #define DSI_VNPCCR_NPSIZE8 ((uint32_t)0x00000100) 7998 #define DSI_VNPCCR_NPSIZE9 ((uint32_t)0x00000200) 7999 #define DSI_VNPCCR_NPSIZE10 ((uint32_t)0x00000400) 8000 #define DSI_VNPCCR_NPSIZE11 ((uint32_t)0x00000800) 8001 #define DSI_VNPCCR_NPSIZE12 ((uint32_t)0x00001000) 8004 #define DSI_VHSACCR_HSA ((uint32_t)0x00000FFF) 8005 #define DSI_VHSACCR_HSA0 ((uint32_t)0x00000001) 8006 #define DSI_VHSACCR_HSA1 ((uint32_t)0x00000002) 8007 #define DSI_VHSACCR_HSA2 ((uint32_t)0x00000004) 8008 #define DSI_VHSACCR_HSA3 ((uint32_t)0x00000008) 8009 #define DSI_VHSACCR_HSA4 ((uint32_t)0x00000010) 8010 #define DSI_VHSACCR_HSA5 ((uint32_t)0x00000020) 8011 #define DSI_VHSACCR_HSA6 ((uint32_t)0x00000040) 8012 #define DSI_VHSACCR_HSA7 ((uint32_t)0x00000080) 8013 #define DSI_VHSACCR_HSA8 ((uint32_t)0x00000100) 8014 #define DSI_VHSACCR_HSA9 ((uint32_t)0x00000200) 8015 #define DSI_VHSACCR_HSA10 ((uint32_t)0x00000400) 8016 #define DSI_VHSACCR_HSA11 ((uint32_t)0x00000800) 8019 #define DSI_VHBPCCR_HBP ((uint32_t)0x00000FFF) 8020 #define DSI_VHBPCCR_HBP0 ((uint32_t)0x00000001) 8021 #define DSI_VHBPCCR_HBP1 ((uint32_t)0x00000002) 8022 #define DSI_VHBPCCR_HBP2 ((uint32_t)0x00000004) 8023 #define DSI_VHBPCCR_HBP3 ((uint32_t)0x00000008) 8024 #define DSI_VHBPCCR_HBP4 ((uint32_t)0x00000010) 8025 #define DSI_VHBPCCR_HBP5 ((uint32_t)0x00000020) 8026 #define DSI_VHBPCCR_HBP6 ((uint32_t)0x00000040) 8027 #define DSI_VHBPCCR_HBP7 ((uint32_t)0x00000080) 8028 #define DSI_VHBPCCR_HBP8 ((uint32_t)0x00000100) 8029 #define DSI_VHBPCCR_HBP9 ((uint32_t)0x00000200) 8030 #define DSI_VHBPCCR_HBP10 ((uint32_t)0x00000400) 8031 #define DSI_VHBPCCR_HBP11 ((uint32_t)0x00000800) 8034 #define DSI_VLCCR_HLINE ((uint32_t)0x00007FFF) 8035 #define DSI_VLCCR_HLINE0 ((uint32_t)0x00000001) 8036 #define DSI_VLCCR_HLINE1 ((uint32_t)0x00000002) 8037 #define DSI_VLCCR_HLINE2 ((uint32_t)0x00000004) 8038 #define DSI_VLCCR_HLINE3 ((uint32_t)0x00000008) 8039 #define DSI_VLCCR_HLINE4 ((uint32_t)0x00000010) 8040 #define DSI_VLCCR_HLINE5 ((uint32_t)0x00000020) 8041 #define DSI_VLCCR_HLINE6 ((uint32_t)0x00000040) 8042 #define DSI_VLCCR_HLINE7 ((uint32_t)0x00000080) 8043 #define DSI_VLCCR_HLINE8 ((uint32_t)0x00000100) 8044 #define DSI_VLCCR_HLINE9 ((uint32_t)0x00000200) 8045 #define DSI_VLCCR_HLINE10 ((uint32_t)0x00000400) 8046 #define DSI_VLCCR_HLINE11 ((uint32_t)0x00000800) 8047 #define DSI_VLCCR_HLINE12 ((uint32_t)0x00001000) 8048 #define DSI_VLCCR_HLINE13 ((uint32_t)0x00002000) 8049 #define DSI_VLCCR_HLINE14 ((uint32_t)0x00004000) 8052 #define DSI_VVSACCR_VSA ((uint32_t)0x000003FF) 8053 #define DSI_VVSACCR_VSA0 ((uint32_t)0x00000001) 8054 #define DSI_VVSACCR_VSA1 ((uint32_t)0x00000002) 8055 #define DSI_VVSACCR_VSA2 ((uint32_t)0x00000004) 8056 #define DSI_VVSACCR_VSA3 ((uint32_t)0x00000008) 8057 #define DSI_VVSACCR_VSA4 ((uint32_t)0x00000010) 8058 #define DSI_VVSACCR_VSA5 ((uint32_t)0x00000020) 8059 #define DSI_VVSACCR_VSA6 ((uint32_t)0x00000040) 8060 #define DSI_VVSACCR_VSA7 ((uint32_t)0x00000080) 8061 #define DSI_VVSACCR_VSA8 ((uint32_t)0x00000100) 8062 #define DSI_VVSACCR_VSA9 ((uint32_t)0x00000200) 8065 #define DSI_VVBPCCR_VBP ((uint32_t)0x000003FF) 8066 #define DSI_VVBPCCR_VBP0 ((uint32_t)0x00000001) 8067 #define DSI_VVBPCCR_VBP1 ((uint32_t)0x00000002) 8068 #define DSI_VVBPCCR_VBP2 ((uint32_t)0x00000004) 8069 #define DSI_VVBPCCR_VBP3 ((uint32_t)0x00000008) 8070 #define DSI_VVBPCCR_VBP4 ((uint32_t)0x00000010) 8071 #define DSI_VVBPCCR_VBP5 ((uint32_t)0x00000020) 8072 #define DSI_VVBPCCR_VBP6 ((uint32_t)0x00000040) 8073 #define DSI_VVBPCCR_VBP7 ((uint32_t)0x00000080) 8074 #define DSI_VVBPCCR_VBP8 ((uint32_t)0x00000100) 8075 #define DSI_VVBPCCR_VBP9 ((uint32_t)0x00000200) 8078 #define DSI_VVFPCCR_VFP ((uint32_t)0x000003FF) 8079 #define DSI_VVFPCCR_VFP0 ((uint32_t)0x00000001) 8080 #define DSI_VVFPCCR_VFP1 ((uint32_t)0x00000002) 8081 #define DSI_VVFPCCR_VFP2 ((uint32_t)0x00000004) 8082 #define DSI_VVFPCCR_VFP3 ((uint32_t)0x00000008) 8083 #define DSI_VVFPCCR_VFP4 ((uint32_t)0x00000010) 8084 #define DSI_VVFPCCR_VFP5 ((uint32_t)0x00000020) 8085 #define DSI_VVFPCCR_VFP6 ((uint32_t)0x00000040) 8086 #define DSI_VVFPCCR_VFP7 ((uint32_t)0x00000080) 8087 #define DSI_VVFPCCR_VFP8 ((uint32_t)0x00000100) 8088 #define DSI_VVFPCCR_VFP9 ((uint32_t)0x00000200) 8091 #define DSI_VVACCR_VA ((uint32_t)0x00003FFF) 8092 #define DSI_VVACCR_VA0 ((uint32_t)0x00000001) 8093 #define DSI_VVACCR_VA1 ((uint32_t)0x00000002) 8094 #define DSI_VVACCR_VA2 ((uint32_t)0x00000004) 8095 #define DSI_VVACCR_VA3 ((uint32_t)0x00000008) 8096 #define DSI_VVACCR_VA4 ((uint32_t)0x00000010) 8097 #define DSI_VVACCR_VA5 ((uint32_t)0x00000020) 8098 #define DSI_VVACCR_VA6 ((uint32_t)0x00000040) 8099 #define DSI_VVACCR_VA7 ((uint32_t)0x00000080) 8100 #define DSI_VVACCR_VA8 ((uint32_t)0x00000100) 8101 #define DSI_VVACCR_VA9 ((uint32_t)0x00000200) 8102 #define DSI_VVACCR_VA10 ((uint32_t)0x00000400) 8103 #define DSI_VVACCR_VA11 ((uint32_t)0x00000800) 8104 #define DSI_VVACCR_VA12 ((uint32_t)0x00001000) 8105 #define DSI_VVACCR_VA13 ((uint32_t)0x00002000) 8108 #define DSI_TDCCR_3DM ((uint32_t)0x00000003) 8109 #define DSI_TDCCR_3DM0 ((uint32_t)0x00000001) 8110 #define DSI_TDCCR_3DM1 ((uint32_t)0x00000002) 8112 #define DSI_TDCCR_3DF ((uint32_t)0x0000000C) 8113 #define DSI_TDCCR_3DF0 ((uint32_t)0x00000004) 8114 #define DSI_TDCCR_3DF1 ((uint32_t)0x00000008) 8116 #define DSI_TDCCR_SVS ((uint32_t)0x00000010) 8117 #define DSI_TDCCR_RF ((uint32_t)0x00000020) 8118 #define DSI_TDCCR_S3DC ((uint32_t)0x00010000) 8121 #define DSI_WCFGR_DSIM ((uint32_t)0x00000001) 8122 #define DSI_WCFGR_COLMUX ((uint32_t)0x0000000E) 8123 #define DSI_WCFGR_COLMUX0 ((uint32_t)0x00000002) 8124 #define DSI_WCFGR_COLMUX1 ((uint32_t)0x00000004) 8125 #define DSI_WCFGR_COLMUX2 ((uint32_t)0x00000008) 8127 #define DSI_WCFGR_TESRC ((uint32_t)0x00000010) 8128 #define DSI_WCFGR_TEPOL ((uint32_t)0x00000020) 8129 #define DSI_WCFGR_AR ((uint32_t)0x00000040) 8130 #define DSI_WCFGR_VSPOL ((uint32_t)0x00000080) 8133 #define DSI_WCR_COLM ((uint32_t)0x00000001) 8134 #define DSI_WCR_SHTDN ((uint32_t)0x00000002) 8135 #define DSI_WCR_LTDCEN ((uint32_t)0x00000004) 8136 #define DSI_WCR_DSIEN ((uint32_t)0x00000008) 8139 #define DSI_WIER_TEIE ((uint32_t)0x00000001) 8140 #define DSI_WIER_ERIE ((uint32_t)0x00000002) 8141 #define DSI_WIER_PLLLIE ((uint32_t)0x00000200) 8142 #define DSI_WIER_PLLUIE ((uint32_t)0x00000400) 8143 #define DSI_WIER_RRIE ((uint32_t)0x00002000) 8146 #define DSI_WISR_TEIF ((uint32_t)0x00000001) 8147 #define DSI_WISR_ERIF ((uint32_t)0x00000002) 8148 #define DSI_WISR_BUSY ((uint32_t)0x00000004) 8149 #define DSI_WISR_PLLLS ((uint32_t)0x00000100) 8150 #define DSI_WISR_PLLLIF ((uint32_t)0x00000200) 8151 #define DSI_WISR_PLLUIF ((uint32_t)0x00000400) 8152 #define DSI_WISR_RRS ((uint32_t)0x00001000) 8153 #define DSI_WISR_RRIF ((uint32_t)0x00002000) 8156 #define DSI_WIFCR_CTEIF ((uint32_t)0x00000001) 8157 #define DSI_WIFCR_CERIF ((uint32_t)0x00000002) 8158 #define DSI_WIFCR_CPLLLIF ((uint32_t)0x00000200) 8159 #define DSI_WIFCR_CPLLUIF ((uint32_t)0x00000400) 8160 #define DSI_WIFCR_CRRIF ((uint32_t)0x00002000) 8163 #define DSI_WPCR0_UIX4 ((uint32_t)0x0000003F) 8164 #define DSI_WPCR0_UIX4_0 ((uint32_t)0x00000001) 8165 #define DSI_WPCR0_UIX4_1 ((uint32_t)0x00000002) 8166 #define DSI_WPCR0_UIX4_2 ((uint32_t)0x00000004) 8167 #define DSI_WPCR0_UIX4_3 ((uint32_t)0x00000008) 8168 #define DSI_WPCR0_UIX4_4 ((uint32_t)0x00000010) 8169 #define DSI_WPCR0_UIX4_5 ((uint32_t)0x00000020) 8171 #define DSI_WPCR0_SWCL ((uint32_t)0x00000040) 8172 #define DSI_WPCR0_SWDL0 ((uint32_t)0x00000080) 8173 #define DSI_WPCR0_SWDL1 ((uint32_t)0x00000100) 8174 #define DSI_WPCR0_HSICL ((uint32_t)0x00000200) 8175 #define DSI_WPCR0_HSIDL0 ((uint32_t)0x00000400) 8176 #define DSI_WPCR0_HSIDL1 ((uint32_t)0x00000800) 8177 #define DSI_WPCR0_FTXSMCL ((uint32_t)0x00001000) 8178 #define DSI_WPCR0_FTXSMDL ((uint32_t)0x00002000) 8179 #define DSI_WPCR0_CDOFFDL ((uint32_t)0x00004000) 8180 #define DSI_WPCR0_TDDL ((uint32_t)0x00010000) 8181 #define DSI_WPCR0_PDEN ((uint32_t)0x00040000) 8182 #define DSI_WPCR0_TCLKPREPEN ((uint32_t)0x00080000) 8183 #define DSI_WPCR0_TCLKZEROEN ((uint32_t)0x00100000) 8184 #define DSI_WPCR0_THSPREPEN ((uint32_t)0x00200000) 8185 #define DSI_WPCR0_THSTRAILEN ((uint32_t)0x00400000) 8186 #define DSI_WPCR0_THSZEROEN ((uint32_t)0x00800000) 8187 #define DSI_WPCR0_TLPXDEN ((uint32_t)0x01000000) 8188 #define DSI_WPCR0_THSEXITEN ((uint32_t)0x02000000) 8189 #define DSI_WPCR0_TLPXCEN ((uint32_t)0x04000000) 8190 #define DSI_WPCR0_TCLKPOSTEN ((uint32_t)0x08000000) 8193 #define DSI_WPCR1_HSTXDCL ((uint32_t)0x00000003) 8194 #define DSI_WPCR1_HSTXDCL0 ((uint32_t)0x00000001) 8195 #define DSI_WPCR1_HSTXDCL1 ((uint32_t)0x00000002) 8197 #define DSI_WPCR1_HSTXDDL ((uint32_t)0x0000000C) 8198 #define DSI_WPCR1_HSTXDDL0 ((uint32_t)0x00000004) 8199 #define DSI_WPCR1_HSTXDDL1 ((uint32_t)0x00000008) 8201 #define DSI_WPCR1_LPSRCCL ((uint32_t)0x000000C0) 8202 #define DSI_WPCR1_LPSRCCL0 ((uint32_t)0x00000040) 8203 #define DSI_WPCR1_LPSRCCL1 ((uint32_t)0x00000080) 8205 #define DSI_WPCR1_LPSRCDL ((uint32_t)0x00000300) 8206 #define DSI_WPCR1_LPSRCDL0 ((uint32_t)0x00000100) 8207 #define DSI_WPCR1_LPSRCDL1 ((uint32_t)0x00000200) 8209 #define DSI_WPCR1_SDDC ((uint32_t)0x00001000) 8211 #define DSI_WPCR1_LPRXVCDL ((uint32_t)0x0000C000) 8212 #define DSI_WPCR1_LPRXVCDL0 ((uint32_t)0x00004000) 8213 #define DSI_WPCR1_LPRXVCDL1 ((uint32_t)0x00008000) 8215 #define DSI_WPCR1_HSTXSRCCL ((uint32_t)0x00030000) 8216 #define DSI_WPCR1_HSTXSRCCL0 ((uint32_t)0x00010000) 8217 #define DSI_WPCR1_HSTXSRCCL1 ((uint32_t)0x00020000) 8219 #define DSI_WPCR1_HSTXSRCDL ((uint32_t)0x000C0000) 8220 #define DSI_WPCR1_HSTXSRCDL0 ((uint32_t)0x00040000) 8221 #define DSI_WPCR1_HSTXSRCDL1 ((uint32_t)0x00080000) 8223 #define DSI_WPCR1_FLPRXLPM ((uint32_t)0x00400000) 8225 #define DSI_WPCR1_LPRXFT ((uint32_t)0x06000000) 8226 #define DSI_WPCR1_LPRXFT0 ((uint32_t)0x02000000) 8227 #define DSI_WPCR1_LPRXFT1 ((uint32_t)0x04000000) 8230 #define DSI_WPCR2_TCLKPREP ((uint32_t)0x000000FF) 8231 #define DSI_WPCR2_TCLKPREP0 ((uint32_t)0x00000001) 8232 #define DSI_WPCR2_TCLKPREP1 ((uint32_t)0x00000002) 8233 #define DSI_WPCR2_TCLKPREP2 ((uint32_t)0x00000004) 8234 #define DSI_WPCR2_TCLKPREP3 ((uint32_t)0x00000008) 8235 #define DSI_WPCR2_TCLKPREP4 ((uint32_t)0x00000010) 8236 #define DSI_WPCR2_TCLKPREP5 ((uint32_t)0x00000020) 8237 #define DSI_WPCR2_TCLKPREP6 ((uint32_t)0x00000040) 8238 #define DSI_WPCR2_TCLKPREP7 ((uint32_t)0x00000080) 8240 #define DSI_WPCR2_TCLKZERO ((uint32_t)0x0000FF00) 8241 #define DSI_WPCR2_TCLKZERO0 ((uint32_t)0x00000100) 8242 #define DSI_WPCR2_TCLKZERO1 ((uint32_t)0x00000200) 8243 #define DSI_WPCR2_TCLKZERO2 ((uint32_t)0x00000400) 8244 #define DSI_WPCR2_TCLKZERO3 ((uint32_t)0x00000800) 8245 #define DSI_WPCR2_TCLKZERO4 ((uint32_t)0x00001000) 8246 #define DSI_WPCR2_TCLKZERO5 ((uint32_t)0x00002000) 8247 #define DSI_WPCR2_TCLKZERO6 ((uint32_t)0x00004000) 8248 #define DSI_WPCR2_TCLKZERO7 ((uint32_t)0x00008000) 8250 #define DSI_WPCR2_THSPREP ((uint32_t)0x00FF0000) 8251 #define DSI_WPCR2_THSPREP0 ((uint32_t)0x00010000) 8252 #define DSI_WPCR2_THSPREP1 ((uint32_t)0x00020000) 8253 #define DSI_WPCR2_THSPREP2 ((uint32_t)0x00040000) 8254 #define DSI_WPCR2_THSPREP3 ((uint32_t)0x00080000) 8255 #define DSI_WPCR2_THSPREP4 ((uint32_t)0x00100000) 8256 #define DSI_WPCR2_THSPREP5 ((uint32_t)0x00200000) 8257 #define DSI_WPCR2_THSPREP6 ((uint32_t)0x00400000) 8258 #define DSI_WPCR2_THSPREP7 ((uint32_t)0x00800000) 8260 #define DSI_WPCR2_THSTRAIL ((uint32_t)0xFF000000) 8261 #define DSI_WPCR2_THSTRAIL0 ((uint32_t)0x01000000) 8262 #define DSI_WPCR2_THSTRAIL1 ((uint32_t)0x02000000) 8263 #define DSI_WPCR2_THSTRAIL2 ((uint32_t)0x04000000) 8264 #define DSI_WPCR2_THSTRAIL3 ((uint32_t)0x08000000) 8265 #define DSI_WPCR2_THSTRAIL4 ((uint32_t)0x10000000) 8266 #define DSI_WPCR2_THSTRAIL5 ((uint32_t)0x20000000) 8267 #define DSI_WPCR2_THSTRAIL6 ((uint32_t)0x40000000) 8268 #define DSI_WPCR2_THSTRAIL7 ((uint32_t)0x80000000) 8271 #define DSI_WPCR3_THSZERO ((uint32_t)0x000000FF) 8272 #define DSI_WPCR3_THSZERO0 ((uint32_t)0x00000001) 8273 #define DSI_WPCR3_THSZERO1 ((uint32_t)0x00000002) 8274 #define DSI_WPCR3_THSZERO2 ((uint32_t)0x00000004) 8275 #define DSI_WPCR3_THSZERO3 ((uint32_t)0x00000008) 8276 #define DSI_WPCR3_THSZERO4 ((uint32_t)0x00000010) 8277 #define DSI_WPCR3_THSZERO5 ((uint32_t)0x00000020) 8278 #define DSI_WPCR3_THSZERO6 ((uint32_t)0x00000040) 8279 #define DSI_WPCR3_THSZERO7 ((uint32_t)0x00000080) 8281 #define DSI_WPCR3_TLPXD ((uint32_t)0x0000FF00) 8282 #define DSI_WPCR3_TLPXD0 ((uint32_t)0x00000100) 8283 #define DSI_WPCR3_TLPXD1 ((uint32_t)0x00000200) 8284 #define DSI_WPCR3_TLPXD2 ((uint32_t)0x00000400) 8285 #define DSI_WPCR3_TLPXD3 ((uint32_t)0x00000800) 8286 #define DSI_WPCR3_TLPXD4 ((uint32_t)0x00001000) 8287 #define DSI_WPCR3_TLPXD5 ((uint32_t)0x00002000) 8288 #define DSI_WPCR3_TLPXD6 ((uint32_t)0x00004000) 8289 #define DSI_WPCR3_TLPXD7 ((uint32_t)0x00008000) 8291 #define DSI_WPCR3_THSEXIT ((uint32_t)0x00FF0000) 8292 #define DSI_WPCR3_THSEXIT0 ((uint32_t)0x00010000) 8293 #define DSI_WPCR3_THSEXIT1 ((uint32_t)0x00020000) 8294 #define DSI_WPCR3_THSEXIT2 ((uint32_t)0x00040000) 8295 #define DSI_WPCR3_THSEXIT3 ((uint32_t)0x00080000) 8296 #define DSI_WPCR3_THSEXIT4 ((uint32_t)0x00100000) 8297 #define DSI_WPCR3_THSEXIT5 ((uint32_t)0x00200000) 8298 #define DSI_WPCR3_THSEXIT6 ((uint32_t)0x00400000) 8299 #define DSI_WPCR3_THSEXIT7 ((uint32_t)0x00800000) 8301 #define DSI_WPCR3_TLPXC ((uint32_t)0xFF000000) 8302 #define DSI_WPCR3_TLPXC0 ((uint32_t)0x01000000) 8303 #define DSI_WPCR3_TLPXC1 ((uint32_t)0x02000000) 8304 #define DSI_WPCR3_TLPXC2 ((uint32_t)0x04000000) 8305 #define DSI_WPCR3_TLPXC3 ((uint32_t)0x08000000) 8306 #define DSI_WPCR3_TLPXC4 ((uint32_t)0x10000000) 8307 #define DSI_WPCR3_TLPXC5 ((uint32_t)0x20000000) 8308 #define DSI_WPCR3_TLPXC6 ((uint32_t)0x40000000) 8309 #define DSI_WPCR3_TLPXC7 ((uint32_t)0x80000000) 8312 #define DSI_WPCR4_TCLKPOST ((uint32_t)0x000000FF) 8313 #define DSI_WPCR4_TCLKPOST0 ((uint32_t)0x00000001) 8314 #define DSI_WPCR4_TCLKPOST1 ((uint32_t)0x00000002) 8315 #define DSI_WPCR4_TCLKPOST2 ((uint32_t)0x00000004) 8316 #define DSI_WPCR4_TCLKPOST3 ((uint32_t)0x00000008) 8317 #define DSI_WPCR4_TCLKPOST4 ((uint32_t)0x00000010) 8318 #define DSI_WPCR4_TCLKPOST5 ((uint32_t)0x00000020) 8319 #define DSI_WPCR4_TCLKPOST6 ((uint32_t)0x00000040) 8320 #define DSI_WPCR4_TCLKPOST7 ((uint32_t)0x00000080) 8323 #define DSI_WRPCR_PLLEN ((uint32_t)0x00000001) 8324 #define DSI_WRPCR_PLL_NDIV ((uint32_t)0x000001FC) 8325 #define DSI_WRPCR_PLL_NDIV0 ((uint32_t)0x00000004) 8326 #define DSI_WRPCR_PLL_NDIV1 ((uint32_t)0x00000008) 8327 #define DSI_WRPCR_PLL_NDIV2 ((uint32_t)0x00000010) 8328 #define DSI_WRPCR_PLL_NDIV3 ((uint32_t)0x00000020) 8329 #define DSI_WRPCR_PLL_NDIV4 ((uint32_t)0x00000040) 8330 #define DSI_WRPCR_PLL_NDIV5 ((uint32_t)0x00000080) 8331 #define DSI_WRPCR_PLL_NDIV6 ((uint32_t)0x00000100) 8333 #define DSI_WRPCR_PLL_IDF ((uint32_t)0x00007800) 8334 #define DSI_WRPCR_PLL_IDF0 ((uint32_t)0x00000800) 8335 #define DSI_WRPCR_PLL_IDF1 ((uint32_t)0x00001000) 8336 #define DSI_WRPCR_PLL_IDF2 ((uint32_t)0x00002000) 8337 #define DSI_WRPCR_PLL_IDF3 ((uint32_t)0x00004000) 8339 #define DSI_WRPCR_PLL_ODF ((uint32_t)0x00030000) 8340 #define DSI_WRPCR_PLL_ODF0 ((uint32_t)0x00010000) 8341 #define DSI_WRPCR_PLL_ODF1 ((uint32_t)0x00020000) 8343 #define DSI_WRPCR_REGEN ((uint32_t)0x01000000) 8352 #define PWR_CR_LPDS ((uint32_t)0x00000001) 8353 #define PWR_CR_PDDS ((uint32_t)0x00000002) 8354 #define PWR_CR_CWUF ((uint32_t)0x00000004) 8355 #define PWR_CR_CSBF ((uint32_t)0x00000008) 8356 #define PWR_CR_PVDE ((uint32_t)0x00000010) 8358 #define PWR_CR_PLS ((uint32_t)0x000000E0) 8359 #define PWR_CR_PLS_0 ((uint32_t)0x00000020) 8360 #define PWR_CR_PLS_1 ((uint32_t)0x00000040) 8361 #define PWR_CR_PLS_2 ((uint32_t)0x00000080) 8364 #define PWR_CR_PLS_LEV0 ((uint32_t)0x00000000) 8365 #define PWR_CR_PLS_LEV1 ((uint32_t)0x00000020) 8366 #define PWR_CR_PLS_LEV2 ((uint32_t)0x00000040) 8367 #define PWR_CR_PLS_LEV3 ((uint32_t)0x00000060) 8368 #define PWR_CR_PLS_LEV4 ((uint32_t)0x00000080) 8369 #define PWR_CR_PLS_LEV5 ((uint32_t)0x000000A0) 8370 #define PWR_CR_PLS_LEV6 ((uint32_t)0x000000C0) 8371 #define PWR_CR_PLS_LEV7 ((uint32_t)0x000000E0) 8373 #define PWR_CR_DBP ((uint32_t)0x00000100) 8374 #define PWR_CR_FPDS ((uint32_t)0x00000200) 8375 #define PWR_CR_LPUDS ((uint32_t)0x00000400) 8376 #define PWR_CR_MRUDS ((uint32_t)0x00000800) 8378 #define PWR_CR_LPLVDS ((uint32_t)0x00000400) 8379 #define PWR_CR_MRLVDS ((uint32_t)0x00000800) 8381 #define PWR_CR_ADCDC1 ((uint32_t)0x00002000) 8383 #define PWR_CR_VOS ((uint32_t)0x0000C000) 8384 #define PWR_CR_VOS_0 ((uint32_t)0x00004000) 8385 #define PWR_CR_VOS_1 ((uint32_t)0x00008000) 8387 #define PWR_CR_ODEN ((uint32_t)0x00010000) 8388 #define PWR_CR_ODSWEN ((uint32_t)0x00020000) 8389 #define PWR_CR_UDEN ((uint32_t)0x000C0000) 8390 #define PWR_CR_UDEN_0 ((uint32_t)0x00040000) 8391 #define PWR_CR_UDEN_1 ((uint32_t)0x00080000) 8393 #define PWR_CR_FMSSR ((uint32_t)0x00100000) 8394 #define PWR_CR_FISSR ((uint32_t)0x00200000) 8397 #define PWR_CR_PMODE PWR_CR_VOS 8400 #define PWR_CSR_WUF ((uint32_t)0x00000001) 8401 #define PWR_CSR_SBF ((uint32_t)0x00000002) 8402 #define PWR_CSR_PVDO ((uint32_t)0x00000004) 8403 #define PWR_CSR_BRR ((uint32_t)0x00000008) 8404 #define PWR_CSR_WUPP ((uint32_t)0x00000080) 8405 #define PWR_CSR_EWUP ((uint32_t)0x00000100) 8406 #define PWR_CSR_BRE ((uint32_t)0x00000200) 8407 #define PWR_CSR_VOSRDY ((uint32_t)0x00004000) 8408 #define PWR_CSR_ODRDY ((uint32_t)0x00010000) 8409 #define PWR_CSR_ODSWRDY ((uint32_t)0x00020000) 8410 #define PWR_CSR_UDSWRDY ((uint32_t)0x000C0000) 8413 #define PWR_CSR_REGRDY PWR_CSR_VOSRDY 8415 #if defined(STM32F446xx) || defined(STM32F469_479xx) 8422 #define QUADSPI_CR_EN ((uint32_t)0x00000001) 8423 #define QUADSPI_CR_ABORT ((uint32_t)0x00000002) 8424 #define QUADSPI_CR_DMAEN ((uint32_t)0x00000004) 8425 #define QUADSPI_CR_TCEN ((uint32_t)0x00000008) 8426 #define QUADSPI_CR_SSHIFT ((uint32_t)0x00000030) 8427 #define QUADSPI_CR_SSHIFT_0 ((uint32_t)0x00000010) 8428 #define QUADSPI_CR_SSHIFT_1 ((uint32_t)0x00000020) 8429 #define QUADSPI_CR_DFM ((uint32_t)0x00000040) 8430 #define QUADSPI_CR_FSEL ((uint32_t)0x00000080) 8431 #define QUADSPI_CR_FTHRES ((uint32_t)0x00000F00) 8432 #define QUADSPI_CR_FTHRES_0 ((uint32_t)0x00000100) 8433 #define QUADSPI_CR_FTHRES_1 ((uint32_t)0x00000200) 8434 #define QUADSPI_CR_FTHRES_2 ((uint32_t)0x00000400) 8435 #define QUADSPI_CR_FTHRES_3 ((uint32_t)0x00000800) 8436 #define QUADSPI_CR_TEIE ((uint32_t)0x00010000) 8437 #define QUADSPI_CR_TCIE ((uint32_t)0x00020000) 8438 #define QUADSPI_CR_FTIE ((uint32_t)0x00040000) 8439 #define QUADSPI_CR_SMIE ((uint32_t)0x00080000) 8440 #define QUADSPI_CR_TOIE ((uint32_t)0x00100000) 8441 #define QUADSPI_CR_APMS ((uint32_t)0x00400000) 8442 #define QUADSPI_CR_PMM ((uint32_t)0x00800000) 8443 #define QUADSPI_CR_PRESCALER ((uint32_t)0xFF000000) 8444 #define QUADSPI_CR_PRESCALER_0 ((uint32_t)0x01000000) 8445 #define QUADSPI_CR_PRESCALER_1 ((uint32_t)0x02000000) 8446 #define QUADSPI_CR_PRESCALER_2 ((uint32_t)0x04000000) 8447 #define QUADSPI_CR_PRESCALER_3 ((uint32_t)0x08000000) 8448 #define QUADSPI_CR_PRESCALER_4 ((uint32_t)0x10000000) 8449 #define QUADSPI_CR_PRESCALER_5 ((uint32_t)0x20000000) 8450 #define QUADSPI_CR_PRESCALER_6 ((uint32_t)0x40000000) 8451 #define QUADSPI_CR_PRESCALER_7 ((uint32_t)0x80000000) 8454 #define QUADSPI_DCR_CKMODE ((uint32_t)0x00000001) 8455 #define QUADSPI_DCR_CSHT ((uint32_t)0x00000700) 8456 #define QUADSPI_DCR_CSHT_0 ((uint32_t)0x00000100) 8457 #define QUADSPI_DCR_CSHT_1 ((uint32_t)0x00000200) 8458 #define QUADSPI_DCR_CSHT_2 ((uint32_t)0x00000400) 8459 #define QUADSPI_DCR_FSIZE ((uint32_t)0x001F0000) 8460 #define QUADSPI_DCR_FSIZE_0 ((uint32_t)0x00010000) 8461 #define QUADSPI_DCR_FSIZE_1 ((uint32_t)0x00020000) 8462 #define QUADSPI_DCR_FSIZE_2 ((uint32_t)0x00040000) 8463 #define QUADSPI_DCR_FSIZE_3 ((uint32_t)0x00080000) 8464 #define QUADSPI_DCR_FSIZE_4 ((uint32_t)0x00100000) 8467 #define QUADSPI_SR_TEF ((uint32_t)0x00000001) 8468 #define QUADSPI_SR_TCF ((uint32_t)0x00000002) 8469 #define QUADSPI_SR_FTF ((uint32_t)0x00000004) 8470 #define QUADSPI_SR_SMF ((uint32_t)0x00000008) 8471 #define QUADSPI_SR_TOF ((uint32_t)0x00000010) 8472 #define QUADSPI_SR_BUSY ((uint32_t)0x00000020) 8473 #define QUADSPI_SR_FLEVEL ((uint32_t)0x00003F00) 8474 #define QUADSPI_SR_FLEVEL_0 ((uint32_t)0x00000100) 8475 #define QUADSPI_SR_FLEVEL_1 ((uint32_t)0x00000200) 8476 #define QUADSPI_SR_FLEVEL_2 ((uint32_t)0x00000400) 8477 #define QUADSPI_SR_FLEVEL_3 ((uint32_t)0x00000800) 8478 #define QUADSPI_SR_FLEVEL_4 ((uint32_t)0x00001000) 8479 #define QUADSPI_SR_FLEVEL_5 ((uint32_t)0x00002000) 8482 #define QUADSPI_FCR_CTEF ((uint32_t)0x00000001) 8483 #define QUADSPI_FCR_CTCF ((uint32_t)0x00000002) 8484 #define QUADSPI_FCR_CSMF ((uint32_t)0x00000008) 8485 #define QUADSPI_FCR_CTOF ((uint32_t)0x00000010) 8488 #define QUADSPI_DLR_DL ((uint32_t)0xFFFFFFFF) 8491 #define QUADSPI_CCR_INSTRUCTION ((uint32_t)0x000000FF) 8492 #define QUADSPI_CCR_INSTRUCTION_0 ((uint32_t)0x00000001) 8493 #define QUADSPI_CCR_INSTRUCTION_1 ((uint32_t)0x00000002) 8494 #define QUADSPI_CCR_INSTRUCTION_2 ((uint32_t)0x00000004) 8495 #define QUADSPI_CCR_INSTRUCTION_3 ((uint32_t)0x00000008) 8496 #define QUADSPI_CCR_INSTRUCTION_4 ((uint32_t)0x00000010) 8497 #define QUADSPI_CCR_INSTRUCTION_5 ((uint32_t)0x00000020) 8498 #define QUADSPI_CCR_INSTRUCTION_6 ((uint32_t)0x00000040) 8499 #define QUADSPI_CCR_INSTRUCTION_7 ((uint32_t)0x00000080) 8500 #define QUADSPI_CCR_IMODE ((uint32_t)0x00000300) 8501 #define QUADSPI_CCR_IMODE_0 ((uint32_t)0x00000100) 8502 #define QUADSPI_CCR_IMODE_1 ((uint32_t)0x00000200) 8503 #define QUADSPI_CCR_ADMODE ((uint32_t)0x00000C00) 8504 #define QUADSPI_CCR_ADMODE_0 ((uint32_t)0x00000400) 8505 #define QUADSPI_CCR_ADMODE_1 ((uint32_t)0x00000800) 8506 #define QUADSPI_CCR_ADSIZE ((uint32_t)0x00003000) 8507 #define QUADSPI_CCR_ADSIZE_0 ((uint32_t)0x00001000) 8508 #define QUADSPI_CCR_ADSIZE_1 ((uint32_t)0x00002000) 8509 #define QUADSPI_CCR_ABMODE ((uint32_t)0x0000C000) 8510 #define QUADSPI_CCR_ABMODE_0 ((uint32_t)0x00004000) 8511 #define QUADSPI_CCR_ABMODE_1 ((uint32_t)0x00008000) 8512 #define QUADSPI_CCR_ABSIZE ((uint32_t)0x00030000) 8513 #define QUADSPI_CCR_ABSIZE_0 ((uint32_t)0x00010000) 8514 #define QUADSPI_CCR_ABSIZE_1 ((uint32_t)0x00020000) 8515 #define QUADSPI_CCR_DCYC ((uint32_t)0x007C0000) 8516 #define QUADSPI_CCR_DCYC_0 ((uint32_t)0x00040000) 8517 #define QUADSPI_CCR_DCYC_1 ((uint32_t)0x00080000) 8518 #define QUADSPI_CCR_DCYC_2 ((uint32_t)0x00100000) 8519 #define QUADSPI_CCR_DCYC_3 ((uint32_t)0x00200000) 8520 #define QUADSPI_CCR_DCYC_4 ((uint32_t)0x00400000) 8521 #define QUADSPI_CCR_DMODE ((uint32_t)0x03000000) 8522 #define QUADSPI_CCR_DMODE_0 ((uint32_t)0x01000000) 8523 #define QUADSPI_CCR_DMODE_1 ((uint32_t)0x02000000) 8524 #define QUADSPI_CCR_FMODE ((uint32_t)0x0C000000) 8525 #define QUADSPI_CCR_FMODE_0 ((uint32_t)0x04000000) 8526 #define QUADSPI_CCR_FMODE_1 ((uint32_t)0x08000000) 8527 #define QUADSPI_CCR_SIOO ((uint32_t)0x10000000) 8528 #define QUADSPI_CCR_DHHC ((uint32_t)0x40000000) 8529 #define QUADSPI_CCR_DDRM ((uint32_t)0x80000000) 8531 #define QUADSPI_AR_ADDRESS ((uint32_t)0xFFFFFFFF) 8534 #define QUADSPI_ABR_ALTERNATE ((uint32_t)0xFFFFFFFF) 8537 #define QUADSPI_DR_DATA ((uint32_t)0xFFFFFFFF) 8540 #define QUADSPI_PSMKR_MASK ((uint32_t)0xFFFFFFFF) 8543 #define QUADSPI_PSMAR_MATCH ((uint32_t)0xFFFFFFFF) 8546 #define QUADSPI_PIR_INTERVAL ((uint32_t)0x0000FFFF) 8549 #define QUADSPI_LPTR_TIMEOUT ((uint32_t)0x0000FFFF) 8558 #define RCC_CR_HSION ((uint32_t)0x00000001) 8559 #define RCC_CR_HSIRDY ((uint32_t)0x00000002) 8561 #define RCC_CR_HSITRIM ((uint32_t)0x000000F8) 8562 #define RCC_CR_HSITRIM_0 ((uint32_t)0x00000008) 8563 #define RCC_CR_HSITRIM_1 ((uint32_t)0x00000010) 8564 #define RCC_CR_HSITRIM_2 ((uint32_t)0x00000020) 8565 #define RCC_CR_HSITRIM_3 ((uint32_t)0x00000040) 8566 #define RCC_CR_HSITRIM_4 ((uint32_t)0x00000080) 8568 #define RCC_CR_HSICAL ((uint32_t)0x0000FF00) 8569 #define RCC_CR_HSICAL_0 ((uint32_t)0x00000100) 8570 #define RCC_CR_HSICAL_1 ((uint32_t)0x00000200) 8571 #define RCC_CR_HSICAL_2 ((uint32_t)0x00000400) 8572 #define RCC_CR_HSICAL_3 ((uint32_t)0x00000800) 8573 #define RCC_CR_HSICAL_4 ((uint32_t)0x00001000) 8574 #define RCC_CR_HSICAL_5 ((uint32_t)0x00002000) 8575 #define RCC_CR_HSICAL_6 ((uint32_t)0x00004000) 8576 #define RCC_CR_HSICAL_7 ((uint32_t)0x00008000) 8578 #define RCC_CR_HSEON ((uint32_t)0x00010000) 8579 #define RCC_CR_HSERDY ((uint32_t)0x00020000) 8580 #define RCC_CR_HSEBYP ((uint32_t)0x00040000) 8581 #define RCC_CR_CSSON ((uint32_t)0x00080000) 8582 #define RCC_CR_PLLON ((uint32_t)0x01000000) 8583 #define RCC_CR_PLLRDY ((uint32_t)0x02000000) 8584 #define RCC_CR_PLLI2SON ((uint32_t)0x04000000) 8585 #define RCC_CR_PLLI2SRDY ((uint32_t)0x08000000) 8586 #define RCC_CR_PLLSAION ((uint32_t)0x10000000) 8587 #define RCC_CR_PLLSAIRDY ((uint32_t)0x20000000) 8590 #define RCC_PLLCFGR_PLLM ((uint32_t)0x0000003F) 8591 #define RCC_PLLCFGR_PLLM_0 ((uint32_t)0x00000001) 8592 #define RCC_PLLCFGR_PLLM_1 ((uint32_t)0x00000002) 8593 #define RCC_PLLCFGR_PLLM_2 ((uint32_t)0x00000004) 8594 #define RCC_PLLCFGR_PLLM_3 ((uint32_t)0x00000008) 8595 #define RCC_PLLCFGR_PLLM_4 ((uint32_t)0x00000010) 8596 #define RCC_PLLCFGR_PLLM_5 ((uint32_t)0x00000020) 8598 #define RCC_PLLCFGR_PLLN ((uint32_t)0x00007FC0) 8599 #define RCC_PLLCFGR_PLLN_0 ((uint32_t)0x00000040) 8600 #define RCC_PLLCFGR_PLLN_1 ((uint32_t)0x00000080) 8601 #define RCC_PLLCFGR_PLLN_2 ((uint32_t)0x00000100) 8602 #define RCC_PLLCFGR_PLLN_3 ((uint32_t)0x00000200) 8603 #define RCC_PLLCFGR_PLLN_4 ((uint32_t)0x00000400) 8604 #define RCC_PLLCFGR_PLLN_5 ((uint32_t)0x00000800) 8605 #define RCC_PLLCFGR_PLLN_6 ((uint32_t)0x00001000) 8606 #define RCC_PLLCFGR_PLLN_7 ((uint32_t)0x00002000) 8607 #define RCC_PLLCFGR_PLLN_8 ((uint32_t)0x00004000) 8609 #define RCC_PLLCFGR_PLLP ((uint32_t)0x00030000) 8610 #define RCC_PLLCFGR_PLLP_0 ((uint32_t)0x00010000) 8611 #define RCC_PLLCFGR_PLLP_1 ((uint32_t)0x00020000) 8613 #define RCC_PLLCFGR_PLLSRC ((uint32_t)0x00400000) 8614 #define RCC_PLLCFGR_PLLSRC_HSE ((uint32_t)0x00400000) 8615 #define RCC_PLLCFGR_PLLSRC_HSI ((uint32_t)0x00000000) 8617 #define RCC_PLLCFGR_PLLQ ((uint32_t)0x0F000000) 8618 #define RCC_PLLCFGR_PLLQ_0 ((uint32_t)0x01000000) 8619 #define RCC_PLLCFGR_PLLQ_1 ((uint32_t)0x02000000) 8620 #define RCC_PLLCFGR_PLLQ_2 ((uint32_t)0x04000000) 8621 #define RCC_PLLCFGR_PLLQ_3 ((uint32_t)0x08000000) 8623 #if defined(STM32F446xx) || defined(STM32F469_479xx) 8624 #define RCC_PLLCFGR_PLLR ((uint32_t)0x70000000) 8625 #define RCC_PLLCFGR_PLLR_0 ((uint32_t)0x10000000) 8626 #define RCC_PLLCFGR_PLLR_1 ((uint32_t)0x20000000) 8627 #define RCC_PLLCFGR_PLLR_2 ((uint32_t)0x40000000) 8632 #define RCC_CFGR_SW ((uint32_t)0x00000003) 8633 #define RCC_CFGR_SW_0 ((uint32_t)0x00000001) 8634 #define RCC_CFGR_SW_1 ((uint32_t)0x00000002) 8636 #define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) 8637 #define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) 8638 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) 8639 #if defined(STM32F446xx) || defined(STM32F469_479xx) 8640 #define RCC_CFGR_SW_PLLR ((uint32_t)0x00000003) 8644 #define RCC_CFGR_SWS ((uint32_t)0x0000000C) 8645 #define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) 8646 #define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) 8648 #define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) 8649 #define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) 8650 #define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) 8651 #if defined(STM32F469_479xx) || defined(STM32F446xx) 8652 #define RCC_CFGR_SWS_PLLR ((uint32_t)0x0000000C) 8656 #define RCC_CFGR_HPRE ((uint32_t)0x000000F0) 8657 #define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) 8658 #define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) 8659 #define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) 8660 #define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) 8662 #define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) 8663 #define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) 8664 #define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) 8665 #define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) 8666 #define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) 8667 #define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) 8668 #define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) 8669 #define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) 8670 #define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) 8672 #if defined(STM32F410xx) 8674 #define RCC_CFGR_MCO1EN ((uint32_t)0x00000100) 8676 #define RCC_CFGR_MCO2EN ((uint32_t)0x00000200) 8679 #define RCC_CFGR_PPRE1 ((uint32_t)0x00001C00) 8680 #define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000400) 8681 #define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000800) 8682 #define RCC_CFGR_PPRE1_2 ((uint32_t)0x00001000) 8684 #define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) 8685 #define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00001000) 8686 #define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00001400) 8687 #define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00001800) 8688 #define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00001C00) 8691 #define RCC_CFGR_PPRE2 ((uint32_t)0x0000E000) 8692 #define RCC_CFGR_PPRE2_0 ((uint32_t)0x00002000) 8693 #define RCC_CFGR_PPRE2_1 ((uint32_t)0x00004000) 8694 #define RCC_CFGR_PPRE2_2 ((uint32_t)0x00008000) 8696 #define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) 8697 #define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00008000) 8698 #define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x0000A000) 8699 #define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x0000C000) 8700 #define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x0000E000) 8703 #define RCC_CFGR_RTCPRE ((uint32_t)0x001F0000) 8704 #define RCC_CFGR_RTCPRE_0 ((uint32_t)0x00010000) 8705 #define RCC_CFGR_RTCPRE_1 ((uint32_t)0x00020000) 8706 #define RCC_CFGR_RTCPRE_2 ((uint32_t)0x00040000) 8707 #define RCC_CFGR_RTCPRE_3 ((uint32_t)0x00080000) 8708 #define RCC_CFGR_RTCPRE_4 ((uint32_t)0x00100000) 8711 #define RCC_CFGR_MCO1 ((uint32_t)0x00600000) 8712 #define RCC_CFGR_MCO1_0 ((uint32_t)0x00200000) 8713 #define RCC_CFGR_MCO1_1 ((uint32_t)0x00400000) 8715 #define RCC_CFGR_I2SSRC ((uint32_t)0x00800000) 8717 #define RCC_CFGR_MCO1PRE ((uint32_t)0x07000000) 8718 #define RCC_CFGR_MCO1PRE_0 ((uint32_t)0x01000000) 8719 #define RCC_CFGR_MCO1PRE_1 ((uint32_t)0x02000000) 8720 #define RCC_CFGR_MCO1PRE_2 ((uint32_t)0x04000000) 8722 #define RCC_CFGR_MCO2PRE ((uint32_t)0x38000000) 8723 #define RCC_CFGR_MCO2PRE_0 ((uint32_t)0x08000000) 8724 #define RCC_CFGR_MCO2PRE_1 ((uint32_t)0x10000000) 8725 #define RCC_CFGR_MCO2PRE_2 ((uint32_t)0x20000000) 8727 #define RCC_CFGR_MCO2 ((uint32_t)0xC0000000) 8728 #define RCC_CFGR_MCO2_0 ((uint32_t)0x40000000) 8729 #define RCC_CFGR_MCO2_1 ((uint32_t)0x80000000) 8732 #define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) 8733 #define RCC_CIR_LSERDYF ((uint32_t)0x00000002) 8734 #define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) 8735 #define RCC_CIR_HSERDYF ((uint32_t)0x00000008) 8736 #define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) 8737 #define RCC_CIR_PLLI2SRDYF ((uint32_t)0x00000020) 8738 #define RCC_CIR_PLLSAIRDYF ((uint32_t)0x00000040) 8739 #define RCC_CIR_CSSF ((uint32_t)0x00000080) 8740 #define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) 8741 #define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) 8742 #define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) 8743 #define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) 8744 #define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) 8745 #define RCC_CIR_PLLI2SRDYIE ((uint32_t)0x00002000) 8746 #define RCC_CIR_PLLSAIRDYIE ((uint32_t)0x00004000) 8747 #define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) 8748 #define RCC_CIR_LSERDYC ((uint32_t)0x00020000) 8749 #define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) 8750 #define RCC_CIR_HSERDYC ((uint32_t)0x00080000) 8751 #define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) 8752 #define RCC_CIR_PLLI2SRDYC ((uint32_t)0x00200000) 8753 #define RCC_CIR_PLLSAIRDYC ((uint32_t)0x00400000) 8754 #define RCC_CIR_CSSC ((uint32_t)0x00800000) 8757 #define RCC_AHB1RSTR_GPIOARST ((uint32_t)0x00000001) 8758 #define RCC_AHB1RSTR_GPIOBRST ((uint32_t)0x00000002) 8759 #define RCC_AHB1RSTR_GPIOCRST ((uint32_t)0x00000004) 8760 #define RCC_AHB1RSTR_GPIODRST ((uint32_t)0x00000008) 8761 #define RCC_AHB1RSTR_GPIOERST ((uint32_t)0x00000010) 8762 #define RCC_AHB1RSTR_GPIOFRST ((uint32_t)0x00000020) 8763 #define RCC_AHB1RSTR_GPIOGRST ((uint32_t)0x00000040) 8764 #define RCC_AHB1RSTR_GPIOHRST ((uint32_t)0x00000080) 8765 #define RCC_AHB1RSTR_GPIOIRST ((uint32_t)0x00000100) 8766 #define RCC_AHB1RSTR_GPIOJRST ((uint32_t)0x00000200) 8767 #define RCC_AHB1RSTR_GPIOKRST ((uint32_t)0x00000400) 8768 #define RCC_AHB1RSTR_CRCRST ((uint32_t)0x00001000) 8769 #define RCC_AHB1RSTR_DMA1RST ((uint32_t)0x00200000) 8770 #define RCC_AHB1RSTR_DMA2RST ((uint32_t)0x00400000) 8771 #define RCC_AHB1RSTR_DMA2DRST ((uint32_t)0x00800000) 8772 #define RCC_AHB1RSTR_ETHMACRST ((uint32_t)0x02000000) 8773 #define RCC_AHB1RSTR_OTGHRST ((uint32_t)0x10000000) 8776 #define RCC_AHB2RSTR_DCMIRST ((uint32_t)0x00000001) 8777 #define RCC_AHB2RSTR_CRYPRST ((uint32_t)0x00000010) 8778 #define RCC_AHB2RSTR_HASHRST ((uint32_t)0x00000020) 8780 #define RCC_AHB2RSTR_HSAHRST RCC_AHB2RSTR_HASHRST 8781 #define RCC_AHB2RSTR_RNGRST ((uint32_t)0x00000040) 8782 #define RCC_AHB2RSTR_OTGFSRST ((uint32_t)0x00000080) 8785 #if defined(STM32F40_41xxx) 8786 #define RCC_AHB3RSTR_FSMCRST ((uint32_t)0x00000001) 8789 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 8790 #define RCC_AHB3RSTR_FMCRST ((uint32_t)0x00000001) 8792 #if defined(STM32F446xx) || defined(STM32F469_479xx) 8793 #define RCC_AHB3RSTR_QSPIRST ((uint32_t)0x00000002) 8797 #define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) 8798 #define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) 8799 #define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) 8800 #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) 8801 #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) 8802 #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) 8803 #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) 8804 #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) 8805 #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) 8806 #if defined(STM32F410xx) 8807 #define RCC_APB1RSTR_LPTIM1RST ((uint32_t)0x00000200) 8809 #define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) 8810 #define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) 8811 #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) 8812 #if defined(STM32F446xx) 8813 #define RCC_APB1RSTR_SPDIFRXRST ((uint32_t)0x00010000) 8815 #define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) 8816 #define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) 8817 #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) 8818 #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) 8819 #define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) 8820 #define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) 8821 #define RCC_APB1RSTR_I2C3RST ((uint32_t)0x00800000) 8822 #if defined(STM32F410xx) || defined(STM32F446xx) 8823 #define RCC_APB1RSTR_FMPI2C1RST ((uint32_t)0x01000000) 8825 #define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) 8826 #define RCC_APB1RSTR_CAN2RST ((uint32_t)0x04000000) 8827 #if defined(STM32F446xx) 8828 #define RCC_APB1RSTR_CECRST ((uint32_t)0x08000000) 8830 #define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) 8831 #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) 8832 #define RCC_APB1RSTR_UART7RST ((uint32_t)0x40000000) 8833 #define RCC_APB1RSTR_UART8RST ((uint32_t)0x80000000) 8836 #define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000001) 8837 #define RCC_APB2RSTR_TIM8RST ((uint32_t)0x00000002) 8838 #define RCC_APB2RSTR_USART1RST ((uint32_t)0x00000010) 8839 #define RCC_APB2RSTR_USART6RST ((uint32_t)0x00000020) 8840 #define RCC_APB2RSTR_ADCRST ((uint32_t)0x00000100) 8841 #define RCC_APB2RSTR_SDIORST ((uint32_t)0x00000800) 8842 #define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) 8843 #define RCC_APB2RSTR_SPI4RST ((uint32_t)0x00002000) 8844 #define RCC_APB2RSTR_SYSCFGRST ((uint32_t)0x00004000) 8845 #define RCC_APB2RSTR_TIM9RST ((uint32_t)0x00010000) 8846 #define RCC_APB2RSTR_TIM10RST ((uint32_t)0x00020000) 8847 #define RCC_APB2RSTR_TIM11RST ((uint32_t)0x00040000) 8848 #define RCC_APB2RSTR_SPI5RST ((uint32_t)0x00100000) 8849 #define RCC_APB2RSTR_SPI6RST ((uint32_t)0x00200000) 8850 #define RCC_APB2RSTR_SAI1RST ((uint32_t)0x00400000) 8851 #if defined(STM32F446xx) 8852 #define RCC_APB2RSTR_SAI2RST ((uint32_t)0x00800000) 8854 #define RCC_APB2RSTR_LTDCRST ((uint32_t)0x04000000) 8855 #if defined(STM32F469_479xx) 8856 #define RCC_APB2RSTR_DSIRST ((uint32_t)0x08000000) 8859 #define RCC_APB2RSTR_SPI1 RCC_APB2RSTR_SPI1RST 8862 #define RCC_AHB1ENR_GPIOAEN ((uint32_t)0x00000001) 8863 #define RCC_AHB1ENR_GPIOBEN ((uint32_t)0x00000002) 8864 #define RCC_AHB1ENR_GPIOCEN ((uint32_t)0x00000004) 8865 #define RCC_AHB1ENR_GPIODEN ((uint32_t)0x00000008) 8866 #define RCC_AHB1ENR_GPIOEEN ((uint32_t)0x00000010) 8867 #define RCC_AHB1ENR_GPIOFEN ((uint32_t)0x00000020) 8868 #define RCC_AHB1ENR_GPIOGEN ((uint32_t)0x00000040) 8869 #define RCC_AHB1ENR_GPIOHEN ((uint32_t)0x00000080) 8870 #define RCC_AHB1ENR_GPIOIEN ((uint32_t)0x00000100) 8871 #define RCC_AHB1ENR_GPIOJEN ((uint32_t)0x00000200) 8872 #define RCC_AHB1ENR_GPIOKEN ((uint32_t)0x00000400) 8873 #define RCC_AHB1ENR_CRCEN ((uint32_t)0x00001000) 8874 #define RCC_AHB1ENR_BKPSRAMEN ((uint32_t)0x00040000) 8875 #define RCC_AHB1ENR_CCMDATARAMEN ((uint32_t)0x00100000) 8876 #define RCC_AHB1ENR_DMA1EN ((uint32_t)0x00200000) 8877 #define RCC_AHB1ENR_DMA2EN ((uint32_t)0x00400000) 8878 #define RCC_AHB1ENR_DMA2DEN ((uint32_t)0x00800000) 8879 #define RCC_AHB1ENR_ETHMACEN ((uint32_t)0x02000000) 8880 #define RCC_AHB1ENR_ETHMACTXEN ((uint32_t)0x04000000) 8881 #define RCC_AHB1ENR_ETHMACRXEN ((uint32_t)0x08000000) 8882 #define RCC_AHB1ENR_ETHMACPTPEN ((uint32_t)0x10000000) 8883 #define RCC_AHB1ENR_OTGHSEN ((uint32_t)0x20000000) 8884 #define RCC_AHB1ENR_OTGHSULPIEN ((uint32_t)0x40000000) 8887 #define RCC_AHB2ENR_DCMIEN ((uint32_t)0x00000001) 8888 #define RCC_AHB2ENR_CRYPEN ((uint32_t)0x00000010) 8889 #define RCC_AHB2ENR_HASHEN ((uint32_t)0x00000020) 8890 #define RCC_AHB2ENR_RNGEN ((uint32_t)0x00000040) 8891 #define RCC_AHB2ENR_OTGFSEN ((uint32_t)0x00000080) 8895 #if defined(STM32F40_41xxx) 8896 #define RCC_AHB3ENR_FSMCEN ((uint32_t)0x00000001) 8899 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 8900 #define RCC_AHB3ENR_FMCEN ((uint32_t)0x00000001) 8903 #if defined(STM32F446xx) || defined(STM32F469_479xx) 8904 #define RCC_AHB3ENR_QSPIEN ((uint32_t)0x00000002) 8908 #define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) 8909 #define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) 8910 #define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) 8911 #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) 8912 #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) 8913 #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) 8914 #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) 8915 #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) 8916 #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) 8917 #if defined(STM32F410xx) 8918 #define RCC_APB1ENR_LPTIM1EN ((uint32_t)0x00000200) 8920 #define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) 8921 #define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) 8922 #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) 8923 #if defined(STM32F446xx) 8924 #define RCC_APB1ENR_SPDIFRXEN ((uint32_t)0x00010000) 8926 #define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) 8927 #define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) 8928 #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) 8929 #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) 8930 #define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) 8931 #define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) 8932 #define RCC_APB1ENR_I2C3EN ((uint32_t)0x00800000) 8933 #if defined(STM32F410xx) || defined(STM32F446xx) 8934 #define RCC_APB1ENR_FMPI2C1EN ((uint32_t)0x01000000) 8936 #define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) 8937 #define RCC_APB1ENR_CAN2EN ((uint32_t)0x04000000) 8938 #if defined(STM32F446xx) 8939 #define RCC_APB1ENR_CECEN ((uint32_t)0x08000000) 8941 #define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) 8942 #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) 8943 #define RCC_APB1ENR_UART7EN ((uint32_t)0x40000000) 8944 #define RCC_APB1ENR_UART8EN ((uint32_t)0x80000000) 8947 #define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000001) 8948 #define RCC_APB2ENR_TIM8EN ((uint32_t)0x00000002) 8949 #define RCC_APB2ENR_USART1EN ((uint32_t)0x00000010) 8950 #define RCC_APB2ENR_USART6EN ((uint32_t)0x00000020) 8951 #define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000100) 8952 #define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000200) 8953 #define RCC_APB2ENR_ADC3EN ((uint32_t)0x00000400) 8954 #define RCC_APB2ENR_SDIOEN ((uint32_t)0x00000800) 8955 #define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) 8956 #define RCC_APB2ENR_SPI4EN ((uint32_t)0x00002000) 8957 #define RCC_APB2ENR_SYSCFGEN ((uint32_t)0x00004000) 8958 #define RCC_APB2ENR_TIM9EN ((uint32_t)0x00010000) 8959 #define RCC_APB2ENR_TIM10EN ((uint32_t)0x00020000) 8960 #define RCC_APB2ENR_TIM11EN ((uint32_t)0x00040000) 8961 #define RCC_APB2ENR_SPI5EN ((uint32_t)0x00100000) 8962 #define RCC_APB2ENR_SPI6EN ((uint32_t)0x00200000) 8963 #define RCC_APB2ENR_SAI1EN ((uint32_t)0x00400000) 8964 #if defined(STM32F446xx) 8965 #define RCC_APB2ENR_SAI2EN ((uint32_t)0x00800000) 8967 #define RCC_APB2ENR_LTDCEN ((uint32_t)0x04000000) 8968 #if defined(STM32F469_479xx) 8969 #define RCC_APB2ENR_DSIEN ((uint32_t)0x08000000) 8973 #define RCC_AHB1LPENR_GPIOALPEN ((uint32_t)0x00000001) 8974 #define RCC_AHB1LPENR_GPIOBLPEN ((uint32_t)0x00000002) 8975 #define RCC_AHB1LPENR_GPIOCLPEN ((uint32_t)0x00000004) 8976 #define RCC_AHB1LPENR_GPIODLPEN ((uint32_t)0x00000008) 8977 #define RCC_AHB1LPENR_GPIOELPEN ((uint32_t)0x00000010) 8978 #define RCC_AHB1LPENR_GPIOFLPEN ((uint32_t)0x00000020) 8979 #define RCC_AHB1LPENR_GPIOGLPEN ((uint32_t)0x00000040) 8980 #define RCC_AHB1LPENR_GPIOHLPEN ((uint32_t)0x00000080) 8981 #define RCC_AHB1LPENR_GPIOILPEN ((uint32_t)0x00000100) 8982 #define RCC_AHB1LPENR_GPIOJLPEN ((uint32_t)0x00000200) 8983 #define RCC_AHB1LPENR_GPIOKLPEN ((uint32_t)0x00000400) 8984 #define RCC_AHB1LPENR_CRCLPEN ((uint32_t)0x00001000) 8985 #define RCC_AHB1LPENR_FLITFLPEN ((uint32_t)0x00008000) 8986 #define RCC_AHB1LPENR_SRAM1LPEN ((uint32_t)0x00010000) 8987 #define RCC_AHB1LPENR_SRAM2LPEN ((uint32_t)0x00020000) 8988 #define RCC_AHB1LPENR_BKPSRAMLPEN ((uint32_t)0x00040000) 8989 #define RCC_AHB1LPENR_SRAM3LPEN ((uint32_t)0x00080000) 8990 #define RCC_AHB1LPENR_DMA1LPEN ((uint32_t)0x00200000) 8991 #define RCC_AHB1LPENR_DMA2LPEN ((uint32_t)0x00400000) 8992 #define RCC_AHB1LPENR_DMA2DLPEN ((uint32_t)0x00800000) 8993 #define RCC_AHB1LPENR_ETHMACLPEN ((uint32_t)0x02000000) 8994 #define RCC_AHB1LPENR_ETHMACTXLPEN ((uint32_t)0x04000000) 8995 #define RCC_AHB1LPENR_ETHMACRXLPEN ((uint32_t)0x08000000) 8996 #define RCC_AHB1LPENR_ETHMACPTPLPEN ((uint32_t)0x10000000) 8997 #define RCC_AHB1LPENR_OTGHSLPEN ((uint32_t)0x20000000) 8998 #define RCC_AHB1LPENR_OTGHSULPILPEN ((uint32_t)0x40000000) 9001 #define RCC_AHB2LPENR_DCMILPEN ((uint32_t)0x00000001) 9002 #define RCC_AHB2LPENR_CRYPLPEN ((uint32_t)0x00000010) 9003 #define RCC_AHB2LPENR_HASHLPEN ((uint32_t)0x00000020) 9004 #define RCC_AHB2LPENR_RNGLPEN ((uint32_t)0x00000040) 9005 #define RCC_AHB2LPENR_OTGFSLPEN ((uint32_t)0x00000080) 9008 #if defined(STM32F40_41xxx) 9009 #define RCC_AHB3LPENR_FSMCLPEN ((uint32_t)0x00000001) 9012 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 9013 #define RCC_AHB3LPENR_FMCLPEN ((uint32_t)0x00000001) 9015 #if defined(STM32F446xx) || defined(STM32F469_479xx) 9016 #define RCC_AHB3LPENR_QSPILPEN ((uint32_t)0x00000002) 9020 #define RCC_APB1LPENR_TIM2LPEN ((uint32_t)0x00000001) 9021 #define RCC_APB1LPENR_TIM3LPEN ((uint32_t)0x00000002) 9022 #define RCC_APB1LPENR_TIM4LPEN ((uint32_t)0x00000004) 9023 #define RCC_APB1LPENR_TIM5LPEN ((uint32_t)0x00000008) 9024 #define RCC_APB1LPENR_TIM6LPEN ((uint32_t)0x00000010) 9025 #define RCC_APB1LPENR_TIM7LPEN ((uint32_t)0x00000020) 9026 #define RCC_APB1LPENR_TIM12LPEN ((uint32_t)0x00000040) 9027 #define RCC_APB1LPENR_TIM13LPEN ((uint32_t)0x00000080) 9028 #define RCC_APB1LPENR_TIM14LPEN ((uint32_t)0x00000100) 9029 #if defined(STM32F410xx) 9030 #define RCC_APB1LPENR_LPTIM1LPEN ((uint32_t)0x00000200) 9032 #define RCC_APB1LPENR_WWDGLPEN ((uint32_t)0x00000800) 9033 #define RCC_APB1LPENR_SPI2LPEN ((uint32_t)0x00004000) 9034 #define RCC_APB1LPENR_SPI3LPEN ((uint32_t)0x00008000) 9035 #if defined(STM32F446xx) 9036 #define RCC_APB1LPENR_SPDIFRXLPEN ((uint32_t)0x00010000) 9038 #define RCC_APB1LPENR_USART2LPEN ((uint32_t)0x00020000) 9039 #define RCC_APB1LPENR_USART3LPEN ((uint32_t)0x00040000) 9040 #define RCC_APB1LPENR_UART4LPEN ((uint32_t)0x00080000) 9041 #define RCC_APB1LPENR_UART5LPEN ((uint32_t)0x00100000) 9042 #define RCC_APB1LPENR_I2C1LPEN ((uint32_t)0x00200000) 9043 #define RCC_APB1LPENR_I2C2LPEN ((uint32_t)0x00400000) 9044 #define RCC_APB1LPENR_I2C3LPEN ((uint32_t)0x00800000) 9045 #if defined(STM32F410xx) || defined(STM32F446xx) 9046 #define RCC_APB1LPENR_FMPI2C1LPEN ((uint32_t)0x01000000) 9048 #define RCC_APB1LPENR_CAN1LPEN ((uint32_t)0x02000000) 9049 #define RCC_APB1LPENR_CAN2LPEN ((uint32_t)0x04000000) 9050 #if defined(STM32F446xx) 9051 #define RCC_APB1LPENR_CECLPEN ((uint32_t)0x08000000) 9053 #define RCC_APB1LPENR_PWRLPEN ((uint32_t)0x10000000) 9054 #define RCC_APB1LPENR_DACLPEN ((uint32_t)0x20000000) 9055 #define RCC_APB1LPENR_UART7LPEN ((uint32_t)0x40000000) 9056 #define RCC_APB1LPENR_UART8LPEN ((uint32_t)0x80000000) 9059 #define RCC_APB2LPENR_TIM1LPEN ((uint32_t)0x00000001) 9060 #define RCC_APB2LPENR_TIM8LPEN ((uint32_t)0x00000002) 9061 #define RCC_APB2LPENR_USART1LPEN ((uint32_t)0x00000010) 9062 #define RCC_APB2LPENR_USART6LPEN ((uint32_t)0x00000020) 9063 #define RCC_APB2LPENR_ADC1LPEN ((uint32_t)0x00000100) 9064 #define RCC_APB2LPENR_ADC2PEN ((uint32_t)0x00000200) 9065 #define RCC_APB2LPENR_ADC3LPEN ((uint32_t)0x00000400) 9066 #define RCC_APB2LPENR_SDIOLPEN ((uint32_t)0x00000800) 9067 #define RCC_APB2LPENR_SPI1LPEN ((uint32_t)0x00001000) 9068 #define RCC_APB2LPENR_SPI4LPEN ((uint32_t)0x00002000) 9069 #define RCC_APB2LPENR_SYSCFGLPEN ((uint32_t)0x00004000) 9070 #define RCC_APB2LPENR_TIM9LPEN ((uint32_t)0x00010000) 9071 #define RCC_APB2LPENR_TIM10LPEN ((uint32_t)0x00020000) 9072 #define RCC_APB2LPENR_TIM11LPEN ((uint32_t)0x00040000) 9073 #define RCC_APB2LPENR_SPI5LPEN ((uint32_t)0x00100000) 9074 #define RCC_APB2LPENR_SPI6LPEN ((uint32_t)0x00200000) 9075 #define RCC_APB2LPENR_SAI1LPEN ((uint32_t)0x00400000) 9076 #if defined(STM32F446xx) 9077 #define RCC_APB2LPENR_SAI2LPEN ((uint32_t)0x00800000) 9079 #define RCC_APB2LPENR_LTDCLPEN ((uint32_t)0x04000000) 9080 #if defined(STM32F469_479xx) 9081 #define RCC_APB2LPENR_DSILPEN ((uint32_t)0x08000000) 9085 #define RCC_BDCR_LSEON ((uint32_t)0x00000001) 9086 #define RCC_BDCR_LSERDY ((uint32_t)0x00000002) 9087 #define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) 9088 #define RCC_BDCR_LSEMOD ((uint32_t)0x00000008) 9090 #define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) 9091 #define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) 9092 #define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) 9094 #define RCC_BDCR_RTCEN ((uint32_t)0x00008000) 9095 #define RCC_BDCR_BDRST ((uint32_t)0x00010000) 9098 #define RCC_CSR_LSION ((uint32_t)0x00000001) 9099 #define RCC_CSR_LSIRDY ((uint32_t)0x00000002) 9100 #define RCC_CSR_RMVF ((uint32_t)0x01000000) 9101 #define RCC_CSR_BORRSTF ((uint32_t)0x02000000) 9102 #define RCC_CSR_PADRSTF ((uint32_t)0x04000000) 9103 #define RCC_CSR_PORRSTF ((uint32_t)0x08000000) 9104 #define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) 9105 #define RCC_CSR_WDGRSTF ((uint32_t)0x20000000) 9106 #define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) 9107 #define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) 9110 #define RCC_SSCGR_MODPER ((uint32_t)0x00001FFF) 9111 #define RCC_SSCGR_INCSTEP ((uint32_t)0x0FFFE000) 9112 #define RCC_SSCGR_SPREADSEL ((uint32_t)0x40000000) 9113 #define RCC_SSCGR_SSCGEN ((uint32_t)0x80000000) 9116 #define RCC_PLLI2SCFGR_PLLI2SM ((uint32_t)0x0000003F) 9117 #define RCC_PLLI2SCFGR_PLLI2SM_0 ((uint32_t)0x00000001) 9118 #define RCC_PLLI2SCFGR_PLLI2SM_1 ((uint32_t)0x00000002) 9119 #define RCC_PLLI2SCFGR_PLLI2SM_2 ((uint32_t)0x00000004) 9120 #define RCC_PLLI2SCFGR_PLLI2SM_3 ((uint32_t)0x00000008) 9121 #define RCC_PLLI2SCFGR_PLLI2SM_4 ((uint32_t)0x00000010) 9122 #define RCC_PLLI2SCFGR_PLLI2SM_5 ((uint32_t)0x00000020) 9124 #define RCC_PLLI2SCFGR_PLLI2SN ((uint32_t)0x00007FC0) 9125 #define RCC_PLLI2SCFGR_PLLI2SN_0 ((uint32_t)0x00000040) 9126 #define RCC_PLLI2SCFGR_PLLI2SN_1 ((uint32_t)0x00000080) 9127 #define RCC_PLLI2SCFGR_PLLI2SN_2 ((uint32_t)0x00000100) 9128 #define RCC_PLLI2SCFGR_PLLI2SN_3 ((uint32_t)0x00000200) 9129 #define RCC_PLLI2SCFGR_PLLI2SN_4 ((uint32_t)0x00000400) 9130 #define RCC_PLLI2SCFGR_PLLI2SN_5 ((uint32_t)0x00000800) 9131 #define RCC_PLLI2SCFGR_PLLI2SN_6 ((uint32_t)0x00001000) 9132 #define RCC_PLLI2SCFGR_PLLI2SN_7 ((uint32_t)0x00002000) 9133 #define RCC_PLLI2SCFGR_PLLI2SN_8 ((uint32_t)0x00004000) 9135 #if defined(STM32F446xx) 9136 #define RCC_PLLI2SCFGR_PLLI2SP ((uint32_t)0x00030000) 9137 #define RCC_PLLI2SCFGR_PLLI2SP_0 ((uint32_t)0x00010000) 9138 #define RCC_PLLI2SCFGR_PLLI2SP_1 ((uint32_t)0x00020000) 9141 #define RCC_PLLI2SCFGR_PLLI2SQ ((uint32_t)0x0F000000) 9142 #define RCC_PLLI2SCFGR_PLLI2SQ_0 ((uint32_t)0x01000000) 9143 #define RCC_PLLI2SCFGR_PLLI2SQ_1 ((uint32_t)0x02000000) 9144 #define RCC_PLLI2SCFGR_PLLI2SQ_2 ((uint32_t)0x04000000) 9145 #define RCC_PLLI2SCFGR_PLLI2SQ_3 ((uint32_t)0x08000000) 9147 #define RCC_PLLI2SCFGR_PLLI2SR ((uint32_t)0x70000000) 9148 #define RCC_PLLI2SCFGR_PLLI2SR_0 ((uint32_t)0x10000000) 9149 #define RCC_PLLI2SCFGR_PLLI2SR_1 ((uint32_t)0x20000000) 9150 #define RCC_PLLI2SCFGR_PLLI2SR_2 ((uint32_t)0x40000000) 9153 #if defined(STM32F446xx) 9154 #define RCC_PLLSAICFGR_PLLSAIM ((uint32_t)0x0000003F) 9155 #define RCC_PLLSAICFGR_PLLSAIM_0 ((uint32_t)0x00000001) 9156 #define RCC_PLLSAICFGR_PLLSAIM_1 ((uint32_t)0x00000002) 9157 #define RCC_PLLSAICFGR_PLLSAIM_2 ((uint32_t)0x00000004) 9158 #define RCC_PLLSAICFGR_PLLSAIM_3 ((uint32_t)0x00000008) 9159 #define RCC_PLLSAICFGR_PLLSAIM_4 ((uint32_t)0x00000010) 9160 #define RCC_PLLSAICFGR_PLLSAIM_5 ((uint32_t)0x00000020) 9163 #define RCC_PLLSAICFGR_PLLSAIN ((uint32_t)0x00007FC0) 9164 #define RCC_PLLSAICFGR_PLLSAIN_0 ((uint32_t)0x00000040) 9165 #define RCC_PLLSAICFGR_PLLSAIN_1 ((uint32_t)0x00000080) 9166 #define RCC_PLLSAICFGR_PLLSAIN_2 ((uint32_t)0x00000100) 9167 #define RCC_PLLSAICFGR_PLLSAIN_3 ((uint32_t)0x00000200) 9168 #define RCC_PLLSAICFGR_PLLSAIN_4 ((uint32_t)0x00000400) 9169 #define RCC_PLLSAICFGR_PLLSAIN_5 ((uint32_t)0x00000800) 9170 #define RCC_PLLSAICFGR_PLLSAIN_6 ((uint32_t)0x00001000) 9171 #define RCC_PLLSAICFGR_PLLSAIN_7 ((uint32_t)0x00002000) 9172 #define RCC_PLLSAICFGR_PLLSAIN_8 ((uint32_t)0x00004000) 9174 #if defined(STM32F446xx) || defined(STM32F469_479xx) 9175 #define RCC_PLLSAICFGR_PLLSAIP ((uint32_t)0x00030000) 9176 #define RCC_PLLSAICFGR_PLLSAIP_0 ((uint32_t)0x00010000) 9177 #define RCC_PLLSAICFGR_PLLSAIP_1 ((uint32_t)0x00020000) 9180 #define RCC_PLLSAICFGR_PLLSAIQ ((uint32_t)0x0F000000) 9181 #define RCC_PLLSAICFGR_PLLSAIQ_0 ((uint32_t)0x01000000) 9182 #define RCC_PLLSAICFGR_PLLSAIQ_1 ((uint32_t)0x02000000) 9183 #define RCC_PLLSAICFGR_PLLSAIQ_2 ((uint32_t)0x04000000) 9184 #define RCC_PLLSAICFGR_PLLSAIQ_3 ((uint32_t)0x08000000) 9186 #define RCC_PLLSAICFGR_PLLSAIR ((uint32_t)0x70000000) 9187 #define RCC_PLLSAICFGR_PLLSAIR_0 ((uint32_t)0x10000000) 9188 #define RCC_PLLSAICFGR_PLLSAIR_1 ((uint32_t)0x20000000) 9189 #define RCC_PLLSAICFGR_PLLSAIR_2 ((uint32_t)0x40000000) 9192 #define RCC_DCKCFGR_PLLI2SDIVQ ((uint32_t)0x0000001F) 9193 #define RCC_DCKCFGR_PLLSAIDIVQ ((uint32_t)0x00001F00) 9194 #define RCC_DCKCFGR_PLLSAIDIVR ((uint32_t)0x00030000) 9196 #define RCC_DCKCFGR_SAI1ASRC ((uint32_t)0x00300000) 9197 #define RCC_DCKCFGR_SAI1ASRC_0 ((uint32_t)0x00100000) 9198 #define RCC_DCKCFGR_SAI1ASRC_1 ((uint32_t)0x00200000) 9199 #if defined(STM32F446xx) 9200 #define RCC_DCKCFGR_SAI1SRC ((uint32_t)0x00300000) 9201 #define RCC_DCKCFGR_SAI1SRC_0 ((uint32_t)0x00100000) 9202 #define RCC_DCKCFGR_SAI1SRC_1 ((uint32_t)0x00200000) 9205 #define RCC_DCKCFGR_SAI1BSRC ((uint32_t)0x00C00000) 9206 #define RCC_DCKCFGR_SAI1BSRC_0 ((uint32_t)0x00400000) 9207 #define RCC_DCKCFGR_SAI1BSRC_1 ((uint32_t)0x00800000) 9208 #if defined(STM32F446xx) 9209 #define RCC_DCKCFGR_SAI2SRC ((uint32_t)0x00C00000) 9210 #define RCC_DCKCFGR_SAI2SRC_0 ((uint32_t)0x00400000) 9211 #define RCC_DCKCFGR_SAI2SRC_1 ((uint32_t)0x00800000) 9214 #define RCC_DCKCFGR_TIMPRE ((uint32_t)0x01000000) 9215 #if defined(STM32F469_479xx) 9216 #define RCC_DCKCFGR_CK48MSEL ((uint32_t)0x08000000) 9217 #define RCC_DCKCFGR_SDIOSEL ((uint32_t)0x10000000) 9218 #define RCC_DCKCFGR_DSISEL ((uint32_t)0x20000000) 9221 #if defined(STM32F446xx) 9222 #define RCC_DCKCFGR_I2S1SRC ((uint32_t)0x06000000) 9223 #define RCC_DCKCFGR_I2S1SRC_0 ((uint32_t)0x02000000) 9224 #define RCC_DCKCFGR_I2S1SRC_1 ((uint32_t)0x04000000) 9225 #define RCC_DCKCFGR_I2S2SRC ((uint32_t)0x18000000) 9226 #define RCC_DCKCFGR_I2S2SRC_0 ((uint32_t)0x08000000) 9227 #define RCC_DCKCFGR_I2S2SRC_1 ((uint32_t)0x10000000) 9230 #define RCC_CKGATENR_AHB2APB1_CKEN ((uint32_t)0x00000001) 9231 #define RCC_CKGATENR_AHB2APB2_CKEN ((uint32_t)0x00000002) 9232 #define RCC_CKGATENR_CM4DBG_CKEN ((uint32_t)0x00000004) 9233 #define RCC_CKGATENR_SPARE_CKEN ((uint32_t)0x00000008) 9234 #define RCC_CKGATENR_SRAM_CKEN ((uint32_t)0x00000010) 9235 #define RCC_CKGATENR_FLITF_CKEN ((uint32_t)0x00000020) 9236 #define RCC_CKGATENR_RCC_CKEN ((uint32_t)0x00000040) 9239 #define RCC_DCKCFGR2_FMPI2C1SEL ((uint32_t)0x00C00000) 9240 #define RCC_DCKCFGR2_FMPI2C1SEL_0 ((uint32_t)0x00400000) 9241 #define RCC_DCKCFGR2_FMPI2C1SEL_1 ((uint32_t)0x00800000) 9242 #define RCC_DCKCFGR2_CECSEL ((uint32_t)0x04000000) 9243 #define RCC_DCKCFGR2_CK48MSEL ((uint32_t)0x08000000) 9244 #define RCC_DCKCFGR2_SDIOSEL ((uint32_t)0x10000000) 9245 #define RCC_DCKCFGR2_SPDIFRXSEL ((uint32_t)0x20000000) 9248 #if defined(STM32F410xx) 9249 #define RCC_DCKCFGR_I2SSRC ((uint32_t)0x06000000) 9250 #define RCC_DCKCFGR_I2SSRC_0 ((uint32_t)0x02000000) 9251 #define RCC_DCKCFGR_I2SSRC_1 ((uint32_t)0x04000000) 9254 #if defined(STM32F410xx) 9256 #define RCC_DCKCFGR2_FMPI2C1SEL ((uint32_t)0x00C00000) 9257 #define RCC_DCKCFGR2_FMPI2C1SEL_0 ((uint32_t)0x00400000) 9258 #define RCC_DCKCFGR2_FMPI2C1SEL_1 ((uint32_t)0x00800000) 9259 #define RCC_DCKCFGR2_LPTIM1SEL ((uint32_t)0xC0000000) 9260 #define RCC_DCKCFGR2_LPTIM1SEL_0 ((uint32_t)0x40000000) 9261 #define RCC_DCKCFGR2_LPTIM1SEL_1 ((uint32_t)0x80000000) 9269 #define RNG_CR_RNGEN ((uint32_t)0x00000004) 9270 #define RNG_CR_IE ((uint32_t)0x00000008) 9273 #define RNG_SR_DRDY ((uint32_t)0x00000001) 9274 #define RNG_SR_CECS ((uint32_t)0x00000002) 9275 #define RNG_SR_SECS ((uint32_t)0x00000004) 9276 #define RNG_SR_CEIS ((uint32_t)0x00000020) 9277 #define RNG_SR_SEIS ((uint32_t)0x00000040) 9285 #define RTC_TR_PM ((uint32_t)0x00400000) 9286 #define RTC_TR_HT ((uint32_t)0x00300000) 9287 #define RTC_TR_HT_0 ((uint32_t)0x00100000) 9288 #define RTC_TR_HT_1 ((uint32_t)0x00200000) 9289 #define RTC_TR_HU ((uint32_t)0x000F0000) 9290 #define RTC_TR_HU_0 ((uint32_t)0x00010000) 9291 #define RTC_TR_HU_1 ((uint32_t)0x00020000) 9292 #define RTC_TR_HU_2 ((uint32_t)0x00040000) 9293 #define RTC_TR_HU_3 ((uint32_t)0x00080000) 9294 #define RTC_TR_MNT ((uint32_t)0x00007000) 9295 #define RTC_TR_MNT_0 ((uint32_t)0x00001000) 9296 #define RTC_TR_MNT_1 ((uint32_t)0x00002000) 9297 #define RTC_TR_MNT_2 ((uint32_t)0x00004000) 9298 #define RTC_TR_MNU ((uint32_t)0x00000F00) 9299 #define RTC_TR_MNU_0 ((uint32_t)0x00000100) 9300 #define RTC_TR_MNU_1 ((uint32_t)0x00000200) 9301 #define RTC_TR_MNU_2 ((uint32_t)0x00000400) 9302 #define RTC_TR_MNU_3 ((uint32_t)0x00000800) 9303 #define RTC_TR_ST ((uint32_t)0x00000070) 9304 #define RTC_TR_ST_0 ((uint32_t)0x00000010) 9305 #define RTC_TR_ST_1 ((uint32_t)0x00000020) 9306 #define RTC_TR_ST_2 ((uint32_t)0x00000040) 9307 #define RTC_TR_SU ((uint32_t)0x0000000F) 9308 #define RTC_TR_SU_0 ((uint32_t)0x00000001) 9309 #define RTC_TR_SU_1 ((uint32_t)0x00000002) 9310 #define RTC_TR_SU_2 ((uint32_t)0x00000004) 9311 #define RTC_TR_SU_3 ((uint32_t)0x00000008) 9314 #define RTC_DR_YT ((uint32_t)0x00F00000) 9315 #define RTC_DR_YT_0 ((uint32_t)0x00100000) 9316 #define RTC_DR_YT_1 ((uint32_t)0x00200000) 9317 #define RTC_DR_YT_2 ((uint32_t)0x00400000) 9318 #define RTC_DR_YT_3 ((uint32_t)0x00800000) 9319 #define RTC_DR_YU ((uint32_t)0x000F0000) 9320 #define RTC_DR_YU_0 ((uint32_t)0x00010000) 9321 #define RTC_DR_YU_1 ((uint32_t)0x00020000) 9322 #define RTC_DR_YU_2 ((uint32_t)0x00040000) 9323 #define RTC_DR_YU_3 ((uint32_t)0x00080000) 9324 #define RTC_DR_WDU ((uint32_t)0x0000E000) 9325 #define RTC_DR_WDU_0 ((uint32_t)0x00002000) 9326 #define RTC_DR_WDU_1 ((uint32_t)0x00004000) 9327 #define RTC_DR_WDU_2 ((uint32_t)0x00008000) 9328 #define RTC_DR_MT ((uint32_t)0x00001000) 9329 #define RTC_DR_MU ((uint32_t)0x00000F00) 9330 #define RTC_DR_MU_0 ((uint32_t)0x00000100) 9331 #define RTC_DR_MU_1 ((uint32_t)0x00000200) 9332 #define RTC_DR_MU_2 ((uint32_t)0x00000400) 9333 #define RTC_DR_MU_3 ((uint32_t)0x00000800) 9334 #define RTC_DR_DT ((uint32_t)0x00000030) 9335 #define RTC_DR_DT_0 ((uint32_t)0x00000010) 9336 #define RTC_DR_DT_1 ((uint32_t)0x00000020) 9337 #define RTC_DR_DU ((uint32_t)0x0000000F) 9338 #define RTC_DR_DU_0 ((uint32_t)0x00000001) 9339 #define RTC_DR_DU_1 ((uint32_t)0x00000002) 9340 #define RTC_DR_DU_2 ((uint32_t)0x00000004) 9341 #define RTC_DR_DU_3 ((uint32_t)0x00000008) 9344 #define RTC_CR_COE ((uint32_t)0x00800000) 9345 #define RTC_CR_OSEL ((uint32_t)0x00600000) 9346 #define RTC_CR_OSEL_0 ((uint32_t)0x00200000) 9347 #define RTC_CR_OSEL_1 ((uint32_t)0x00400000) 9348 #define RTC_CR_POL ((uint32_t)0x00100000) 9349 #define RTC_CR_COSEL ((uint32_t)0x00080000) 9350 #define RTC_CR_BCK ((uint32_t)0x00040000) 9351 #define RTC_CR_SUB1H ((uint32_t)0x00020000) 9352 #define RTC_CR_ADD1H ((uint32_t)0x00010000) 9353 #define RTC_CR_TSIE ((uint32_t)0x00008000) 9354 #define RTC_CR_WUTIE ((uint32_t)0x00004000) 9355 #define RTC_CR_ALRBIE ((uint32_t)0x00002000) 9356 #define RTC_CR_ALRAIE ((uint32_t)0x00001000) 9357 #define RTC_CR_TSE ((uint32_t)0x00000800) 9358 #define RTC_CR_WUTE ((uint32_t)0x00000400) 9359 #define RTC_CR_ALRBE ((uint32_t)0x00000200) 9360 #define RTC_CR_ALRAE ((uint32_t)0x00000100) 9361 #define RTC_CR_DCE ((uint32_t)0x00000080) 9362 #define RTC_CR_FMT ((uint32_t)0x00000040) 9363 #define RTC_CR_BYPSHAD ((uint32_t)0x00000020) 9364 #define RTC_CR_REFCKON ((uint32_t)0x00000010) 9365 #define RTC_CR_TSEDGE ((uint32_t)0x00000008) 9366 #define RTC_CR_WUCKSEL ((uint32_t)0x00000007) 9367 #define RTC_CR_WUCKSEL_0 ((uint32_t)0x00000001) 9368 #define RTC_CR_WUCKSEL_1 ((uint32_t)0x00000002) 9369 #define RTC_CR_WUCKSEL_2 ((uint32_t)0x00000004) 9372 #define RTC_ISR_RECALPF ((uint32_t)0x00010000) 9373 #define RTC_ISR_TAMP1F ((uint32_t)0x00002000) 9374 #define RTC_ISR_TSOVF ((uint32_t)0x00001000) 9375 #define RTC_ISR_TSF ((uint32_t)0x00000800) 9376 #define RTC_ISR_WUTF ((uint32_t)0x00000400) 9377 #define RTC_ISR_ALRBF ((uint32_t)0x00000200) 9378 #define RTC_ISR_ALRAF ((uint32_t)0x00000100) 9379 #define RTC_ISR_INIT ((uint32_t)0x00000080) 9380 #define RTC_ISR_INITF ((uint32_t)0x00000040) 9381 #define RTC_ISR_RSF ((uint32_t)0x00000020) 9382 #define RTC_ISR_INITS ((uint32_t)0x00000010) 9383 #define RTC_ISR_SHPF ((uint32_t)0x00000008) 9384 #define RTC_ISR_WUTWF ((uint32_t)0x00000004) 9385 #define RTC_ISR_ALRBWF ((uint32_t)0x00000002) 9386 #define RTC_ISR_ALRAWF ((uint32_t)0x00000001) 9389 #define RTC_PRER_PREDIV_A ((uint32_t)0x007F0000) 9390 #define RTC_PRER_PREDIV_S ((uint32_t)0x00001FFF) 9393 #define RTC_WUTR_WUT ((uint32_t)0x0000FFFF) 9396 #define RTC_CALIBR_DCS ((uint32_t)0x00000080) 9397 #define RTC_CALIBR_DC ((uint32_t)0x0000001F) 9400 #define RTC_ALRMAR_MSK4 ((uint32_t)0x80000000) 9401 #define RTC_ALRMAR_WDSEL ((uint32_t)0x40000000) 9402 #define RTC_ALRMAR_DT ((uint32_t)0x30000000) 9403 #define RTC_ALRMAR_DT_0 ((uint32_t)0x10000000) 9404 #define RTC_ALRMAR_DT_1 ((uint32_t)0x20000000) 9405 #define RTC_ALRMAR_DU ((uint32_t)0x0F000000) 9406 #define RTC_ALRMAR_DU_0 ((uint32_t)0x01000000) 9407 #define RTC_ALRMAR_DU_1 ((uint32_t)0x02000000) 9408 #define RTC_ALRMAR_DU_2 ((uint32_t)0x04000000) 9409 #define RTC_ALRMAR_DU_3 ((uint32_t)0x08000000) 9410 #define RTC_ALRMAR_MSK3 ((uint32_t)0x00800000) 9411 #define RTC_ALRMAR_PM ((uint32_t)0x00400000) 9412 #define RTC_ALRMAR_HT ((uint32_t)0x00300000) 9413 #define RTC_ALRMAR_HT_0 ((uint32_t)0x00100000) 9414 #define RTC_ALRMAR_HT_1 ((uint32_t)0x00200000) 9415 #define RTC_ALRMAR_HU ((uint32_t)0x000F0000) 9416 #define RTC_ALRMAR_HU_0 ((uint32_t)0x00010000) 9417 #define RTC_ALRMAR_HU_1 ((uint32_t)0x00020000) 9418 #define RTC_ALRMAR_HU_2 ((uint32_t)0x00040000) 9419 #define RTC_ALRMAR_HU_3 ((uint32_t)0x00080000) 9420 #define RTC_ALRMAR_MSK2 ((uint32_t)0x00008000) 9421 #define RTC_ALRMAR_MNT ((uint32_t)0x00007000) 9422 #define RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000) 9423 #define RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000) 9424 #define RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000) 9425 #define RTC_ALRMAR_MNU ((uint32_t)0x00000F00) 9426 #define RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100) 9427 #define RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200) 9428 #define RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400) 9429 #define RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800) 9430 #define RTC_ALRMAR_MSK1 ((uint32_t)0x00000080) 9431 #define RTC_ALRMAR_ST ((uint32_t)0x00000070) 9432 #define RTC_ALRMAR_ST_0 ((uint32_t)0x00000010) 9433 #define RTC_ALRMAR_ST_1 ((uint32_t)0x00000020) 9434 #define RTC_ALRMAR_ST_2 ((uint32_t)0x00000040) 9435 #define RTC_ALRMAR_SU ((uint32_t)0x0000000F) 9436 #define RTC_ALRMAR_SU_0 ((uint32_t)0x00000001) 9437 #define RTC_ALRMAR_SU_1 ((uint32_t)0x00000002) 9438 #define RTC_ALRMAR_SU_2 ((uint32_t)0x00000004) 9439 #define RTC_ALRMAR_SU_3 ((uint32_t)0x00000008) 9442 #define RTC_ALRMBR_MSK4 ((uint32_t)0x80000000) 9443 #define RTC_ALRMBR_WDSEL ((uint32_t)0x40000000) 9444 #define RTC_ALRMBR_DT ((uint32_t)0x30000000) 9445 #define RTC_ALRMBR_DT_0 ((uint32_t)0x10000000) 9446 #define RTC_ALRMBR_DT_1 ((uint32_t)0x20000000) 9447 #define RTC_ALRMBR_DU ((uint32_t)0x0F000000) 9448 #define RTC_ALRMBR_DU_0 ((uint32_t)0x01000000) 9449 #define RTC_ALRMBR_DU_1 ((uint32_t)0x02000000) 9450 #define RTC_ALRMBR_DU_2 ((uint32_t)0x04000000) 9451 #define RTC_ALRMBR_DU_3 ((uint32_t)0x08000000) 9452 #define RTC_ALRMBR_MSK3 ((uint32_t)0x00800000) 9453 #define RTC_ALRMBR_PM ((uint32_t)0x00400000) 9454 #define RTC_ALRMBR_HT ((uint32_t)0x00300000) 9455 #define RTC_ALRMBR_HT_0 ((uint32_t)0x00100000) 9456 #define RTC_ALRMBR_HT_1 ((uint32_t)0x00200000) 9457 #define RTC_ALRMBR_HU ((uint32_t)0x000F0000) 9458 #define RTC_ALRMBR_HU_0 ((uint32_t)0x00010000) 9459 #define RTC_ALRMBR_HU_1 ((uint32_t)0x00020000) 9460 #define RTC_ALRMBR_HU_2 ((uint32_t)0x00040000) 9461 #define RTC_ALRMBR_HU_3 ((uint32_t)0x00080000) 9462 #define RTC_ALRMBR_MSK2 ((uint32_t)0x00008000) 9463 #define RTC_ALRMBR_MNT ((uint32_t)0x00007000) 9464 #define RTC_ALRMBR_MNT_0 ((uint32_t)0x00001000) 9465 #define RTC_ALRMBR_MNT_1 ((uint32_t)0x00002000) 9466 #define RTC_ALRMBR_MNT_2 ((uint32_t)0x00004000) 9467 #define RTC_ALRMBR_MNU ((uint32_t)0x00000F00) 9468 #define RTC_ALRMBR_MNU_0 ((uint32_t)0x00000100) 9469 #define RTC_ALRMBR_MNU_1 ((uint32_t)0x00000200) 9470 #define RTC_ALRMBR_MNU_2 ((uint32_t)0x00000400) 9471 #define RTC_ALRMBR_MNU_3 ((uint32_t)0x00000800) 9472 #define RTC_ALRMBR_MSK1 ((uint32_t)0x00000080) 9473 #define RTC_ALRMBR_ST ((uint32_t)0x00000070) 9474 #define RTC_ALRMBR_ST_0 ((uint32_t)0x00000010) 9475 #define RTC_ALRMBR_ST_1 ((uint32_t)0x00000020) 9476 #define RTC_ALRMBR_ST_2 ((uint32_t)0x00000040) 9477 #define RTC_ALRMBR_SU ((uint32_t)0x0000000F) 9478 #define RTC_ALRMBR_SU_0 ((uint32_t)0x00000001) 9479 #define RTC_ALRMBR_SU_1 ((uint32_t)0x00000002) 9480 #define RTC_ALRMBR_SU_2 ((uint32_t)0x00000004) 9481 #define RTC_ALRMBR_SU_3 ((uint32_t)0x00000008) 9484 #define RTC_WPR_KEY ((uint32_t)0x000000FF) 9487 #define RTC_SSR_SS ((uint32_t)0x0000FFFF) 9490 #define RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF) 9491 #define RTC_SHIFTR_ADD1S ((uint32_t)0x80000000) 9494 #define RTC_TSTR_PM ((uint32_t)0x00400000) 9495 #define RTC_TSTR_HT ((uint32_t)0x00300000) 9496 #define RTC_TSTR_HT_0 ((uint32_t)0x00100000) 9497 #define RTC_TSTR_HT_1 ((uint32_t)0x00200000) 9498 #define RTC_TSTR_HU ((uint32_t)0x000F0000) 9499 #define RTC_TSTR_HU_0 ((uint32_t)0x00010000) 9500 #define RTC_TSTR_HU_1 ((uint32_t)0x00020000) 9501 #define RTC_TSTR_HU_2 ((uint32_t)0x00040000) 9502 #define RTC_TSTR_HU_3 ((uint32_t)0x00080000) 9503 #define RTC_TSTR_MNT ((uint32_t)0x00007000) 9504 #define RTC_TSTR_MNT_0 ((uint32_t)0x00001000) 9505 #define RTC_TSTR_MNT_1 ((uint32_t)0x00002000) 9506 #define RTC_TSTR_MNT_2 ((uint32_t)0x00004000) 9507 #define RTC_TSTR_MNU ((uint32_t)0x00000F00) 9508 #define RTC_TSTR_MNU_0 ((uint32_t)0x00000100) 9509 #define RTC_TSTR_MNU_1 ((uint32_t)0x00000200) 9510 #define RTC_TSTR_MNU_2 ((uint32_t)0x00000400) 9511 #define RTC_TSTR_MNU_3 ((uint32_t)0x00000800) 9512 #define RTC_TSTR_ST ((uint32_t)0x00000070) 9513 #define RTC_TSTR_ST_0 ((uint32_t)0x00000010) 9514 #define RTC_TSTR_ST_1 ((uint32_t)0x00000020) 9515 #define RTC_TSTR_ST_2 ((uint32_t)0x00000040) 9516 #define RTC_TSTR_SU ((uint32_t)0x0000000F) 9517 #define RTC_TSTR_SU_0 ((uint32_t)0x00000001) 9518 #define RTC_TSTR_SU_1 ((uint32_t)0x00000002) 9519 #define RTC_TSTR_SU_2 ((uint32_t)0x00000004) 9520 #define RTC_TSTR_SU_3 ((uint32_t)0x00000008) 9523 #define RTC_TSDR_WDU ((uint32_t)0x0000E000) 9524 #define RTC_TSDR_WDU_0 ((uint32_t)0x00002000) 9525 #define RTC_TSDR_WDU_1 ((uint32_t)0x00004000) 9526 #define RTC_TSDR_WDU_2 ((uint32_t)0x00008000) 9527 #define RTC_TSDR_MT ((uint32_t)0x00001000) 9528 #define RTC_TSDR_MU ((uint32_t)0x00000F00) 9529 #define RTC_TSDR_MU_0 ((uint32_t)0x00000100) 9530 #define RTC_TSDR_MU_1 ((uint32_t)0x00000200) 9531 #define RTC_TSDR_MU_2 ((uint32_t)0x00000400) 9532 #define RTC_TSDR_MU_3 ((uint32_t)0x00000800) 9533 #define RTC_TSDR_DT ((uint32_t)0x00000030) 9534 #define RTC_TSDR_DT_0 ((uint32_t)0x00000010) 9535 #define RTC_TSDR_DT_1 ((uint32_t)0x00000020) 9536 #define RTC_TSDR_DU ((uint32_t)0x0000000F) 9537 #define RTC_TSDR_DU_0 ((uint32_t)0x00000001) 9538 #define RTC_TSDR_DU_1 ((uint32_t)0x00000002) 9539 #define RTC_TSDR_DU_2 ((uint32_t)0x00000004) 9540 #define RTC_TSDR_DU_3 ((uint32_t)0x00000008) 9543 #define RTC_TSSSR_SS ((uint32_t)0x0000FFFF) 9546 #define RTC_CALR_CALP ((uint32_t)0x00008000) 9547 #define RTC_CALR_CALW8 ((uint32_t)0x00004000) 9548 #define RTC_CALR_CALW16 ((uint32_t)0x00002000) 9549 #define RTC_CALR_CALM ((uint32_t)0x000001FF) 9550 #define RTC_CALR_CALM_0 ((uint32_t)0x00000001) 9551 #define RTC_CALR_CALM_1 ((uint32_t)0x00000002) 9552 #define RTC_CALR_CALM_2 ((uint32_t)0x00000004) 9553 #define RTC_CALR_CALM_3 ((uint32_t)0x00000008) 9554 #define RTC_CALR_CALM_4 ((uint32_t)0x00000010) 9555 #define RTC_CALR_CALM_5 ((uint32_t)0x00000020) 9556 #define RTC_CALR_CALM_6 ((uint32_t)0x00000040) 9557 #define RTC_CALR_CALM_7 ((uint32_t)0x00000080) 9558 #define RTC_CALR_CALM_8 ((uint32_t)0x00000100) 9561 #define RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000) 9562 #define RTC_TAFCR_TSINSEL ((uint32_t)0x00020000) 9563 #define RTC_TAFCR_TAMPINSEL ((uint32_t)0x00010000) 9564 #define RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000) 9565 #define RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000) 9566 #define RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000) 9567 #define RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000) 9568 #define RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800) 9569 #define RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800) 9570 #define RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000) 9571 #define RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700) 9572 #define RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100) 9573 #define RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200) 9574 #define RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400) 9575 #define RTC_TAFCR_TAMPTS ((uint32_t)0x00000080) 9576 #define RTC_TAFCR_TAMPIE ((uint32_t)0x00000004) 9577 #define RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002) 9578 #define RTC_TAFCR_TAMP1E ((uint32_t)0x00000001) 9581 #define RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000) 9582 #define RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000) 9583 #define RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000) 9584 #define RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000) 9585 #define RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000) 9586 #define RTC_ALRMASSR_SS ((uint32_t)0x00007FFF) 9589 #define RTC_ALRMBSSR_MASKSS ((uint32_t)0x0F000000) 9590 #define RTC_ALRMBSSR_MASKSS_0 ((uint32_t)0x01000000) 9591 #define RTC_ALRMBSSR_MASKSS_1 ((uint32_t)0x02000000) 9592 #define RTC_ALRMBSSR_MASKSS_2 ((uint32_t)0x04000000) 9593 #define RTC_ALRMBSSR_MASKSS_3 ((uint32_t)0x08000000) 9594 #define RTC_ALRMBSSR_SS ((uint32_t)0x00007FFF) 9597 #define RTC_BKP0R ((uint32_t)0xFFFFFFFF) 9600 #define RTC_BKP1R ((uint32_t)0xFFFFFFFF) 9603 #define RTC_BKP2R ((uint32_t)0xFFFFFFFF) 9606 #define RTC_BKP3R ((uint32_t)0xFFFFFFFF) 9609 #define RTC_BKP4R ((uint32_t)0xFFFFFFFF) 9612 #define RTC_BKP5R ((uint32_t)0xFFFFFFFF) 9615 #define RTC_BKP6R ((uint32_t)0xFFFFFFFF) 9618 #define RTC_BKP7R ((uint32_t)0xFFFFFFFF) 9621 #define RTC_BKP8R ((uint32_t)0xFFFFFFFF) 9624 #define RTC_BKP9R ((uint32_t)0xFFFFFFFF) 9627 #define RTC_BKP10R ((uint32_t)0xFFFFFFFF) 9630 #define RTC_BKP11R ((uint32_t)0xFFFFFFFF) 9633 #define RTC_BKP12R ((uint32_t)0xFFFFFFFF) 9636 #define RTC_BKP13R ((uint32_t)0xFFFFFFFF) 9639 #define RTC_BKP14R ((uint32_t)0xFFFFFFFF) 9642 #define RTC_BKP15R ((uint32_t)0xFFFFFFFF) 9645 #define RTC_BKP16R ((uint32_t)0xFFFFFFFF) 9648 #define RTC_BKP17R ((uint32_t)0xFFFFFFFF) 9651 #define RTC_BKP18R ((uint32_t)0xFFFFFFFF) 9654 #define RTC_BKP19R ((uint32_t)0xFFFFFFFF) 9662 #define SAI_GCR_SYNCIN ((uint32_t)0x00000003) 9663 #define SAI_GCR_SYNCIN_0 ((uint32_t)0x00000001) 9664 #define SAI_GCR_SYNCIN_1 ((uint32_t)0x00000002) 9666 #define SAI_GCR_SYNCOUT ((uint32_t)0x00000030) 9667 #define SAI_GCR_SYNCOUT_0 ((uint32_t)0x00000010) 9668 #define SAI_GCR_SYNCOUT_1 ((uint32_t)0x00000020) 9671 #define SAI_xCR1_MODE ((uint32_t)0x00000003) 9672 #define SAI_xCR1_MODE_0 ((uint32_t)0x00000001) 9673 #define SAI_xCR1_MODE_1 ((uint32_t)0x00000002) 9675 #define SAI_xCR1_PRTCFG ((uint32_t)0x0000000C) 9676 #define SAI_xCR1_PRTCFG_0 ((uint32_t)0x00000004) 9677 #define SAI_xCR1_PRTCFG_1 ((uint32_t)0x00000008) 9679 #define SAI_xCR1_DS ((uint32_t)0x000000E0) 9680 #define SAI_xCR1_DS_0 ((uint32_t)0x00000020) 9681 #define SAI_xCR1_DS_1 ((uint32_t)0x00000040) 9682 #define SAI_xCR1_DS_2 ((uint32_t)0x00000080) 9684 #define SAI_xCR1_LSBFIRST ((uint32_t)0x00000100) 9685 #define SAI_xCR1_CKSTR ((uint32_t)0x00000200) 9687 #define SAI_xCR1_SYNCEN ((uint32_t)0x00000C00) 9688 #define SAI_xCR1_SYNCEN_0 ((uint32_t)0x00000400) 9689 #define SAI_xCR1_SYNCEN_1 ((uint32_t)0x00000800) 9691 #define SAI_xCR1_MONO ((uint32_t)0x00001000) 9692 #define SAI_xCR1_OUTDRIV ((uint32_t)0x00002000) 9693 #define SAI_xCR1_SAIEN ((uint32_t)0x00010000) 9694 #define SAI_xCR1_DMAEN ((uint32_t)0x00020000) 9695 #define SAI_xCR1_NODIV ((uint32_t)0x00080000) 9697 #define SAI_xCR1_MCKDIV ((uint32_t)0x00780000) 9698 #define SAI_xCR1_MCKDIV_0 ((uint32_t)0x00080000) 9699 #define SAI_xCR1_MCKDIV_1 ((uint32_t)0x00100000) 9700 #define SAI_xCR1_MCKDIV_2 ((uint32_t)0x00200000) 9701 #define SAI_xCR1_MCKDIV_3 ((uint32_t)0x00400000) 9704 #define SAI_xCR2_FTH ((uint32_t)0x00000003) 9705 #define SAI_xCR2_FTH_0 ((uint32_t)0x00000001) 9706 #define SAI_xCR2_FTH_1 ((uint32_t)0x00000002) 9708 #define SAI_xCR2_FFLUSH ((uint32_t)0x00000008) 9709 #define SAI_xCR2_TRIS ((uint32_t)0x00000010) 9710 #define SAI_xCR2_MUTE ((uint32_t)0x00000020) 9711 #define SAI_xCR2_MUTEVAL ((uint32_t)0x00000040) 9713 #define SAI_xCR2_MUTECNT ((uint32_t)0x00001F80) 9714 #define SAI_xCR2_MUTECNT_0 ((uint32_t)0x00000080) 9715 #define SAI_xCR2_MUTECNT_1 ((uint32_t)0x00000100) 9716 #define SAI_xCR2_MUTECNT_2 ((uint32_t)0x00000200) 9717 #define SAI_xCR2_MUTECNT_3 ((uint32_t)0x00000400) 9718 #define SAI_xCR2_MUTECNT_4 ((uint32_t)0x00000800) 9719 #define SAI_xCR2_MUTECNT_5 ((uint32_t)0x00001000) 9721 #define SAI_xCR2_CPL ((uint32_t)0x00080000) 9723 #define SAI_xCR2_COMP ((uint32_t)0x0000C000) 9724 #define SAI_xCR2_COMP_0 ((uint32_t)0x00004000) 9725 #define SAI_xCR2_COMP_1 ((uint32_t)0x00008000) 9728 #define SAI_xFRCR_FRL ((uint32_t)0x000000FF) 9729 #define SAI_xFRCR_FRL_0 ((uint32_t)0x00000001) 9730 #define SAI_xFRCR_FRL_1 ((uint32_t)0x00000002) 9731 #define SAI_xFRCR_FRL_2 ((uint32_t)0x00000004) 9732 #define SAI_xFRCR_FRL_3 ((uint32_t)0x00000008) 9733 #define SAI_xFRCR_FRL_4 ((uint32_t)0x00000010) 9734 #define SAI_xFRCR_FRL_5 ((uint32_t)0x00000020) 9735 #define SAI_xFRCR_FRL_6 ((uint32_t)0x00000040) 9736 #define SAI_xFRCR_FRL_7 ((uint32_t)0x00000080) 9738 #define SAI_xFRCR_FSALL ((uint32_t)0x00007F00) 9739 #define SAI_xFRCR_FSALL_0 ((uint32_t)0x00000100) 9740 #define SAI_xFRCR_FSALL_1 ((uint32_t)0x00000200) 9741 #define SAI_xFRCR_FSALL_2 ((uint32_t)0x00000400) 9742 #define SAI_xFRCR_FSALL_3 ((uint32_t)0x00000800) 9743 #define SAI_xFRCR_FSALL_4 ((uint32_t)0x00001000) 9744 #define SAI_xFRCR_FSALL_5 ((uint32_t)0x00002000) 9745 #define SAI_xFRCR_FSALL_6 ((uint32_t)0x00004000) 9747 #define SAI_xFRCR_FSDEF ((uint32_t)0x00010000) 9748 #define SAI_xFRCR_FSPO ((uint32_t)0x00020000) 9749 #define SAI_xFRCR_FSOFF ((uint32_t)0x00040000) 9752 #define SAI_xSLOTR_FBOFF ((uint32_t)0x0000001F) 9753 #define SAI_xSLOTR_FBOFF_0 ((uint32_t)0x00000001) 9754 #define SAI_xSLOTR_FBOFF_1 ((uint32_t)0x00000002) 9755 #define SAI_xSLOTR_FBOFF_2 ((uint32_t)0x00000004) 9756 #define SAI_xSLOTR_FBOFF_3 ((uint32_t)0x00000008) 9757 #define SAI_xSLOTR_FBOFF_4 ((uint32_t)0x00000010) 9759 #define SAI_xSLOTR_SLOTSZ ((uint32_t)0x000000C0) 9760 #define SAI_xSLOTR_SLOTSZ_0 ((uint32_t)0x00000040) 9761 #define SAI_xSLOTR_SLOTSZ_1 ((uint32_t)0x00000080) 9763 #define SAI_xSLOTR_NBSLOT ((uint32_t)0x00000F00) 9764 #define SAI_xSLOTR_NBSLOT_0 ((uint32_t)0x00000100) 9765 #define SAI_xSLOTR_NBSLOT_1 ((uint32_t)0x00000200) 9766 #define SAI_xSLOTR_NBSLOT_2 ((uint32_t)0x00000400) 9767 #define SAI_xSLOTR_NBSLOT_3 ((uint32_t)0x00000800) 9769 #define SAI_xSLOTR_SLOTEN ((uint32_t)0xFFFF0000) 9772 #define SAI_xIMR_OVRUDRIE ((uint32_t)0x00000001) 9773 #define SAI_xIMR_MUTEDETIE ((uint32_t)0x00000002) 9774 #define SAI_xIMR_WCKCFGIE ((uint32_t)0x00000004) 9775 #define SAI_xIMR_FREQIE ((uint32_t)0x00000008) 9776 #define SAI_xIMR_CNRDYIE ((uint32_t)0x00000010) 9777 #define SAI_xIMR_AFSDETIE ((uint32_t)0x00000020) 9778 #define SAI_xIMR_LFSDETIE ((uint32_t)0x00000040) 9781 #define SAI_xSR_OVRUDR ((uint32_t)0x00000001) 9782 #define SAI_xSR_MUTEDET ((uint32_t)0x00000002) 9783 #define SAI_xSR_WCKCFG ((uint32_t)0x00000004) 9784 #define SAI_xSR_FREQ ((uint32_t)0x00000008) 9785 #define SAI_xSR_CNRDY ((uint32_t)0x00000010) 9786 #define SAI_xSR_AFSDET ((uint32_t)0x00000020) 9787 #define SAI_xSR_LFSDET ((uint32_t)0x00000040) 9789 #define SAI_xSR_FLVL ((uint32_t)0x00070000) 9790 #define SAI_xSR_FLVL_0 ((uint32_t)0x00010000) 9791 #define SAI_xSR_FLVL_1 ((uint32_t)0x00020000) 9792 #define SAI_xSR_FLVL_2 ((uint32_t)0x00030000) 9795 #define SAI_xCLRFR_COVRUDR ((uint32_t)0x00000001) 9796 #define SAI_xCLRFR_CMUTEDET ((uint32_t)0x00000002) 9797 #define SAI_xCLRFR_CWCKCFG ((uint32_t)0x00000004) 9798 #define SAI_xCLRFR_CFREQ ((uint32_t)0x00000008) 9799 #define SAI_xCLRFR_CCNRDY ((uint32_t)0x00000010) 9800 #define SAI_xCLRFR_CAFSDET ((uint32_t)0x00000020) 9801 #define SAI_xCLRFR_CLFSDET ((uint32_t)0x00000040) 9804 #define SAI_xDR_DATA ((uint32_t)0xFFFFFFFF) 9806 #if defined(STM32F446xx) 9813 #define SPDIFRX_CR_SPDIFEN ((uint32_t)0x00000003) 9814 #define SPDIFRX_CR_RXDMAEN ((uint32_t)0x00000004) 9815 #define SPDIFRX_CR_RXSTEO ((uint32_t)0x00000008) 9816 #define SPDIFRX_CR_DRFMT ((uint32_t)0x00000030) 9817 #define SPDIFRX_CR_PMSK ((uint32_t)0x00000040) 9818 #define SPDIFRX_CR_VMSK ((uint32_t)0x00000080) 9819 #define SPDIFRX_CR_CUMSK ((uint32_t)0x00000100) 9820 #define SPDIFRX_CR_PTMSK ((uint32_t)0x00000200) 9821 #define SPDIFRX_CR_CBDMAEN ((uint32_t)0x00000400) 9822 #define SPDIFRX_CR_CHSEL ((uint32_t)0x00000800) 9823 #define SPDIFRX_CR_NBTR ((uint32_t)0x00003000) 9824 #define SPDIFRX_CR_WFA ((uint32_t)0x00004000) 9825 #define SPDIFRX_CR_INSEL ((uint32_t)0x00070000) 9828 #define SPDIFRX_IMR_RXNEIE ((uint32_t)0x00000001) 9829 #define SPDIFRX_IMR_CSRNEIE ((uint32_t)0x00000002) 9830 #define SPDIFRX_IMR_PERRIE ((uint32_t)0x00000004) 9831 #define SPDIFRX_IMR_OVRIE ((uint32_t)0x00000008) 9832 #define SPDIFRX_IMR_SBLKIE ((uint32_t)0x00000010) 9833 #define SPDIFRX_IMR_SYNCDIE ((uint32_t)0x00000020) 9834 #define SPDIFRX_IMR_IFEIE ((uint32_t)0x00000040) 9837 #define SPDIFRX_SR_RXNE ((uint32_t)0x00000001) 9838 #define SPDIFRX_SR_CSRNE ((uint32_t)0x00000002) 9839 #define SPDIFRX_SR_PERR ((uint32_t)0x00000004) 9840 #define SPDIFRX_SR_OVR ((uint32_t)0x00000008) 9841 #define SPDIFRX_SR_SBD ((uint32_t)0x00000010) 9842 #define SPDIFRX_SR_SYNCD ((uint32_t)0x00000020) 9843 #define SPDIFRX_SR_FERR ((uint32_t)0x00000040) 9844 #define SPDIFRX_SR_SERR ((uint32_t)0x00000080) 9845 #define SPDIFRX_SR_TERR ((uint32_t)0x00000100) 9846 #define SPDIFRX_SR_WIDTH5 ((uint32_t)0x7FFF0000) 9849 #define SPDIFRX_IFCR_PERRCF ((uint32_t)0x00000004) 9850 #define SPDIFRX_IFCR_OVRCF ((uint32_t)0x00000008) 9851 #define SPDIFRX_IFCR_SBDCF ((uint32_t)0x00000010) 9852 #define SPDIFRX_IFCR_SYNCDCF ((uint32_t)0x00000020) 9855 #define SPDIFRX_DR0_DR ((uint32_t)0x00FFFFFF) 9856 #define SPDIFRX_DR0_PE ((uint32_t)0x01000000) 9857 #define SPDIFRX_DR0_V ((uint32_t)0x02000000) 9858 #define SPDIFRX_DR0_U ((uint32_t)0x04000000) 9859 #define SPDIFRX_DR0_C ((uint32_t)0x08000000) 9860 #define SPDIFRX_DR0_PT ((uint32_t)0x30000000) 9863 #define SPDIFRX_DR1_DR ((uint32_t)0xFFFFFF00) 9864 #define SPDIFRX_DR1_PT ((uint32_t)0x00000030) 9865 #define SPDIFRX_DR1_C ((uint32_t)0x00000008) 9866 #define SPDIFRX_DR1_U ((uint32_t)0x00000004) 9867 #define SPDIFRX_DR1_V ((uint32_t)0x00000002) 9868 #define SPDIFRX_DR1_PE ((uint32_t)0x00000001) 9871 #define SPDIFRX_DR1_DRNL1 ((uint32_t)0xFFFF0000) 9872 #define SPDIFRX_DR1_DRNL2 ((uint32_t)0x0000FFFF) 9875 #define SPDIFRX_CSR_USR ((uint32_t)0x0000FFFF) 9876 #define SPDIFRX_CSR_CS ((uint32_t)0x00FF0000) 9877 #define SPDIFRX_CSR_SOB ((uint32_t)0x01000000) 9880 #define SPDIFRX_DIR_THI ((uint32_t)0x000013FF) 9881 #define SPDIFRX_DIR_TLO ((uint32_t)0x1FFF0000) 9890 #define SDIO_POWER_PWRCTRL ((uint8_t)0x03) 9891 #define SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) 9892 #define SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) 9895 #define SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) 9896 #define SDIO_CLKCR_CLKEN ((uint16_t)0x0100) 9897 #define SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) 9898 #define SDIO_CLKCR_BYPASS ((uint16_t)0x0400) 9900 #define SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) 9901 #define SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) 9902 #define SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) 9904 #define SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) 9905 #define SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) 9908 #define SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) 9911 #define SDIO_CMD_CMDINDEX ((uint16_t)0x003F) 9913 #define SDIO_CMD_WAITRESP ((uint16_t)0x00C0) 9914 #define SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) 9915 #define SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) 9917 #define SDIO_CMD_WAITINT ((uint16_t)0x0100) 9918 #define SDIO_CMD_WAITPEND ((uint16_t)0x0200) 9919 #define SDIO_CMD_CPSMEN ((uint16_t)0x0400) 9920 #define SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) 9921 #define SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) 9922 #define SDIO_CMD_NIEN ((uint16_t)0x2000) 9923 #define SDIO_CMD_CEATACMD ((uint16_t)0x4000) 9926 #define SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) 9929 #define SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) 9932 #define SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) 9935 #define SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) 9938 #define SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) 9941 #define SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) 9944 #define SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) 9947 #define SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) 9950 #define SDIO_DCTRL_DTEN ((uint16_t)0x0001) 9951 #define SDIO_DCTRL_DTDIR ((uint16_t)0x0002) 9952 #define SDIO_DCTRL_DTMODE ((uint16_t)0x0004) 9953 #define SDIO_DCTRL_DMAEN ((uint16_t)0x0008) 9955 #define SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) 9956 #define SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) 9957 #define SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) 9958 #define SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) 9959 #define SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) 9961 #define SDIO_DCTRL_RWSTART ((uint16_t)0x0100) 9962 #define SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) 9963 #define SDIO_DCTRL_RWMOD ((uint16_t)0x0400) 9964 #define SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) 9967 #define SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) 9970 #define SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) 9971 #define SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) 9972 #define SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) 9973 #define SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) 9974 #define SDIO_STA_TXUNDERR ((uint32_t)0x00000010) 9975 #define SDIO_STA_RXOVERR ((uint32_t)0x00000020) 9976 #define SDIO_STA_CMDREND ((uint32_t)0x00000040) 9977 #define SDIO_STA_CMDSENT ((uint32_t)0x00000080) 9978 #define SDIO_STA_DATAEND ((uint32_t)0x00000100) 9979 #define SDIO_STA_STBITERR ((uint32_t)0x00000200) 9980 #define SDIO_STA_DBCKEND ((uint32_t)0x00000400) 9981 #define SDIO_STA_CMDACT ((uint32_t)0x00000800) 9982 #define SDIO_STA_TXACT ((uint32_t)0x00001000) 9983 #define SDIO_STA_RXACT ((uint32_t)0x00002000) 9984 #define SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) 9985 #define SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) 9986 #define SDIO_STA_TXFIFOF ((uint32_t)0x00010000) 9987 #define SDIO_STA_RXFIFOF ((uint32_t)0x00020000) 9988 #define SDIO_STA_TXFIFOE ((uint32_t)0x00040000) 9989 #define SDIO_STA_RXFIFOE ((uint32_t)0x00080000) 9990 #define SDIO_STA_TXDAVL ((uint32_t)0x00100000) 9991 #define SDIO_STA_RXDAVL ((uint32_t)0x00200000) 9992 #define SDIO_STA_SDIOIT ((uint32_t)0x00400000) 9993 #define SDIO_STA_CEATAEND ((uint32_t)0x00800000) 9996 #define SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) 9997 #define SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) 9998 #define SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) 9999 #define SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) 10000 #define SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) 10001 #define SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) 10002 #define SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) 10003 #define SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) 10004 #define SDIO_ICR_DATAENDC ((uint32_t)0x00000100) 10005 #define SDIO_ICR_STBITERRC ((uint32_t)0x00000200) 10006 #define SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) 10007 #define SDIO_ICR_SDIOITC ((uint32_t)0x00400000) 10008 #define SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) 10011 #define SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) 10012 #define SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) 10013 #define SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) 10014 #define SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) 10015 #define SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) 10016 #define SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) 10017 #define SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) 10018 #define SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) 10019 #define SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) 10020 #define SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) 10021 #define SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) 10022 #define SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) 10023 #define SDIO_MASK_TXACTIE ((uint32_t)0x00001000) 10024 #define SDIO_MASK_RXACTIE ((uint32_t)0x00002000) 10025 #define SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) 10026 #define SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) 10027 #define SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) 10028 #define SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) 10029 #define SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) 10030 #define SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) 10031 #define SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) 10032 #define SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) 10033 #define SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) 10034 #define SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) 10037 #define SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) 10040 #define SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) 10048 #define SPI_CR1_CPHA ((uint16_t)0x0001) 10049 #define SPI_CR1_CPOL ((uint16_t)0x0002) 10050 #define SPI_CR1_MSTR ((uint16_t)0x0004) 10052 #define SPI_CR1_BR ((uint16_t)0x0038) 10053 #define SPI_CR1_BR_0 ((uint16_t)0x0008) 10054 #define SPI_CR1_BR_1 ((uint16_t)0x0010) 10055 #define SPI_CR1_BR_2 ((uint16_t)0x0020) 10057 #define SPI_CR1_SPE ((uint16_t)0x0040) 10058 #define SPI_CR1_LSBFIRST ((uint16_t)0x0080) 10059 #define SPI_CR1_SSI ((uint16_t)0x0100) 10060 #define SPI_CR1_SSM ((uint16_t)0x0200) 10061 #define SPI_CR1_RXONLY ((uint16_t)0x0400) 10062 #define SPI_CR1_DFF ((uint16_t)0x0800) 10063 #define SPI_CR1_CRCNEXT ((uint16_t)0x1000) 10064 #define SPI_CR1_CRCEN ((uint16_t)0x2000) 10065 #define SPI_CR1_BIDIOE ((uint16_t)0x4000) 10066 #define SPI_CR1_BIDIMODE ((uint16_t)0x8000) 10069 #define SPI_CR2_RXDMAEN ((uint8_t)0x01) 10070 #define SPI_CR2_TXDMAEN ((uint8_t)0x02) 10071 #define SPI_CR2_SSOE ((uint8_t)0x04) 10072 #define SPI_CR2_ERRIE ((uint8_t)0x20) 10073 #define SPI_CR2_RXNEIE ((uint8_t)0x40) 10074 #define SPI_CR2_TXEIE ((uint8_t)0x80) 10077 #define SPI_SR_RXNE ((uint8_t)0x01) 10078 #define SPI_SR_TXE ((uint8_t)0x02) 10079 #define SPI_SR_CHSIDE ((uint8_t)0x04) 10080 #define SPI_SR_UDR ((uint8_t)0x08) 10081 #define SPI_SR_CRCERR ((uint8_t)0x10) 10082 #define SPI_SR_MODF ((uint8_t)0x20) 10083 #define SPI_SR_OVR ((uint8_t)0x40) 10084 #define SPI_SR_BSY ((uint8_t)0x80) 10087 #define SPI_DR_DR ((uint16_t)0xFFFF) 10090 #define SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) 10093 #define SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) 10096 #define SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) 10099 #define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) 10101 #define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) 10102 #define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) 10103 #define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) 10105 #define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) 10107 #define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) 10108 #define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) 10109 #define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) 10111 #define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) 10113 #define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) 10114 #define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) 10115 #define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) 10117 #define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) 10118 #define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) 10121 #define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) 10122 #define SPI_I2SPR_ODD ((uint16_t)0x0100) 10123 #define SPI_I2SPR_MCKOE ((uint16_t)0x0200) 10131 #define SYSCFG_MEMRMP_MEM_MODE ((uint32_t)0x00000007) 10132 #define SYSCFG_MEMRMP_MEM_MODE_0 ((uint32_t)0x00000001) 10133 #define SYSCFG_MEMRMP_MEM_MODE_1 ((uint32_t)0x00000002) 10134 #define SYSCFG_MEMRMP_MEM_MODE_2 ((uint32_t)0x00000004) 10136 #define SYSCFG_MEMRMP_FB_MODE ((uint32_t)0x00000100) 10138 #define SYSCFG_MEMRMP_SWP_FMC ((uint32_t)0x00000C00) 10139 #define SYSCFG_MEMRMP_SWP_FMC_0 ((uint32_t)0x00000400) 10140 #define SYSCFG_MEMRMP_SWP_FMC_1 ((uint32_t)0x00000800) 10144 #define SYSCFG_PMC_ADCxDC2 ((uint32_t)0x00070000) 10145 #define SYSCFG_PMC_ADC1DC2 ((uint32_t)0x00010000) 10146 #define SYSCFG_PMC_ADC2DC2 ((uint32_t)0x00020000) 10147 #define SYSCFG_PMC_ADC3DC2 ((uint32_t)0x00040000) 10149 #define SYSCFG_PMC_MII_RMII_SEL ((uint32_t)0x00800000) 10151 #define SYSCFG_PMC_MII_RMII SYSCFG_PMC_MII_RMII_SEL 10154 #define SYSCFG_EXTICR1_EXTI0 ((uint16_t)0x000F) 10155 #define SYSCFG_EXTICR1_EXTI1 ((uint16_t)0x00F0) 10156 #define SYSCFG_EXTICR1_EXTI2 ((uint16_t)0x0F00) 10157 #define SYSCFG_EXTICR1_EXTI3 ((uint16_t)0xF000) 10161 #define SYSCFG_EXTICR1_EXTI0_PA ((uint16_t)0x0000) 10162 #define SYSCFG_EXTICR1_EXTI0_PB ((uint16_t)0x0001) 10163 #define SYSCFG_EXTICR1_EXTI0_PC ((uint16_t)0x0002) 10164 #define SYSCFG_EXTICR1_EXTI0_PD ((uint16_t)0x0003) 10165 #define SYSCFG_EXTICR1_EXTI0_PE ((uint16_t)0x0004) 10166 #define SYSCFG_EXTICR1_EXTI0_PF ((uint16_t)0x0005) 10167 #define SYSCFG_EXTICR1_EXTI0_PG ((uint16_t)0x0006) 10168 #define SYSCFG_EXTICR1_EXTI0_PH ((uint16_t)0x0007) 10169 #define SYSCFG_EXTICR1_EXTI0_PI ((uint16_t)0x0008) 10170 #define SYSCFG_EXTICR1_EXTI0_PJ ((uint16_t)0x0009) 10171 #define SYSCFG_EXTICR1_EXTI0_PK ((uint16_t)0x000A) 10176 #define SYSCFG_EXTICR1_EXTI1_PA ((uint16_t)0x0000) 10177 #define SYSCFG_EXTICR1_EXTI1_PB ((uint16_t)0x0010) 10178 #define SYSCFG_EXTICR1_EXTI1_PC ((uint16_t)0x0020) 10179 #define SYSCFG_EXTICR1_EXTI1_PD ((uint16_t)0x0030) 10180 #define SYSCFG_EXTICR1_EXTI1_PE ((uint16_t)0x0040) 10181 #define SYSCFG_EXTICR1_EXTI1_PF ((uint16_t)0x0050) 10182 #define SYSCFG_EXTICR1_EXTI1_PG ((uint16_t)0x0060) 10183 #define SYSCFG_EXTICR1_EXTI1_PH ((uint16_t)0x0070) 10184 #define SYSCFG_EXTICR1_EXTI1_PI ((uint16_t)0x0080) 10185 #define SYSCFG_EXTICR1_EXTI1_PJ ((uint16_t)0x0090) 10186 #define SYSCFG_EXTICR1_EXTI1_PK ((uint16_t)0x00A0) 10191 #define SYSCFG_EXTICR1_EXTI2_PA ((uint16_t)0x0000) 10192 #define SYSCFG_EXTICR1_EXTI2_PB ((uint16_t)0x0100) 10193 #define SYSCFG_EXTICR1_EXTI2_PC ((uint16_t)0x0200) 10194 #define SYSCFG_EXTICR1_EXTI2_PD ((uint16_t)0x0300) 10195 #define SYSCFG_EXTICR1_EXTI2_PE ((uint16_t)0x0400) 10196 #define SYSCFG_EXTICR1_EXTI2_PF ((uint16_t)0x0500) 10197 #define SYSCFG_EXTICR1_EXTI2_PG ((uint16_t)0x0600) 10198 #define SYSCFG_EXTICR1_EXTI2_PH ((uint16_t)0x0700) 10199 #define SYSCFG_EXTICR1_EXTI2_PI ((uint16_t)0x0800) 10200 #define SYSCFG_EXTICR1_EXTI2_PJ ((uint16_t)0x0900) 10201 #define SYSCFG_EXTICR1_EXTI2_PK ((uint16_t)0x0A00) 10206 #define SYSCFG_EXTICR1_EXTI3_PA ((uint16_t)0x0000) 10207 #define SYSCFG_EXTICR1_EXTI3_PB ((uint16_t)0x1000) 10208 #define SYSCFG_EXTICR1_EXTI3_PC ((uint16_t)0x2000) 10209 #define SYSCFG_EXTICR1_EXTI3_PD ((uint16_t)0x3000) 10210 #define SYSCFG_EXTICR1_EXTI3_PE ((uint16_t)0x4000) 10211 #define SYSCFG_EXTICR1_EXTI3_PF ((uint16_t)0x5000) 10212 #define SYSCFG_EXTICR1_EXTI3_PG ((uint16_t)0x6000) 10213 #define SYSCFG_EXTICR1_EXTI3_PH ((uint16_t)0x7000) 10214 #define SYSCFG_EXTICR1_EXTI3_PI ((uint16_t)0x8000) 10215 #define SYSCFG_EXTICR1_EXTI3_PJ ((uint16_t)0x9000) 10216 #define SYSCFG_EXTICR1_EXTI3_PK ((uint16_t)0xA000) 10219 #define SYSCFG_EXTICR2_EXTI4 ((uint16_t)0x000F) 10220 #define SYSCFG_EXTICR2_EXTI5 ((uint16_t)0x00F0) 10221 #define SYSCFG_EXTICR2_EXTI6 ((uint16_t)0x0F00) 10222 #define SYSCFG_EXTICR2_EXTI7 ((uint16_t)0xF000) 10226 #define SYSCFG_EXTICR2_EXTI4_PA ((uint16_t)0x0000) 10227 #define SYSCFG_EXTICR2_EXTI4_PB ((uint16_t)0x0001) 10228 #define SYSCFG_EXTICR2_EXTI4_PC ((uint16_t)0x0002) 10229 #define SYSCFG_EXTICR2_EXTI4_PD ((uint16_t)0x0003) 10230 #define SYSCFG_EXTICR2_EXTI4_PE ((uint16_t)0x0004) 10231 #define SYSCFG_EXTICR2_EXTI4_PF ((uint16_t)0x0005) 10232 #define SYSCFG_EXTICR2_EXTI4_PG ((uint16_t)0x0006) 10233 #define SYSCFG_EXTICR2_EXTI4_PH ((uint16_t)0x0007) 10234 #define SYSCFG_EXTICR2_EXTI4_PI ((uint16_t)0x0008) 10235 #define SYSCFG_EXTICR2_EXTI4_PJ ((uint16_t)0x0009) 10236 #define SYSCFG_EXTICR2_EXTI4_PK ((uint16_t)0x000A) 10241 #define SYSCFG_EXTICR2_EXTI5_PA ((uint16_t)0x0000) 10242 #define SYSCFG_EXTICR2_EXTI5_PB ((uint16_t)0x0010) 10243 #define SYSCFG_EXTICR2_EXTI5_PC ((uint16_t)0x0020) 10244 #define SYSCFG_EXTICR2_EXTI5_PD ((uint16_t)0x0030) 10245 #define SYSCFG_EXTICR2_EXTI5_PE ((uint16_t)0x0040) 10246 #define SYSCFG_EXTICR2_EXTI5_PF ((uint16_t)0x0050) 10247 #define SYSCFG_EXTICR2_EXTI5_PG ((uint16_t)0x0060) 10248 #define SYSCFG_EXTICR2_EXTI5_PH ((uint16_t)0x0070) 10249 #define SYSCFG_EXTICR2_EXTI5_PI ((uint16_t)0x0080) 10250 #define SYSCFG_EXTICR2_EXTI5_PJ ((uint16_t)0x0090) 10251 #define SYSCFG_EXTICR2_EXTI5_PK ((uint16_t)0x00A0) 10256 #define SYSCFG_EXTICR2_EXTI6_PA ((uint16_t)0x0000) 10257 #define SYSCFG_EXTICR2_EXTI6_PB ((uint16_t)0x0100) 10258 #define SYSCFG_EXTICR2_EXTI6_PC ((uint16_t)0x0200) 10259 #define SYSCFG_EXTICR2_EXTI6_PD ((uint16_t)0x0300) 10260 #define SYSCFG_EXTICR2_EXTI6_PE ((uint16_t)0x0400) 10261 #define SYSCFG_EXTICR2_EXTI6_PF ((uint16_t)0x0500) 10262 #define SYSCFG_EXTICR2_EXTI6_PG ((uint16_t)0x0600) 10263 #define SYSCFG_EXTICR2_EXTI6_PH ((uint16_t)0x0700) 10264 #define SYSCFG_EXTICR2_EXTI6_PI ((uint16_t)0x0800) 10265 #define SYSCFG_EXTICR2_EXTI6_PJ ((uint16_t)0x0900) 10266 #define SYSCFG_EXTICR2_EXTI6_PK ((uint16_t)0x0A00) 10271 #define SYSCFG_EXTICR2_EXTI7_PA ((uint16_t)0x0000) 10272 #define SYSCFG_EXTICR2_EXTI7_PB ((uint16_t)0x1000) 10273 #define SYSCFG_EXTICR2_EXTI7_PC ((uint16_t)0x2000) 10274 #define SYSCFG_EXTICR2_EXTI7_PD ((uint16_t)0x3000) 10275 #define SYSCFG_EXTICR2_EXTI7_PE ((uint16_t)0x4000) 10276 #define SYSCFG_EXTICR2_EXTI7_PF ((uint16_t)0x5000) 10277 #define SYSCFG_EXTICR2_EXTI7_PG ((uint16_t)0x6000) 10278 #define SYSCFG_EXTICR2_EXTI7_PH ((uint16_t)0x7000) 10279 #define SYSCFG_EXTICR2_EXTI7_PI ((uint16_t)0x8000) 10280 #define SYSCFG_EXTICR2_EXTI7_PJ ((uint16_t)0x9000) 10281 #define SYSCFG_EXTICR2_EXTI7_PK ((uint16_t)0xA000) 10284 #define SYSCFG_EXTICR3_EXTI8 ((uint16_t)0x000F) 10285 #define SYSCFG_EXTICR3_EXTI9 ((uint16_t)0x00F0) 10286 #define SYSCFG_EXTICR3_EXTI10 ((uint16_t)0x0F00) 10287 #define SYSCFG_EXTICR3_EXTI11 ((uint16_t)0xF000) 10292 #define SYSCFG_EXTICR3_EXTI8_PA ((uint16_t)0x0000) 10293 #define SYSCFG_EXTICR3_EXTI8_PB ((uint16_t)0x0001) 10294 #define SYSCFG_EXTICR3_EXTI8_PC ((uint16_t)0x0002) 10295 #define SYSCFG_EXTICR3_EXTI8_PD ((uint16_t)0x0003) 10296 #define SYSCFG_EXTICR3_EXTI8_PE ((uint16_t)0x0004) 10297 #define SYSCFG_EXTICR3_EXTI8_PF ((uint16_t)0x0005) 10298 #define SYSCFG_EXTICR3_EXTI8_PG ((uint16_t)0x0006) 10299 #define SYSCFG_EXTICR3_EXTI8_PH ((uint16_t)0x0007) 10300 #define SYSCFG_EXTICR3_EXTI8_PI ((uint16_t)0x0008) 10301 #define SYSCFG_EXTICR3_EXTI8_PJ ((uint16_t)0x0009) 10306 #define SYSCFG_EXTICR3_EXTI9_PA ((uint16_t)0x0000) 10307 #define SYSCFG_EXTICR3_EXTI9_PB ((uint16_t)0x0010) 10308 #define SYSCFG_EXTICR3_EXTI9_PC ((uint16_t)0x0020) 10309 #define SYSCFG_EXTICR3_EXTI9_PD ((uint16_t)0x0030) 10310 #define SYSCFG_EXTICR3_EXTI9_PE ((uint16_t)0x0040) 10311 #define SYSCFG_EXTICR3_EXTI9_PF ((uint16_t)0x0050) 10312 #define SYSCFG_EXTICR3_EXTI9_PG ((uint16_t)0x0060) 10313 #define SYSCFG_EXTICR3_EXTI9_PH ((uint16_t)0x0070) 10314 #define SYSCFG_EXTICR3_EXTI9_PI ((uint16_t)0x0080) 10315 #define SYSCFG_EXTICR3_EXTI9_PJ ((uint16_t)0x0090) 10320 #define SYSCFG_EXTICR3_EXTI10_PA ((uint16_t)0x0000) 10321 #define SYSCFG_EXTICR3_EXTI10_PB ((uint16_t)0x0100) 10322 #define SYSCFG_EXTICR3_EXTI10_PC ((uint16_t)0x0200) 10323 #define SYSCFG_EXTICR3_EXTI10_PD ((uint16_t)0x0300) 10324 #define SYSCFG_EXTICR3_EXTI10_PE ((uint16_t)0x0400) 10325 #define SYSCFG_EXTICR3_EXTI10_PF ((uint16_t)0x0500) 10326 #define SYSCFG_EXTICR3_EXTI10_PG ((uint16_t)0x0600) 10327 #define SYSCFG_EXTICR3_EXTI10_PH ((uint16_t)0x0700) 10328 #define SYSCFG_EXTICR3_EXTI10_PI ((uint16_t)0x0800) 10329 #define SYSCFG_EXTICR3_EXTI10_PJ ((uint16_t)0x0900) 10334 #define SYSCFG_EXTICR3_EXTI11_PA ((uint16_t)0x0000) 10335 #define SYSCFG_EXTICR3_EXTI11_PB ((uint16_t)0x1000) 10336 #define SYSCFG_EXTICR3_EXTI11_PC ((uint16_t)0x2000) 10337 #define SYSCFG_EXTICR3_EXTI11_PD ((uint16_t)0x3000) 10338 #define SYSCFG_EXTICR3_EXTI11_PE ((uint16_t)0x4000) 10339 #define SYSCFG_EXTICR3_EXTI11_PF ((uint16_t)0x5000) 10340 #define SYSCFG_EXTICR3_EXTI11_PG ((uint16_t)0x6000) 10341 #define SYSCFG_EXTICR3_EXTI11_PH ((uint16_t)0x7000) 10342 #define SYSCFG_EXTICR3_EXTI11_PI ((uint16_t)0x8000) 10343 #define SYSCFG_EXTICR3_EXTI11_PJ ((uint16_t)0x9000) 10346 #define SYSCFG_EXTICR4_EXTI12 ((uint16_t)0x000F) 10347 #define SYSCFG_EXTICR4_EXTI13 ((uint16_t)0x00F0) 10348 #define SYSCFG_EXTICR4_EXTI14 ((uint16_t)0x0F00) 10349 #define SYSCFG_EXTICR4_EXTI15 ((uint16_t)0xF000) 10353 #define SYSCFG_EXTICR4_EXTI12_PA ((uint16_t)0x0000) 10354 #define SYSCFG_EXTICR4_EXTI12_PB ((uint16_t)0x0001) 10355 #define SYSCFG_EXTICR4_EXTI12_PC ((uint16_t)0x0002) 10356 #define SYSCFG_EXTICR4_EXTI12_PD ((uint16_t)0x0003) 10357 #define SYSCFG_EXTICR4_EXTI12_PE ((uint16_t)0x0004) 10358 #define SYSCFG_EXTICR4_EXTI12_PF ((uint16_t)0x0005) 10359 #define SYSCFG_EXTICR4_EXTI12_PG ((uint16_t)0x0006) 10360 #define SYSCFG_EXTICR4_EXTI12_PH ((uint16_t)0x0007) 10361 #define SYSCFG_EXTICR4_EXTI12_PI ((uint16_t)0x0008) 10362 #define SYSCFG_EXTICR4_EXTI12_PJ ((uint16_t)0x0009) 10367 #define SYSCFG_EXTICR4_EXTI13_PA ((uint16_t)0x0000) 10368 #define SYSCFG_EXTICR4_EXTI13_PB ((uint16_t)0x0010) 10369 #define SYSCFG_EXTICR4_EXTI13_PC ((uint16_t)0x0020) 10370 #define SYSCFG_EXTICR4_EXTI13_PD ((uint16_t)0x0030) 10371 #define SYSCFG_EXTICR4_EXTI13_PE ((uint16_t)0x0040) 10372 #define SYSCFG_EXTICR4_EXTI13_PF ((uint16_t)0x0050) 10373 #define SYSCFG_EXTICR4_EXTI13_PG ((uint16_t)0x0060) 10374 #define SYSCFG_EXTICR4_EXTI13_PH ((uint16_t)0x0070) 10375 #define SYSCFG_EXTICR4_EXTI13_PI ((uint16_t)0x0008) 10376 #define SYSCFG_EXTICR4_EXTI13_PJ ((uint16_t)0x0009) 10381 #define SYSCFG_EXTICR4_EXTI14_PA ((uint16_t)0x0000) 10382 #define SYSCFG_EXTICR4_EXTI14_PB ((uint16_t)0x0100) 10383 #define SYSCFG_EXTICR4_EXTI14_PC ((uint16_t)0x0200) 10384 #define SYSCFG_EXTICR4_EXTI14_PD ((uint16_t)0x0300) 10385 #define SYSCFG_EXTICR4_EXTI14_PE ((uint16_t)0x0400) 10386 #define SYSCFG_EXTICR4_EXTI14_PF ((uint16_t)0x0500) 10387 #define SYSCFG_EXTICR4_EXTI14_PG ((uint16_t)0x0600) 10388 #define SYSCFG_EXTICR4_EXTI14_PH ((uint16_t)0x0700) 10389 #define SYSCFG_EXTICR4_EXTI14_PI ((uint16_t)0x0800) 10390 #define SYSCFG_EXTICR4_EXTI14_PJ ((uint16_t)0x0900) 10395 #define SYSCFG_EXTICR4_EXTI15_PA ((uint16_t)0x0000) 10396 #define SYSCFG_EXTICR4_EXTI15_PB ((uint16_t)0x1000) 10397 #define SYSCFG_EXTICR4_EXTI15_PC ((uint16_t)0x2000) 10398 #define SYSCFG_EXTICR4_EXTI15_PD ((uint16_t)0x3000) 10399 #define SYSCFG_EXTICR4_EXTI15_PE ((uint16_t)0x4000) 10400 #define SYSCFG_EXTICR4_EXTI15_PF ((uint16_t)0x5000) 10401 #define SYSCFG_EXTICR4_EXTI15_PG ((uint16_t)0x6000) 10402 #define SYSCFG_EXTICR4_EXTI15_PH ((uint16_t)0x7000) 10403 #define SYSCFG_EXTICR4_EXTI15_PI ((uint16_t)0x8000) 10404 #define SYSCFG_EXTICR4_EXTI15_PJ ((uint16_t)0x9000) 10406 #if defined (STM32F410xx) 10408 #define SYSCFG_CFGR2_CLL ((uint32_t)0x00000001) 10409 #define SYSCFG_CFGR2_PVDL ((uint32_t)0x00000004) 10412 #define SYSCFG_CMPCR_CMP_PD ((uint32_t)0x00000001) 10413 #define SYSCFG_CMPCR_READY ((uint32_t)0x00000100) 10421 #define TIM_CR1_CEN ((uint16_t)0x0001) 10422 #define TIM_CR1_UDIS ((uint16_t)0x0002) 10423 #define TIM_CR1_URS ((uint16_t)0x0004) 10424 #define TIM_CR1_OPM ((uint16_t)0x0008) 10425 #define TIM_CR1_DIR ((uint16_t)0x0010) 10427 #define TIM_CR1_CMS ((uint16_t)0x0060) 10428 #define TIM_CR1_CMS_0 ((uint16_t)0x0020) 10429 #define TIM_CR1_CMS_1 ((uint16_t)0x0040) 10431 #define TIM_CR1_ARPE ((uint16_t)0x0080) 10433 #define TIM_CR1_CKD ((uint16_t)0x0300) 10434 #define TIM_CR1_CKD_0 ((uint16_t)0x0100) 10435 #define TIM_CR1_CKD_1 ((uint16_t)0x0200) 10438 #define TIM_CR2_CCPC ((uint16_t)0x0001) 10439 #define TIM_CR2_CCUS ((uint16_t)0x0004) 10440 #define TIM_CR2_CCDS ((uint16_t)0x0008) 10442 #define TIM_CR2_MMS ((uint16_t)0x0070) 10443 #define TIM_CR2_MMS_0 ((uint16_t)0x0010) 10444 #define TIM_CR2_MMS_1 ((uint16_t)0x0020) 10445 #define TIM_CR2_MMS_2 ((uint16_t)0x0040) 10447 #define TIM_CR2_TI1S ((uint16_t)0x0080) 10448 #define TIM_CR2_OIS1 ((uint16_t)0x0100) 10449 #define TIM_CR2_OIS1N ((uint16_t)0x0200) 10450 #define TIM_CR2_OIS2 ((uint16_t)0x0400) 10451 #define TIM_CR2_OIS2N ((uint16_t)0x0800) 10452 #define TIM_CR2_OIS3 ((uint16_t)0x1000) 10453 #define TIM_CR2_OIS3N ((uint16_t)0x2000) 10454 #define TIM_CR2_OIS4 ((uint16_t)0x4000) 10457 #define TIM_SMCR_SMS ((uint16_t)0x0007) 10458 #define TIM_SMCR_SMS_0 ((uint16_t)0x0001) 10459 #define TIM_SMCR_SMS_1 ((uint16_t)0x0002) 10460 #define TIM_SMCR_SMS_2 ((uint16_t)0x0004) 10462 #define TIM_SMCR_TS ((uint16_t)0x0070) 10463 #define TIM_SMCR_TS_0 ((uint16_t)0x0010) 10464 #define TIM_SMCR_TS_1 ((uint16_t)0x0020) 10465 #define TIM_SMCR_TS_2 ((uint16_t)0x0040) 10467 #define TIM_SMCR_MSM ((uint16_t)0x0080) 10469 #define TIM_SMCR_ETF ((uint16_t)0x0F00) 10470 #define TIM_SMCR_ETF_0 ((uint16_t)0x0100) 10471 #define TIM_SMCR_ETF_1 ((uint16_t)0x0200) 10472 #define TIM_SMCR_ETF_2 ((uint16_t)0x0400) 10473 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) 10475 #define TIM_SMCR_ETPS ((uint16_t)0x3000) 10476 #define TIM_SMCR_ETPS_0 ((uint16_t)0x1000) 10477 #define TIM_SMCR_ETPS_1 ((uint16_t)0x2000) 10479 #define TIM_SMCR_ECE ((uint16_t)0x4000) 10480 #define TIM_SMCR_ETP ((uint16_t)0x8000) 10483 #define TIM_DIER_UIE ((uint16_t)0x0001) 10484 #define TIM_DIER_CC1IE ((uint16_t)0x0002) 10485 #define TIM_DIER_CC2IE ((uint16_t)0x0004) 10486 #define TIM_DIER_CC3IE ((uint16_t)0x0008) 10487 #define TIM_DIER_CC4IE ((uint16_t)0x0010) 10488 #define TIM_DIER_COMIE ((uint16_t)0x0020) 10489 #define TIM_DIER_TIE ((uint16_t)0x0040) 10490 #define TIM_DIER_BIE ((uint16_t)0x0080) 10491 #define TIM_DIER_UDE ((uint16_t)0x0100) 10492 #define TIM_DIER_CC1DE ((uint16_t)0x0200) 10493 #define TIM_DIER_CC2DE ((uint16_t)0x0400) 10494 #define TIM_DIER_CC3DE ((uint16_t)0x0800) 10495 #define TIM_DIER_CC4DE ((uint16_t)0x1000) 10496 #define TIM_DIER_COMDE ((uint16_t)0x2000) 10497 #define TIM_DIER_TDE ((uint16_t)0x4000) 10500 #define TIM_SR_UIF ((uint16_t)0x0001) 10501 #define TIM_SR_CC1IF ((uint16_t)0x0002) 10502 #define TIM_SR_CC2IF ((uint16_t)0x0004) 10503 #define TIM_SR_CC3IF ((uint16_t)0x0008) 10504 #define TIM_SR_CC4IF ((uint16_t)0x0010) 10505 #define TIM_SR_COMIF ((uint16_t)0x0020) 10506 #define TIM_SR_TIF ((uint16_t)0x0040) 10507 #define TIM_SR_BIF ((uint16_t)0x0080) 10508 #define TIM_SR_CC1OF ((uint16_t)0x0200) 10509 #define TIM_SR_CC2OF ((uint16_t)0x0400) 10510 #define TIM_SR_CC3OF ((uint16_t)0x0800) 10511 #define TIM_SR_CC4OF ((uint16_t)0x1000) 10514 #define TIM_EGR_UG ((uint8_t)0x01) 10515 #define TIM_EGR_CC1G ((uint8_t)0x02) 10516 #define TIM_EGR_CC2G ((uint8_t)0x04) 10517 #define TIM_EGR_CC3G ((uint8_t)0x08) 10518 #define TIM_EGR_CC4G ((uint8_t)0x10) 10519 #define TIM_EGR_COMG ((uint8_t)0x20) 10520 #define TIM_EGR_TG ((uint8_t)0x40) 10521 #define TIM_EGR_BG ((uint8_t)0x80) 10524 #define TIM_CCMR1_CC1S ((uint16_t)0x0003) 10525 #define TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) 10526 #define TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) 10528 #define TIM_CCMR1_OC1FE ((uint16_t)0x0004) 10529 #define TIM_CCMR1_OC1PE ((uint16_t)0x0008) 10531 #define TIM_CCMR1_OC1M ((uint16_t)0x0070) 10532 #define TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) 10533 #define TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) 10534 #define TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) 10536 #define TIM_CCMR1_OC1CE ((uint16_t)0x0080) 10538 #define TIM_CCMR1_CC2S ((uint16_t)0x0300) 10539 #define TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) 10540 #define TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) 10542 #define TIM_CCMR1_OC2FE ((uint16_t)0x0400) 10543 #define TIM_CCMR1_OC2PE ((uint16_t)0x0800) 10545 #define TIM_CCMR1_OC2M ((uint16_t)0x7000) 10546 #define TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) 10547 #define TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) 10548 #define TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) 10550 #define TIM_CCMR1_OC2CE ((uint16_t)0x8000) 10554 #define TIM_CCMR1_IC1PSC ((uint16_t)0x000C) 10555 #define TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) 10556 #define TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) 10558 #define TIM_CCMR1_IC1F ((uint16_t)0x00F0) 10559 #define TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) 10560 #define TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) 10561 #define TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) 10562 #define TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) 10564 #define TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) 10565 #define TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) 10566 #define TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) 10568 #define TIM_CCMR1_IC2F ((uint16_t)0xF000) 10569 #define TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) 10570 #define TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) 10571 #define TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) 10572 #define TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) 10575 #define TIM_CCMR2_CC3S ((uint16_t)0x0003) 10576 #define TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) 10577 #define TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) 10579 #define TIM_CCMR2_OC3FE ((uint16_t)0x0004) 10580 #define TIM_CCMR2_OC3PE ((uint16_t)0x0008) 10582 #define TIM_CCMR2_OC3M ((uint16_t)0x0070) 10583 #define TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) 10584 #define TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) 10585 #define TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) 10587 #define TIM_CCMR2_OC3CE ((uint16_t)0x0080) 10589 #define TIM_CCMR2_CC4S ((uint16_t)0x0300) 10590 #define TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) 10591 #define TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) 10593 #define TIM_CCMR2_OC4FE ((uint16_t)0x0400) 10594 #define TIM_CCMR2_OC4PE ((uint16_t)0x0800) 10596 #define TIM_CCMR2_OC4M ((uint16_t)0x7000) 10597 #define TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) 10598 #define TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) 10599 #define TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) 10601 #define TIM_CCMR2_OC4CE ((uint16_t)0x8000) 10605 #define TIM_CCMR2_IC3PSC ((uint16_t)0x000C) 10606 #define TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) 10607 #define TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) 10609 #define TIM_CCMR2_IC3F ((uint16_t)0x00F0) 10610 #define TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) 10611 #define TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) 10612 #define TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) 10613 #define TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) 10615 #define TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) 10616 #define TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) 10617 #define TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) 10619 #define TIM_CCMR2_IC4F ((uint16_t)0xF000) 10620 #define TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) 10621 #define TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) 10622 #define TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) 10623 #define TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) 10626 #define TIM_CCER_CC1E ((uint16_t)0x0001) 10627 #define TIM_CCER_CC1P ((uint16_t)0x0002) 10628 #define TIM_CCER_CC1NE ((uint16_t)0x0004) 10629 #define TIM_CCER_CC1NP ((uint16_t)0x0008) 10630 #define TIM_CCER_CC2E ((uint16_t)0x0010) 10631 #define TIM_CCER_CC2P ((uint16_t)0x0020) 10632 #define TIM_CCER_CC2NE ((uint16_t)0x0040) 10633 #define TIM_CCER_CC2NP ((uint16_t)0x0080) 10634 #define TIM_CCER_CC3E ((uint16_t)0x0100) 10635 #define TIM_CCER_CC3P ((uint16_t)0x0200) 10636 #define TIM_CCER_CC3NE ((uint16_t)0x0400) 10637 #define TIM_CCER_CC3NP ((uint16_t)0x0800) 10638 #define TIM_CCER_CC4E ((uint16_t)0x1000) 10639 #define TIM_CCER_CC4P ((uint16_t)0x2000) 10640 #define TIM_CCER_CC4NP ((uint16_t)0x8000) 10643 #define TIM_CNT_CNT ((uint16_t)0xFFFF) 10646 #define TIM_PSC_PSC ((uint16_t)0xFFFF) 10649 #define TIM_ARR_ARR ((uint16_t)0xFFFF) 10652 #define TIM_RCR_REP ((uint8_t)0xFF) 10655 #define TIM_CCR1_CCR1 ((uint16_t)0xFFFF) 10658 #define TIM_CCR2_CCR2 ((uint16_t)0xFFFF) 10661 #define TIM_CCR3_CCR3 ((uint16_t)0xFFFF) 10664 #define TIM_CCR4_CCR4 ((uint16_t)0xFFFF) 10667 #define TIM_BDTR_DTG ((uint16_t)0x00FF) 10668 #define TIM_BDTR_DTG_0 ((uint16_t)0x0001) 10669 #define TIM_BDTR_DTG_1 ((uint16_t)0x0002) 10670 #define TIM_BDTR_DTG_2 ((uint16_t)0x0004) 10671 #define TIM_BDTR_DTG_3 ((uint16_t)0x0008) 10672 #define TIM_BDTR_DTG_4 ((uint16_t)0x0010) 10673 #define TIM_BDTR_DTG_5 ((uint16_t)0x0020) 10674 #define TIM_BDTR_DTG_6 ((uint16_t)0x0040) 10675 #define TIM_BDTR_DTG_7 ((uint16_t)0x0080) 10677 #define TIM_BDTR_LOCK ((uint16_t)0x0300) 10678 #define TIM_BDTR_LOCK_0 ((uint16_t)0x0100) 10679 #define TIM_BDTR_LOCK_1 ((uint16_t)0x0200) 10681 #define TIM_BDTR_OSSI ((uint16_t)0x0400) 10682 #define TIM_BDTR_OSSR ((uint16_t)0x0800) 10683 #define TIM_BDTR_BKE ((uint16_t)0x1000) 10684 #define TIM_BDTR_BKP ((uint16_t)0x2000) 10685 #define TIM_BDTR_AOE ((uint16_t)0x4000) 10686 #define TIM_BDTR_MOE ((uint16_t)0x8000) 10689 #define TIM_DCR_DBA ((uint16_t)0x001F) 10690 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) 10691 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) 10692 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) 10693 #define TIM_DCR_DBA_3 ((uint16_t)0x0008) 10694 #define TIM_DCR_DBA_4 ((uint16_t)0x0010) 10696 #define TIM_DCR_DBL ((uint16_t)0x1F00) 10697 #define TIM_DCR_DBL_0 ((uint16_t)0x0100) 10698 #define TIM_DCR_DBL_1 ((uint16_t)0x0200) 10699 #define TIM_DCR_DBL_2 ((uint16_t)0x0400) 10700 #define TIM_DCR_DBL_3 ((uint16_t)0x0800) 10701 #define TIM_DCR_DBL_4 ((uint16_t)0x1000) 10704 #define TIM_DMAR_DMAB ((uint16_t)0xFFFF) 10707 #define TIM_OR_TI4_RMP ((uint16_t)0x00C0) 10708 #define TIM_OR_TI4_RMP_0 ((uint16_t)0x0040) 10709 #define TIM_OR_TI4_RMP_1 ((uint16_t)0x0080) 10710 #define TIM_OR_ITR1_RMP ((uint16_t)0x0C00) 10711 #define TIM_OR_ITR1_RMP_0 ((uint16_t)0x0400) 10712 #define TIM_OR_ITR1_RMP_1 ((uint16_t)0x0800) 10714 #if defined(STM32F410xx) 10721 #define LPTIM_ISR_CMPM ((uint32_t)0x00000001) 10722 #define LPTIM_ISR_ARRM ((uint32_t)0x00000002) 10723 #define LPTIM_ISR_EXTTRIG ((uint32_t)0x00000004) 10724 #define LPTIM_ISR_CMPOK ((uint32_t)0x00000008) 10725 #define LPTIM_ISR_ARROK ((uint32_t)0x00000010) 10726 #define LPTIM_ISR_UP ((uint32_t)0x00000020) 10727 #define LPTIM_ISR_DOWN ((uint32_t)0x00000040) 10730 #define LPTIM_ICR_CMPMCF ((uint32_t)0x00000001) 10731 #define LPTIM_ICR_ARRMCF ((uint32_t)0x00000002) 10732 #define LPTIM_ICR_EXTTRIGCF ((uint32_t)0x00000004) 10733 #define LPTIM_ICR_CMPOKCF ((uint32_t)0x00000008) 10734 #define LPTIM_ICR_ARROKCF ((uint32_t)0x00000010) 10735 #define LPTIM_ICR_UPCF ((uint32_t)0x00000020) 10736 #define LPTIM_ICR_DOWNCF ((uint32_t)0x00000040) 10739 #define LPTIM_IER_CMPMIE ((uint32_t)0x00000001) 10740 #define LPTIM_IER_ARRMIE ((uint32_t)0x00000002) 10741 #define LPTIM_IER_EXTTRIGIE ((uint32_t)0x00000004) 10742 #define LPTIM_IER_CMPOKIE ((uint32_t)0x00000008) 10743 #define LPTIM_IER_ARROKIE ((uint32_t)0x00000010) 10744 #define LPTIM_IER_UPIE ((uint32_t)0x00000020) 10745 #define LPTIM_IER_DOWNIE ((uint32_t)0x00000040) 10748 #define LPTIM_CFGR_CKSEL ((uint32_t)0x00000001) 10750 #define LPTIM_CFGR_CKPOL ((uint32_t)0x00000006) 10751 #define LPTIM_CFGR_CKPOL_0 ((uint32_t)0x00000002) 10752 #define LPTIM_CFGR_CKPOL_1 ((uint32_t)0x00000004) 10754 #define LPTIM_CFGR_CKFLT ((uint32_t)0x00000018) 10755 #define LPTIM_CFGR_CKFLT_0 ((uint32_t)0x00000008) 10756 #define LPTIM_CFGR_CKFLT_1 ((uint32_t)0x00000010) 10758 #define LPTIM_CFGR_TRGFLT ((uint32_t)0x000000C0) 10759 #define LPTIM_CFGR_TRGFLT_0 ((uint32_t)0x00000040) 10760 #define LPTIM_CFGR_TRGFLT_1 ((uint32_t)0x00000080) 10762 #define LPTIM_CFGR_PRESC ((uint32_t)0x00000E00) 10763 #define LPTIM_CFGR_PRESC_0 ((uint32_t)0x00000200) 10764 #define LPTIM_CFGR_PRESC_1 ((uint32_t)0x00000400) 10765 #define LPTIM_CFGR_PRESC_2 ((uint32_t)0x00000800) 10767 #define LPTIM_CFGR_TRIGSEL ((uint32_t)0x0000E000) 10768 #define LPTIM_CFGR_TRIGSEL_0 ((uint32_t)0x00002000) 10769 #define LPTIM_CFGR_TRIGSEL_1 ((uint32_t)0x00004000) 10770 #define LPTIM_CFGR_TRIGSEL_2 ((uint32_t)0x00008000) 10772 #define LPTIM_CFGR_TRIGEN ((uint32_t)0x00060000) 10773 #define LPTIM_CFGR_TRIGEN_0 ((uint32_t)0x00020000) 10774 #define LPTIM_CFGR_TRIGEN_1 ((uint32_t)0x00040000) 10776 #define LPTIM_CFGR_TIMOUT ((uint32_t)0x00080000) 10777 #define LPTIM_CFGR_WAVE ((uint32_t)0x00100000) 10778 #define LPTIM_CFGR_WAVPOL ((uint32_t)0x00200000) 10779 #define LPTIM_CFGR_PRELOAD ((uint32_t)0x00400000) 10780 #define LPTIM_CFGR_COUNTMODE ((uint32_t)0x00800000) 10781 #define LPTIM_CFGR_ENC ((uint32_t)0x01000000) 10784 #define LPTIM_CR_ENABLE ((uint32_t)0x00000001) 10785 #define LPTIM_CR_SNGSTRT ((uint32_t)0x00080002) 10786 #define LPTIM_CR_CNTSTRT ((uint32_t)0x00000004) 10789 #define LPTIM_CMP_CMP ((uint32_t)0x0000FFFF) 10792 #define LPTIM_ARR_ARR ((uint32_t)0x0000FFFF) 10795 #define LPTIM_CNT_CNT ((uint32_t)0x0000FFFF) 10798 #define LPTIM_OR_OR ((uint32_t)0x00000003) 10799 #define LPTIM_OR_OR_0 ((uint32_t)0x00000001) 10800 #define LPTIM_OR_OR_1 ((uint32_t)0x00000002) 10809 #define USART_SR_PE ((uint16_t)0x0001) 10810 #define USART_SR_FE ((uint16_t)0x0002) 10811 #define USART_SR_NE ((uint16_t)0x0004) 10812 #define USART_SR_ORE ((uint16_t)0x0008) 10813 #define USART_SR_IDLE ((uint16_t)0x0010) 10814 #define USART_SR_RXNE ((uint16_t)0x0020) 10815 #define USART_SR_TC ((uint16_t)0x0040) 10816 #define USART_SR_TXE ((uint16_t)0x0080) 10817 #define USART_SR_LBD ((uint16_t)0x0100) 10818 #define USART_SR_CTS ((uint16_t)0x0200) 10821 #define USART_DR_DR ((uint16_t)0x01FF) 10824 #define USART_BRR_DIV_Fraction ((uint16_t)0x000F) 10825 #define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) 10828 #define USART_CR1_SBK ((uint16_t)0x0001) 10829 #define USART_CR1_RWU ((uint16_t)0x0002) 10830 #define USART_CR1_RE ((uint16_t)0x0004) 10831 #define USART_CR1_TE ((uint16_t)0x0008) 10832 #define USART_CR1_IDLEIE ((uint16_t)0x0010) 10833 #define USART_CR1_RXNEIE ((uint16_t)0x0020) 10834 #define USART_CR1_TCIE ((uint16_t)0x0040) 10835 #define USART_CR1_TXEIE ((uint16_t)0x0080) 10836 #define USART_CR1_PEIE ((uint16_t)0x0100) 10837 #define USART_CR1_PS ((uint16_t)0x0200) 10838 #define USART_CR1_PCE ((uint16_t)0x0400) 10839 #define USART_CR1_WAKE ((uint16_t)0x0800) 10840 #define USART_CR1_M ((uint16_t)0x1000) 10841 #define USART_CR1_UE ((uint16_t)0x2000) 10842 #define USART_CR1_OVER8 ((uint16_t)0x8000) 10845 #define USART_CR2_ADD ((uint16_t)0x000F) 10846 #define USART_CR2_LBDL ((uint16_t)0x0020) 10847 #define USART_CR2_LBDIE ((uint16_t)0x0040) 10848 #define USART_CR2_LBCL ((uint16_t)0x0100) 10849 #define USART_CR2_CPHA ((uint16_t)0x0200) 10850 #define USART_CR2_CPOL ((uint16_t)0x0400) 10851 #define USART_CR2_CLKEN ((uint16_t)0x0800) 10853 #define USART_CR2_STOP ((uint16_t)0x3000) 10854 #define USART_CR2_STOP_0 ((uint16_t)0x1000) 10855 #define USART_CR2_STOP_1 ((uint16_t)0x2000) 10857 #define USART_CR2_LINEN ((uint16_t)0x4000) 10860 #define USART_CR3_EIE ((uint16_t)0x0001) 10861 #define USART_CR3_IREN ((uint16_t)0x0002) 10862 #define USART_CR3_IRLP ((uint16_t)0x0004) 10863 #define USART_CR3_HDSEL ((uint16_t)0x0008) 10864 #define USART_CR3_NACK ((uint16_t)0x0010) 10865 #define USART_CR3_SCEN ((uint16_t)0x0020) 10866 #define USART_CR3_DMAR ((uint16_t)0x0040) 10867 #define USART_CR3_DMAT ((uint16_t)0x0080) 10868 #define USART_CR3_RTSE ((uint16_t)0x0100) 10869 #define USART_CR3_CTSE ((uint16_t)0x0200) 10870 #define USART_CR3_CTSIE ((uint16_t)0x0400) 10871 #define USART_CR3_ONEBIT ((uint16_t)0x0800) 10874 #define USART_GTPR_PSC ((uint16_t)0x00FF) 10875 #define USART_GTPR_PSC_0 ((uint16_t)0x0001) 10876 #define USART_GTPR_PSC_1 ((uint16_t)0x0002) 10877 #define USART_GTPR_PSC_2 ((uint16_t)0x0004) 10878 #define USART_GTPR_PSC_3 ((uint16_t)0x0008) 10879 #define USART_GTPR_PSC_4 ((uint16_t)0x0010) 10880 #define USART_GTPR_PSC_5 ((uint16_t)0x0020) 10881 #define USART_GTPR_PSC_6 ((uint16_t)0x0040) 10882 #define USART_GTPR_PSC_7 ((uint16_t)0x0080) 10884 #define USART_GTPR_GT ((uint16_t)0xFF00) 10892 #define WWDG_CR_T ((uint8_t)0x7F) 10893 #define WWDG_CR_T0 ((uint8_t)0x01) 10894 #define WWDG_CR_T1 ((uint8_t)0x02) 10895 #define WWDG_CR_T2 ((uint8_t)0x04) 10896 #define WWDG_CR_T3 ((uint8_t)0x08) 10897 #define WWDG_CR_T4 ((uint8_t)0x10) 10898 #define WWDG_CR_T5 ((uint8_t)0x20) 10899 #define WWDG_CR_T6 ((uint8_t)0x40) 10901 #define WWDG_CR_WDGA ((uint8_t)0x80) 10904 #define WWDG_CFR_W ((uint16_t)0x007F) 10905 #define WWDG_CFR_W0 ((uint16_t)0x0001) 10906 #define WWDG_CFR_W1 ((uint16_t)0x0002) 10907 #define WWDG_CFR_W2 ((uint16_t)0x0004) 10908 #define WWDG_CFR_W3 ((uint16_t)0x0008) 10909 #define WWDG_CFR_W4 ((uint16_t)0x0010) 10910 #define WWDG_CFR_W5 ((uint16_t)0x0020) 10911 #define WWDG_CFR_W6 ((uint16_t)0x0040) 10913 #define WWDG_CFR_WDGTB ((uint16_t)0x0180) 10914 #define WWDG_CFR_WDGTB0 ((uint16_t)0x0080) 10915 #define WWDG_CFR_WDGTB1 ((uint16_t)0x0100) 10917 #define WWDG_CFR_EWI ((uint16_t)0x0200) 10920 #define WWDG_SR_EWIF ((uint8_t)0x01) 10929 #define DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) 10930 #define DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) 10933 #define DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) 10934 #define DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) 10935 #define DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) 10936 #define DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) 10938 #define DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) 10939 #define DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) 10940 #define DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) 10943 #define DBGMCU_APB1_FZ_DBG_TIM2_STOP ((uint32_t)0x00000001) 10944 #define DBGMCU_APB1_FZ_DBG_TIM3_STOP ((uint32_t)0x00000002) 10945 #define DBGMCU_APB1_FZ_DBG_TIM4_STOP ((uint32_t)0x00000004) 10946 #define DBGMCU_APB1_FZ_DBG_TIM5_STOP ((uint32_t)0x00000008) 10947 #define DBGMCU_APB1_FZ_DBG_TIM6_STOP ((uint32_t)0x00000010) 10948 #define DBGMCU_APB1_FZ_DBG_TIM7_STOP ((uint32_t)0x00000020) 10949 #define DBGMCU_APB1_FZ_DBG_TIM12_STOP ((uint32_t)0x00000040) 10950 #define DBGMCU_APB1_FZ_DBG_TIM13_STOP ((uint32_t)0x00000080) 10951 #define DBGMCU_APB1_FZ_DBG_TIM14_STOP ((uint32_t)0x00000100) 10952 #define DBGMCU_APB1_FZ_DBG_RTC_STOP ((uint32_t)0x00000400) 10953 #define DBGMCU_APB1_FZ_DBG_WWDG_STOP ((uint32_t)0x00000800) 10954 #define DBGMCU_APB1_FZ_DBG_IWDG_STOP ((uint32_t)0x00001000) 10955 #define DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000) 10956 #define DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000) 10957 #define DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000) 10958 #define DBGMCU_APB1_FZ_DBG_CAN1_STOP ((uint32_t)0x02000000) 10959 #define DBGMCU_APB1_FZ_DBG_CAN2_STOP ((uint32_t)0x04000000) 10961 #define DBGMCU_APB1_FZ_DBG_IWDEG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP 10964 #define DBGMCU_APB1_FZ_DBG_TIM1_STOP ((uint32_t)0x00000001) 10965 #define DBGMCU_APB1_FZ_DBG_TIM8_STOP ((uint32_t)0x00000002) 10966 #define DBGMCU_APB1_FZ_DBG_TIM9_STOP ((uint32_t)0x00010000) 10967 #define DBGMCU_APB1_FZ_DBG_TIM10_STOP ((uint32_t)0x00020000) 10968 #define DBGMCU_APB1_FZ_DBG_TIM11_STOP ((uint32_t)0x00040000) 10976 #define ETH_MACCR_WD ((uint32_t)0x00800000) 10977 #define ETH_MACCR_JD ((uint32_t)0x00400000) 10978 #define ETH_MACCR_IFG ((uint32_t)0x000E0000) 10979 #define ETH_MACCR_IFG_96Bit ((uint32_t)0x00000000) 10980 #define ETH_MACCR_IFG_88Bit ((uint32_t)0x00020000) 10981 #define ETH_MACCR_IFG_80Bit ((uint32_t)0x00040000) 10982 #define ETH_MACCR_IFG_72Bit ((uint32_t)0x00060000) 10983 #define ETH_MACCR_IFG_64Bit ((uint32_t)0x00080000) 10984 #define ETH_MACCR_IFG_56Bit ((uint32_t)0x000A0000) 10985 #define ETH_MACCR_IFG_48Bit ((uint32_t)0x000C0000) 10986 #define ETH_MACCR_IFG_40Bit ((uint32_t)0x000E0000) 10987 #define ETH_MACCR_CSD ((uint32_t)0x00010000) 10988 #define ETH_MACCR_FES ((uint32_t)0x00004000) 10989 #define ETH_MACCR_ROD ((uint32_t)0x00002000) 10990 #define ETH_MACCR_LM ((uint32_t)0x00001000) 10991 #define ETH_MACCR_DM ((uint32_t)0x00000800) 10992 #define ETH_MACCR_IPCO ((uint32_t)0x00000400) 10993 #define ETH_MACCR_RD ((uint32_t)0x00000200) 10994 #define ETH_MACCR_APCS ((uint32_t)0x00000080) 10995 #define ETH_MACCR_BL ((uint32_t)0x00000060) 10997 #define ETH_MACCR_BL_10 ((uint32_t)0x00000000) 10998 #define ETH_MACCR_BL_8 ((uint32_t)0x00000020) 10999 #define ETH_MACCR_BL_4 ((uint32_t)0x00000040) 11000 #define ETH_MACCR_BL_1 ((uint32_t)0x00000060) 11001 #define ETH_MACCR_DC ((uint32_t)0x00000010) 11002 #define ETH_MACCR_TE ((uint32_t)0x00000008) 11003 #define ETH_MACCR_RE ((uint32_t)0x00000004) 11006 #define ETH_MACFFR_RA ((uint32_t)0x80000000) 11007 #define ETH_MACFFR_HPF ((uint32_t)0x00000400) 11008 #define ETH_MACFFR_SAF ((uint32_t)0x00000200) 11009 #define ETH_MACFFR_SAIF ((uint32_t)0x00000100) 11010 #define ETH_MACFFR_PCF ((uint32_t)0x000000C0) 11011 #define ETH_MACFFR_PCF_BlockAll ((uint32_t)0x00000040) 11012 #define ETH_MACFFR_PCF_ForwardAll ((uint32_t)0x00000080) 11013 #define ETH_MACFFR_PCF_ForwardPassedAddrFilter ((uint32_t)0x000000C0) 11014 #define ETH_MACFFR_BFD ((uint32_t)0x00000020) 11015 #define ETH_MACFFR_PAM ((uint32_t)0x00000010) 11016 #define ETH_MACFFR_DAIF ((uint32_t)0x00000008) 11017 #define ETH_MACFFR_HM ((uint32_t)0x00000004) 11018 #define ETH_MACFFR_HU ((uint32_t)0x00000002) 11019 #define ETH_MACFFR_PM ((uint32_t)0x00000001) 11022 #define ETH_MACHTHR_HTH ((uint32_t)0xFFFFFFFF) 11025 #define ETH_MACHTLR_HTL ((uint32_t)0xFFFFFFFF) 11028 #define ETH_MACMIIAR_PA ((uint32_t)0x0000F800) 11029 #define ETH_MACMIIAR_MR ((uint32_t)0x000007C0) 11030 #define ETH_MACMIIAR_CR ((uint32_t)0x0000001C) 11031 #define ETH_MACMIIAR_CR_Div42 ((uint32_t)0x00000000) 11032 #define ETH_MACMIIAR_CR_Div62 ((uint32_t)0x00000004) 11033 #define ETH_MACMIIAR_CR_Div16 ((uint32_t)0x00000008) 11034 #define ETH_MACMIIAR_CR_Div26 ((uint32_t)0x0000000C) 11035 #define ETH_MACMIIAR_CR_Div102 ((uint32_t)0x00000010) 11036 #define ETH_MACMIIAR_MW ((uint32_t)0x00000002) 11037 #define ETH_MACMIIAR_MB ((uint32_t)0x00000001) 11040 #define ETH_MACMIIDR_MD ((uint32_t)0x0000FFFF) 11043 #define ETH_MACFCR_PT ((uint32_t)0xFFFF0000) 11044 #define ETH_MACFCR_ZQPD ((uint32_t)0x00000080) 11045 #define ETH_MACFCR_PLT ((uint32_t)0x00000030) 11046 #define ETH_MACFCR_PLT_Minus4 ((uint32_t)0x00000000) 11047 #define ETH_MACFCR_PLT_Minus28 ((uint32_t)0x00000010) 11048 #define ETH_MACFCR_PLT_Minus144 ((uint32_t)0x00000020) 11049 #define ETH_MACFCR_PLT_Minus256 ((uint32_t)0x00000030) 11050 #define ETH_MACFCR_UPFD ((uint32_t)0x00000008) 11051 #define ETH_MACFCR_RFCE ((uint32_t)0x00000004) 11052 #define ETH_MACFCR_TFCE ((uint32_t)0x00000002) 11053 #define ETH_MACFCR_FCBBPA ((uint32_t)0x00000001) 11056 #define ETH_MACVLANTR_VLANTC ((uint32_t)0x00010000) 11057 #define ETH_MACVLANTR_VLANTI ((uint32_t)0x0000FFFF) 11060 #define ETH_MACRWUFFR_D ((uint32_t)0xFFFFFFFF) 11074 #define ETH_MACPMTCSR_WFFRPR ((uint32_t)0x80000000) 11075 #define ETH_MACPMTCSR_GU ((uint32_t)0x00000200) 11076 #define ETH_MACPMTCSR_WFR ((uint32_t)0x00000040) 11077 #define ETH_MACPMTCSR_MPR ((uint32_t)0x00000020) 11078 #define ETH_MACPMTCSR_WFE ((uint32_t)0x00000004) 11079 #define ETH_MACPMTCSR_MPE ((uint32_t)0x00000002) 11080 #define ETH_MACPMTCSR_PD ((uint32_t)0x00000001) 11083 #define ETH_MACSR_TSTS ((uint32_t)0x00000200) 11084 #define ETH_MACSR_MMCTS ((uint32_t)0x00000040) 11085 #define ETH_MACSR_MMMCRS ((uint32_t)0x00000020) 11086 #define ETH_MACSR_MMCS ((uint32_t)0x00000010) 11087 #define ETH_MACSR_PMTS ((uint32_t)0x00000008) 11090 #define ETH_MACIMR_TSTIM ((uint32_t)0x00000200) 11091 #define ETH_MACIMR_PMTIM ((uint32_t)0x00000008) 11094 #define ETH_MACA0HR_MACA0H ((uint32_t)0x0000FFFF) 11097 #define ETH_MACA0LR_MACA0L ((uint32_t)0xFFFFFFFF) 11100 #define ETH_MACA1HR_AE ((uint32_t)0x80000000) 11101 #define ETH_MACA1HR_SA ((uint32_t)0x40000000) 11102 #define ETH_MACA1HR_MBC ((uint32_t)0x3F000000) 11103 #define ETH_MACA1HR_MBC_HBits15_8 ((uint32_t)0x20000000) 11104 #define ETH_MACA1HR_MBC_HBits7_0 ((uint32_t)0x10000000) 11105 #define ETH_MACA1HR_MBC_LBits31_24 ((uint32_t)0x08000000) 11106 #define ETH_MACA1HR_MBC_LBits23_16 ((uint32_t)0x04000000) 11107 #define ETH_MACA1HR_MBC_LBits15_8 ((uint32_t)0x02000000) 11108 #define ETH_MACA1HR_MBC_LBits7_0 ((uint32_t)0x01000000) 11109 #define ETH_MACA1HR_MACA1H ((uint32_t)0x0000FFFF) 11112 #define ETH_MACA1LR_MACA1L ((uint32_t)0xFFFFFFFF) 11115 #define ETH_MACA2HR_AE ((uint32_t)0x80000000) 11116 #define ETH_MACA2HR_SA ((uint32_t)0x40000000) 11117 #define ETH_MACA2HR_MBC ((uint32_t)0x3F000000) 11118 #define ETH_MACA2HR_MBC_HBits15_8 ((uint32_t)0x20000000) 11119 #define ETH_MACA2HR_MBC_HBits7_0 ((uint32_t)0x10000000) 11120 #define ETH_MACA2HR_MBC_LBits31_24 ((uint32_t)0x08000000) 11121 #define ETH_MACA2HR_MBC_LBits23_16 ((uint32_t)0x04000000) 11122 #define ETH_MACA2HR_MBC_LBits15_8 ((uint32_t)0x02000000) 11123 #define ETH_MACA2HR_MBC_LBits7_0 ((uint32_t)0x01000000) 11124 #define ETH_MACA2HR_MACA2H ((uint32_t)0x0000FFFF) 11127 #define ETH_MACA2LR_MACA2L ((uint32_t)0xFFFFFFFF) 11130 #define ETH_MACA3HR_AE ((uint32_t)0x80000000) 11131 #define ETH_MACA3HR_SA ((uint32_t)0x40000000) 11132 #define ETH_MACA3HR_MBC ((uint32_t)0x3F000000) 11133 #define ETH_MACA3HR_MBC_HBits15_8 ((uint32_t)0x20000000) 11134 #define ETH_MACA3HR_MBC_HBits7_0 ((uint32_t)0x10000000) 11135 #define ETH_MACA3HR_MBC_LBits31_24 ((uint32_t)0x08000000) 11136 #define ETH_MACA3HR_MBC_LBits23_16 ((uint32_t)0x04000000) 11137 #define ETH_MACA3HR_MBC_LBits15_8 ((uint32_t)0x02000000) 11138 #define ETH_MACA3HR_MBC_LBits7_0 ((uint32_t)0x01000000) 11139 #define ETH_MACA3HR_MACA3H ((uint32_t)0x0000FFFF) 11142 #define ETH_MACA3LR_MACA3L ((uint32_t)0xFFFFFFFF) 11149 #define ETH_MMCCR_MCFHP ((uint32_t)0x00000020) 11150 #define ETH_MMCCR_MCP ((uint32_t)0x00000010) 11151 #define ETH_MMCCR_MCF ((uint32_t)0x00000008) 11152 #define ETH_MMCCR_ROR ((uint32_t)0x00000004) 11153 #define ETH_MMCCR_CSR ((uint32_t)0x00000002) 11154 #define ETH_MMCCR_CR ((uint32_t)0x00000001) 11157 #define ETH_MMCRIR_RGUFS ((uint32_t)0x00020000) 11158 #define ETH_MMCRIR_RFAES ((uint32_t)0x00000040) 11159 #define ETH_MMCRIR_RFCES ((uint32_t)0x00000020) 11162 #define ETH_MMCTIR_TGFS ((uint32_t)0x00200000) 11163 #define ETH_MMCTIR_TGFMSCS ((uint32_t)0x00008000) 11164 #define ETH_MMCTIR_TGFSCS ((uint32_t)0x00004000) 11167 #define ETH_MMCRIMR_RGUFM ((uint32_t)0x00020000) 11168 #define ETH_MMCRIMR_RFAEM ((uint32_t)0x00000040) 11169 #define ETH_MMCRIMR_RFCEM ((uint32_t)0x00000020) 11172 #define ETH_MMCTIMR_TGFM ((uint32_t)0x00200000) 11173 #define ETH_MMCTIMR_TGFMSCM ((uint32_t)0x00008000) 11174 #define ETH_MMCTIMR_TGFSCM ((uint32_t)0x00004000) 11177 #define ETH_MMCTGFSCCR_TGFSCC ((uint32_t)0xFFFFFFFF) 11180 #define ETH_MMCTGFMSCCR_TGFMSCC ((uint32_t)0xFFFFFFFF) 11183 #define ETH_MMCTGFCR_TGFC ((uint32_t)0xFFFFFFFF) 11186 #define ETH_MMCRFCECR_RFCEC ((uint32_t)0xFFFFFFFF) 11189 #define ETH_MMCRFAECR_RFAEC ((uint32_t)0xFFFFFFFF) 11192 #define ETH_MMCRGUFCR_RGUFC ((uint32_t)0xFFFFFFFF) 11199 #define ETH_PTPTSCR_TSCNT ((uint32_t)0x00030000) 11200 #define ETH_PTPTSSR_TSSMRME ((uint32_t)0x00008000) 11201 #define ETH_PTPTSSR_TSSEME ((uint32_t)0x00004000) 11202 #define ETH_PTPTSSR_TSSIPV4FE ((uint32_t)0x00002000) 11203 #define ETH_PTPTSSR_TSSIPV6FE ((uint32_t)0x00001000) 11204 #define ETH_PTPTSSR_TSSPTPOEFE ((uint32_t)0x00000800) 11205 #define ETH_PTPTSSR_TSPTPPSV2E ((uint32_t)0x00000400) 11206 #define ETH_PTPTSSR_TSSSR ((uint32_t)0x00000200) 11207 #define ETH_PTPTSSR_TSSARFE ((uint32_t)0x00000100) 11209 #define ETH_PTPTSCR_TSARU ((uint32_t)0x00000020) 11210 #define ETH_PTPTSCR_TSITE ((uint32_t)0x00000010) 11211 #define ETH_PTPTSCR_TSSTU ((uint32_t)0x00000008) 11212 #define ETH_PTPTSCR_TSSTI ((uint32_t)0x00000004) 11213 #define ETH_PTPTSCR_TSFCU ((uint32_t)0x00000002) 11214 #define ETH_PTPTSCR_TSE ((uint32_t)0x00000001) 11217 #define ETH_PTPSSIR_STSSI ((uint32_t)0x000000FF) 11220 #define ETH_PTPTSHR_STS ((uint32_t)0xFFFFFFFF) 11223 #define ETH_PTPTSLR_STPNS ((uint32_t)0x80000000) 11224 #define ETH_PTPTSLR_STSS ((uint32_t)0x7FFFFFFF) 11227 #define ETH_PTPTSHUR_TSUS ((uint32_t)0xFFFFFFFF) 11230 #define ETH_PTPTSLUR_TSUPNS ((uint32_t)0x80000000) 11231 #define ETH_PTPTSLUR_TSUSS ((uint32_t)0x7FFFFFFF) 11234 #define ETH_PTPTSAR_TSA ((uint32_t)0xFFFFFFFF) 11237 #define ETH_PTPTTHR_TTSH ((uint32_t)0xFFFFFFFF) 11240 #define ETH_PTPTTLR_TTSL ((uint32_t)0xFFFFFFFF) 11243 #define ETH_PTPTSSR_TSTTR ((uint32_t)0x00000020) 11244 #define ETH_PTPTSSR_TSSO ((uint32_t)0x00000010) 11251 #define ETH_DMABMR_AAB ((uint32_t)0x02000000) 11252 #define ETH_DMABMR_FPM ((uint32_t)0x01000000) 11253 #define ETH_DMABMR_USP ((uint32_t)0x00800000) 11254 #define ETH_DMABMR_RDP ((uint32_t)0x007E0000) 11255 #define ETH_DMABMR_RDP_1Beat ((uint32_t)0x00020000) 11256 #define ETH_DMABMR_RDP_2Beat ((uint32_t)0x00040000) 11257 #define ETH_DMABMR_RDP_4Beat ((uint32_t)0x00080000) 11258 #define ETH_DMABMR_RDP_8Beat ((uint32_t)0x00100000) 11259 #define ETH_DMABMR_RDP_16Beat ((uint32_t)0x00200000) 11260 #define ETH_DMABMR_RDP_32Beat ((uint32_t)0x00400000) 11261 #define ETH_DMABMR_RDP_4xPBL_4Beat ((uint32_t)0x01020000) 11262 #define ETH_DMABMR_RDP_4xPBL_8Beat ((uint32_t)0x01040000) 11263 #define ETH_DMABMR_RDP_4xPBL_16Beat ((uint32_t)0x01080000) 11264 #define ETH_DMABMR_RDP_4xPBL_32Beat ((uint32_t)0x01100000) 11265 #define ETH_DMABMR_RDP_4xPBL_64Beat ((uint32_t)0x01200000) 11266 #define ETH_DMABMR_RDP_4xPBL_128Beat ((uint32_t)0x01400000) 11267 #define ETH_DMABMR_FB ((uint32_t)0x00010000) 11268 #define ETH_DMABMR_RTPR ((uint32_t)0x0000C000) 11269 #define ETH_DMABMR_RTPR_1_1 ((uint32_t)0x00000000) 11270 #define ETH_DMABMR_RTPR_2_1 ((uint32_t)0x00004000) 11271 #define ETH_DMABMR_RTPR_3_1 ((uint32_t)0x00008000) 11272 #define ETH_DMABMR_RTPR_4_1 ((uint32_t)0x0000C000) 11273 #define ETH_DMABMR_PBL ((uint32_t)0x00003F00) 11274 #define ETH_DMABMR_PBL_1Beat ((uint32_t)0x00000100) 11275 #define ETH_DMABMR_PBL_2Beat ((uint32_t)0x00000200) 11276 #define ETH_DMABMR_PBL_4Beat ((uint32_t)0x00000400) 11277 #define ETH_DMABMR_PBL_8Beat ((uint32_t)0x00000800) 11278 #define ETH_DMABMR_PBL_16Beat ((uint32_t)0x00001000) 11279 #define ETH_DMABMR_PBL_32Beat ((uint32_t)0x00002000) 11280 #define ETH_DMABMR_PBL_4xPBL_4Beat ((uint32_t)0x01000100) 11281 #define ETH_DMABMR_PBL_4xPBL_8Beat ((uint32_t)0x01000200) 11282 #define ETH_DMABMR_PBL_4xPBL_16Beat ((uint32_t)0x01000400) 11283 #define ETH_DMABMR_PBL_4xPBL_32Beat ((uint32_t)0x01000800) 11284 #define ETH_DMABMR_PBL_4xPBL_64Beat ((uint32_t)0x01001000) 11285 #define ETH_DMABMR_PBL_4xPBL_128Beat ((uint32_t)0x01002000) 11286 #define ETH_DMABMR_EDE ((uint32_t)0x00000080) 11287 #define ETH_DMABMR_DSL ((uint32_t)0x0000007C) 11288 #define ETH_DMABMR_DA ((uint32_t)0x00000002) 11289 #define ETH_DMABMR_SR ((uint32_t)0x00000001) 11292 #define ETH_DMATPDR_TPD ((uint32_t)0xFFFFFFFF) 11295 #define ETH_DMARPDR_RPD ((uint32_t)0xFFFFFFFF) 11298 #define ETH_DMARDLAR_SRL ((uint32_t)0xFFFFFFFF) 11301 #define ETH_DMATDLAR_STL ((uint32_t)0xFFFFFFFF) 11304 #define ETH_DMASR_TSTS ((uint32_t)0x20000000) 11305 #define ETH_DMASR_PMTS ((uint32_t)0x10000000) 11306 #define ETH_DMASR_MMCS ((uint32_t)0x08000000) 11307 #define ETH_DMASR_EBS ((uint32_t)0x03800000) 11309 #define ETH_DMASR_EBS_DescAccess ((uint32_t)0x02000000) 11310 #define ETH_DMASR_EBS_ReadTransf ((uint32_t)0x01000000) 11311 #define ETH_DMASR_EBS_DataTransfTx ((uint32_t)0x00800000) 11312 #define ETH_DMASR_TPS ((uint32_t)0x00700000) 11313 #define ETH_DMASR_TPS_Stopped ((uint32_t)0x00000000) 11314 #define ETH_DMASR_TPS_Fetching ((uint32_t)0x00100000) 11315 #define ETH_DMASR_TPS_Waiting ((uint32_t)0x00200000) 11316 #define ETH_DMASR_TPS_Reading ((uint32_t)0x00300000) 11317 #define ETH_DMASR_TPS_Suspended ((uint32_t)0x00600000) 11318 #define ETH_DMASR_TPS_Closing ((uint32_t)0x00700000) 11319 #define ETH_DMASR_RPS ((uint32_t)0x000E0000) 11320 #define ETH_DMASR_RPS_Stopped ((uint32_t)0x00000000) 11321 #define ETH_DMASR_RPS_Fetching ((uint32_t)0x00020000) 11322 #define ETH_DMASR_RPS_Waiting ((uint32_t)0x00060000) 11323 #define ETH_DMASR_RPS_Suspended ((uint32_t)0x00080000) 11324 #define ETH_DMASR_RPS_Closing ((uint32_t)0x000A0000) 11325 #define ETH_DMASR_RPS_Queuing ((uint32_t)0x000E0000) 11326 #define ETH_DMASR_NIS ((uint32_t)0x00010000) 11327 #define ETH_DMASR_AIS ((uint32_t)0x00008000) 11328 #define ETH_DMASR_ERS ((uint32_t)0x00004000) 11329 #define ETH_DMASR_FBES ((uint32_t)0x00002000) 11330 #define ETH_DMASR_ETS ((uint32_t)0x00000400) 11331 #define ETH_DMASR_RWTS ((uint32_t)0x00000200) 11332 #define ETH_DMASR_RPSS ((uint32_t)0x00000100) 11333 #define ETH_DMASR_RBUS ((uint32_t)0x00000080) 11334 #define ETH_DMASR_RS ((uint32_t)0x00000040) 11335 #define ETH_DMASR_TUS ((uint32_t)0x00000020) 11336 #define ETH_DMASR_ROS ((uint32_t)0x00000010) 11337 #define ETH_DMASR_TJTS ((uint32_t)0x00000008) 11338 #define ETH_DMASR_TBUS ((uint32_t)0x00000004) 11339 #define ETH_DMASR_TPSS ((uint32_t)0x00000002) 11340 #define ETH_DMASR_TS ((uint32_t)0x00000001) 11343 #define ETH_DMAOMR_DTCEFD ((uint32_t)0x04000000) 11344 #define ETH_DMAOMR_RSF ((uint32_t)0x02000000) 11345 #define ETH_DMAOMR_DFRF ((uint32_t)0x01000000) 11346 #define ETH_DMAOMR_TSF ((uint32_t)0x00200000) 11347 #define ETH_DMAOMR_FTF ((uint32_t)0x00100000) 11348 #define ETH_DMAOMR_TTC ((uint32_t)0x0001C000) 11349 #define ETH_DMAOMR_TTC_64Bytes ((uint32_t)0x00000000) 11350 #define ETH_DMAOMR_TTC_128Bytes ((uint32_t)0x00004000) 11351 #define ETH_DMAOMR_TTC_192Bytes ((uint32_t)0x00008000) 11352 #define ETH_DMAOMR_TTC_256Bytes ((uint32_t)0x0000C000) 11353 #define ETH_DMAOMR_TTC_40Bytes ((uint32_t)0x00010000) 11354 #define ETH_DMAOMR_TTC_32Bytes ((uint32_t)0x00014000) 11355 #define ETH_DMAOMR_TTC_24Bytes ((uint32_t)0x00018000) 11356 #define ETH_DMAOMR_TTC_16Bytes ((uint32_t)0x0001C000) 11357 #define ETH_DMAOMR_ST ((uint32_t)0x00002000) 11358 #define ETH_DMAOMR_FEF ((uint32_t)0x00000080) 11359 #define ETH_DMAOMR_FUGF ((uint32_t)0x00000040) 11360 #define ETH_DMAOMR_RTC ((uint32_t)0x00000018) 11361 #define ETH_DMAOMR_RTC_64Bytes ((uint32_t)0x00000000) 11362 #define ETH_DMAOMR_RTC_32Bytes ((uint32_t)0x00000008) 11363 #define ETH_DMAOMR_RTC_96Bytes ((uint32_t)0x00000010) 11364 #define ETH_DMAOMR_RTC_128Bytes ((uint32_t)0x00000018) 11365 #define ETH_DMAOMR_OSF ((uint32_t)0x00000004) 11366 #define ETH_DMAOMR_SR ((uint32_t)0x00000002) 11369 #define ETH_DMAIER_NISE ((uint32_t)0x00010000) 11370 #define ETH_DMAIER_AISE ((uint32_t)0x00008000) 11371 #define ETH_DMAIER_ERIE ((uint32_t)0x00004000) 11372 #define ETH_DMAIER_FBEIE ((uint32_t)0x00002000) 11373 #define ETH_DMAIER_ETIE ((uint32_t)0x00000400) 11374 #define ETH_DMAIER_RWTIE ((uint32_t)0x00000200) 11375 #define ETH_DMAIER_RPSIE ((uint32_t)0x00000100) 11376 #define ETH_DMAIER_RBUIE ((uint32_t)0x00000080) 11377 #define ETH_DMAIER_RIE ((uint32_t)0x00000040) 11378 #define ETH_DMAIER_TUIE ((uint32_t)0x00000020) 11379 #define ETH_DMAIER_ROIE ((uint32_t)0x00000010) 11380 #define ETH_DMAIER_TJTIE ((uint32_t)0x00000008) 11381 #define ETH_DMAIER_TBUIE ((uint32_t)0x00000004) 11382 #define ETH_DMAIER_TPSIE ((uint32_t)0x00000002) 11383 #define ETH_DMAIER_TIE ((uint32_t)0x00000001) 11386 #define ETH_DMAMFBOCR_OFOC ((uint32_t)0x10000000) 11387 #define ETH_DMAMFBOCR_MFA ((uint32_t)0x0FFE0000) 11388 #define ETH_DMAMFBOCR_OMFC ((uint32_t)0x00010000) 11389 #define ETH_DMAMFBOCR_MFC ((uint32_t)0x0000FFFF) 11392 #define ETH_DMACHTDR_HTDAP ((uint32_t)0xFFFFFFFF) 11395 #define ETH_DMACHRDR_HRDAP ((uint32_t)0xFFFFFFFF) 11398 #define ETH_DMACHTBAR_HTBAP ((uint32_t)0xFFFFFFFF) 11401 #define ETH_DMACHRBAR_HRBAP ((uint32_t)0xFFFFFFFF) 11411 #ifdef USE_STDPERIPH_DRIVER 11419 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 11421 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 11423 #define READ_BIT(REG, BIT) ((REG) & (BIT)) 11425 #define CLEAR_REG(REG) ((REG) = (0x0)) 11427 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 11429 #define READ_REG(REG) ((REG)) 11431 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
Universal Synchronous Asynchronous Receiver Transmitter.
Analog to Digital Converter.
System configuration controller.
enum IRQn IRQn_Type
STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...
Controller Area Network FIFOMailBox.
Flexible Static Memory Controller Bank4.
Digital to Analog Converter.
CMSIS Cortex-M4 Core Peripheral Access Layer Header File.
LCD-TFT Display layer x Controller.
Serial Peripheral Interface.
Flexible Static Memory Controller.
External Interrupt/Event Controller.
Flexible Static Memory Controller Bank2.
Flexible Static Memory Controller Bank3.
Consumer Electronics Control (CEC)
LCD-TFT Display Controller.
Controller Area Network FilterRegister.
Inter-integrated Circuit Interface.
Flexible Static Memory Controller Bank1E.
__IO uint32_t MMCTGFMSCCR
Controller Area Network TxMailBox.