24 #ifndef __STM32F10x_RTC_H 25 #define __STM32F10x_RTC_H 58 #define RTC_IT_OW ((uint16_t)0x0004) 59 #define RTC_IT_ALR ((uint16_t)0x0002) 60 #define RTC_IT_SEC ((uint16_t)0x0001) 61 #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) 62 #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ 72 #define RTC_FLAG_RTOFF ((uint16_t)0x0020) 73 #define RTC_FLAG_RSF ((uint16_t)0x0008) 74 #define RTC_FLAG_OW ((uint16_t)0x0004) 75 #define RTC_FLAG_ALR ((uint16_t)0x0002) 76 #define RTC_FLAG_SEC ((uint16_t)0x0001) 77 #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) 78 #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ 79 ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ 80 ((FLAG) == RTC_FLAG_SEC)) 81 #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) void RTC_ClearFlag(uint16_t RTC_FLAG)
Clears the RTC's pending flags.
void RTC_ClearITPendingBit(uint16_t RTC_IT)
Clears the RTC's interrupt pending bits.
void RTC_ExitConfigMode(void)
Exits from the RTC configuration mode.
void RTC_SetCounter(uint32_t CounterValue)
Sets the RTC counter value.
void RTC_WaitForLastTask(void)
Waits until last write operation on RTC registers has finished.
ITStatus RTC_GetITStatus(uint16_t RTC_IT)
Checks whether the specified RTC interrupt has occurred or not.
FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG)
Checks whether the specified RTC flag is set or not.
uint32_t RTC_GetCounter(void)
Gets the RTC counter value.
void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState)
Enables or disables the specified RTC interrupts.
void RTC_SetAlarm(uint32_t AlarmValue)
Sets the RTC alarm value.
void RTC_EnterConfigMode(void)
Enters the RTC configuration mode.
uint32_t RTC_GetDivider(void)
Gets the RTC divider value.
void RTC_SetPrescaler(uint32_t PrescalerValue)
Sets the RTC prescaler value.
void RTC_WaitForSynchro(void)
Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are synchronized with RTC APB clock...
CMSIS Cortex-M3 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...