ITM Functions

Functions that access the ITM debug interface. More...

Collaboration diagram for ITM Functions:

Variables
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::_reserved0:27
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   xPSR_Type::_reserved0:1
uint32_t   APSR_Type::_reserved0:16
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   xPSR_Type::_reserved0:1
uint32_t   APSR_Type::_reserved0:16
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   APSR_Type::_reserved0:16
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   APSR_Type::_reserved0:16
uint32_t   IPSR_Type::_reserved0:23
uint32_t   APSR_Type::_reserved0:16
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved0:16
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved0:1
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::_reserved0:23
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved0:7
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::_reserved1:8
uint32_t   APSR_Type::_reserved1:7
uint32_t   xPSR_Type::_reserved1:8
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   xPSR_Type::_reserved1:8
uint32_t   APSR_Type::_reserved1:7
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::_reserved1:8
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::_reserved1:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::_reserved1:4
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::_reserved1:28
__IOM uint32_t	SCB_Type::ABFSR
__IOM uint32_t	TPI_Type::ACPR
__IOM uint32_t	SCnSCB_Type::ACTLR
__IM uint32_t	SCB_Type::ADR
__IOM uint32_t	SCB_Type::AFSR
__IOM uint32_t	SCB_Type::AHBPCR
__IOM uint32_t	SCB_Type::AHBSCR
__IOM uint32_t	SCB_Type::AIRCR
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:27
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:8
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:30
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   APSR_Type::_reserved0:16
uint32_t   APSR_Type::_reserved1:7
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::Z:1
}	APSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:1
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   IPSR_Type::_reserved0:23
uint32_t   IPSR_Type::ISR:9
}	IPSR_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   xPSR_Type::_reserved0:7
uint32_t   xPSR_Type::_reserved1:4
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::Z:1
}	xPSR_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved0:29
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
struct {
uint32_t   CONTROL_Type::_reserved1:28
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SPSEL:1
}	CONTROL_Type::b
__IOM uint32_t	SCB_Type::BFAR
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   APSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
uint32_t   xPSR_Type::C:1
__IOM uint32_t	SCB_Type::CACR
__IM uint32_t	SysTick_Type::CALIB
__IOM uint32_t	SCB_Type::CCR
__IM uint32_t	SCB_Type::CCSIDR
__IOM uint32_t	SCB_Type::CFSR
__IM uint32_t	ITM_Type::CID0
__IM uint32_t	ITM_Type::CID1
__IM uint32_t	ITM_Type::CID2
__IM uint32_t	ITM_Type::CID3
__IOM uint32_t	TPI_Type::CLAIMCLR
__IOM uint32_t	TPI_Type::CLAIMSET
__IM uint32_t	SCB_Type::CLIDR
__IOM uint32_t	DWT_Type::COMP0
__IOM uint32_t	DWT_Type::COMP1
__IOM uint32_t	DWT_Type::COMP2
__IOM uint32_t	DWT_Type::COMP3
__IOM uint32_t	SCB_Type::CPACR
__IOM uint32_t	DWT_Type::CPICNT
__IOM uint32_t	SCnSCB_Type::CPPWR
__IM uint32_t	SCB_Type::CPUID
__IOM uint32_t	TPI_Type::CSPSR
__IOM uint32_t	SCB_Type::CSSELR
__IM uint32_t	SCB_Type::CTR
__IOM uint32_t	SysTick_Type::CTRL
__IOM uint32_t	DWT_Type::CTRL
__IOM uint32_t	DWT_Type::CYCCNT
__OM uint32_t	SCB_Type::DCCIMVAC
__OM uint32_t	SCB_Type::DCCISW
__OM uint32_t	SCB_Type::DCCMVAC
__OM uint32_t	SCB_Type::DCCMVAU
__OM uint32_t	SCB_Type::DCCSW
__OM uint32_t	SCB_Type::DCIMVAC
__OM uint32_t	SCB_Type::DCISW
__IOM uint32_t	CoreDebug_Type::DCRDR
__OM uint32_t	CoreDebug_Type::DCRSR
__IOM uint32_t	CoreDebug_Type::DEMCR
__IM uint32_t	ITM_Type::DEVARCH
__IM uint32_t	DWT_Type::DEVARCH
__IM uint32_t	TPI_Type::DEVID
__IM uint32_t	TPI_Type::DEVTYPE
__IM uint32_t	SCB_Type::DFR
__IOM uint32_t	SCB_Type::DFSR
__IOM uint32_t	CoreDebug_Type::DHCSR
__IOM uint32_t	SCB_Type::DTCMCR
__IOM uint32_t	DWT_Type::EXCCNT
__IOM uint32_t	TPI_Type::FFCR
__IM uint32_t	TPI_Type::FFSR
__IM uint32_t	TPI_Type::FIFO0
__IM uint32_t	TPI_Type::FIFO1
__IOM uint32_t	DWT_Type::FOLDCNT
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::FPCA:1
__IOM uint32_t	FPU_Type::FPCAR
__IOM uint32_t	FPU_Type::FPCCR
__IOM uint32_t	FPU_Type::FPDSCR
__IM uint32_t	TPI_Type::FSCR
__IOM uint32_t	DWT_Type::FUNCTION0
__IOM uint32_t	DWT_Type::FUNCTION1
__IOM uint32_t	DWT_Type::FUNCTION2
__IOM uint32_t	DWT_Type::FUNCTION3
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   APSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
uint32_t   xPSR_Type::GE:4
__IOM uint32_t	SCB_Type::HFSR
__IOM uint32_t	NVIC_Type::IABR [8U]
__IOM uint32_t	NVIC_Type::ICER [8U]
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_1:6
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
uint32_t   xPSR_Type::ICI_IT_2:2
__OM uint32_t	SCB_Type::ICIALLU
__OM uint32_t	SCB_Type::ICIMVAU
__IOM uint32_t	NVIC_Type::ICPR [8U]
__IOM uint32_t	SCB_Type::ICSR
__IM uint32_t	SCnSCB_Type::ICTR
__IM uint32_t	SCB_Type::ID_ADR
__IM uint32_t	SCB_Type::ID_AFR
__IM uint32_t	SCB_Type::ID_DFR
__IM uint32_t	SCB_Type::ID_ISAR [5U]
__IM uint32_t	SCB_Type::ID_MFR [4U]
__IM uint32_t	SCB_Type::ID_MMFR [4U]
__IM uint32_t	SCB_Type::ID_PFR [2U]
__IOM uint32_t	ITM_Type::IMCR
__IOM uint8_t	NVIC_Type::IP [240U]
__IOM uint8_t	NVIC_Type::IPR [496U]
__IM uint32_t	ITM_Type::IRR
__IM uint32_t	SCB_Type::ISAR [5U]
__IOM uint32_t	NVIC_Type::ISER [8U]
__IOM uint32_t	NVIC_Type::ISPR [8U]
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   IPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::ISR:9
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
uint32_t   xPSR_Type::IT:2
__IM uint32_t	TPI_Type::ITATBCTR0
__IM uint32_t	TPI_Type::ITATBCTR2
__IOM uint32_t	SCB_Type::ITCMCR
__IOM uint32_t	TPI_Type::ITCTRL
__OM uint32_t	ITM_Type::IWR
__OM uint32_t	ITM_Type::LAR
__OM uint32_t	DWT_Type::LAR
__IOM uint32_t	SysTick_Type::LOAD
__IM uint32_t	ITM_Type::LSR
__IM uint32_t	DWT_Type::LSR
__IOM uint32_t	DWT_Type::LSUCNT
__IOM uint32_t	DWT_Type::MASK0
__IOM uint32_t	DWT_Type::MASK1
__IOM uint32_t	DWT_Type::MASK2
__IOM uint32_t	DWT_Type::MASK3
__IOM uint32_t	SCB_Type::MMFAR
__IM uint32_t	SCB_Type::MMFR [4U]
__IM uint32_t	SCB_Type::MVFR0
__IM uint32_t	FPU_Type::MVFR0
__IM uint32_t	SCB_Type::MVFR1
__IM uint32_t	FPU_Type::MVFR1
__IM uint32_t	SCB_Type::MVFR2
__IM uint32_t	FPU_Type::MVFR2
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   APSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   xPSR_Type::N:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::nPRIV:1
__IOM uint32_t	SCB_Type::NSACR
__IM uint32_t	DWT_Type::PCSR
__IM uint32_t	SCB_Type::PFR [2U]
__IM uint32_t	ITM_Type::PID0
__IM uint32_t	ITM_Type::PID1
__IM uint32_t	ITM_Type::PID2
__IM uint32_t	ITM_Type::PID3
__IM uint32_t	ITM_Type::PID4
__IM uint32_t	ITM_Type::PID5
__IM uint32_t	ITM_Type::PID6
__IM uint32_t	ITM_Type::PID7
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
union {
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
}	ITM_Type::PORT [32U]
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   APSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t   xPSR_Type::Q:1
uint32_t	SCB_Type::RESERVED0 [1U]
uint32_t	SCnSCB_Type::RESERVED0 [1U]
uint32_t	DWT_Type::RESERVED0 [1U]
uint32_t	FPU_Type::RESERVED0 [1U]
uint32_t	NVIC_Type::RESERVED0 [24U]
uint32_t	TPI_Type::RESERVED0 [2U]
uint32_t	ITM_Type::RESERVED0 [864U]
uint32_t	ITM_Type::RESERVED1 [15U]
uint32_t	SCnSCB_Type::RESERVED1 [1U]
uint32_t	DWT_Type::RESERVED1 [1U]
uint32_t	NVIC_Type::RESERVED1 [24U]
uint32_t	TPI_Type::RESERVED1 [55U]
uint32_t	TPI_Type::RESERVED2 [131U]
uint32_t	ITM_Type::RESERVED2 [15U]
uint32_t	DWT_Type::RESERVED2 [1U]
uint32_t	NVIC_Type::RESERVED2 [24U]
uint32_t	NVIC_Type::RESERVED3 [24U]
uint32_t	ITM_Type::RESERVED3 [32U]
uint32_t	TPI_Type::RESERVED3 [759U]
uint32_t	SCB_Type::RESERVED3 [93U]
uint32_t	DWT_Type::RESERVED3 [981U]
uint32_t	DWT_Type::RESERVED32 [934U]
uint32_t	DWT_Type::RESERVED33 [1U]
uint32_t	SCB_Type::RESERVED4 [15U]
uint32_t	TPI_Type::RESERVED4 [1U]
uint32_t	ITM_Type::RESERVED4 [43U]
uint32_t	NVIC_Type::RESERVED4 [56U]
uint32_t	SCB_Type::RESERVED5 [1U]
uint32_t	TPI_Type::RESERVED5 [39U]
uint32_t	NVIC_Type::RESERVED5 [644U]
uint32_t	ITM_Type::RESERVED5 [6U]
uint32_t	SCB_Type::RESERVED6 [1U]
uint32_t	ITM_Type::RESERVED6 [4U]
uint32_t	NVIC_Type::RESERVED6 [580U]
uint32_t	SCB_Type::RESERVED7 [6U]
uint32_t	TPI_Type::RESERVED7 [8U]
uint32_t	SCB_Type::RESERVED8 [1U]
__IOM uint32_t	SCB_Type::SCR
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::SFPA:1
__IOM uint32_t	SCB_Type::SHCSR
__IOM uint8_t	SCB_Type::SHP [12U]
__IOM uint8_t	SCB_Type::SHPR [12U]
__IOM uint32_t	DWT_Type::SLEEPCNT
__IOM uint32_t	TPI_Type::SPPR
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::SPSEL:1
__IM uint32_t	TPI_Type::SSPSR
__OM uint32_t	NVIC_Type::STIR
__OM uint32_t	SCB_Type::STIR
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
uint32_t   xPSR_Type::T:1
__IOM uint32_t	ITM_Type::TCR
__IOM uint32_t	ITM_Type::TER
__IOM uint32_t	ITM_Type::TPR
__IM uint32_t	TPI_Type::TRIGGER
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint16_t   ITM_Type::u16
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint32_t   ITM_Type::u32
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
__OM uint8_t   ITM_Type::u8
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   APSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
uint32_t   xPSR_Type::V:1
__IOM uint32_t	SysTick_Type::VAL
__IOM uint32_t	SCB_Type::VTOR
uint32_t	APSR_Type::w
uint32_t	IPSR_Type::w
uint32_t	xPSR_Type::w
uint32_t	CONTROL_Type::w
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   APSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
uint32_t   xPSR_Type::Z:1
volatile int32_t	ITM_RxBuffer
__STATIC_INLINE uint32_t	ITM_SendChar (uint32_t ch)
	ITM Send Character. More...
__STATIC_INLINE int32_t	ITM_ReceiveChar (void)
	ITM Receive Character. More...
__STATIC_INLINE int32_t	ITM_CheckChar (void)
	ITM Check Character. More...
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)
volatile int32_t	ITM_RxBuffer
#define	ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Detailed Description

Functions that access the ITM debug interface.

Macro Definition Documentation

ITM_RXBUFFER_EMPTY [1/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1836 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

ITM_RXBUFFER_EMPTY [2/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1839 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

ITM_RXBUFFER_EMPTY [3/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1839 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

ITM_RXBUFFER_EMPTY [4/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1839 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

ITM_RXBUFFER_EMPTY [5/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1861 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

ITM_RXBUFFER_EMPTY [6/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1865 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

ITM_RXBUFFER_EMPTY [7/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1865 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

ITM_RXBUFFER_EMPTY [8/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 1865 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ITM_RXBUFFER_EMPTY [9/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2048 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [10/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2053 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [11/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2053 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [12/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2053 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [13/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2053 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [14/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2053 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

ITM_RXBUFFER_EMPTY [15/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2595 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

ITM_RXBUFFER_EMPTY [16/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2595 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

ITM_RXBUFFER_EMPTY [17/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2595 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

ITM_RXBUFFER_EMPTY [18/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2595 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

ITM_RXBUFFER_EMPTY [19/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2649 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

ITM_RXBUFFER_EMPTY [20/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2649 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITM_RXBUFFER_EMPTY [21/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2759 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

ITM_RXBUFFER_EMPTY [22/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2834 of file core_cm35p.h.

ITM_RXBUFFER_EMPTY [23/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2834 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

ITM_RXBUFFER_EMPTY [24/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2851 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ITM_RXBUFFER_EMPTY [25/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2851 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ITM_RXBUFFER_EMPTY [26/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2851 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ITM_RXBUFFER_EMPTY [27/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2892 of file core_armv81mml.h.

ITM_RXBUFFER_EMPTY [28/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2926 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

ITM_RXBUFFER_EMPTY [29/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2926 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

ITM_RXBUFFER_EMPTY [30/30]

#define ITM_RXBUFFER_EMPTY   ((int32_t)0x5AA55AA5U)

Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2926 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

Function Documentation

ITM_CheckChar()

__STATIC_INLINE int32_t ITM_CheckChar

(

void

)

ITM Check Character.

Checks whether a character is pending for reading in the variable ITM_RxBuffer.

Returns

0 No character available.

1 Character available.

Definition at line 2701 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITM_ReceiveChar()

__STATIC_INLINE int32_t ITM_ReceiveChar

(

void

)

ITM Receive Character.

Inputs a character via the external variable ITM_RxBuffer.

Returns

Received character.

-1 No character pending.

Definition at line 2681 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITM_SendChar()

__STATIC_INLINE uint32_t ITM_SendChar

(

uint32_t

ch

)

ITM Send Character.

Transmits a character via the ITM channel 0, and

• Just returns when no debugger is connected that has booked the output.
• Is blocking when a debugger is connected, but the previous character sent has not been transmitted.

  Parameters

  [in]

  ch

  Character to transmit.

  Returns

  Character to transmit.

Definition at line 2660 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Variable Documentation

_reserved0 [1/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [2/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [3/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [4/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [5/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [6/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [7/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [8/106]

uint32_t { ... } ::_reserved0

bit: 0..26 Reserved

Definition at line 210 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [9/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [10/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [11/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [12/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [13/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [14/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [15/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [16/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [17/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [18/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [19/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [20/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [21/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [22/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [23/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [24/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [25/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [26/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 263 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [27/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [28/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved0 [29/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [30/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 263 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

_reserved0 [31/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [32/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [33/106]

uint32_t APSR_Type::_reserved0

bit: 0..15 Reserved

bit: 0..27 Reserved

bit: 0..26 Reserved

Definition at line 278 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [34/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [35/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [36/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [37/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 278 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [38/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [39/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [40/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [41/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [42/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [43/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 303 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [44/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [45/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [46/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [47/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [48/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [49/106]

uint32_t IPSR_Type::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [50/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [51/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [52/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [53/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [54/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [55/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 318 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [56/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [57/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [58/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [59/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 318 of file core_cm35p.h.

_reserved0 [60/106]

uint32_t { ... } ::_reserved0

bit: 0..15 Reserved

Definition at line 319 of file core_armv81mml.h.

_reserved0 [61/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [62/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [63/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [64/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [65/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [66/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 321 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [67/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [68/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [69/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [70/106]

uint32_t xPSR_Type::_reserved0

bit: 9 Reserved

bit: 9..23 Reserved

bit: 9..15 Reserved

Definition at line 336 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [71/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [72/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [73/106]

uint32_t { ... } ::_reserved0

bit: 9 Reserved

Definition at line 336 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [74/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [75/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file core_cm35p.h.

_reserved0 [76/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [77/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [78/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [79/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [80/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [81/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [82/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 358 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [83/106]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 359 of file core_armv81mml.h.

_reserved0 [84/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file core_cm35p.h.

_reserved0 [85/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [86/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [87/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [88/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [89/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [90/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [91/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved0 [92/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 376 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved0 [93/106]

uint32_t { ... } ::_reserved0

bit: 9..15 Reserved

Definition at line 377 of file core_armv81mml.h.

_reserved0 [94/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [95/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [96/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [97/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [98/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [99/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 378 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved0 [100/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [101/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [102/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [103/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [104/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved0 [105/106]

uint32_t { ... } ::_reserved0

bit: 3..31 Reserved

Definition at line 393 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved0 [106/106]

uint32_t CONTROL_Type::_reserved0

bit: 3..31 Reserved

bit: 0 Reserved

Definition at line 393 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved1 [1/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [2/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [3/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [4/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [5/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [6/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [7/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [8/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [9/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [10/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 265 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [11/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [12/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [13/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [14/72]

uint32_t { ... } ::_reserved1

bit: 16..23 Reserved

Definition at line 265 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [15/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [16/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [17/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [18/72]

uint32_t APSR_Type::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved1 [19/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [20/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [21/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 280 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved1 [22/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [23/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [24/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [25/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [26/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [27/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

_reserved1 [28/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [29/72]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 315 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

_reserved1 [30/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file core_cm35p.h.

_reserved1 [31/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [32/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [33/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [34/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [35/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [36/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [37/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [38/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 320 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [39/72]

uint32_t { ... } ::_reserved1

bit: 20..26 Reserved

Definition at line 321 of file core_armv81mml.h.

_reserved1 [40/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [41/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [42/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [43/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [44/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [45/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 324 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

_reserved1 [46/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [47/72]

uint32_t xPSR_Type::_reserved1

bit: 20..23 Reserved

bit: 25..27 Reserved

bit: 16..23 Reserved

Definition at line 339 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved1 [48/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

_reserved1 [49/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [50/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [51/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [52/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 339 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

_reserved1 [53/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file core_cm35p.h.

_reserved1 [54/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [55/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [56/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [57/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [58/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [59/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [60/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [61/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 378 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [62/72]

uint32_t { ... } ::_reserved1

bit: 20..23 Reserved

Definition at line 379 of file core_armv81mml.h.

_reserved1 [63/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file core_cm35p.h.

_reserved1 [64/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [65/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [66/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [67/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [68/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [69/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [70/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

_reserved1 [71/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 430 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

_reserved1 [72/72]

uint32_t { ... } ::_reserved1

bit: 4..31 Reserved

Definition at line 431 of file core_armv81mml.h.

ABFSR

__IOM uint32_t SCB_Type::ABFSR

Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register

Definition at line 506 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ACPR

__IOM uint32_t TPI_Type::ACPR

Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register

Definition at line 1274 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ACTLR

__IOM uint32_t SCnSCB_Type::ACTLR

Offset: 0x008 (R/W) Auxiliary Control Register

Definition at line 925 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ADR

__IM uint32_t SCB_Type::ADR

Offset: 0x04C (R/ ) Auxiliary Feature Register

Definition at line 392 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

AFSR

__IOM uint32_t SCB_Type::AFSR

Offset: 0x03C (R/W) Auxiliary Fault Status Register

Definition at line 470 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

AHBPCR

__IOM uint32_t SCB_Type::AHBPCR

Offset: 0x298 (R/W) AHBP Control Register

Definition at line 502 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

AHBSCR

__IOM uint32_t SCB_Type::AHBSCR

Offset: 0x2A0 (R/W) AHB Slave Control Register

Definition at line 504 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

AIRCR

__IOM uint32_t SCB_Type::AIRCR

Offset: 0x00C (R/W) Application Interrupt and Reset Control Register

Definition at line 460 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

b [1/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [2/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [3/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [4/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [5/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [6/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [7/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [8/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [9/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [10/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [11/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [12/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [13/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [14/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [15/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [16/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [17/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [18/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [19/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [20/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [21/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [22/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [23/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [24/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [25/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [26/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [27/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [28/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [29/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [30/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [31/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [32/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [33/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [34/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [35/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [36/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [37/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [38/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [39/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [40/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [41/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [42/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [43/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [44/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [45/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [46/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [47/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [48/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [49/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [50/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [51/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [52/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [53/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [54/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [55/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [56/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [57/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [58/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [59/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [60/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [61/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [62/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [63/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [64/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [65/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [66/120]

struct { ... } APSR_Type::b

Structure used for bit access

b [67/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [68/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [69/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [70/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [71/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [72/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [73/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [74/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [75/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [76/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [77/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [78/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [79/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [80/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [81/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [82/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [83/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [84/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [85/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [86/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [87/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [88/120]

struct { ... } IPSR_Type::b

Structure used for bit access

b [89/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [90/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [91/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [92/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [93/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [94/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [95/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [96/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [97/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [98/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [99/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [100/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [101/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [102/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [103/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [104/120]

struct { ... } xPSR_Type::b

Structure used for bit access

b [105/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [106/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [107/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [108/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [109/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [110/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [111/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [112/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [113/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [114/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [115/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [116/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [117/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [118/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [119/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

b [120/120]

struct { ... } CONTROL_Type::b

Structure used for bit access

BFAR

__IOM uint32_t SCB_Type::BFAR

Offset: 0x038 (R/W) BusFault Address Register

Definition at line 469 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

C [1/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

C [2/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

C [3/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

C [4/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

C [5/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

C [6/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

C [7/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

C [8/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 213 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

C [9/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

C [10/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

C [11/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

C [12/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

C [13/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

C [14/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 268 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

C [15/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

C [16/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

C [17/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

C [18/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

C [19/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

C [20/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

C [21/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

C [22/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 270 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

C [23/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

C [24/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

C [25/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

C [26/62]

uint32_t APSR_Type::C

bit: 29 Carry condition code flag

Definition at line 283 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

C [27/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

C [28/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

C [29/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 283 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

C [30/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

C [31/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file core_cm35p.h.

C [32/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

C [33/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

C [34/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

C [35/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

C [36/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

C [37/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

C [38/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 323 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

C [39/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 324 of file core_armv81mml.h.

C [40/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

C [41/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

C [42/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

C [43/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

C [44/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

C [45/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 329 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

C [46/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

C [47/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

C [48/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

C [49/62]

uint32_t xPSR_Type::C

bit: 29 Carry condition code flag

Definition at line 344 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

C [50/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

C [51/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

C [52/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 344 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

C [53/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file core_cm35p.h.

C [54/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

C [55/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

C [56/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

C [57/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

C [58/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

C [59/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

C [60/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

C [61/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 383 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

C [62/62]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 384 of file core_armv81mml.h.

CACR

__IOM uint32_t SCB_Type::CACR

Offset: 0x29C (R/W) L1 Cache Control Register

Definition at line 503 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CALIB

__IM uint32_t SysTick_Type::CALIB

Offset: 0x00C (R/ ) SysTick Calibration Register

Definition at line 984 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CCR

__IOM uint32_t SCB_Type::CCR

Offset: 0x014 (R/W) Configuration Control Register

Definition at line 462 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CCSIDR

__IM uint32_t SCB_Type::CCSIDR

Offset: 0x080 (R/ ) Cache Size ID Register

Definition at line 479 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CFSR

__IOM uint32_t SCB_Type::CFSR

Offset: 0x028 (R/W) Configurable Fault Status Register

Definition at line 465 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CID0

__IM uint32_t ITM_Type::CID0

Offset: 0xFF0 (R/ ) ITM Component Identification Register #0

Definition at line 1058 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CID1

__IM uint32_t ITM_Type::CID1

Offset: 0xFF4 (R/ ) ITM Component Identification Register #1

Definition at line 1059 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CID2

__IM uint32_t ITM_Type::CID2

Offset: 0xFF8 (R/ ) ITM Component Identification Register #2

Definition at line 1060 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CID3

__IM uint32_t ITM_Type::CID3

Offset: 0xFFC (R/ ) ITM Component Identification Register #3

Definition at line 1061 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CLAIMCLR

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear

Definition at line 1291 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CLAIMSET

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set

Definition at line 1290 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CLIDR

__IM uint32_t SCB_Type::CLIDR

Offset: 0x078 (R/ ) Cache Level ID register

Definition at line 477 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

COMP0

__IOM uint32_t DWT_Type::COMP0

Offset: 0x020 (R/W) Comparator Register 0

Definition at line 1129 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

COMP1

__IOM uint32_t DWT_Type::COMP1

Offset: 0x030 (R/W) Comparator Register 1

Definition at line 1133 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

COMP2

__IOM uint32_t DWT_Type::COMP2

Offset: 0x040 (R/W) Comparator Register 2

Definition at line 1137 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

COMP3

__IOM uint32_t DWT_Type::COMP3

Offset: 0x050 (R/W) Comparator Register 3

Definition at line 1141 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CPACR

__IOM uint32_t SCB_Type::CPACR

Offset: 0x088 (R/W) Coprocessor Access Control Register

Definition at line 481 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CPICNT

__IOM uint32_t DWT_Type::CPICNT

Offset: 0x008 (R/W) CPI Count Register

Definition at line 1123 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CPPWR

__IOM uint32_t SCnSCB_Type::CPPWR

Offset: 0x00C (R/W) Coprocessor Power Control Register

Definition at line 1014 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

CPUID

__IM uint32_t SCB_Type::CPUID

Offset: 0x000 (R/ ) CPUID Base Register

Definition at line 457 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CSPSR

__IOM uint32_t TPI_Type::CSPSR

Offset: 0x004 (R/W) Current Parallel Port Size Register

Offset: 0x004 (R/W) Current Parallel Port Sizes Register

Definition at line 1272 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CSSELR

__IOM uint32_t SCB_Type::CSSELR

Offset: 0x084 (R/W) Cache Size Selection Register

Definition at line 480 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CTR

__IM uint32_t SCB_Type::CTR

Offset: 0x07C (R/ ) Cache Type register

Definition at line 478 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CTRL [1/2]

__IOM uint32_t SysTick_Type::CTRL

Offset: 0x000 (R/W) SysTick Control and Status Register

Definition at line 981 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CTRL [2/2]

__IOM uint32_t DWT_Type::CTRL

Offset: 0x000 (R/W) Control Register

Definition at line 1121 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

CYCCNT

__IOM uint32_t DWT_Type::CYCCNT

Offset: 0x004 (R/W) Cycle Count Register

Definition at line 1122 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCCIMVAC

__OM uint32_t SCB_Type::DCCIMVAC

Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC

Definition at line 497 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCCISW

__OM uint32_t SCB_Type::DCCISW

Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way

Definition at line 498 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCCMVAC

__OM uint32_t SCB_Type::DCCMVAC

Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC

Definition at line 495 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCCMVAU

__OM uint32_t SCB_Type::DCCMVAU

Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU

Definition at line 494 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCCSW

__OM uint32_t SCB_Type::DCCSW

Offset: 0x26C ( /W) D-Cache Clean by Set-way

Definition at line 496 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCIMVAC

__OM uint32_t SCB_Type::DCIMVAC

Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC

Definition at line 492 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCISW

__OM uint32_t SCB_Type::DCISW

Offset: 0x260 ( /W) D-Cache Invalidate by Set-way

Definition at line 493 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCRDR

__IOM uint32_t CoreDebug_Type::DCRDR

Offset: 0x008 (R/W) Debug Core Register Data Register

Definition at line 1643 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DCRSR

__OM uint32_t CoreDebug_Type::DCRSR

Offset: 0x004 ( /W) Debug Core Register Selector Register

Definition at line 1642 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DEMCR

__IOM uint32_t CoreDebug_Type::DEMCR

Offset: 0x00C (R/W) Debug Exception and Monitor Control Register

Definition at line 1644 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DEVARCH [1/2]

__IM uint32_t ITM_Type::DEVARCH

Offset: 0xFBC (R/ ) ITM Device Architecture Register

Definition at line 1108 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

DEVARCH [2/2]

__IM uint32_t DWT_Type::DEVARCH

Offset: 0xFBC (R/ ) Device Architecture Register

Definition at line 1277 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

DEVID

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) TPIU_DEVID

Offset: 0xFC8 (R/ ) Device Configuration Register

Definition at line 1293 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DEVTYPE

__IM uint32_t TPI_Type::DEVTYPE

Offset: 0xFCC (R/ ) TPIU_DEVTYPE

Offset: 0xFCC (R/ ) Device Type Register

Offset: 0xFCC (R/ ) Device Type Identifier Register

Definition at line 1294 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DFR

__IM uint32_t SCB_Type::DFR

Offset: 0x048 (R/ ) Debug Feature Register

Definition at line 391 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

DFSR

__IOM uint32_t SCB_Type::DFSR

Offset: 0x030 (R/W) Debug Fault Status Register

Definition at line 467 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DHCSR

__IOM uint32_t CoreDebug_Type::DHCSR

Offset: 0x000 (R/W) Debug Halting Control and Status Register

Definition at line 1641 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

DTCMCR

__IOM uint32_t SCB_Type::DTCMCR

Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers

Definition at line 501 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

EXCCNT

__IOM uint32_t DWT_Type::EXCCNT

Offset: 0x00C (R/W) Exception Overhead Count Register

Definition at line 1124 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FFCR

__IOM uint32_t TPI_Type::FFCR

Offset: 0x304 (R/W) Formatter and Flush Control Register

Definition at line 1279 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FFSR

__IM uint32_t TPI_Type::FFSR

Offset: 0x300 (R/ ) Formatter and Flush Status Register

Definition at line 1278 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FIFO0

__IM uint32_t TPI_Type::FIFO0

Offset: 0xEEC (R/ ) Integration ETM Data

Definition at line 1283 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FIFO1

__IM uint32_t TPI_Type::FIFO1

Offset: 0xEFC (R/ ) Integration ITM Data

Definition at line 1287 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FOLDCNT

__IOM uint32_t DWT_Type::FOLDCNT

Offset: 0x018 (R/W) Folded-instruction Count Register

Definition at line 1127 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FPCA [1/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

FPCA [2/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

FPCA [3/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

FPCA [4/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

FPCA [5/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

FPCA [6/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 377 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

FPCA [7/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

FPCA [8/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

FPCA [9/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

FPCA [10/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

FPCA [11/23]

uint32_t CONTROL_Type::FPCA

bit: 2 FP extension active flag

bit: 2 Floating-point context active

Definition at line 392 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FPCA [12/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FPCA [13/23]

uint32_t { ... } ::FPCA

bit: 2 FP extension active flag

Definition at line 392 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

FPCA [14/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file core_cm35p.h.

FPCA [15/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

FPCA [16/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

FPCA [17/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

FPCA [18/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

FPCA [19/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

FPCA [20/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

FPCA [21/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

FPCA [22/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 428 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

FPCA [23/23]

uint32_t { ... } ::FPCA

bit: 2 Floating-point context active

Definition at line 429 of file core_armv81mml.h.

FPCAR

__IOM uint32_t FPU_Type::FPCAR

Offset: 0x008 (R/W) Floating-Point Context Address Register

Definition at line 1531 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FPCCR

__IOM uint32_t FPU_Type::FPCCR

Offset: 0x004 (R/W) Floating-Point Context Control Register

Definition at line 1530 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FPDSCR

__IOM uint32_t FPU_Type::FPDSCR

Offset: 0x00C (R/W) Floating-Point Default Status Control Register

Definition at line 1532 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FSCR

__IM uint32_t TPI_Type::FSCR

Offset: 0x308 (R/ ) Formatter Synchronization Counter Register

Definition at line 1280 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FUNCTION0

__IOM uint32_t DWT_Type::FUNCTION0

Offset: 0x028 (R/W) Function Register 0

Definition at line 1131 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FUNCTION1

__IOM uint32_t DWT_Type::FUNCTION1

Offset: 0x038 (R/W) Function Register 1

Definition at line 1135 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FUNCTION2

__IOM uint32_t DWT_Type::FUNCTION2

Offset: 0x048 (R/W) Function Register 2

Definition at line 1139 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

FUNCTION3

__IOM uint32_t DWT_Type::FUNCTION3

Offset: 0x058 (R/W) Function Register 3

Definition at line 1143 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

GE [1/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

GE [2/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [3/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

GE [4/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [5/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

GE [6/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 264 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [7/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

GE [8/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

GE [9/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

GE [10/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

GE [11/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

GE [12/46]

uint32_t APSR_Type::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

GE [13/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 279 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

GE [14/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

GE [15/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file core_cm35p.h.

GE [16/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

GE [17/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

GE [18/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

GE [19/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

GE [20/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

GE [21/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

GE [22/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 319 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

GE [23/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 320 of file core_armv81mml.h.

GE [24/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

GE [25/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

GE [26/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [27/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

GE [28/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [29/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 323 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

GE [30/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

GE [31/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

GE [32/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

GE [33/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

GE [34/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

GE [35/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

GE [36/46]

uint32_t xPSR_Type::GE

bit: 16..19 Greater than or Equal flags

Definition at line 338 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

GE [37/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file core_cm35p.h.

GE [38/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

GE [39/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

GE [40/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

GE [41/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

GE [42/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

GE [43/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

GE [44/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

GE [45/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 377 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

GE [46/46]

uint32_t { ... } ::GE

bit: 16..19 Greater than or Equal flags

Definition at line 378 of file core_armv81mml.h.

HFSR

__IOM uint32_t SCB_Type::HFSR

Offset: 0x02C (R/W) HardFault Status Register

Definition at line 466 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

IABR

__IOM uint32_t NVIC_Type::IABR

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 431 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICER

__IOM uint32_t NVIC_Type::ICER

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 425 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICI_IT_1 [1/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_1 [2/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_1 [3/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_1 [4/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_1 [5/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_1 [6/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_1 [7/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_1 [8/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 264 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_1 [9/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [10/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [11/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [12/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [13/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [14/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 322 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_1 [15/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_1 [16/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_1 [17/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_1 [18/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_1 [19/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_1 [20/21]

uint32_t xPSR_Type::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICI_IT_1 [21/21]

uint32_t { ... } ::ICI_IT_1

bit: 10..15 ICI/IT part 1

Definition at line 337 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICI_IT_2 [1/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_2 [2/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_2 [3/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_2 [4/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_2 [5/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_2 [6/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

ICI_IT_2 [7/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_2 [8/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 267 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

ICI_IT_2 [9/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [10/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [11/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [12/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [13/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [14/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 326 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

ICI_IT_2 [15/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_2 [16/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_2 [17/21]

uint32_t xPSR_Type::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICI_IT_2 [18/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_2 [19/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICI_IT_2 [20/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

ICI_IT_2 [21/21]

uint32_t { ... } ::ICI_IT_2

bit: 25..26 ICI/IT part 2

Definition at line 341 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

ICIALLU

__OM uint32_t SCB_Type::ICIALLU

Offset: 0x250 ( /W) I-Cache Invalidate All to PoU

Definition at line 489 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICIMVAU

__OM uint32_t SCB_Type::ICIMVAU

Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU

Definition at line 491 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICPR

__IOM uint32_t NVIC_Type::ICPR

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 429 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICSR

__IOM uint32_t SCB_Type::ICSR

Offset: 0x004 (R/W) Interrupt Control and State Register

Definition at line 458 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ICTR

__IM uint32_t SCnSCB_Type::ICTR

Offset: 0x004 (R/ ) Interrupt Controller Type Register

Definition at line 924 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ID_ADR

__IM uint32_t SCB_Type::ID_ADR

Offset: 0x04C (R/ ) Auxiliary Feature Register

Definition at line 515 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ID_AFR

__IM uint32_t SCB_Type::ID_AFR

Offset: 0x04C (R/ ) Auxiliary Feature Register

Definition at line 473 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ID_DFR

__IM uint32_t SCB_Type::ID_DFR

Offset: 0x048 (R/ ) Debug Feature Register

Definition at line 472 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ID_ISAR

__IM uint32_t SCB_Type::ID_ISAR

Offset: 0x060 (R/ ) Instruction Set Attributes Register

Definition at line 475 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ID_MFR

__IM uint32_t SCB_Type::ID_MFR

Offset: 0x050 (R/ ) Memory Model Feature Register

Definition at line 474 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ID_MMFR

__IM uint32_t SCB_Type::ID_MMFR

Offset: 0x050 (R/ ) Memory Model Feature Register

Definition at line 516 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ID_PFR

__IM uint32_t SCB_Type::ID_PFR

Offset: 0x040 (R/ ) Processor Feature Register

Definition at line 471 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

IMCR

__IOM uint32_t ITM_Type::IMCR

Offset: 0xF00 (R/W) ITM Integration Mode Control Register

Definition at line 1103 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

IP

__IOM uint8_t NVIC_Type::IP

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Offset: 0x300 (R/W) Interrupt Priority Register

Definition at line 433 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

IPR

__IOM uint8_t NVIC_Type::IPR[496U]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 475 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

IRR

__IM uint32_t ITM_Type::IRR

Offset: 0xEFC (R/ ) ITM Integration Read Register

Definition at line 1102 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ISAR

__IM uint32_t SCB_Type::ISAR

Offset: 0x060 (R/ ) Instruction Set Attributes Register

Definition at line 394 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ISER

__IOM uint32_t NVIC_Type::ISER

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 423 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISPR

__IOM uint32_t NVIC_Type::ISPR

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 427 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISR [1/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

ISR [2/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ISR [3/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

ISR [4/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

ISR [5/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

ISR [6/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

ISR [7/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

ISR [8/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 244 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

ISR [9/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

ISR [10/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

ISR [11/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

ISR [12/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

ISR [13/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

ISR [14/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

ISR [15/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

ISR [16/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 262 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

ISR [17/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

ISR [18/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [19/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

ISR [20/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [21/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

ISR [22/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 302 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [23/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

ISR [24/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

ISR [25/62]

uint32_t IPSR_Type::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISR [26/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISR [27/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

ISR [28/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

ISR [29/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 317 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

ISR [30/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

ISR [31/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [32/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [33/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

ISR [34/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

ISR [35/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 320 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

ISR [36/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

ISR [37/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

ISR [38/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

ISR [39/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

ISR [40/62]

uint32_t xPSR_Type::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISR [41/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

ISR [42/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 335 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ISR [43/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file core_cm35p.h.

ISR [44/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

ISR [45/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [46/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

ISR [47/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [48/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [49/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [50/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

ISR [51/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 357 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

ISR [52/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 358 of file core_armv81mml.h.

ISR [53/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

ISR [54/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file core_cm35p.h.

ISR [55/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

ISR [56/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

ISR [57/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [58/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

ISR [59/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [60/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [61/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 375 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

ISR [62/62]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 376 of file core_armv81mml.h.

IT [1/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file core_cm35p.h.

IT [2/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

IT [3/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

IT [4/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

IT [5/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

IT [6/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

IT [7/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

IT [8/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

IT [9/11]

uint32_t xPSR_Type::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

IT [10/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 380 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

IT [11/11]

uint32_t { ... } ::IT

bit: 25..26 saved IT state (read 0)

Definition at line 381 of file core_armv81mml.h.

ITATBCTR0

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) ITATBCTR0

Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0

Definition at line 1286 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITATBCTR2

__IM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/ ) ITATBCTR2

Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2

Definition at line 1284 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITCMCR

__IOM uint32_t SCB_Type::ITCMCR

Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register

Definition at line 500 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITCTRL

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control

Definition at line 1288 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

ITM_RxBuffer [1/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [2/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [3/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [4/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [5/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [6/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [7/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [8/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [9/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [10/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [11/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [12/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [13/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [14/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [15/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [16/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [17/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [18/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [19/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [20/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [21/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [22/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [23/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [24/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [25/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [26/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [27/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [28/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [29/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

ITM_RxBuffer [30/30]

volatile int32_t ITM_RxBuffer

External variable to receive characters.

IWR

__OM uint32_t ITM_Type::IWR

Offset: 0xEF8 ( /W) ITM Integration Write Register

Definition at line 1101 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

LAR [1/2]

__OM uint32_t ITM_Type::LAR

Offset: 0xFB0 ( /W) ITM Lock Access Register

Definition at line 1047 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

LAR [2/2]

__OM uint32_t DWT_Type::LAR

Offset: 0xFB0 ( W) Lock Access Register

Definition at line 1145 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

LOAD

__IOM uint32_t SysTick_Type::LOAD

Offset: 0x004 (R/W) SysTick Reload Value Register

Definition at line 982 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

LSR [1/2]

__IM uint32_t ITM_Type::LSR

Offset: 0xFB4 (R/ ) ITM Lock Status Register

Definition at line 1048 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

LSR [2/2]

__IM uint32_t DWT_Type::LSR

Offset: 0xFB4 (R ) Lock Status Register

Definition at line 1146 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

LSUCNT

__IOM uint32_t DWT_Type::LSUCNT

Offset: 0x014 (R/W) LSU Count Register

Definition at line 1126 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MASK0

__IOM uint32_t DWT_Type::MASK0

Offset: 0x024 (R/W) Mask Register 0

Definition at line 1130 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MASK1

__IOM uint32_t DWT_Type::MASK1

Offset: 0x034 (R/W) Mask Register 1

Definition at line 1134 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MASK2

__IOM uint32_t DWT_Type::MASK2

Offset: 0x044 (R/W) Mask Register 2

Definition at line 1138 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MASK3

__IOM uint32_t DWT_Type::MASK3

Offset: 0x054 (R/W) Mask Register 3

Definition at line 1142 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MMFAR

__IOM uint32_t SCB_Type::MMFAR

Offset: 0x034 (R/W) MemManage Fault Address Register

Definition at line 468 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MMFR

__IM uint32_t SCB_Type::MMFR

Offset: 0x050 (R/ ) Memory Model Feature Register

Definition at line 393 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

MVFR0 [1/2]

__IM uint32_t SCB_Type::MVFR0

Offset: 0x240 (R/ ) Media and VFP Feature Register 0

Definition at line 485 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MVFR0 [2/2]

__IM uint32_t FPU_Type::MVFR0

Offset: 0x010 (R/ ) Media and FP Feature Register 0

Definition at line 1533 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MVFR1 [1/2]

__IM uint32_t SCB_Type::MVFR1

Offset: 0x244 (R/ ) Media and VFP Feature Register 1

Definition at line 486 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MVFR1 [2/2]

__IM uint32_t FPU_Type::MVFR1

Offset: 0x014 (R/ ) Media and FP Feature Register 1

Definition at line 1534 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MVFR2 [1/2]

__IM uint32_t SCB_Type::MVFR2

Offset: 0x248 (R/ ) Media and VFP Feature Register 2

Definition at line 487 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

MVFR2 [2/2]

__IM uint32_t FPU_Type::MVFR2

Offset: 0x018 (R/ ) Media and FP Feature Register 2

Definition at line 1535 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

N [1/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

N [2/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

N [3/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

N [4/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

N [5/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

N [6/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

N [7/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

N [8/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 215 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

N [9/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

N [10/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

N [11/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

N [12/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

N [13/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

N [14/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 270 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

N [15/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

N [16/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

N [17/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

N [18/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

N [19/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

N [20/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

N [21/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

N [22/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 272 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

N [23/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

N [24/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

N [25/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

N [26/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

N [27/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

N [28/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 285 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

N [29/62]

uint32_t APSR_Type::N

bit: 31 Negative condition code flag

Definition at line 285 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

N [30/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

N [31/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

N [32/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

N [33/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

N [34/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

N [35/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

N [36/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

N [37/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file core_cm35p.h.

N [38/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 325 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

N [39/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 326 of file core_armv81mml.h.

N [40/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

N [41/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

N [42/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

N [43/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

N [44/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

N [45/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 331 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

N [46/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

N [47/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

N [48/62]

uint32_t xPSR_Type::N

bit: 31 Negative condition code flag

Definition at line 346 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

N [49/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

N [50/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

N [51/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

N [52/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 346 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

N [53/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file core_cm35p.h.

N [54/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

N [55/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

N [56/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

N [57/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

N [58/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

N [59/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

N [60/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

N [61/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 385 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

N [62/62]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 386 of file core_armv81mml.h.

nPRIV [1/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

nPRIV [2/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

nPRIV [3/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

nPRIV [4/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

nPRIV [5/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

nPRIV [6/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

nPRIV [7/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

nPRIV [8/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 313 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

nPRIV [9/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [10/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [11/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [12/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [13/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [14/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 375 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

nPRIV [15/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

nPRIV [16/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

nPRIV [17/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

nPRIV [18/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

nPRIV [19/31]

uint32_t CONTROL_Type::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

nPRIV [20/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

nPRIV [21/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 390 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

nPRIV [22/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

nPRIV [23/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file core_cm35p.h.

nPRIV [24/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

nPRIV [25/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

nPRIV [26/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

nPRIV [27/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

nPRIV [28/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

nPRIV [29/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

nPRIV [30/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 426 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

nPRIV [31/31]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 427 of file core_armv81mml.h.

NSACR

__IOM uint32_t SCB_Type::NSACR

Offset: 0x08C (R/W) Non-Secure Access Control Register

Definition at line 523 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

PCSR

__IM uint32_t DWT_Type::PCSR

Offset: 0x01C (R/ ) Program Counter Sample Register

Definition at line 1128 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PFR

__IM uint32_t SCB_Type::PFR

Offset: 0x040 (R/ ) Processor Feature Register

Definition at line 390 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

PID0

__IM uint32_t ITM_Type::PID0

Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0

Definition at line 1054 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID1

__IM uint32_t ITM_Type::PID1

Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1

Definition at line 1055 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID2

__IM uint32_t ITM_Type::PID2

Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2

Definition at line 1056 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID3

__IM uint32_t ITM_Type::PID3

Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3

Definition at line 1057 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID4

__IM uint32_t ITM_Type::PID4

Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4

Definition at line 1050 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID5

__IM uint32_t ITM_Type::PID5

Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5

Definition at line 1051 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID6

__IM uint32_t ITM_Type::PID6

Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6

Definition at line 1052 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PID7

__IM uint32_t ITM_Type::PID7

Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7

Definition at line 1053 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

PORT [1/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [2/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [3/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [4/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [5/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [6/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [7/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [8/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [9/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [10/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [11/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [12/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [13/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [14/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [15/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [16/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [17/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [18/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [19/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [20/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [21/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [22/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [23/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [24/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [25/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [26/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [27/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [28/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [29/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

PORT [30/30]

__OM { ... } ITM_Type::PORT[32U]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

Q [1/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

Q [2/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

Q [3/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

Q [4/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

Q [5/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

Q [6/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

Q [7/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

Q [8/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 211 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

Q [9/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

Q [10/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

Q [11/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [12/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

Q [13/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [14/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 266 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [15/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

Q [16/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

Q [17/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

Q [18/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

Q [19/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

Q [20/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

Q [21/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

Q [22/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 268 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

Q [23/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

Q [24/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

Q [25/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Q [26/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

Q [27/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

Q [28/62]

uint32_t APSR_Type::Q

bit: 27 Saturation condition flag

Definition at line 281 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Q [29/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 281 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

Q [30/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file core_cm35p.h.

Q [31/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

Q [32/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

Q [33/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

Q [34/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

Q [35/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

Q [36/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

Q [37/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

Q [38/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 321 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

Q [39/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 322 of file core_armv81mml.h.

Q [40/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

Q [41/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

Q [42/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [43/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

Q [44/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [45/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 327 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

Q [46/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

Q [47/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

Q [48/62]

uint32_t xPSR_Type::Q

bit: 27 Saturation condition flag

Definition at line 342 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Q [49/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Q [50/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

Q [51/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

Q [52/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 342 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

Q [53/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

Q [54/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

Q [55/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

Q [56/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

Q [57/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

Q [58/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

Q [59/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

Q [60/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file core_cm35p.h.

Q [61/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 381 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

Q [62/62]

uint32_t { ... } ::Q

bit: 27 Saturation condition flag

Definition at line 382 of file core_armv81mml.h.

RESERVED0 [1/7]

uint32_t SCB_Type::RESERVED0

Definition at line 476 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [2/7]

uint32_t SCnSCB_Type::RESERVED0

Definition at line 923 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [3/7]

uint32_t DWT_Type::RESERVED0

Definition at line 1132 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [4/7]

uint32_t FPU_Type::RESERVED0

Definition at line 1529 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [5/7]

uint32_t NVIC_Type::RESERVED0

Definition at line 424 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [6/7]

uint32_t TPI_Type::RESERVED0

Definition at line 1273 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED0 [7/7]

uint32_t ITM_Type::RESERVED0

Definition at line 1039 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED1 [1/5]

uint32_t ITM_Type::RESERVED1

Definition at line 1041 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED1 [2/5]

uint32_t SCnSCB_Type::RESERVED1

Definition at line 662 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

RESERVED1 [3/5]

uint32_t DWT_Type::RESERVED1

Definition at line 1136 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED1 [4/5]

uint32_t NVIC_Type::RESERVED1

Definition at line 426 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED1 [5/5]

uint32_t TPI_Type::RESERVED1

Definition at line 1275 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED2 [1/4]

uint32_t TPI_Type::RESERVED2

Definition at line 1277 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED2 [2/4]

uint32_t ITM_Type::RESERVED2

Definition at line 1043 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED2 [3/4]

uint32_t DWT_Type::RESERVED2

Definition at line 1140 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED2 [4/4]

uint32_t NVIC_Type::RESERVED2

Definition at line 428 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED3 [1/5]

uint32_t NVIC_Type::RESERVED3

Definition at line 430 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED3 [2/5]

uint32_t ITM_Type::RESERVED3

Definition at line 1045 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED3 [3/5]

uint32_t TPI_Type::RESERVED3

Definition at line 1281 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED3 [4/5]

uint32_t SCB_Type::RESERVED3

Definition at line 482 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED3 [5/5]

uint32_t DWT_Type::RESERVED3

Definition at line 1144 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED32

uint32_t DWT_Type::RESERVED32

Definition at line 1274 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

RESERVED33

uint32_t DWT_Type::RESERVED33

Definition at line 1276 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

RESERVED4 [1/4]

uint32_t SCB_Type::RESERVED4

Definition at line 484 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED4 [2/4]

uint32_t TPI_Type::RESERVED4

Definition at line 1285 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED4 [3/4]

uint32_t ITM_Type::RESERVED4

Definition at line 1046 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED4 [4/4]

uint32_t NVIC_Type::RESERVED4

Definition at line 432 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED5 [1/4]

uint32_t SCB_Type::RESERVED5

Definition at line 488 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED5 [2/4]

uint32_t TPI_Type::RESERVED5

Definition at line 1289 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED5 [3/4]

uint32_t NVIC_Type::RESERVED5

Definition at line 434 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED5 [4/4]

uint32_t ITM_Type::RESERVED5

Definition at line 1049 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED6 [1/3]

uint32_t SCB_Type::RESERVED6

Definition at line 490 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED6 [2/3]

uint32_t ITM_Type::RESERVED6

Definition at line 1109 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

RESERVED6 [3/3]

uint32_t NVIC_Type::RESERVED6

Definition at line 476 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

RESERVED7 [1/2]

uint32_t SCB_Type::RESERVED7

Definition at line 499 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED7 [2/2]

uint32_t TPI_Type::RESERVED7

Definition at line 1292 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

RESERVED8

uint32_t SCB_Type::RESERVED8

Definition at line 505 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SCR

__IOM uint32_t SCB_Type::SCR

Offset: 0x010 (R/W) System Control Register

Definition at line 461 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SFPA [1/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file core_cm35p.h.

SFPA [2/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

SFPA [3/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

SFPA [4/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

SFPA [5/11]

uint32_t CONTROL_Type::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

SFPA [6/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

SFPA [7/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

SFPA [8/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

SFPA [9/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

SFPA [10/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 429 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

SFPA [11/11]

uint32_t { ... } ::SFPA

bit: 3 Secure floating-point active

Definition at line 430 of file core_armv81mml.h.

SHCSR

__IOM uint32_t SCB_Type::SHCSR

Offset: 0x024 (R/W) System Handler Control and State Register

Definition at line 464 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SHP

__IOM uint8_t SCB_Type::SHP[12U]

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

Definition at line 382 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

SHPR

__IOM uint8_t SCB_Type::SHPR

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED

Definition at line 463 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SLEEPCNT

__IOM uint32_t DWT_Type::SLEEPCNT

Offset: 0x010 (R/W) Sleep Count Register

Definition at line 1125 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SPPR

__IOM uint32_t TPI_Type::SPPR

Offset: 0x0F0 (R/W) Selected Pin Protocol Register

Definition at line 1276 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SPSEL [1/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

SPSEL [2/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

SPSEL [3/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

SPSEL [4/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

SPSEL [5/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

SPSEL [6/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

SPSEL [7/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

SPSEL [8/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 314 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

SPSEL [9/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [10/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [11/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [12/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [13/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [14/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 376 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

SPSEL [15/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

SPSEL [16/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

SPSEL [17/31]

uint32_t CONTROL_Type::SPSEL

bit: 1 Stack to be used

bit: 1 Stack-pointer select

Definition at line 391 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SPSEL [18/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

SPSEL [19/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

SPSEL [20/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

SPSEL [21/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 391 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

SPSEL [22/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file core_cm35p.h.

SPSEL [23/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

SPSEL [24/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

SPSEL [25/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

SPSEL [26/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

SPSEL [27/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

SPSEL [28/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

SPSEL [29/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

SPSEL [30/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 427 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

SPSEL [31/31]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 428 of file core_armv81mml.h.

SSPSR

__IM uint32_t TPI_Type::SSPSR

Offset: 0x000 (R/ ) Supported Parallel Port Size Register

Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register

Definition at line 1271 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

STIR [1/2]

__OM uint32_t NVIC_Type::STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 435 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

STIR [2/2]

__OM uint32_t SCB_Type::STIR

Offset: 0x200 ( /W) Software Triggered Interrupt Register

Definition at line 483 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

T [1/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

T [2/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

T [3/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

T [4/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

T [5/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

T [6/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

T [7/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

T [8/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 266 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

T [9/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

T [10/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

T [11/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

T [12/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

T [13/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

T [14/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 325 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

T [15/31]

uint32_t xPSR_Type::T

bit: 24 Thumb bit

bit: 24 Thumb bit (read 0)

Definition at line 340 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

T [16/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

T [17/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

T [18/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

T [19/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

T [20/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

T [21/31]

uint32_t { ... } ::T

bit: 24 Thumb bit

Definition at line 340 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

T [22/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

T [23/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

T [24/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

T [25/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

T [26/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

T [27/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

T [28/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file core_cm35p.h.

T [29/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

T [30/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 379 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

T [31/31]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 380 of file core_armv81mml.h.

TCR

__IOM uint32_t ITM_Type::TCR

Offset: 0xE80 (R/W) ITM Trace Control Register

Definition at line 1044 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

TER

__IOM uint32_t ITM_Type::TER

Offset: 0xE00 (R/W) ITM Trace Enable Register

Definition at line 1040 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

TPR

__IOM uint32_t ITM_Type::TPR

Offset: 0xE40 (R/W) ITM Trace Privilege Register

Definition at line 1042 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

TRIGGER

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER Register

Offset: 0xEE8 (R/ ) TRIGGER

Definition at line 1282 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u16 [1/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 733 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

u16 [2/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 733 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

u16 [3/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 733 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

u16 [4/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 743 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

u16 [5/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 751 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

u16 [6/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 751 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

u16 [7/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 751 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

u16 [8/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 758 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

u16 [9/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

u16 [10/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

u16 [11/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

u16 [12/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

u16 [13/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

u16 [14/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 816 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

u16 [15/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1011 of file core_cm35p.h.

u16 [16/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1011 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

u16 [17/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1011 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

u16 [18/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1018 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

u16 [19/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1018 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

u16 [20/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1018 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

u16 [21/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1018 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

u16 [22/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1036 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u16 [23/31]

__OM uint16_t ITM_Type::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1036 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u16 [24/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1036 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

u16 [25/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u16 [26/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

u16 [27/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

u16 [28/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u16 [29/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

u16 [30/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1091 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

u16 [31/31]

__OM { ... } ::u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 1092 of file core_armv81mml.h.

u32 [1/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 734 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

u32 [2/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 734 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

u32 [3/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 734 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

u32 [4/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 744 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

u32 [5/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 752 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

u32 [6/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 752 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

u32 [7/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 752 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

u32 [8/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 759 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

u32 [9/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

u32 [10/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

u32 [11/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

u32 [12/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

u32 [13/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

u32 [14/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 817 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

u32 [15/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1012 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

u32 [16/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1012 of file core_cm35p.h.

u32 [17/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1012 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

u32 [18/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1019 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

u32 [19/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1019 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

u32 [20/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1019 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

u32 [21/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1019 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

u32 [22/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1037 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

u32 [23/31]

__OM uint32_t ITM_Type::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1037 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u32 [24/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1037 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u32 [25/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

u32 [26/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u32 [27/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

u32 [28/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

u32 [29/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

u32 [30/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1092 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u32 [31/31]

__OM { ... } ::u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 1093 of file core_armv81mml.h.

u8 [1/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 732 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

u8 [2/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 732 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

u8 [3/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 732 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

u8 [4/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 742 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

u8 [5/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 750 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

u8 [6/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 750 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

u8 [7/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 750 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

u8 [8/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 757 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

u8 [9/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

u8 [10/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

u8 [11/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

u8 [12/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

u8 [13/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

u8 [14/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 815 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

u8 [15/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1010 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

u8 [16/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1010 of file core_cm35p.h.

u8 [17/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1010 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

u8 [18/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1017 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

u8 [19/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1017 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

u8 [20/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1017 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

u8 [21/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1017 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

u8 [22/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1035 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

u8 [23/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1035 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u8 [24/31]

__OM uint8_t ITM_Type::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1035 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

u8 [25/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

u8 [26/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

u8 [27/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

u8 [28/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

u8 [29/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u8 [30/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1090 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

u8 [31/31]

__OM { ... } ::u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 1091 of file core_armv81mml.h.

V [1/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

V [2/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

V [3/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

V [4/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

V [5/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

V [6/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

V [7/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

V [8/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 212 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

V [9/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

V [10/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

V [11/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

V [12/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

V [13/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

V [14/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 267 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

V [15/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

V [16/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

V [17/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

V [18/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

V [19/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

V [20/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

V [21/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

V [22/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 269 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

V [23/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

V [24/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

V [25/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

V [26/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

V [27/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

V [28/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 282 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

V [29/62]

uint32_t APSR_Type::V

bit: 28 Overflow condition code flag

Definition at line 282 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

V [30/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

V [31/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

V [32/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

V [33/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file core_cm35p.h.

V [34/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

V [35/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

V [36/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

V [37/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

V [38/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 322 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

V [39/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 323 of file core_armv81mml.h.

V [40/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

V [41/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

V [42/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

V [43/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

V [44/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

V [45/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 328 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

V [46/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

V [47/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

V [48/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

V [49/62]

uint32_t xPSR_Type::V

bit: 28 Overflow condition code flag

Definition at line 343 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

V [50/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

V [51/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

V [52/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 343 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

V [53/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

V [54/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

V [55/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

V [56/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

V [57/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

V [58/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

V [59/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

V [60/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

V [61/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 382 of file core_cm35p.h.

V [62/62]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 383 of file core_armv81mml.h.

VAL

__IOM uint32_t SysTick_Type::VAL

Offset: 0x008 (R/W) SysTick Current Value Register

Definition at line 983 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

VTOR

__IOM uint32_t SCB_Type::VTOR

Offset: 0x008 (R/W) Vector Table Offset Register

Definition at line 459 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

w [1/4]

uint32_t APSR_Type::w

Type used for word access

Definition at line 287 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

w [2/4]

uint32_t IPSR_Type::w

Type used for word access

Definition at line 320 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

w [3/4]

uint32_t xPSR_Type::w

Type used for word access

Definition at line 348 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

w [4/4]

uint32_t CONTROL_Type::w

Type used for word access

Definition at line 395 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Z [1/62]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

Z [2/62]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

Z [3/62]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

Z [4/62]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 214 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 269 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm3.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 271 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_sc300.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

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uint32_t APSR_Type::Z

bit: 30 Zero condition code flag

Definition at line 284 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 284 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file core_cm35p.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 324 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 325 of file core_armv81mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 330 of file stm32f469/stm32f469i-disco/Drivers/CMSIS/Include/core_cm4.h.

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uint32_t xPSR_Type::Z

bit: 30 Zero condition code flag

Definition at line 345 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file stm32h747/stm32h747i-disco/CM7/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 345 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm7.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f411/stm32f411e-disco/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f769/stm32f769i-disco/Drivers/CMSIS/Include/core_armv8mml.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm33.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 384 of file core_cm35p.h.

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uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 385 of file core_armv81mml.h.