Modules

Functions that configure Instruction and Data cache. More...

Collaboration diagram for Cache Functions:

Modules

 SysTick Functions
 Functions that configure the System.
 
__STATIC_FORCEINLINE void SCB_EnableICache (void)
 Enable I-Cache. More...
 
__STATIC_FORCEINLINE void SCB_DisableICache (void)
 Disable I-Cache. More...
 
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
 Invalidate I-Cache. More...
 
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
 I-Cache Invalidate by address. More...
 
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
 Enable D-Cache. More...
 
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
 Disable D-Cache. More...
 
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
 Invalidate D-Cache. More...
 
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
 Clean D-Cache. More...
 
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
 Clean & Invalidate D-Cache. More...
 
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
 D-Cache Invalidate by address. More...
 
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Clean by address. More...
 
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Clean and Invalidate by address. More...
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 
#define __SCB_DCACHE_LINE_SIZE   32U
 
#define __SCB_ICACHE_LINE_SIZE   32U
 
__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Invalidate by address. More...
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 
#define __SCB_DCACHE_LINE_SIZE   32U
 
#define __SCB_ICACHE_LINE_SIZE   32U
 
#define CCSIDR_WAYS(x)   (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 
#define CCSIDR_SETS(x)   (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
 

Detailed Description

Functions that configure Instruction and Data cache.

Macro Definition Documentation

◆ __SCB_DCACHE_LINE_SIZE [1/2]

#define __SCB_DCACHE_LINE_SIZE   32U

Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR

Definition at line 2234 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ __SCB_DCACHE_LINE_SIZE [2/2]

#define __SCB_DCACHE_LINE_SIZE   32U

Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR

Definition at line 2234 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

◆ __SCB_ICACHE_LINE_SIZE [1/2]

#define __SCB_ICACHE_LINE_SIZE   32U

Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR

Definition at line 2235 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ __SCB_ICACHE_LINE_SIZE [2/2]

#define __SCB_ICACHE_LINE_SIZE   32U

Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR

Definition at line 2235 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/core_cm7.h.

◆ CCSIDR_SETS [1/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

◆ CCSIDR_SETS [2/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

◆ CCSIDR_SETS [3/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

◆ CCSIDR_SETS [4/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

◆ CCSIDR_SETS [5/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

Definition at line 2232 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ CCSIDR_SETS [6/6]

#define CCSIDR_SETS (   x)    (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )

◆ CCSIDR_WAYS [1/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

◆ CCSIDR_WAYS [2/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

◆ CCSIDR_WAYS [3/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

◆ CCSIDR_WAYS [4/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

◆ CCSIDR_WAYS [5/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

◆ CCSIDR_WAYS [6/6]

#define CCSIDR_WAYS (   x)    (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)

Definition at line 2231 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

Function Documentation

◆ SCB_CleanDCache()

__STATIC_INLINE void SCB_CleanDCache ( void  )

Clean D-Cache.

Cleans D-Cache

Definition at line 2438 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_CleanDCache_by_Addr()

__STATIC_INLINE void SCB_CleanDCache_by_Addr ( uint32_t *  addr,
int32_t  dsize 
)

D-Cache Clean by address.

Cleans D-Cache for the given address D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity. D-Cache memory blocks which are part of given address + given size are cleaned.

Parameters
[in]addraddress
[in]dsizesize of memory block (in number of bytes)

Cleans D-Cache for the given address

Parameters
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)

Definition at line 2542 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_CleanInvalidateDCache()

__STATIC_INLINE void SCB_CleanInvalidateDCache ( void  )

Clean & Invalidate D-Cache.

Cleans and Invalidates D-Cache

Definition at line 2473 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_CleanInvalidateDCache_by_Addr()

__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr ( uint32_t *  addr,
int32_t  dsize 
)

D-Cache Clean and Invalidate by address.

Cleans and invalidates D_Cache for the given address D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity. D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.

Parameters
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)

Cleans and invalidates D_Cache for the given address

Parameters
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)

Definition at line 2572 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_DisableDCache()

__STATIC_INLINE void SCB_DisableDCache ( void  )

Disable D-Cache.

Turns off D-Cache

Definition at line 2365 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_DisableICache()

__STATIC_INLINE void SCB_DisableICache ( void  )

Disable I-Cache.

Turns off I-Cache

Definition at line 2262 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_EnableDCache()

__STATIC_INLINE void SCB_EnableDCache ( void  )

Enable D-Cache.

Turns on D-Cache

Definition at line 2325 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_EnableICache()

__STATIC_INLINE void SCB_EnableICache ( void  )

Enable I-Cache.

Turns on I-Cache

Definition at line 2241 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_InvalidateDCache()

__STATIC_INLINE void SCB_InvalidateDCache ( void  )

Invalidate D-Cache.

Invalidates D-Cache

Definition at line 2403 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_InvalidateDCache_by_Addr() [1/2]

__STATIC_INLINE void SCB_InvalidateDCache_by_Addr ( uint32_t *  addr,
int32_t  dsize 
)

D-Cache Invalidate by address.

Invalidates D-Cache for the given address

Parameters
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)

Definition at line 2464 of file stm32f407/stm32f407g-disc1/Drivers/CMSIS/Include/core_cm7.h.

◆ SCB_InvalidateDCache_by_Addr() [2/2]

__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr ( void *  addr,
int32_t  dsize 
)

D-Cache Invalidate by address.

Invalidates D-Cache for the given address. D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. D-Cache memory blocks which are part of given address + given size are invalidated.

Parameters
[in]addraddress
[in]dsizesize of memory block (in number of bytes)

Definition at line 2512 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_InvalidateICache()

__STATIC_INLINE void SCB_InvalidateICache ( void  )

Invalidate I-Cache.

Invalidates I-Cache

Definition at line 2279 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.

◆ SCB_InvalidateICache_by_Addr()

__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr ( void *  addr,
int32_t  isize 
)

I-Cache Invalidate by address.

Invalidates I-Cache for the given address. I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. I-Cache memory blocks which are part of given address + given size are invalidated.

Parameters
[in]addraddress
[in]isizesize of memory block (in number of bytes)

Definition at line 2299 of file imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h.



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autogenerated on Fri Apr 1 2022 02:15:05