stm32f4xx_usart.c
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1 
91 /* Includes ------------------------------------------------------------------*/
92 #include "stm32f4xx_usart.h"
93 #include "stm32f4xx_rcc.h"
94 
104 /* Private typedef -----------------------------------------------------------*/
105 /* Private define ------------------------------------------------------------*/
106 
108 #define CR1_CLEAR_MASK ((uint16_t)(USART_CR1_M | USART_CR1_PCE | \
109  USART_CR1_PS | USART_CR1_TE | \
110  USART_CR1_RE))
111 
113 #define CR2_CLOCK_CLEAR_MASK ((uint16_t)(USART_CR2_CLKEN | USART_CR2_CPOL | \
114  USART_CR2_CPHA | USART_CR2_LBCL))
115 
117 #define CR3_CLEAR_MASK ((uint16_t)(USART_CR3_RTSE | USART_CR3_CTSE))
118 
120 #define IT_MASK ((uint16_t)0x001F)
121 
122 /* Private macro -------------------------------------------------------------*/
123 /* Private variables ---------------------------------------------------------*/
124 /* Private function prototypes -----------------------------------------------*/
125 /* Private functions ---------------------------------------------------------*/
126 
188 {
189  /* Check the parameters */
191 
192  if (USARTx == USART1)
193  {
196  }
197  else if (USARTx == USART2)
198  {
201  }
202  else if (USARTx == USART3)
203  {
206  }
207  else if (USARTx == UART4)
208  {
211  }
212  else if (USARTx == UART5)
213  {
216  }
217  else if (USARTx == USART6)
218  {
221  }
222  else if (USARTx == UART7)
223  {
226  }
227  else
228  {
229  if (USARTx == UART8)
230  {
233  }
234  }
235 }
236 
246 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
247 {
248  uint32_t tmpreg = 0x00, apbclock = 0x00;
249  uint32_t integerdivider = 0x00;
250  uint32_t fractionaldivider = 0x00;
251  RCC_ClocksTypeDef RCC_ClocksStatus;
252 
253  /* Check the parameters */
255  assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
257  assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
258  assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
259  assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
261 
262  /* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
264  {
266  }
267 
268 /*---------------------------- USART CR2 Configuration -----------------------*/
269  tmpreg = USARTx->CR2;
270 
271  /* Clear STOP[13:12] bits */
272  tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
273 
274  /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit :
275  Set STOP[13:12] bits according to USART_StopBits value */
276  tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits;
277 
278  /* Write to USART CR2 */
279  USARTx->CR2 = (uint16_t)tmpreg;
280 
281 /*---------------------------- USART CR1 Configuration -----------------------*/
282  tmpreg = USARTx->CR1;
283 
284  /* Clear M, PCE, PS, TE and RE bits */
285  tmpreg &= (uint32_t)~((uint32_t)CR1_CLEAR_MASK);
286 
287  /* Configure the USART Word Length, Parity and mode:
288  Set the M bits according to USART_WordLength value
289  Set PCE and PS bits according to USART_Parity value
290  Set TE and RE bits according to USART_Mode value */
291  tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
292  USART_InitStruct->USART_Mode;
293 
294  /* Write to USART CR1 */
295  USARTx->CR1 = (uint16_t)tmpreg;
296 
297 /*---------------------------- USART CR3 Configuration -----------------------*/
298  tmpreg = USARTx->CR3;
299 
300  /* Clear CTSE and RTSE bits */
301  tmpreg &= (uint32_t)~((uint32_t)CR3_CLEAR_MASK);
302 
303  /* Configure the USART HFC :
304  Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
305  tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
306 
307  /* Write to USART CR3 */
308  USARTx->CR3 = (uint16_t)tmpreg;
309 
310 /*---------------------------- USART BRR Configuration -----------------------*/
311  /* Configure the USART Baud Rate */
312  RCC_GetClocksFreq(&RCC_ClocksStatus);
313 
314  if ((USARTx == USART1) || (USARTx == USART6))
315  {
316  apbclock = RCC_ClocksStatus.PCLK2_Frequency;
317  }
318  else
319  {
320  apbclock = RCC_ClocksStatus.PCLK1_Frequency;
321  }
322 
323  /* Determine the integer part */
324  if ((USARTx->CR1 & USART_CR1_OVER8) != 0)
325  {
326  /* Integer part computing in case Oversampling mode is 8 Samples */
327  integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate)));
328  }
329  else /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
330  {
331  /* Integer part computing in case Oversampling mode is 16 Samples */
332  integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate)));
333  }
334  tmpreg = (integerdivider / 100) << 4;
335 
336  /* Determine the fractional part */
337  fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
338 
339  /* Implement the fractional part in the register */
340  if ((USARTx->CR1 & USART_CR1_OVER8) != 0)
341  {
342  tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
343  }
344  else /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
345  {
346  tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F);
347  }
348 
349  /* Write to USART BRR register */
350  USARTx->BRR = (uint16_t)tmpreg;
351 }
352 
359 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
360 {
361  /* USART_InitStruct members default value */
362  USART_InitStruct->USART_BaudRate = 9600;
363  USART_InitStruct->USART_WordLength = USART_WordLength_8b;
364  USART_InitStruct->USART_StopBits = USART_StopBits_1;
365  USART_InitStruct->USART_Parity = USART_Parity_No ;
366  USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
368 }
369 
379 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
380 {
381  uint32_t tmpreg = 0x00;
382  /* Check the parameters */
384  assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
385  assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
386  assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
387  assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
388 
389 /*---------------------------- USART CR2 Configuration -----------------------*/
390  tmpreg = USARTx->CR2;
391  /* Clear CLKEN, CPOL, CPHA and LBCL bits */
392  tmpreg &= (uint32_t)~((uint32_t)CR2_CLOCK_CLEAR_MASK);
393  /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
394  /* Set CLKEN bit according to USART_Clock value */
395  /* Set CPOL bit according to USART_CPOL value */
396  /* Set CPHA bit according to USART_CPHA value */
397  /* Set LBCL bit according to USART_LastBit value */
398  tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL |
399  USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
400  /* Write to USART CR2 */
401  USARTx->CR2 = (uint16_t)tmpreg;
402 }
403 
410 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
411 {
412  /* USART_ClockInitStruct members default value */
413  USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
414  USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
415  USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
416  USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
417 }
418 
427 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
428 {
429  /* Check the parameters */
432 
433  if (NewState != DISABLE)
434  {
435  /* Enable the selected USART by setting the UE bit in the CR1 register */
436  USARTx->CR1 |= USART_CR1_UE;
437  }
438  else
439  {
440  /* Disable the selected USART by clearing the UE bit in the CR1 register */
441  USARTx->CR1 &= (uint16_t)~((uint16_t)USART_CR1_UE);
442  }
443 }
444 
453 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
454 {
455  /* Check the parameters */
457 
458  /* Clear the USART prescaler */
459  USARTx->GTPR &= USART_GTPR_GT;
460  /* Set the USART prescaler */
461  USARTx->GTPR |= USART_Prescaler;
462 }
463 
475 {
476  /* Check the parameters */
479 
480  if (NewState != DISABLE)
481  {
482  /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */
483  USARTx->CR1 |= USART_CR1_OVER8;
484  }
485  else
486  {
487  /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */
488  USARTx->CR1 &= (uint16_t)~((uint16_t)USART_CR1_OVER8);
489  }
490 }
491 
501 {
502  /* Check the parameters */
505 
506  if (NewState != DISABLE)
507  {
508  /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */
509  USARTx->CR3 |= USART_CR3_ONEBIT;
510  }
511  else
512  {
513  /* Disable the one bit method by clearing the ONEBITE bit in the CR3 register */
514  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT);
515  }
516 }
517 
557 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
558 {
559  /* Check the parameters */
561  assert_param(IS_USART_DATA(Data));
562 
563  /* Transmit Data */
564  USARTx->DR = (Data & (uint16_t)0x01FF);
565 }
566 
574 {
575  /* Check the parameters */
577 
578  /* Receive Data */
579  return (uint16_t)(USARTx->DR & (uint16_t)0x01FF);
580 }
581 
625 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
626 {
627  /* Check the parameters */
629  assert_param(IS_USART_ADDRESS(USART_Address));
630 
631  /* Clear the USART address */
632  USARTx->CR2 &= (uint16_t)~((uint16_t)USART_CR2_ADD);
633  /* Set the USART address node */
634  USARTx->CR2 |= USART_Address;
635 }
636 
646 {
647  /* Check the parameters */
649  assert_param(IS_FUNCTIONAL_STATE(NewState));
650 
651  if (NewState != DISABLE)
652  {
653  /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
654  USARTx->CR1 |= USART_CR1_RWU;
655  }
656  else
657  {
658  /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
659  USARTx->CR1 &= (uint16_t)~((uint16_t)USART_CR1_RWU);
660  }
661 }
672 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp)
673 {
674  /* Check the parameters */
676  assert_param(IS_USART_WAKEUP(USART_WakeUp));
677 
678  USARTx->CR1 &= (uint16_t)~((uint16_t)USART_CR1_WAKE);
679  USARTx->CR1 |= USART_WakeUp;
680 }
681 
741 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength)
742 {
743  /* Check the parameters */
745  assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength));
746 
747  USARTx->CR2 &= (uint16_t)~((uint16_t)USART_CR2_LBDL);
748  USARTx->CR2 |= USART_LINBreakDetectLength;
749 }
750 
760 {
761  /* Check the parameters */
764 
765  if (NewState != DISABLE)
766  {
767  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
768  USARTx->CR2 |= USART_CR2_LINEN;
769  }
770  else
771  {
772  /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */
773  USARTx->CR2 &= (uint16_t)~((uint16_t)USART_CR2_LINEN);
774  }
775 }
776 
784 {
785  /* Check the parameters */
787 
788  /* Send break characters */
789  USARTx->CR1 |= USART_CR1_SBK;
790 }
791 
837 {
838  /* Check the parameters */
841 
842  if (NewState != DISABLE)
843  {
844  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
845  USARTx->CR3 |= USART_CR3_HDSEL;
846  }
847  else
848  {
849  /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
850  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_HDSEL);
851  }
852 }
853 
920 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
921 {
922  /* Check the parameters */
924 
925  /* Clear the USART Guard time */
926  USARTx->GTPR &= USART_GTPR_PSC;
927  /* Set the USART guard time */
928  USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08);
929 }
930 
940 {
941  /* Check the parameters */
944  if (NewState != DISABLE)
945  {
946  /* Enable the SC mode by setting the SCEN bit in the CR3 register */
947  USARTx->CR3 |= USART_CR3_SCEN;
948  }
949  else
950  {
951  /* Disable the SC mode by clearing the SCEN bit in the CR3 register */
952  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_SCEN);
953  }
954 }
955 
965 {
966  /* Check the parameters */
969  if (NewState != DISABLE)
970  {
971  /* Enable the NACK transmission by setting the NACK bit in the CR3 register */
972  USARTx->CR3 |= USART_CR3_NACK;
973  }
974  else
975  {
976  /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
977  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_NACK);
978  }
979 }
980 
1035 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode)
1036 {
1037  /* Check the parameters */
1039  assert_param(IS_USART_IRDA_MODE(USART_IrDAMode));
1040 
1041  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_IRLP);
1042  USARTx->CR3 |= USART_IrDAMode;
1043 }
1044 
1054 {
1055  /* Check the parameters */
1057  assert_param(IS_FUNCTIONAL_STATE(NewState));
1058 
1059  if (NewState != DISABLE)
1060  {
1061  /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
1062  USARTx->CR3 |= USART_CR3_IREN;
1063  }
1064  else
1065  {
1066  /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
1067  USARTx->CR3 &= (uint16_t)~((uint16_t)USART_CR3_IREN);
1068  }
1069 }
1070 
1099 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
1100 {
1101  /* Check the parameters */
1103  assert_param(IS_USART_DMAREQ(USART_DMAReq));
1104  assert_param(IS_FUNCTIONAL_STATE(NewState));
1105 
1106  if (NewState != DISABLE)
1107  {
1108  /* Enable the DMA transfer for selected requests by setting the DMAT and/or
1109  DMAR bits in the USART CR3 register */
1110  USARTx->CR3 |= USART_DMAReq;
1111  }
1112  else
1113  {
1114  /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
1115  DMAR bits in the USART CR3 register */
1116  USARTx->CR3 &= (uint16_t)~USART_DMAReq;
1117  }
1118 }
1119 
1231 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState)
1232 {
1233  uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
1234  uint32_t usartxbase = 0x00;
1235  /* Check the parameters */
1237  assert_param(IS_USART_CONFIG_IT(USART_IT));
1238  assert_param(IS_FUNCTIONAL_STATE(NewState));
1239 
1240  /* The CTS interrupt is not available for UART4 and UART5 */
1241  if (USART_IT == USART_IT_CTS)
1242  {
1244  }
1245 
1246  usartxbase = (uint32_t)USARTx;
1247 
1248  /* Get the USART register index */
1249  usartreg = (((uint8_t)USART_IT) >> 0x05);
1250 
1251  /* Get the interrupt position */
1252  itpos = USART_IT & IT_MASK;
1253  itmask = (((uint32_t)0x01) << itpos);
1254 
1255  if (usartreg == 0x01) /* The IT is in CR1 register */
1256  {
1257  usartxbase += 0x0C;
1258  }
1259  else if (usartreg == 0x02) /* The IT is in CR2 register */
1260  {
1261  usartxbase += 0x10;
1262  }
1263  else /* The IT is in CR3 register */
1264  {
1265  usartxbase += 0x14;
1266  }
1267  if (NewState != DISABLE)
1268  {
1269  *(__IO uint32_t*)usartxbase |= itmask;
1270  }
1271  else
1272  {
1273  *(__IO uint32_t*)usartxbase &= ~itmask;
1274  }
1275 }
1276 
1295 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG)
1296 {
1297  FlagStatus bitstatus = RESET;
1298  /* Check the parameters */
1300  assert_param(IS_USART_FLAG(USART_FLAG));
1301 
1302  /* The CTS flag is not available for UART4 and UART5 */
1303  if (USART_FLAG == USART_FLAG_CTS)
1304  {
1306  }
1307 
1308  if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
1309  {
1310  bitstatus = SET;
1311  }
1312  else
1313  {
1314  bitstatus = RESET;
1315  }
1316  return bitstatus;
1317 }
1318 
1344 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
1345 {
1346  /* Check the parameters */
1348  assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
1349 
1350  /* The CTS flag is not available for UART4 and UART5 */
1351  if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
1352  {
1354  }
1355 
1356  USARTx->SR = (uint16_t)~USART_FLAG;
1357 }
1358 
1378 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
1379 {
1380  uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
1381  ITStatus bitstatus = RESET;
1382  /* Check the parameters */
1384  assert_param(IS_USART_GET_IT(USART_IT));
1385 
1386  /* The CTS interrupt is not available for UART4 and UART5 */
1387  if (USART_IT == USART_IT_CTS)
1388  {
1390  }
1391 
1392  /* Get the USART register index */
1393  usartreg = (((uint8_t)USART_IT) >> 0x05);
1394  /* Get the interrupt position */
1395  itmask = USART_IT & IT_MASK;
1396  itmask = (uint32_t)0x01 << itmask;
1397 
1398  if (usartreg == 0x01) /* The IT is in CR1 register */
1399  {
1400  itmask &= USARTx->CR1;
1401  }
1402  else if (usartreg == 0x02) /* The IT is in CR2 register */
1403  {
1404  itmask &= USARTx->CR2;
1405  }
1406  else /* The IT is in CR3 register */
1407  {
1408  itmask &= USARTx->CR3;
1409  }
1410 
1411  bitpos = USART_IT >> 0x08;
1412  bitpos = (uint32_t)0x01 << bitpos;
1413  bitpos &= USARTx->SR;
1414  if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
1415  {
1416  bitstatus = SET;
1417  }
1418  else
1419  {
1420  bitstatus = RESET;
1421  }
1422 
1423  return bitstatus;
1424 }
1425 
1452 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
1453 {
1454  uint16_t bitpos = 0x00, itmask = 0x00;
1455  /* Check the parameters */
1457  assert_param(IS_USART_CLEAR_IT(USART_IT));
1458 
1459  /* The CTS interrupt is not available for UART4 and UART5 */
1460  if (USART_IT == USART_IT_CTS)
1461  {
1463  }
1464 
1465  bitpos = USART_IT >> 0x08;
1466  itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
1467  USARTx->SR = (uint16_t)~itmask;
1468 }
1469 
1486 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ITStatus USART_GetITStatus(USART_TypeDef *USARTx, uint16_t USART_IT)
Checks whether the specified USART interrupt has occurred or not.
#define USART_LastBit_Disable
FlagStatus
Definition: stm32f4xx.h:706
#define USART_CR1_UE
Definition: stm32f4xx.h:10841
void USART_ITConfig(USART_TypeDef *USARTx, uint16_t USART_IT, FunctionalState NewState)
Enables or disables the specified USART interrupts.
#define USART_Clock_Disable
void USART_ReceiverWakeUpCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Determines if the USART is in mute mode or not.
#define IS_USART_DATA(DATA)
#define USART6
Definition: stm32f4xx.h:2081
void USART_HalfDuplexCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s Half Duplex communication.
FunctionalState
Definition: stm32f4xx.h:708
#define IS_USART_CLOCK(CLOCK)
#define USART_Parity_No
uint16_t USART_HardwareFlowControl
void USART_OneBitMethodCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s one bit sampling method.
#define USART_CR3_ONEBIT
Definition: stm32f4xx.h:10871
Universal Synchronous Asynchronous Receiver Transmitter.
Definition: stm32f4xx.h:1710
#define USART_Mode_Tx
#define IT_MASK
#define IS_USART_CLEAR_FLAG(FLAG)
void USART_Cmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the specified USART peripheral.
void USART_SmartCardNACKCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables NACK transmission.
#define IS_USART_STOPBITS(STOPBITS)
#define USART_CR2_ADD
Definition: stm32f4xx.h:10845
#define IS_USART_MODE(MODE)
#define USART_GTPR_GT
Definition: stm32f4xx.h:10884
#define USART_CR3_NACK
Definition: stm32f4xx.h:10864
#define IS_USART_CPOL(CPOL)
void USART_DMACmd(USART_TypeDef *USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
Enables or disables the USART&#39;s DMA interface.
#define USART_Mode_Rx
void assert_param(int val)
#define IS_USART_LASTBIT(LASTBIT)
__IO uint16_t BRR
Definition: stm32f4xx.h:1716
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
FlagStatus USART_GetFlagStatus(USART_TypeDef *USARTx, uint16_t USART_FLAG)
Checks whether the specified USART flag is set or not.
__IO uint16_t GTPR
Definition: stm32f4xx.h:1724
#define IS_USART_PARITY(PARITY)
#define USART_HardwareFlowControl_None
__IO uint16_t SR
Definition: stm32f4xx.h:1712
#define USART_WordLength_8b
Definition: stm32f4xx.h:706
#define USART_CR2_STOP
Definition: stm32f4xx.h:10853
#define UART5
Definition: stm32f4xx.h:2059
enum FlagStatus ITStatus
void USART_SetAddress(USART_TypeDef *USARTx, uint8_t USART_Address)
Sets the address of the USART node.
#define USART_CR3_HDSEL
Definition: stm32f4xx.h:10863
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
Forces or releases Low Speed APB (APB1) peripheral reset.
void USART_SetPrescaler(USART_TypeDef *USARTx, uint8_t USART_Prescaler)
Sets the system clock prescaler.
#define USART1
Definition: stm32f4xx.h:2080
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH)
USART Clock Init Structure definition.
#define IS_USART_BAUDRATE(BAUDRATE)
#define __IO
Definition: core_cm0.h:198
#define UART8
Definition: stm32f4xx.h:2077
__IO uint16_t DR
Definition: stm32f4xx.h:1714
void USART_ClockStructInit(USART_ClockInitTypeDef *USART_ClockInitStruct)
Fills each USART_ClockInitStruct member with its default value.
#define IS_USART_DMAREQ(DMAREQ)
#define IS_USART_ALL_PERIPH(PERIPH)
void USART_ClearFlag(USART_TypeDef *USARTx, uint16_t USART_FLAG)
Clears the USARTx&#39;s pending flags.
#define IS_USART_CPHA(CPHA)
#define USART_CPOL_Low
#define USART_IT_CTS
uint16_t USART_WordLength
void USART_SendData(USART_TypeDef *USARTx, uint16_t Data)
Transmits single data through the USARTx peripheral.
__IO uint16_t CR2
Definition: stm32f4xx.h:1720
#define USART_CR1_SBK
Definition: stm32f4xx.h:10828
This file contains all the functions prototypes for the USART firmware library.
#define IS_USART_1236_PERIPH(PERIPH)
void USART_SendBreak(USART_TypeDef *USARTx)
Transmits break characters.
#define USART_CR2_LBDL
Definition: stm32f4xx.h:10846
#define USART_FLAG_CTS
void USART_LINCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s LIN mode.
#define USART_CR3_IREN
Definition: stm32f4xx.h:10861
void USART_IrDAConfig(USART_TypeDef *USARTx, uint16_t USART_IrDAMode)
Configures the USART&#39;s IrDA interface.
#define CR1_CLEAR_MASK
#define IS_USART_FLAG(FLAG)
#define USART_GTPR_PSC
Definition: stm32f4xx.h:10874
#define CR2_CLOCK_CLEAR_MASK
void USART_WakeUpConfig(USART_TypeDef *USARTx, uint16_t USART_WakeUp)
Selects the USART WakeUp method.
#define USART_CR1_RWU
Definition: stm32f4xx.h:10829
#define CR3_CLEAR_MASK
void USART_ClearITPendingBit(USART_TypeDef *USARTx, uint16_t USART_IT)
Clears the USARTx&#39;s interrupt pending bits.
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
Forces or releases High Speed APB (APB2) peripheral reset.
void USART_OverSampling8Cmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s 8x oversampling mode.
#define USART_CR1_WAKE
Definition: stm32f4xx.h:10839
void USART_Init(USART_TypeDef *USARTx, USART_InitTypeDef *USART_InitStruct)
Initializes the USARTx peripheral according to the specified parameters in the USART_InitStruct ...
#define USART3
Definition: stm32f4xx.h:2057
void USART_SmartCardCmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s Smart Card mode.
void USART_DeInit(USART_TypeDef *USARTx)
Deinitializes the USARTx peripheral registers to their default reset values.
#define UART7
Definition: stm32f4xx.h:2076
void USART_StructInit(USART_InitTypeDef *USART_InitStruct)
Fills each USART_InitStruct member with its default value.
#define IS_USART_CONFIG_IT(IT)
void USART_SetGuardTime(USART_TypeDef *USARTx, uint8_t USART_GuardTime)
Sets the specified USART guard time.
#define USART_CPHA_1Edge
#define USART_CR2_LINEN
Definition: stm32f4xx.h:10857
#define USART_CR1_OVER8
Definition: stm32f4xx.h:10842
uint16_t USART_ReceiveData(USART_TypeDef *USARTx)
Returns the most recent received data by the USARTx peripheral.
#define USART_CR3_SCEN
Definition: stm32f4xx.h:10865
#define USART_StopBits_1
void USART_IrDACmd(USART_TypeDef *USARTx, FunctionalState NewState)
Enables or disables the USART&#39;s IrDA interface.
#define IS_USART_GET_IT(IT)
#define IS_USART_IRDA_MODE(MODE)
#define USART_CR3_IRLP
Definition: stm32f4xx.h:10862
void RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks)
Returns the frequencies of different on chip clocks; SYSCLK, HCLK, PCLK1 and PCLK2.
#define IS_USART_ADDRESS(ADDRESS)
#define UART4
Definition: stm32f4xx.h:2058
__IO uint16_t CR3
Definition: stm32f4xx.h:1722
void USART_LINBreakDetectLengthConfig(USART_TypeDef *USARTx, uint16_t USART_LINBreakDetectLength)
Sets the USART LIN Break detection length.
#define IS_USART_WORD_LENGTH(LENGTH)
USART Init Structure definition.
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)
#define USART2
Definition: stm32f4xx.h:2056
#define IS_USART_WAKEUP(WAKEUP)
__IO uint16_t CR1
Definition: stm32f4xx.h:1718
void USART_ClockInit(USART_TypeDef *USARTx, USART_ClockInitTypeDef *USART_ClockInitStruct)
Initializes the USARTx peripheral Clock according to the specified parameters in the USART_ClockInitS...
#define IS_USART_CLEAR_IT(IT)


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19