SSP register block structure. More...

#include <ssp_11xx.h>

Public Attributes
__IO uint32_t	CPSR

__IO uint32_t	CR0

__IO uint32_t	CR1

__IO uint32_t	DR

__O uint32_t	ICR

__IO uint32_t	IMSC

__I uint32_t	MIS

__I uint32_t	RIS

__I uint32_t	SR

Detailed Description

SSP register block structure.

Definition at line 47 of file ssp_11xx.h.

Member Data Documentation

◆ CPSR

__IO uint32_t LPC_SSP_T::CPSR

Clock Prescale Register

Definition at line 52 of file ssp_11xx.h.

◆ CR0

__IO uint32_t LPC_SSP_T::CR0

< SSPn Structure
Control Register 0. Selects the serial clock rate, bus type, and data size.

Definition at line 48 of file ssp_11xx.h.

◆ CR1

__IO uint32_t LPC_SSP_T::CR1

Control Register 1. Selects master/slave and other modes.

Definition at line 49 of file ssp_11xx.h.

◆ DR

__IO uint32_t LPC_SSP_T::DR

Data Register. Writes fill the transmit FIFO, and reads empty the receive FIFO.

Definition at line 50 of file ssp_11xx.h.

◆ ICR

__O uint32_t LPC_SSP_T::ICR

SSPICR Interrupt Clear Register

Definition at line 56 of file ssp_11xx.h.

◆ IMSC

__IO uint32_t LPC_SSP_T::IMSC

Interrupt Mask Set and Clear Register

Definition at line 53 of file ssp_11xx.h.

◆ MIS

__I uint32_t LPC_SSP_T::MIS

Masked Interrupt Status Register

Definition at line 55 of file ssp_11xx.h.

◆ RIS

__I uint32_t LPC_SSP_T::RIS

Raw Interrupt Status Register

Definition at line 54 of file ssp_11xx.h.

◆ SR

__I uint32_t LPC_SSP_T::SR

Status Register

Definition at line 51 of file ssp_11xx.h.

The documentation for this struct was generated from the following file:

ssp_11xx.h

Public Attributes