iocon_11xx.h
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1 /*
2  * @brief IOCON registers and control functions
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __IOCON_11XX_H_
33 #define __IOCON_11XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX)
48 typedef struct {
49  __IO uint32_t PIO0[24];
50  __IO uint32_t PIO1[32];
51 } LPC_IOCON_T;
52 
53 #else
54 
57 typedef enum CHIP_IOCON_PIO {
58  IOCON_PIO0_0 = (0x00C >> 2),
59  IOCON_PIO0_1 = (0x010 >> 2),
60  IOCON_PIO0_2 = (0x01C >> 2),
61  IOCON_PIO0_3 = (0x02C >> 2),
62  IOCON_PIO0_4 = (0x030 >> 2),
63  IOCON_PIO0_5 = (0x034 >> 2),
64  IOCON_PIO0_6 = (0x04C >> 2),
65  IOCON_PIO0_7 = (0x050 >> 2),
66  IOCON_PIO0_8 = (0x060 >> 2),
67  IOCON_PIO0_9 = (0x064 >> 2),
68  IOCON_PIO0_10 = (0x070 >> 2),
69  IOCON_PIO0_11 = (0x074 >> 2),
70 
71  IOCON_PIO1_0 = (0x078 >> 2),
72  IOCON_PIO1_1 = (0x07C >> 2),
73  IOCON_PIO1_2 = (0x080 >> 2),
74  IOCON_PIO1_3 = (0x090 >> 2),
75  IOCON_PIO1_4 = (0x094 >> 2),
76  IOCON_PIO1_5 = (0x0A0 >> 2),
77  IOCON_PIO1_6 = (0x0A4 >> 2),
78  IOCON_PIO1_7 = (0x0A8 >> 2),
79  IOCON_PIO1_8 = (0x014 >> 2),
80  IOCON_PIO1_9 = (0x038 >> 2),
81  IOCON_PIO1_10 = (0x06C >> 2),
82  IOCON_PIO1_11 = (0x098 >> 2),
83 
84  IOCON_PIO2_0 = (0x008 >> 2),
85  IOCON_PIO2_1 = (0x028 >> 2),
86  IOCON_PIO2_2 = (0x05C >> 2),
87  IOCON_PIO2_3 = (0x08C >> 2),
88  IOCON_PIO2_4 = (0x040 >> 2),
89  IOCON_PIO2_5 = (0x044 >> 2),
90  IOCON_PIO2_6 = (0x000 >> 2),
91  IOCON_PIO2_7 = (0x020 >> 2),
92  IOCON_PIO2_8 = (0x024 >> 2),
93  IOCON_PIO2_9 = (0x054 >> 2),
94  IOCON_PIO2_10 = (0x058 >> 2),
95 #if !defined(CHIP_LPC1125)
96  IOCON_PIO2_11 = (0x070 >> 2),
97 #endif
98 
99  IOCON_PIO3_0 = (0x084 >> 2),
100 #if !defined(CHIP_LPC1125)
101  IOCON_PIO3_1 = (0x088 >> 2),
102 #endif
103  IOCON_PIO3_2 = (0x09C >> 2),
104  IOCON_PIO3_3 = (0x0AC >> 2),
105  IOCON_PIO3_4 = (0x03C >> 2),
106  IOCON_PIO3_5 = (0x048 >> 2),
108 
112 typedef enum CHIP_IOCON_PIN_LOC {
114 #if !defined(CHIP_LPC1125)
115  IOCON_SCKLOC_PIO2_11 = (0xB0 | 1),
116 #endif
117  IOCON_SCKLOC_PIO0_6 = (0xB0 | 2),
120 #if !defined(CHIP_LPC1125)
121  IOCON_DSRLOC_PIO3_1 = (0xB4 | 1),
122 #endif
123 
125  IOCON_DCDLOC_PIO3_2 = (0xB8 | 1),
128  IOCON_RILOC_PIO3_3 = (0xBC | 1),
130 #if defined(CHIP_LPC1125)
131  IOCON_SSEL1_LOC_PIO2_2 = (0x18),
132  IOCON_SSEL1_LOC_PIO2_4 = (0x18 | 1),
134  IOCON_CT16B0_CAP0_LOC_PIO0_2 = (0xC0),
135  IOCON_CT16B0_CAP0_LOC_PIO3_3 = (0xC0 | 1),
137  IOCON_SCK1_LOC_PIO2_1 = (0xC4),
138  IOCON_SCK1_LOC_PIO3_2 = (0xC4 | 1),
140  IOCON_MISO1_LOC_PIO2_2 = (0xC8),
141  IOCON_MISO1_LOC_PIO1_10 = (0xC8 | 1),
143  IOCON_MOSI1_LOC_PIO2_3 = (0xCC),
144  IOCON_MOSI1_LOC_PIO1_9 = (0xCC),
146  IOCON_CT326B0_CAP0_LOC_PIO1_5 = (0xD0),
147  IOCON_CT326B0_CAP0_LOC_PIO2_9 = (0xD0 | 1),
149  IOCON_U0_RXD_LOC_PIO1_6 = (0xD4),
150  IOCON_U0_RXD_LOC_PIO2_7 = (0xD4 | 1),
151  IOCON_U0_RXD_LOC_PIO3_4 = (0xD4 | 3),
152 #endif
153 
155 
156 typedef struct {
158 } LPC_IOCON_T;
159 #endif
160 
166 #define IOCON_FUNC0 0x0
167 #define IOCON_FUNC1 0x1
168 #define IOCON_FUNC2 0x2
169 #define IOCON_FUNC3 0x3
170 #define IOCON_FUNC4 0x4
171 #define IOCON_FUNC5 0x5
172 #define IOCON_FUNC6 0x6
173 #define IOCON_FUNC7 0x7
174 #define IOCON_MODE_INACT (0x0 << 3)
175 #define IOCON_MODE_PULLDOWN (0x1 << 3)
176 #define IOCON_MODE_PULLUP (0x2 << 3)
177 #define IOCON_MODE_REPEATER (0x3 << 3)
178 #define IOCON_HYS_EN (0x1 << 5)
179 #define IOCON_INV_EN (0x1 << 6)
180 #define IOCON_ADMODE_EN (0x0 << 7)
181 #define IOCON_DIGMODE_EN (0x1 << 7)
182 #define IOCON_SFI2C_EN (0x0 << 8)
183 #define IOCON_STDI2C_EN (0x1 << 8)
184 #define IOCON_FASTI2C_EN (0x2 << 8)
185 #define IOCON_FILT_DIS (0x1 << 8)
186 #define IOCON_OPENDRAIN_EN (0x1 << 10)
192 #define MD_PLN (0x0 << 3)
193 #define MD_PDN (0x1 << 3)
194 #define MD_PUP (0x2 << 3)
195 #define MD_BUK (0x3 << 3)
196 #define MD_HYS (0x1 << 5)
197 #define MD_INV (0x1 << 6)
198 #define MD_ADMODE (0x0 << 7)
199 #define MD_DIGMODE (0x1 << 7)
200 #define MD_DISFIL (0x0 << 8)
201 #define MD_ENFIL (0x1 << 8)
202 #define MD_SFI2C (0x0 << 8)
203 #define MD_STDI2C (0x1 << 8)
204 #define MD_FASTI2C (0x2 << 8)
205 #define MD_OPENDRAIN (0x1 << 10)
206 #define FUNC0 0x0
207 #define FUNC1 0x1
208 #define FUNC2 0x2
209 #define FUNC3 0x3
210 #define FUNC4 0x4
211 #define FUNC5 0x5
212 #define FUNC6 0x6
213 #define FUNC7 0x7
214 
215 #if defined(CHIP_LPC11UXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11AXX)
216 
225 
236 {
237  Chip_IOCON_PinMuxSet(pIOCON, port, pin, (uint32_t) (mode | func));
238 }
239 
240 #else
241 
250 {
251  pIOCON->REG[pin] = modefunc;
252 }
253 
263 {
264  Chip_IOCON_PinMuxSet(pIOCON, pin, (uint32_t) (mode | func));
265 }
266 
274 {
275  pIOCON->REG[sel >> 2] = sel & 0x03;
276 }
277 
278 #endif /* defined(CHIP_LPC11UXX) || defined (CHIP_LPC11EXX) || defined (CHIP_LPC11AXX) */
279 
284 #ifdef __cplusplus
285 }
286 #endif
287 
288 #endif /* __IOCON_11XX_H_ */
IOCON_PIO0_7
@ IOCON_PIO0_7
Definition: iocon_11xx.h:65
IOCON_DSRLOC_PIO2_1
@ IOCON_DSRLOC_PIO2_1
Definition: iocon_11xx.h:119
IOCON_PIO0_4
@ IOCON_PIO0_4
Definition: iocon_11xx.h:62
IOCON_PIO2_4
@ IOCON_PIO2_4
Definition: iocon_11xx.h:88
IOCON_PIO1_4
@ IOCON_PIO1_4
Definition: iocon_11xx.h:75
IOCON_PIO0_1
@ IOCON_PIO0_1
Definition: iocon_11xx.h:59
IOCON_PIO3_3
@ IOCON_PIO3_3
Definition: iocon_11xx.h:104
LPC_IOCON_T::REG
__IO uint32_t REG[48]
Definition: iocon_11xx.h:157
IOCON_PIO1_8
@ IOCON_PIO1_8
Definition: iocon_11xx.h:79
IOCON_PIO0_2
@ IOCON_PIO0_2
Definition: iocon_11xx.h:60
uavcan::uint32_t
std::uint32_t uint32_t
Definition: std.hpp:26
IOCON_DCDLOC_PIO2_2
@ IOCON_DCDLOC_PIO2_2
Definition: iocon_11xx.h:124
IOCON_PIO3_2
@ IOCON_PIO3_2
Definition: iocon_11xx.h:103
__IO
#define __IO
Definition: core_cm0.h:154
IOCON_DCDLOC_PIO3_2
@ IOCON_DCDLOC_PIO3_2
Definition: iocon_11xx.h:125
IOCON_PIO0_9
@ IOCON_PIO0_9
Definition: iocon_11xx.h:67
IOCON_PIO3_1
@ IOCON_PIO3_1
Definition: iocon_11xx.h:101
IOCON_PIO0_5
@ IOCON_PIO0_5
Definition: iocon_11xx.h:63
IOCON_PIO1_10
@ IOCON_PIO1_10
Definition: iocon_11xx.h:81
IOCON_PIO2_0
@ IOCON_PIO2_0
Definition: iocon_11xx.h:84
LPC_IOCON_T
Definition: iocon_11xx.h:156
IOCON_DSRLOC_PIO3_1
@ IOCON_DSRLOC_PIO3_1
Definition: iocon_11xx.h:121
IOCON_RILOC_PIO3_3
@ IOCON_RILOC_PIO3_3
Definition: iocon_11xx.h:128
modefunc
unsigned modefunc
Definition: board.cpp:36
IOCON_PIO2_8
@ IOCON_PIO2_8
Definition: iocon_11xx.h:92
IOCON_PIO2_6
@ IOCON_PIO2_6
Definition: iocon_11xx.h:90
IOCON_PIO0_8
@ IOCON_PIO0_8
Definition: iocon_11xx.h:66
IOCON_PIO1_9
@ IOCON_PIO1_9
Definition: iocon_11xx.h:80
uavcan::uint16_t
std::uint16_t uint16_t
Definition: std.hpp:25
IOCON_SCKLOC_PIO2_11
@ IOCON_SCKLOC_PIO2_11
Definition: iocon_11xx.h:115
CHIP_IOCON_PIO_T
enum CHIP_IOCON_PIO CHIP_IOCON_PIO_T
IO Configuration Unit register block structure.
INLINE
#define INLINE
Definition: lpc_types.h:205
CHIP_IOCON_PIN_LOC_T
enum CHIP_IOCON_PIN_LOC CHIP_IOCON_PIN_LOC_T
LPC11XX Pin location select.
IOCON_PIO2_9
@ IOCON_PIO2_9
Definition: iocon_11xx.h:93
uavcan::uint8_t
std::uint8_t uint8_t
Definition: std.hpp:24
IOCON_PIO0_10
@ IOCON_PIO0_10
Definition: iocon_11xx.h:68
IOCON_PIO0_0
@ IOCON_PIO0_0
Definition: iocon_11xx.h:58
IOCON_PIO2_10
@ IOCON_PIO2_10
Definition: iocon_11xx.h:94
IOCON_PIO1_2
@ IOCON_PIO1_2
Definition: iocon_11xx.h:73
IOCON_PIO2_7
@ IOCON_PIO2_7
Definition: iocon_11xx.h:91
CHIP_IOCON_PIO
CHIP_IOCON_PIO
IO Configuration Unit register block structure.
Definition: iocon_11xx.h:57
IOCON_PIO1_6
@ IOCON_PIO1_6
Definition: iocon_11xx.h:77
IOCON_PIO2_2
@ IOCON_PIO2_2
Definition: iocon_11xx.h:86
IOCON_PIO3_0
@ IOCON_PIO3_0
Definition: iocon_11xx.h:99
CHIP_IOCON_PIN_LOC
CHIP_IOCON_PIN_LOC
LPC11XX Pin location select.
Definition: iocon_11xx.h:112
IOCON_PIO1_0
@ IOCON_PIO1_0
Definition: iocon_11xx.h:71
IOCON_PIO3_4
@ IOCON_PIO3_4
Definition: iocon_11xx.h:105
REG
#define REG(x)
Definition: utils.h:225
Chip_IOCON_PinMux
STATIC INLINE void Chip_IOCON_PinMux(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint16_t mode, uint8_t func)
I/O Control pin mux.
Definition: iocon_11xx.h:262
Chip_IOCON_PinLocSel
STATIC INLINE void Chip_IOCON_PinLocSel(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIN_LOC_T sel)
Select pin location.
Definition: iocon_11xx.h:273
IOCON_PIO0_11
@ IOCON_PIO0_11
Definition: iocon_11xx.h:69
Chip_IOCON_PinMuxSet
STATIC INLINE void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, CHIP_IOCON_PIO_T pin, uint32_t modefunc)
Sets I/O Control pin mux.
Definition: iocon_11xx.h:249
IOCON_PIO0_6
@ IOCON_PIO0_6
Definition: iocon_11xx.h:64
pin
unsigned pin
Definition: board.cpp:35
IOCON_SCKLOC_PIO0_10
@ IOCON_SCKLOC_PIO0_10
Definition: iocon_11xx.h:113
IOCON_PIO3_5
@ IOCON_PIO3_5
Definition: iocon_11xx.h:106
IOCON_RILOC_PIO2_3
@ IOCON_RILOC_PIO2_3
Definition: iocon_11xx.h:127
IOCON_PIO2_3
@ IOCON_PIO2_3
Definition: iocon_11xx.h:87
IOCON_PIO1_11
@ IOCON_PIO1_11
Definition: iocon_11xx.h:82
IOCON_SCKLOC_PIO0_6
@ IOCON_SCKLOC_PIO0_6
Definition: iocon_11xx.h:117
IOCON_PIO0_3
@ IOCON_PIO0_3
Definition: iocon_11xx.h:61
IOCON_PIO1_5
@ IOCON_PIO1_5
Definition: iocon_11xx.h:76
IOCON_PIO2_1
@ IOCON_PIO2_1
Definition: iocon_11xx.h:85
IOCON_PIO1_1
@ IOCON_PIO1_1
Definition: iocon_11xx.h:72
IOCON_PIO1_3
@ IOCON_PIO1_3
Definition: iocon_11xx.h:74
IOCON_PIO2_5
@ IOCON_PIO2_5
Definition: iocon_11xx.h:89
IOCON_PIO1_7
@ IOCON_PIO1_7
Definition: iocon_11xx.h:78
IOCON_PIO2_11
@ IOCON_PIO2_11
Definition: iocon_11xx.h:96
STATIC
#define STATIC
Definition: lpc_types.h:140


uavcan_communicator
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autogenerated on Fri Dec 13 2024 03:10:02