LPTIMIMER. More...

#include <stm32f769xx.h>

Public Attributes
__IO uint32_t	ARR

__IO uint32_t	CFGR

__IO uint32_t	CFGR2

__IO uint32_t	CMP

__IO uint32_t	CNT

__IO uint32_t	CR

__IO uint32_t	ICR

__IO uint32_t	IER

__IO uint32_t	ISR

uint32_t	RESERVED1

Detailed Description

LPTIMIMER.

Definition at line 989 of file stm32f769xx.h.

Member Data Documentation

◆ ARR

__IO uint32_t LPTIM_TypeDef::ARR

LPTIM Autoreload register, Address offset: 0x18

Definition at line 997 of file stm32f769xx.h.

◆ CFGR

__IO uint32_t LPTIM_TypeDef::CFGR

LPTIM Configuration register, Address offset: 0x0C

Definition at line 994 of file stm32f769xx.h.

◆ CFGR2

__IO uint32_t LPTIM_TypeDef::CFGR2

LPTIM Configuration register, Address offset: 0x24

Definition at line 1574 of file stm32h735xx.h.

◆ CMP

__IO uint32_t LPTIM_TypeDef::CMP

LPTIM Compare register, Address offset: 0x14

Definition at line 996 of file stm32f769xx.h.

◆ CNT

__IO uint32_t LPTIM_TypeDef::CNT

LPTIM Counter register, Address offset: 0x1C

Definition at line 998 of file stm32f769xx.h.

◆ CR

__IO uint32_t LPTIM_TypeDef::CR

LPTIM Control register, Address offset: 0x10

Definition at line 995 of file stm32f769xx.h.

◆ ICR

__IO uint32_t LPTIM_TypeDef::ICR

LPTIM Interrupt Clear register, Address offset: 0x04

Definition at line 992 of file stm32f769xx.h.

◆ IER

__IO uint32_t LPTIM_TypeDef::IER

LPTIM Interrupt Enable register, Address offset: 0x08

Definition at line 993 of file stm32f769xx.h.

◆ ISR

__IO uint32_t LPTIM_TypeDef::ISR

LPTIM Interrupt and Status register, Address offset: 0x00

Definition at line 991 of file stm32f769xx.h.

◆ RESERVED1

uint32_t LPTIM_TypeDef::RESERVED1

Reserved, 0x20

Definition at line 1573 of file stm32h735xx.h.

The documentation for this struct was generated from the following files:

Public Attributes