stm32h7xx_hal_dfsdm.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_DFSDM_H
22 #define STM32H7xx_HAL_DFSDM_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30 
39 /* Exported types ------------------------------------------------------------*/
47 typedef enum
48 {
49  HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U,
50  HAL_DFSDM_CHANNEL_STATE_READY = 0x01U,
51  HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU
52 } HAL_DFSDM_Channel_StateTypeDef;
53 
57 typedef struct
58 {
59  FunctionalState Activation;
60  uint32_t Selection;
62  uint32_t Divider;
64 } DFSDM_Channel_OutputClockTypeDef;
65 
69 typedef struct
70 {
71  uint32_t Multiplexer;
73  uint32_t DataPacking;
75  uint32_t Pins;
77 } DFSDM_Channel_InputTypeDef;
78 
82 typedef struct
83 {
84  uint32_t Type;
86  uint32_t SpiClock;
88 } DFSDM_Channel_SerialInterfaceTypeDef;
89 
93 typedef struct
94 {
95  uint32_t FilterOrder;
97  uint32_t Oversampling;
99 } DFSDM_Channel_AwdTypeDef;
100 
104 typedef struct
105 {
106  DFSDM_Channel_OutputClockTypeDef OutputClock;
107  DFSDM_Channel_InputTypeDef Input;
108  DFSDM_Channel_SerialInterfaceTypeDef SerialInterface;
109  DFSDM_Channel_AwdTypeDef Awd;
110  int32_t Offset;
112  uint32_t RightBitShift;
114 } DFSDM_Channel_InitTypeDef;
115 
119 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
120 typedef struct __DFSDM_Channel_HandleTypeDef
121 #else
122 typedef struct
123 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
124 {
125  DFSDM_Channel_TypeDef *Instance;
126  DFSDM_Channel_InitTypeDef Init;
127  HAL_DFSDM_Channel_StateTypeDef State;
128 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
129  void (*CkabCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
130  void (*ScdCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
131  void (*MspInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
132  void (*MspDeInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
133 #endif
134 } DFSDM_Channel_HandleTypeDef;
135 
136 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
137 
140 typedef enum
141 {
142  HAL_DFSDM_CHANNEL_CKAB_CB_ID = 0x00U,
143  HAL_DFSDM_CHANNEL_SCD_CB_ID = 0x01U,
144  HAL_DFSDM_CHANNEL_MSPINIT_CB_ID = 0x02U,
145  HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID = 0x03U
146 } HAL_DFSDM_Channel_CallbackIDTypeDef;
147 
151 typedef void (*pDFSDM_Channel_CallbackTypeDef)(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
152 #endif
153 
157 typedef enum
158 {
159  HAL_DFSDM_FILTER_STATE_RESET = 0x00U,
160  HAL_DFSDM_FILTER_STATE_READY = 0x01U,
161  HAL_DFSDM_FILTER_STATE_REG = 0x02U,
162  HAL_DFSDM_FILTER_STATE_INJ = 0x03U,
163  HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U,
164  HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU
165 } HAL_DFSDM_Filter_StateTypeDef;
166 
170 typedef struct
171 {
172  uint32_t Trigger;
174  FunctionalState FastMode;
175  FunctionalState DmaMode;
176 } DFSDM_Filter_RegularParamTypeDef;
177 
181 typedef struct
182 {
183  uint32_t Trigger;
185  FunctionalState ScanMode;
186  FunctionalState DmaMode;
187  uint32_t ExtTrigger;
189  uint32_t ExtTriggerEdge;
191 } DFSDM_Filter_InjectedParamTypeDef;
192 
196 typedef struct
197 {
198  uint32_t SincOrder;
200  uint32_t Oversampling;
202  uint32_t IntOversampling;
204 } DFSDM_Filter_FilterParamTypeDef;
205 
209 typedef struct
210 {
211  DFSDM_Filter_RegularParamTypeDef RegularParam;
212  DFSDM_Filter_InjectedParamTypeDef InjectedParam;
213  DFSDM_Filter_FilterParamTypeDef FilterParam;
214 } DFSDM_Filter_InitTypeDef;
215 
219 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
220 typedef struct __DFSDM_Filter_HandleTypeDef
221 #else
222 typedef struct
223 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
224 {
225  DFSDM_Filter_TypeDef *Instance;
226  DFSDM_Filter_InitTypeDef Init;
227  DMA_HandleTypeDef *hdmaReg;
228  DMA_HandleTypeDef *hdmaInj;
229  uint32_t RegularContMode;
230  uint32_t RegularTrigger;
231  uint32_t InjectedTrigger;
232  uint32_t ExtTriggerEdge;
233  FunctionalState InjectedScanMode;
234  uint32_t InjectedChannelsNbr;
235  uint32_t InjConvRemaining;
236  HAL_DFSDM_Filter_StateTypeDef State;
237  uint32_t ErrorCode;
238 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
239  void (*AwdCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
240  uint32_t Channel, uint32_t Threshold);
241  void (*RegConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
242  void (*RegConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
243  void (*InjConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
244  void (*InjConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
245  void (*ErrorCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
246  void (*MspInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
247  void (*MspDeInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
248 #endif
249 }DFSDM_Filter_HandleTypeDef;
250 
254 typedef struct
255 {
256  uint32_t DataSource;
258  uint32_t Channel;
260  int32_t HighThreshold;
262  int32_t LowThreshold;
264  uint32_t HighBreakSignal;
266  uint32_t LowBreakSignal;
268 } DFSDM_Filter_AwdParamTypeDef;
269 
270 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
271 
274 typedef enum
275 {
276  HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID = 0x00U,
277  HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID = 0x01U,
278  HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID = 0x02U,
279  HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID = 0x03U,
280  HAL_DFSDM_FILTER_ERROR_CB_ID = 0x04U,
281  HAL_DFSDM_FILTER_MSPINIT_CB_ID = 0x05U,
282  HAL_DFSDM_FILTER_MSPDEINIT_CB_ID = 0x06U
283 } HAL_DFSDM_Filter_CallbackIDTypeDef;
284 
288 typedef void (*pDFSDM_Filter_CallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
289 typedef void (*pDFSDM_Filter_AwdCallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
290 #endif
291 
295 /* End of exported types -----------------------------------------------------*/
296 
297 /* Exported constants --------------------------------------------------------*/
305 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM 0x00000000U
306 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC
314 #define DFSDM_CHANNEL_EXTERNAL_INPUTS 0x00000000U
315 #define DFSDM_CHANNEL_ADC_OUTPUT DFSDM_CHCFGR1_DATMPX_0
316 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1
324 #define DFSDM_CHANNEL_STANDARD_MODE 0x00000000U
325 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0
326 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1
334 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS 0x00000000U
335 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL
343 #define DFSDM_CHANNEL_SPI_RISING 0x00000000U
344 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0
345 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1
346 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP
354 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL 0x00000000U
355 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0
356 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1
357 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL
365 #define DFSDM_CHANNEL_FASTSINC_ORDER 0x00000000U
366 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0
367 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1
368 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD
376 #define DFSDM_FILTER_SW_TRIGGER 0x00000000U
377 #define DFSDM_FILTER_SYNC_TRIGGER 0x00000001U
378 #define DFSDM_FILTER_EXT_TRIGGER 0x00000002U
386 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U
387 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0
388 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1
389 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
390 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_2
391 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
392 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 (DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_1)
393 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_1)
394 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO DFSDM_FLTCR1_JEXTSEL_3
395 #define DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG1 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_0)
396 #define DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG3 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1)
397 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3)
398 #define DFSDM_FILTER_EXT_TRIG_EXTI15 (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_0)
399 #define DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1)
400 #define DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_0)
401 #define DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_2)
402 #if (STM32H7_DEV_ID == 0x480UL)
403 #define DFSDM_FILTER_EXT_TRIG_COMP1_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | \
404  DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_0)
405 #define DFSDM_FILTER_EXT_TRIG_COMP2_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | \
406  DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_1)
407 #elif (STM32H7_DEV_ID == 0x483UL)
408 #define DFSDM_FILTER_EXT_TRIG_TIM23_TRGO (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1 | \
409  DFSDM_FLTCR1_JEXTSEL_0)
410 #define DFSDM_FILTER_EXT_TRIG_TIM24_TRGO (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_2 )
411 #endif /* STM32H7_DEV_ID == 0x480UL */
412 
419 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0
420 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1
421 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN
429 #define DFSDM_FILTER_FASTSINC_ORDER 0x00000000U
430 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0
431 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1
432 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1)
433 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2
434 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2)
442 #define DFSDM_FILTER_AWD_FILTER_DATA 0x00000000U
443 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL
451 #define DFSDM_FILTER_ERROR_NONE 0x00000000U
452 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN 0x00000001U
453 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN 0x00000002U
454 #define DFSDM_FILTER_ERROR_DMA 0x00000003U
455 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
456 #define DFSDM_FILTER_ERROR_INVALID_CALLBACK 0x00000004U
457 #endif
458 
465 #define DFSDM_NO_BREAK_SIGNAL 0x00000000U
466 #define DFSDM_BREAK_SIGNAL_0 0x00000001U
467 #define DFSDM_BREAK_SIGNAL_1 0x00000002U
468 #define DFSDM_BREAK_SIGNAL_2 0x00000004U
469 #define DFSDM_BREAK_SIGNAL_3 0x00000008U
477 /* DFSDM Channels ------------------------------------------------------------*/
478 /* The DFSDM channels are defined as follows:
479  - in 16-bit LSB the channel mask is set
480  - in 16-bit MSB the channel number is set
481  e.g. for channel 5 definition:
482  - the channel mask is 0x00000020 (bit 5 is set)
483  - the channel number 5 is 0x00050000
484  --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
485 #define DFSDM_CHANNEL_0 0x00000001U
486 #define DFSDM_CHANNEL_1 0x00010002U
487 #define DFSDM_CHANNEL_2 0x00020004U
488 #define DFSDM_CHANNEL_3 0x00030008U
489 #define DFSDM_CHANNEL_4 0x00040010U
490 #define DFSDM_CHANNEL_5 0x00050020U
491 #define DFSDM_CHANNEL_6 0x00060040U
492 #define DFSDM_CHANNEL_7 0x00070080U
493 
500 #define DFSDM_CONTINUOUS_CONV_OFF 0x00000000U
501 #define DFSDM_CONTINUOUS_CONV_ON 0x00000001U
509 #define DFSDM_AWD_HIGH_THRESHOLD 0x00000000U
510 #define DFSDM_AWD_LOW_THRESHOLD 0x00000001U
518 /* End of exported constants -------------------------------------------------*/
519 
520 /* Exported macros -----------------------------------------------------------*/
529 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
530 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) do{ \
531  (__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET; \
532  (__HANDLE__)->MspInitCallback = NULL; \
533  (__HANDLE__)->MspDeInitCallback = NULL; \
534  } while(0)
535 #else
536 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
537 #endif
538 
543 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
544 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) do{ \
545  (__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET; \
546  (__HANDLE__)->MspInitCallback = NULL; \
547  (__HANDLE__)->MspDeInitCallback = NULL; \
548  } while(0)
549 #else
550 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
551 #endif
552 
556 /* End of exported macros ----------------------------------------------------*/
557 
558 #if defined(DFSDM_CHDLYR_PLSSKP)
559 /* Include DFSDM HAL Extension module */
560 #include "stm32h7xx_hal_dfsdm_ex.h"
561 #endif /* DFSDM_CHDLYR_PLSSKP */
562 
563 /* Exported functions --------------------------------------------------------*/
571 /* Channel initialization and de-initialization functions *********************/
572 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
573 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
574 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
575 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
576 
577 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
578 /* Channel callbacks register/unregister functions ****************************/
579 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
580  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
581  pDFSDM_Channel_CallbackTypeDef pCallback);
582 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
583  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID);
584 #endif
585 
592 /* Channel operation functions ************************************************/
593 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
594 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
595 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
596 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
597 
598 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
599 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
600 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
601 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
602 
603 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
604 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
605 
606 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
607 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
608 
609 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
610 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
618 /* Channel state function *****************************************************/
619 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
627 /* Filter initialization and de-initialization functions *********************/
628 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
629 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
630 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
631 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
632 
633 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
634 /* Filter callbacks register/unregister functions ****************************/
635 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
636  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
637  pDFSDM_Filter_CallbackTypeDef pCallback);
638 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
639  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID);
640 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
641  pDFSDM_Filter_AwdCallbackTypeDef pCallback);
642 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
643 #endif
644 
651 /* Filter control functions *********************/
652 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
653  uint32_t Channel,
654  uint32_t ContinuousMode);
655 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
656  uint32_t Channel);
664 /* Filter operation functions *********************/
665 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
666 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
667 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
668 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
669 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
670 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
671 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
672 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
673 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
674 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
675 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
676 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
677 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
678 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
679 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
680  DFSDM_Filter_AwdParamTypeDef *awdParam);
681 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
682 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
683 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
684 
685 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
686 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
687 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
688 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
689 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
690 
691 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
692 
693 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
694 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
695 
696 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
697 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
698 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
699 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
700 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
701 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
709 /* Filter state functions *****************************************************/
710 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
711 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
719 /* End of exported functions -------------------------------------------------*/
720 
721 /* Private macros ------------------------------------------------------------*/
725 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
726  ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
727 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2U <= (DIVIDER)) && ((DIVIDER) <= 256U))
728 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
729  ((INPUT) == DFSDM_CHANNEL_ADC_OUTPUT) || \
730  ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
731 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
732  ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
733  ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
734 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
735  ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
736 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
737  ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
738  ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
739  ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
740 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
741  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
742  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
743  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
744 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
745  ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
746  ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
747  ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
748 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 32U))
749 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
750 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU)
751 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU)
752 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
753  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
754 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
755  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
756  ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
757 #if (STM32H7_DEV_ID == 0x480UL)
758 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
759  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
760  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
761  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
762  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
763  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
764  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
765  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
766  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
767  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
768  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) || \
769  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT) || \
770  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT) || \
771  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT) || \
772  ((TRIG) == DFSDM_FILTER_EXT_TRIG_COMP1_OUT) || \
773  ((TRIG) == DFSDM_FILTER_EXT_TRIG_COMP2_OUT))
774 #elif (STM32H7_DEV_ID == 0x483UL)
775 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
776  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
777  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
778  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
779  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
780  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
781  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
782  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
783  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
784  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
785  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) || \
786  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT) || \
787  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT) || \
788  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT) || \
789  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM23_TRGO) || \
790  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM24_TRGO))
791 
792 #else
793 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
794  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
795  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
796  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
797  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
798  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
799  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
800  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
801  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
802  ((TRIG) == DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG1) || \
803  ((TRIG) == DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG3) || \
804  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
805  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) || \
806  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT) || \
807  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT) || \
808  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT))
809 #endif /* STM32H7_DEV_ID == 0x480UL */
810 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
811  ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
812  ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
813 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
814  ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
815  ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
816  ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
817  ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
818  ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
819 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 1024U))
820 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 256U))
821 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
822  ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
823 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
824 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xFU)
825 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
826  ((CHANNEL) == DFSDM_CHANNEL_1) || \
827  ((CHANNEL) == DFSDM_CHANNEL_2) || \
828  ((CHANNEL) == DFSDM_CHANNEL_3) || \
829  ((CHANNEL) == DFSDM_CHANNEL_4) || \
830  ((CHANNEL) == DFSDM_CHANNEL_5) || \
831  ((CHANNEL) == DFSDM_CHANNEL_6) || \
832  ((CHANNEL) == DFSDM_CHANNEL_7))
833 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x000F00FFU))
834 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
835  ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
836 #if defined(DFSDM2_Channel0)
837 #define IS_DFSDM1_CHANNEL_INSTANCE(INSTANCE) (((INSTANCE) == DFSDM1_Channel0) || \
838  ((INSTANCE) == DFSDM1_Channel1) || \
839  ((INSTANCE) == DFSDM1_Channel2) || \
840  ((INSTANCE) == DFSDM1_Channel3) || \
841  ((INSTANCE) == DFSDM1_Channel4) || \
842  ((INSTANCE) == DFSDM1_Channel5) || \
843  ((INSTANCE) == DFSDM1_Channel6) || \
844  ((INSTANCE) == DFSDM1_Channel7))
845 #define IS_DFSDM1_FILTER_INSTANCE(INSTANCE) (((INSTANCE) == DFSDM1_Filter0) || \
846  ((INSTANCE) == DFSDM1_Filter1) || \
847  ((INSTANCE) == DFSDM1_Filter2) || \
848  ((INSTANCE) == DFSDM1_Filter3) || \
849  ((INSTANCE) == DFSDM1_Filter4) || \
850  ((INSTANCE) == DFSDM1_Filter5) || \
851  ((INSTANCE) == DFSDM1_Filter6) || \
852  ((INSTANCE) == DFSDM1_Filter7))
853 #endif /* DFSDM2_Channel0 */
854 
857 /* End of private macros -----------------------------------------------------*/
858 
867 #ifdef __cplusplus
868 }
869 #endif
870 
871 #endif /* STM32H7xx_HAL_DFSDM_H */
872 
873 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_DFSDM_FilterPollForInjConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
DFSDM_Filter_InitTypeDef
DFSDM filter init structure definition.
Definition: stm32h7xx_hal_dfsdm.h:209
DFSDM_Channel_InitTypeDef::OutputClock
DFSDM_Channel_OutputClockTypeDef OutputClock
Definition: stm32h7xx_hal_dfsdm.h:106
DFSDM_Filter_AwdParamTypeDef::DataSource
uint32_t DataSource
Definition: stm32h7xx_hal_dfsdm.h:256
DFSDM_Channel_InputTypeDef::DataPacking
uint32_t DataPacking
Definition: stm32h7xx_hal_dfsdm.h:73
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
HAL_DFSDM_FilterGetExdMaxValue
int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
HAL_DFSDM_FilterDeInit
HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterInit
HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FILTER_STATE_REG
@ HAL_DFSDM_FILTER_STATE_REG
Definition: stm32h7xx_hal_dfsdm.h:161
DFSDM_Filter_RegularParamTypeDef::DmaMode
FunctionalState DmaMode
Definition: stm32h7xx_hal_dfsdm.h:175
HAL_DFSDM_FILTER_STATE_REG_INJ
@ HAL_DFSDM_FILTER_STATE_REG_INJ
Definition: stm32h7xx_hal_dfsdm.h:163
DFSDM_Filter_HandleTypeDef::hdmaInj
DMA_HandleTypeDef * hdmaInj
Definition: stm32h7xx_hal_dfsdm.h:228
HAL_DFSDM_ChannelCkabStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_RegularParamTypeDef
DFSDM filter regular conversion parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:170
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_DFSDM_ChannelScdCallback
void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_InitTypeDef::SerialInterface
DFSDM_Channel_SerialInterfaceTypeDef SerialInterface
Definition: stm32h7xx_hal_dfsdm.h:108
DFSDM_Channel_AwdTypeDef::FilterOrder
uint32_t FilterOrder
Definition: stm32h7xx_hal_dfsdm.h:95
HAL_DFSDM_FilterRegularStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterGetState
HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelGetState
HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_InitTypeDef::Offset
int32_t Offset
Definition: stm32h7xx_hal_dfsdm.h:110
DFSDM_Channel_SerialInterfaceTypeDef::Type
uint32_t Type
Definition: stm32h7xx_hal_dfsdm.h:84
DFSDM_Channel_OutputClockTypeDef
DFSDM channel output clock structure definition.
Definition: stm32h7xx_hal_dfsdm.h:57
DFSDM_Filter_InjectedParamTypeDef::DmaMode
FunctionalState DmaMode
Definition: stm32h7xx_hal_dfsdm.h:186
HAL_DFSDM_ChannelMspInit
void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel MSP Initialization This function configures the hardware resources used in this example...
Definition: stm32h7xx_hal_msp.c:207
DFSDM_Filter_HandleTypeDef::RegularTrigger
uint32_t RegularTrigger
Definition: stm32h7xx_hal_dfsdm.h:230
HAL_DFSDM_ChannelGetAwdValue
int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_ChannelModifyOffset
HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset)
HAL_DFSDM_FILTER_STATE_INJ
@ HAL_DFSDM_FILTER_STATE_INJ
Definition: stm32h7xx_hal_dfsdm.h:162
HAL_DFSDM_ChannelScdStop
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterMspDeInit
void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:257
HAL_DFSDM_FilterInjectedStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
HAL_DFSDM_FilterGetInjectedValue
int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
HAL_DFSDM_FilterRegConvHalfCpltCallback
void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Half regular conversion complete callback.
Definition: stm32f769i_discovery_audio.c:1517
HAL_DFSDM_FilterPollForRegConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
HAL_DFSDM_ChannelPollForCkab
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
DFSDM_Filter_AwdParamTypeDef::Channel
uint32_t Channel
Definition: stm32h7xx_hal_dfsdm.h:258
HAL_DFSDM_FilterInjConvHalfCpltCallback
void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterRegularMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
HAL_DFSDM_Channel_StateTypeDef
HAL_DFSDM_Channel_StateTypeDef
HAL DFSDM Channel states definition.
Definition: stm32h7xx_hal_dfsdm.h:47
HAL_DFSDM_FilterRegularStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_HandleTypeDef
DFSDM filter handle structure definition.
Definition: stm32h7xx_hal_dfsdm.h:222
DFSDM_Channel_HandleTypeDef::State
HAL_DFSDM_Channel_StateTypeDef State
Definition: stm32h7xx_hal_dfsdm.h:127
HAL_DFSDM_FilterRegularStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_HandleTypeDef::ErrorCode
uint32_t ErrorCode
Definition: stm32h7xx_hal_dfsdm.h:237
HAL_DFSDM_FilterInjectedStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_SerialInterfaceTypeDef
DFSDM channel serial interface structure definition.
Definition: stm32h7xx_hal_dfsdm.h:82
DFSDM_Channel_HandleTypeDef::Instance
DFSDM_Channel_TypeDef * Instance
Definition: stm32h7xx_hal_dfsdm.h:125
DFSDM_Filter_HandleTypeDef::RegularContMode
uint32_t RegularContMode
Definition: stm32h7xx_hal_dfsdm.h:229
DFSDM_Filter_HandleTypeDef::hdmaReg
DMA_HandleTypeDef * hdmaReg
Definition: stm32h7xx_hal_dfsdm.h:227
HAL_DFSDM_FilterAwdStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelCkabStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_HandleTypeDef::State
HAL_DFSDM_Filter_StateTypeDef State
Definition: stm32h7xx_hal_dfsdm.h:236
DFSDM_Filter_HandleTypeDef::Instance
DFSDM_Filter_TypeDef * Instance
Definition: stm32h7xx_hal_dfsdm.h:225
HAL_DFSDM_FilterRegularStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
HAL_DFSDM_FilterRegularStart
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_HandleTypeDef::ExtTriggerEdge
uint32_t ExtTriggerEdge
Definition: stm32h7xx_hal_dfsdm.h:232
DFSDM_Filter_FilterParamTypeDef::Oversampling
uint32_t Oversampling
Definition: stm32h7xx_hal_dfsdm.h:200
HAL_DFSDM_FilterGetExdMinValue
int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
DFSDM_Channel_InitTypeDef::Awd
DFSDM_Channel_AwdTypeDef Awd
Definition: stm32h7xx_hal_dfsdm.h:109
HAL_DFSDM_FilterGetError
uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelScdStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_TypeDef
DFSDM channel configuration registers.
Definition: stm32f769xx.h:374
HAL_DFSDM_ChannelMspDeInit
void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:290
HAL_DFSDM_FilterGetConvTimeValue
uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelDeInit
HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_InjectedParamTypeDef::Trigger
uint32_t Trigger
Definition: stm32h7xx_hal_dfsdm.h:183
DFSDM_Channel_AwdTypeDef::Oversampling
uint32_t Oversampling
Definition: stm32h7xx_hal_dfsdm.h:97
DFSDM_Channel_InitTypeDef
DFSDM channel init structure definition.
Definition: stm32h7xx_hal_dfsdm.h:104
DFSDM_Filter_InjectedParamTypeDef::ExtTriggerEdge
uint32_t ExtTriggerEdge
Definition: stm32h7xx_hal_dfsdm.h:189
DFSDM_Filter_HandleTypeDef::InjectedScanMode
FunctionalState InjectedScanMode
Definition: stm32h7xx_hal_dfsdm.h:233
HAL_DFSDM_ChannelInit
HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_AwdParamTypeDef
DFSDM filter analog watchdog parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:254
DFSDM_Filter_RegularParamTypeDef::Trigger
uint32_t Trigger
Definition: stm32h7xx_hal_dfsdm.h:172
DFSDM_Filter_FilterParamTypeDef::IntOversampling
uint32_t IntOversampling
Definition: stm32h7xx_hal_dfsdm.h:202
HAL_DFSDM_FilterMspInit
void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter MSP Initialization This function configures the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:133
DFSDM_Channel_OutputClockTypeDef::Selection
uint32_t Selection
Definition: stm32h7xx_hal_dfsdm.h:60
HAL_DFSDM_ChannelCkabCallback
void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_IRQHandler
void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_HandleTypeDef::InjConvRemaining
uint32_t InjConvRemaining
Definition: stm32h7xx_hal_dfsdm.h:235
HAL_DFSDM_CHANNEL_STATE_READY
@ HAL_DFSDM_CHANNEL_STATE_READY
Definition: stm32h7xx_hal_dfsdm.h:50
HAL_DFSDM_FilterInjectedMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
HAL_DFSDM_FilterErrorCallback
void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_AwdParamTypeDef::LowThreshold
int32_t LowThreshold
Definition: stm32h7xx_hal_dfsdm.h:262
DFSDM_Channel_InputTypeDef
DFSDM channel input structure definition.
Definition: stm32h7xx_hal_dfsdm.h:69
DFSDM_Filter_RegularParamTypeDef::FastMode
FunctionalState FastMode
Definition: stm32h7xx_hal_dfsdm.h:174
DFSDM_Channel_InputTypeDef::Multiplexer
uint32_t Multiplexer
Definition: stm32h7xx_hal_dfsdm.h:71
DFSDM_Filter_AwdParamTypeDef::HighThreshold
int32_t HighThreshold
Definition: stm32h7xx_hal_dfsdm.h:260
HAL_DFSDM_FilterInjectedStart
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_HandleTypeDef
DFSDM channel handle structure definition.
Definition: stm32h7xx_hal_dfsdm.h:122
HAL_DFSDM_CHANNEL_STATE_ERROR
@ HAL_DFSDM_CHANNEL_STATE_ERROR
Definition: stm32h7xx_hal_dfsdm.h:51
HAL_DFSDM_FilterInjectedStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_SerialInterfaceTypeDef::SpiClock
uint32_t SpiClock
Definition: stm32h7xx_hal_dfsdm.h:86
DFSDM_Filter_HandleTypeDef::Init
DFSDM_Filter_InitTypeDef Init
Definition: stm32h7xx_hal_dfsdm.h:226
DFSDM_Channel_InputTypeDef::Pins
uint32_t Pins
Definition: stm32h7xx_hal_dfsdm.h:75
HAL_DFSDM_FilterConfigRegChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t ContinuousMode)
DFSDM_Channel_OutputClockTypeDef::Activation
FunctionalState Activation
Definition: stm32h7xx_hal_dfsdm.h:59
DFSDM_Filter_AwdParamTypeDef::LowBreakSignal
uint32_t LowBreakSignal
Definition: stm32h7xx_hal_dfsdm.h:266
DFSDM_Filter_InjectedParamTypeDef
DFSDM filter injected conversion parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:181
HAL_DFSDM_ChannelScdStart
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
HAL_DFSDM_FilterInjectedStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_InitTypeDef::FilterParam
DFSDM_Filter_FilterParamTypeDef FilterParam
Definition: stm32h7xx_hal_dfsdm.h:213
HAL_DFSDM_FilterExdStart
HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
DFSDM_Filter_HandleTypeDef::InjectedChannelsNbr
uint32_t InjectedChannelsNbr
Definition: stm32h7xx_hal_dfsdm.h:234
HAL_DFSDM_FilterInjConvCpltCallback
void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterRegConvCpltCallback
void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Regular conversion complete callback.
Definition: stm32f769i_discovery_audio.c:1441
DFSDM_Filter_HandleTypeDef::InjectedTrigger
uint32_t InjectedTrigger
Definition: stm32h7xx_hal_dfsdm.h:231
DFSDM_Filter_TypeDef
DFSDM module registers.
Definition: stm32f769xx.h:352
HAL_DFSDM_FilterRegularStop
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_InitTypeDef::Input
DFSDM_Channel_InputTypeDef Input
Definition: stm32h7xx_hal_dfsdm.h:107
DFSDM_Channel_InitTypeDef::RightBitShift
uint32_t RightBitShift
Definition: stm32h7xx_hal_dfsdm.h:112
HAL_DFSDM_FilterConfigInjChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
HAL_DFSDM_Filter_StateTypeDef
HAL_DFSDM_Filter_StateTypeDef
HAL DFSDM Filter states definition.
Definition: stm32h7xx_hal_dfsdm.h:157
HAL_DFSDM_FilterInjectedStop
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterGetRegularValue
int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
DFSDM_Channel_OutputClockTypeDef::Divider
uint32_t Divider
Definition: stm32h7xx_hal_dfsdm.h:62
DFSDM_Filter_FilterParamTypeDef
DFSDM filter parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:196
DFSDM_Filter_InjectedParamTypeDef::ScanMode
FunctionalState ScanMode
Definition: stm32h7xx_hal_dfsdm.h:185
HAL_DFSDM_FilterExdStop
HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_InitTypeDef::InjectedParam
DFSDM_Filter_InjectedParamTypeDef InjectedParam
Definition: stm32h7xx_hal_dfsdm.h:212
HAL_DFSDM_FILTER_STATE_READY
@ HAL_DFSDM_FILTER_STATE_READY
Definition: stm32h7xx_hal_dfsdm.h:160
HAL_DFSDM_ChannelScdStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
DFSDM_Filter_InjectedParamTypeDef::ExtTrigger
uint32_t ExtTrigger
Definition: stm32h7xx_hal_dfsdm.h:187
HAL_DFSDM_ChannelCkabStop
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterAwdStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, DFSDM_Filter_AwdParamTypeDef *awdParam)
DFSDM_Filter_FilterParamTypeDef::SincOrder
uint32_t SincOrder
Definition: stm32h7xx_hal_dfsdm.h:198
HAL_DFSDM_FILTER_STATE_RESET
@ HAL_DFSDM_FILTER_STATE_RESET
Definition: stm32h7xx_hal_dfsdm.h:159
DFSDM_Channel_HandleTypeDef::Init
DFSDM_Channel_InitTypeDef Init
Definition: stm32h7xx_hal_dfsdm.h:126
HAL_DFSDM_FILTER_STATE_ERROR
@ HAL_DFSDM_FILTER_STATE_ERROR
Definition: stm32h7xx_hal_dfsdm.h:164
HAL_DFSDM_ChannelPollForScd
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
HAL_DFSDM_FilterAwdCallback
void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold)
DFSDM_Channel_AwdTypeDef
DFSDM channel analog watchdog structure definition.
Definition: stm32h7xx_hal_dfsdm.h:93
HAL_DFSDM_CHANNEL_STATE_RESET
@ HAL_DFSDM_CHANNEL_STATE_RESET
Definition: stm32h7xx_hal_dfsdm.h:49
HAL_DFSDM_ChannelCkabStart
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_InitTypeDef::RegularParam
DFSDM_Filter_RegularParamTypeDef RegularParam
Definition: stm32h7xx_hal_dfsdm.h:211
FunctionalState
FunctionalState
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:191
DFSDM_Filter_AwdParamTypeDef::HighBreakSignal
uint32_t HighBreakSignal
Definition: stm32h7xx_hal_dfsdm.h:264

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autogenerated on Fri Apr 1 2022 02:14:54