Collaboration diagram for RTWDOG Register Masks:

CS - Watchdog Control and Status Register

#define RTWDOG_CS_STOP_MASK   (0x1U)
 
#define RTWDOG_CS_STOP_SHIFT   (0U)
 
#define RTWDOG_CS_STOP(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)
 
#define RTWDOG_CS_WAIT_MASK   (0x2U)
 
#define RTWDOG_CS_WAIT_SHIFT   (1U)
 
#define RTWDOG_CS_WAIT(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)
 
#define RTWDOG_CS_DBG_MASK   (0x4U)
 
#define RTWDOG_CS_DBG_SHIFT   (2U)
 
#define RTWDOG_CS_DBG(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)
 
#define RTWDOG_CS_TST_MASK   (0x18U)
 
#define RTWDOG_CS_TST_SHIFT   (3U)
 
#define RTWDOG_CS_TST(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)
 
#define RTWDOG_CS_UPDATE_MASK   (0x20U)
 
#define RTWDOG_CS_UPDATE_SHIFT   (5U)
 
#define RTWDOG_CS_UPDATE(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)
 
#define RTWDOG_CS_INT_MASK   (0x40U)
 
#define RTWDOG_CS_INT_SHIFT   (6U)
 
#define RTWDOG_CS_INT(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)
 
#define RTWDOG_CS_EN_MASK   (0x80U)
 
#define RTWDOG_CS_EN_SHIFT   (7U)
 
#define RTWDOG_CS_EN(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)
 
#define RTWDOG_CS_CLK_MASK   (0x300U)
 
#define RTWDOG_CS_CLK_SHIFT   (8U)
 
#define RTWDOG_CS_CLK(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)
 
#define RTWDOG_CS_RCS_MASK   (0x400U)
 
#define RTWDOG_CS_RCS_SHIFT   (10U)
 
#define RTWDOG_CS_RCS(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)
 
#define RTWDOG_CS_ULK_MASK   (0x800U)
 
#define RTWDOG_CS_ULK_SHIFT   (11U)
 
#define RTWDOG_CS_ULK(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)
 
#define RTWDOG_CS_PRES_MASK   (0x1000U)
 
#define RTWDOG_CS_PRES_SHIFT   (12U)
 
#define RTWDOG_CS_PRES(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)
 
#define RTWDOG_CS_CMD32EN_MASK   (0x2000U)
 
#define RTWDOG_CS_CMD32EN_SHIFT   (13U)
 
#define RTWDOG_CS_CMD32EN(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)
 
#define RTWDOG_CS_FLG_MASK   (0x4000U)
 
#define RTWDOG_CS_FLG_SHIFT   (14U)
 
#define RTWDOG_CS_FLG(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)
 
#define RTWDOG_CS_WIN_MASK   (0x8000U)
 
#define RTWDOG_CS_WIN_SHIFT   (15U)
 
#define RTWDOG_CS_WIN(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)
 

CNT - Watchdog Counter Register

#define RTWDOG_CNT_CNTLOW_MASK   (0xFFU)
 
#define RTWDOG_CNT_CNTLOW_SHIFT   (0U)
 
#define RTWDOG_CNT_CNTLOW(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)
 
#define RTWDOG_CNT_CNTHIGH_MASK   (0xFF00U)
 
#define RTWDOG_CNT_CNTHIGH_SHIFT   (8U)
 
#define RTWDOG_CNT_CNTHIGH(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)
 

TOVAL - Watchdog Timeout Value Register

#define RTWDOG_TOVAL_TOVALLOW_MASK   (0xFFU)
 
#define RTWDOG_TOVAL_TOVALLOW_SHIFT   (0U)
 
#define RTWDOG_TOVAL_TOVALLOW(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)
 
#define RTWDOG_TOVAL_TOVALHIGH_MASK   (0xFF00U)
 
#define RTWDOG_TOVAL_TOVALHIGH_SHIFT   (8U)
 
#define RTWDOG_TOVAL_TOVALHIGH(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)
 

WIN - Watchdog Window Register

#define RTWDOG_WIN_WINLOW_MASK   (0xFFU)
 
#define RTWDOG_WIN_WINLOW_SHIFT   (0U)
 
#define RTWDOG_WIN_WINLOW(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)
 
#define RTWDOG_WIN_WINHIGH_MASK   (0xFF00U)
 
#define RTWDOG_WIN_WINHIGH_SHIFT   (8U)
 
#define RTWDOG_WIN_WINHIGH(x)   (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)
 

Detailed Description

Macro Definition Documentation

◆ RTWDOG_CNT_CNTHIGH

#define RTWDOG_CNT_CNTHIGH (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)

CNTHIGH - High byte of the Watchdog Counter

Definition at line 34061 of file MIMXRT1052.h.

◆ RTWDOG_CNT_CNTHIGH_MASK

#define RTWDOG_CNT_CNTHIGH_MASK   (0xFF00U)

Definition at line 34057 of file MIMXRT1052.h.

◆ RTWDOG_CNT_CNTHIGH_SHIFT

#define RTWDOG_CNT_CNTHIGH_SHIFT   (8U)

Definition at line 34058 of file MIMXRT1052.h.

◆ RTWDOG_CNT_CNTLOW

#define RTWDOG_CNT_CNTLOW (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)

CNTLOW - Low byte of the Watchdog Counter

Definition at line 34056 of file MIMXRT1052.h.

◆ RTWDOG_CNT_CNTLOW_MASK

#define RTWDOG_CNT_CNTLOW_MASK   (0xFFU)

Definition at line 34052 of file MIMXRT1052.h.

◆ RTWDOG_CNT_CNTLOW_SHIFT

#define RTWDOG_CNT_CNTLOW_SHIFT   (0U)

Definition at line 34053 of file MIMXRT1052.h.

◆ RTWDOG_CS_CLK

#define RTWDOG_CS_CLK (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)

CLK - Watchdog Clock 0b00..Bus clock 0b01..LPO clock 0b10..INTCLK (internal clock) 0b11..ERCLK (external reference clock)

Definition at line 34005 of file MIMXRT1052.h.

◆ RTWDOG_CS_CLK_MASK

#define RTWDOG_CS_CLK_MASK   (0x300U)

Definition at line 33997 of file MIMXRT1052.h.

◆ RTWDOG_CS_CLK_SHIFT

#define RTWDOG_CS_CLK_SHIFT   (8U)

Definition at line 33998 of file MIMXRT1052.h.

◆ RTWDOG_CS_CMD32EN

#define RTWDOG_CS_CMD32EN (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)

CMD32EN - Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words 0b0..Disables support for 32-bit refresh/unlock command write words. Only 16-bit or 8-bit is supported. 0b1..Enables support for 32-bit refresh/unlock command write words. 16-bit or 8-bit is NOT supported.

Definition at line 34033 of file MIMXRT1052.h.

◆ RTWDOG_CS_CMD32EN_MASK

#define RTWDOG_CS_CMD32EN_MASK   (0x2000U)

Definition at line 34027 of file MIMXRT1052.h.

◆ RTWDOG_CS_CMD32EN_SHIFT

#define RTWDOG_CS_CMD32EN_SHIFT   (13U)

Definition at line 34028 of file MIMXRT1052.h.

◆ RTWDOG_CS_DBG

#define RTWDOG_CS_DBG (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)

DBG - Debug Enable 0b0..Watchdog disabled in chip debug mode. 0b1..Watchdog enabled in chip debug mode.

Definition at line 33965 of file MIMXRT1052.h.

◆ RTWDOG_CS_DBG_MASK

#define RTWDOG_CS_DBG_MASK   (0x4U)

Definition at line 33959 of file MIMXRT1052.h.

◆ RTWDOG_CS_DBG_SHIFT

#define RTWDOG_CS_DBG_SHIFT   (2U)

Definition at line 33960 of file MIMXRT1052.h.

◆ RTWDOG_CS_EN

#define RTWDOG_CS_EN (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)

EN - Watchdog Enable 0b0..Watchdog disabled. 0b1..Watchdog enabled.

Definition at line 33996 of file MIMXRT1052.h.

◆ RTWDOG_CS_EN_MASK

#define RTWDOG_CS_EN_MASK   (0x80U)

Definition at line 33990 of file MIMXRT1052.h.

◆ RTWDOG_CS_EN_SHIFT

#define RTWDOG_CS_EN_SHIFT   (7U)

Definition at line 33991 of file MIMXRT1052.h.

◆ RTWDOG_CS_FLG

#define RTWDOG_CS_FLG (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)

FLG - Watchdog Interrupt Flag 0b0..No interrupt occurred. 0b1..An interrupt occurred.

Definition at line 34040 of file MIMXRT1052.h.

◆ RTWDOG_CS_FLG_MASK

#define RTWDOG_CS_FLG_MASK   (0x4000U)

Definition at line 34034 of file MIMXRT1052.h.

◆ RTWDOG_CS_FLG_SHIFT

#define RTWDOG_CS_FLG_SHIFT   (14U)

Definition at line 34035 of file MIMXRT1052.h.

◆ RTWDOG_CS_INT

#define RTWDOG_CS_INT (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)

INT - Watchdog Interrupt 0b0..Watchdog interrupts are disabled. Watchdog resets are not delayed. 0b1..Watchdog interrupts are enabled. Watchdog resets are delayed by 128 bus clocks from the interrupt vector fetch.

Definition at line 33989 of file MIMXRT1052.h.

◆ RTWDOG_CS_INT_MASK

#define RTWDOG_CS_INT_MASK   (0x40U)

Definition at line 33983 of file MIMXRT1052.h.

◆ RTWDOG_CS_INT_SHIFT

#define RTWDOG_CS_INT_SHIFT   (6U)

Definition at line 33984 of file MIMXRT1052.h.

◆ RTWDOG_CS_PRES

#define RTWDOG_CS_PRES (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)

PRES - Watchdog prescaler 0b0..256 prescaler disabled. 0b1..256 prescaler enabled.

Definition at line 34026 of file MIMXRT1052.h.

◆ RTWDOG_CS_PRES_MASK

#define RTWDOG_CS_PRES_MASK   (0x1000U)

Definition at line 34020 of file MIMXRT1052.h.

◆ RTWDOG_CS_PRES_SHIFT

#define RTWDOG_CS_PRES_SHIFT   (12U)

Definition at line 34021 of file MIMXRT1052.h.

◆ RTWDOG_CS_RCS

#define RTWDOG_CS_RCS (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)

RCS - Reconfiguration Success 0b0..Reconfiguring WDOG. 0b1..Reconfiguration is successful.

Definition at line 34012 of file MIMXRT1052.h.

◆ RTWDOG_CS_RCS_MASK

#define RTWDOG_CS_RCS_MASK   (0x400U)

Definition at line 34006 of file MIMXRT1052.h.

◆ RTWDOG_CS_RCS_SHIFT

#define RTWDOG_CS_RCS_SHIFT   (10U)

Definition at line 34007 of file MIMXRT1052.h.

◆ RTWDOG_CS_STOP

#define RTWDOG_CS_STOP (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)

STOP - Stop Enable 0b0..Watchdog disabled in chip stop mode. 0b1..Watchdog enabled in chip stop mode.

Definition at line 33951 of file MIMXRT1052.h.

◆ RTWDOG_CS_STOP_MASK

#define RTWDOG_CS_STOP_MASK   (0x1U)

Definition at line 33945 of file MIMXRT1052.h.

◆ RTWDOG_CS_STOP_SHIFT

#define RTWDOG_CS_STOP_SHIFT   (0U)

Definition at line 33946 of file MIMXRT1052.h.

◆ RTWDOG_CS_TST

#define RTWDOG_CS_TST (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)

TST - Watchdog Test 0b00..Watchdog test mode disabled. 0b01..Watchdog user mode enabled. (Watchdog test mode disabled.) After testing the watchdog, software should use this setting to indicate that the watchdog is functioning normally in user mode. 0b10..Watchdog test mode enabled, only the low byte is used. CNT[CNTLOW] is compared with TOVAL[TOVALLOW]. 0b11..Watchdog test mode enabled, only the high byte is used. CNT[CNTHIGH] is compared with TOVAL[TOVALHIGH].

Definition at line 33975 of file MIMXRT1052.h.

◆ RTWDOG_CS_TST_MASK

#define RTWDOG_CS_TST_MASK   (0x18U)

Definition at line 33966 of file MIMXRT1052.h.

◆ RTWDOG_CS_TST_SHIFT

#define RTWDOG_CS_TST_SHIFT   (3U)

Definition at line 33967 of file MIMXRT1052.h.

◆ RTWDOG_CS_ULK

#define RTWDOG_CS_ULK (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)

ULK - Unlock status 0b0..WDOG is locked. 0b1..WDOG is unlocked.

Definition at line 34019 of file MIMXRT1052.h.

◆ RTWDOG_CS_ULK_MASK

#define RTWDOG_CS_ULK_MASK   (0x800U)

Definition at line 34013 of file MIMXRT1052.h.

◆ RTWDOG_CS_ULK_SHIFT

#define RTWDOG_CS_ULK_SHIFT   (11U)

Definition at line 34014 of file MIMXRT1052.h.

◆ RTWDOG_CS_UPDATE

#define RTWDOG_CS_UPDATE (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)

UPDATE - Allow updates 0b0..Updates not allowed. After the initial configuration, the watchdog cannot be later modified without forcing a reset. 0b1..Updates allowed. Software can modify the watchdog configuration registers within 128 bus clocks after performing the unlock write sequence.

Definition at line 33982 of file MIMXRT1052.h.

◆ RTWDOG_CS_UPDATE_MASK

#define RTWDOG_CS_UPDATE_MASK   (0x20U)

Definition at line 33976 of file MIMXRT1052.h.

◆ RTWDOG_CS_UPDATE_SHIFT

#define RTWDOG_CS_UPDATE_SHIFT   (5U)

Definition at line 33977 of file MIMXRT1052.h.

◆ RTWDOG_CS_WAIT

#define RTWDOG_CS_WAIT (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)

WAIT - Wait Enable 0b0..Watchdog disabled in chip wait mode. 0b1..Watchdog enabled in chip wait mode.

Definition at line 33958 of file MIMXRT1052.h.

◆ RTWDOG_CS_WAIT_MASK

#define RTWDOG_CS_WAIT_MASK   (0x2U)

Definition at line 33952 of file MIMXRT1052.h.

◆ RTWDOG_CS_WAIT_SHIFT

#define RTWDOG_CS_WAIT_SHIFT   (1U)

Definition at line 33953 of file MIMXRT1052.h.

◆ RTWDOG_CS_WIN

#define RTWDOG_CS_WIN (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)

WIN - Watchdog Window 0b0..Window mode disabled. 0b1..Window mode enabled.

Definition at line 34047 of file MIMXRT1052.h.

◆ RTWDOG_CS_WIN_MASK

#define RTWDOG_CS_WIN_MASK   (0x8000U)

Definition at line 34041 of file MIMXRT1052.h.

◆ RTWDOG_CS_WIN_SHIFT

#define RTWDOG_CS_WIN_SHIFT   (15U)

Definition at line 34042 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALHIGH

#define RTWDOG_TOVAL_TOVALHIGH (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)

TOVALHIGH - High byte of the timeout value

Definition at line 34075 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALHIGH_MASK

#define RTWDOG_TOVAL_TOVALHIGH_MASK   (0xFF00U)

Definition at line 34071 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALHIGH_SHIFT

#define RTWDOG_TOVAL_TOVALHIGH_SHIFT   (8U)

Definition at line 34072 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALLOW

#define RTWDOG_TOVAL_TOVALLOW (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)

TOVALLOW - Low byte of the timeout value

Definition at line 34070 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALLOW_MASK

#define RTWDOG_TOVAL_TOVALLOW_MASK   (0xFFU)

Definition at line 34066 of file MIMXRT1052.h.

◆ RTWDOG_TOVAL_TOVALLOW_SHIFT

#define RTWDOG_TOVAL_TOVALLOW_SHIFT   (0U)

Definition at line 34067 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINHIGH

#define RTWDOG_WIN_WINHIGH (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)

WINHIGH - High byte of Watchdog Window

Definition at line 34089 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINHIGH_MASK

#define RTWDOG_WIN_WINHIGH_MASK   (0xFF00U)

Definition at line 34085 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINHIGH_SHIFT

#define RTWDOG_WIN_WINHIGH_SHIFT   (8U)

Definition at line 34086 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINLOW

#define RTWDOG_WIN_WINLOW (   x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)

WINLOW - Low byte of Watchdog Window

Definition at line 34084 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINLOW_MASK

#define RTWDOG_WIN_WINLOW_MASK   (0xFFU)

Definition at line 34080 of file MIMXRT1052.h.

◆ RTWDOG_WIN_WINLOW_SHIFT

#define RTWDOG_WIN_WINLOW_SHIFT   (0U)

Definition at line 34081 of file MIMXRT1052.h.



picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:10