PWM Peripheral Access Layer

Collaboration diagram for PWM Peripheral Access Layer:

Modules
	PWM Register Masks

Classes
struct	PWM_Type

Macros
#define	PWM1   ((PWM_Type *)PWM1_BASE)
#define	PWM1_BASE   (0x403DC000u)
#define	PWM2   ((PWM_Type *)PWM2_BASE)
#define	PWM2_BASE   (0x403E0000u)
#define	PWM3   ((PWM_Type *)PWM3_BASE)
#define	PWM3_BASE   (0x403E4000u)
#define	PWM4   ((PWM_Type *)PWM4_BASE)
#define	PWM4_BASE   (0x403E8000u)
#define	PWM_BASE_ADDRS   { 0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE }
#define	PWM_BASE_PTRS   { (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4 }
#define	PWM_CAPTURE_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
#define	PWM_CMP_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
#define	PWM_FAULT_IRQS   { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
#define	PWM_RELOAD_ERROR_IRQS   { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
#define	PWM_RELOAD_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }

Detailed Description

Macro Definition Documentation

PWM1

#define PWM1   ((PWM_Type *)PWM1_BASE)

Peripheral PWM1 base pointer

Definition at line 32470 of file MIMXRT1052.h.

PWM1_BASE

#define PWM1_BASE   (0x403DC000u)

Peripheral PWM1 base address

Definition at line 32468 of file MIMXRT1052.h.

PWM2

#define PWM2   ((PWM_Type *)PWM2_BASE)

Peripheral PWM2 base pointer

Definition at line 32474 of file MIMXRT1052.h.

PWM2_BASE

#define PWM2_BASE   (0x403E0000u)

Peripheral PWM2 base address

Definition at line 32472 of file MIMXRT1052.h.

PWM3

#define PWM3   ((PWM_Type *)PWM3_BASE)

Peripheral PWM3 base pointer

Definition at line 32478 of file MIMXRT1052.h.

PWM3_BASE

#define PWM3_BASE   (0x403E4000u)

Peripheral PWM3 base address

Definition at line 32476 of file MIMXRT1052.h.

PWM4

#define PWM4   ((PWM_Type *)PWM4_BASE)

Peripheral PWM4 base pointer

Definition at line 32482 of file MIMXRT1052.h.

PWM4_BASE

#define PWM4_BASE   (0x403E8000u)

Peripheral PWM4 base address

Definition at line 32480 of file MIMXRT1052.h.

PWM_BASE_ADDRS

#define PWM_BASE_ADDRS   { 0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE }

Array initializer of PWM peripheral base addresses

Definition at line 32484 of file MIMXRT1052.h.

PWM_BASE_PTRS

#define PWM_BASE_PTRS   { (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4 }

Array initializer of PWM peripheral base pointers

Definition at line 32486 of file MIMXRT1052.h.

PWM_CAPTURE_IRQS

#define PWM_CAPTURE_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }

Definition at line 32490 of file MIMXRT1052.h.

PWM_CMP_IRQS

#define PWM_CMP_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }

Interrupt vectors for the PWM peripheral type

Definition at line 32488 of file MIMXRT1052.h.

PWM_FAULT_IRQS

#define PWM_FAULT_IRQS   { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }

Definition at line 32491 of file MIMXRT1052.h.

PWM_RELOAD_ERROR_IRQS

#define PWM_RELOAD_ERROR_IRQS   { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }

Definition at line 32492 of file MIMXRT1052.h.

PWM_RELOAD_IRQS

#define PWM_RELOAD_IRQS   { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }

Definition at line 32489 of file MIMXRT1052.h.