test_sparc.c
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1 /* Capstone Disassembler Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
3 
4 #include <stdio.h>
5 
6 #include <capstone/platform.h>
7 #include <capstone/capstone.h>
8 
9 struct platform {
10  cs_arch arch;
11  cs_mode mode;
12  unsigned char *code;
13  size_t size;
14  const char *comment;
15 };
16 
17 static csh handle;
18 
19 static void print_string_hex(const char *comment, unsigned char *str, size_t len)
20 {
21  unsigned char *c;
22 
23  printf("%s", comment);
24  for (c = str; c < str + len; c++) {
25  printf("0x%02x ", *c & 0xff);
26  }
27 
28  printf("\n");
29 }
30 
31 static void print_insn_detail(cs_insn *ins)
32 {
33  cs_sparc *sparc;
34  int i;
35 
36  // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
37  if (ins->detail == NULL)
38  return;
39 
40  sparc = &(ins->detail->sparc);
41  if (sparc->op_count)
42  printf("\top_count: %u\n", sparc->op_count);
43 
44  for (i = 0; i < sparc->op_count; i++) {
45  cs_sparc_op *op = &(sparc->operands[i]);
46  switch((int)op->type) {
47  default:
48  break;
49  case SPARC_OP_REG:
50  printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
51  break;
52  case SPARC_OP_IMM:
53  printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
54  break;
55  case SPARC_OP_MEM:
56  printf("\t\toperands[%u].type: MEM\n", i);
57  if (op->mem.base != X86_REG_INVALID)
58  printf("\t\t\toperands[%u].mem.base: REG = %s\n",
59  i, cs_reg_name(handle, op->mem.base));
60  if (op->mem.index != X86_REG_INVALID)
61  printf("\t\t\toperands[%u].mem.index: REG = %s\n",
62  i, cs_reg_name(handle, op->mem.index));
63  if (op->mem.disp != 0)
64  printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
65 
66  break;
67  }
68  }
69 
70  if (sparc->cc != 0)
71  printf("\tCode condition: %u\n", sparc->cc);
72 
73  if (sparc->hint != 0)
74  printf("\tHint code: %u\n", sparc->hint);
75 
76  printf("\n");
77 }
78 
79 static void test()
80 {
81 #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
82 
83 #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
84 
85  struct platform platforms[] = {
86  {
89  (unsigned char*)SPARC_CODE,
90  sizeof(SPARC_CODE) - 1,
91  "Sparc",
92  },
93  {
96  (unsigned char*)SPARCV9_CODE,
97  sizeof(SPARCV9_CODE) - 1,
98  "SparcV9"
99  },
100  };
101 
102  uint64_t address = 0x1000;
103  cs_insn *insn;
104  int i;
105  size_t count;
106 
107  for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
108  cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
109  if (err) {
110  printf("Failed on cs_open() with error returned: %u\n", err);
111  abort();
112  }
113 
115 
116  count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
117  if (count) {
118  size_t j;
119 
120  printf("****************\n");
121  printf("Platform: %s\n", platforms[i].comment);
123  printf("Disasm:\n");
124 
125  for (j = 0; j < count; j++) {
126  printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
127  print_insn_detail(&insn[j]);
128  }
129  printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
130 
131  // free memory allocated by cs_disasm()
132  cs_free(insn, count);
133  } else {
134  printf("****************\n");
135  printf("Platform: %s\n", platforms[i].comment);
137  printf("ERROR: Failed to disasm given code!\n");
138  abort();
139  }
140 
141  printf("\n");
142 
143  cs_close(&handle);
144  }
145 }
146 
147 int main()
148 {
149  test();
150 
151  return 0;
152 }
xds_interop_client.str
str
Definition: xds_interop_client.py:487
SPARC_OP_IMM
@ SPARC_OP_IMM
= CS_OP_IMM (Immediate operand).
Definition: sparc.h:73
cs_close
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
Definition: cs.c:522
sparc
Definition: test_winkernel.cpp:75
platform::code
unsigned char * code
Definition: test_arm_regression.c:21
cs_disasm
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
Definition: cs.c:822
printf
_Use_decl_annotations_ int __cdecl printf(const char *_Format,...)
Definition: cs_driver.c:91
error_ref_leak.err
err
Definition: error_ref_leak.py:35
cs_open
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
Definition: cs.c:474
platform::mode
cs_mode mode
Definition: test_arm_regression.c:20
cs_arch
cs_arch
Architecture type.
Definition: capstone.h:74
mode
const char int mode
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:135
CS_OPT_DETAIL
@ CS_OPT_DETAIL
Break down instruction structure into details.
Definition: capstone.h:172
cs_option
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
Definition: cs.c:670
cs_sparc_op
Instruction operand.
Definition: sparc.h:189
cs_mode
cs_mode
Mode type.
Definition: capstone.h:103
capstone.h
c
void c(T a)
Definition: miscompile_with_no_unique_address_test.cc:40
cs_reg_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
Definition: cs.c:1176
SPARCV9_CODE
#define SPARCV9_CODE
platform.h
uint64_t
unsigned __int64 uint64_t
Definition: stdint-msvc2008.h:90
SPARC_OP_REG
@ SPARC_OP_REG
= CS_OP_REG (Register operand).
Definition: sparc.h:72
handle
static csh handle
Definition: test_sparc.c:17
main
int main()
Definition: test_sparc.c:147
CS_OPT_ON
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
Definition: capstone.h:184
platform::comment
char * comment
Definition: test_arm_regression.c:23
CS_MODE_BIG_ENDIAN
@ CS_MODE_BIG_ENDIAN
big-endian mode
Definition: capstone.h:124
cs_sparc
Instruction structure.
Definition: sparc.h:199
arch
cs_arch arch
Definition: cstool.c:13
platform::arch
cs_arch arch
Definition: test_arm_regression.c:19
CS_ARCH_SPARC
@ CS_ARCH_SPARC
Sparc architecture.
Definition: capstone.h:80
csh
size_t csh
Definition: capstone.h:71
print_insn_detail
static void print_insn_detail(cs_insn *ins)
Definition: test_sparc.c:31
SPARC_CODE
#define SPARC_CODE
X86_REG_INVALID
@ X86_REG_INVALID
Definition: x86.h:20
count
int * count
Definition: bloaty/third_party/googletest/googlemock/test/gmock_stress_test.cc:96
print_string_hex
static void print_string_hex(const char *comment, unsigned char *str, size_t len)
Definition: test_sparc.c:19
test
static void test()
Definition: test_sparc.c:79
cs_free
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
Definition: cs.c:1039
CS_MODE_V9
@ CS_MODE_V9
SparcV9 mode (Sparc)
Definition: capstone.h:116
code
Definition: bloaty/third_party/zlib/contrib/infback9/inftree9.h:24
len
int len
Definition: abseil-cpp/absl/base/internal/low_level_alloc_test.cc:46
platforms
struct platform platforms[]
Definition: fuzz_diff.c:18
size
voidpf void uLong size
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:136
SPARC_OP_MEM
@ SPARC_OP_MEM
= CS_OP_MEM (Memory operand).
Definition: sparc.h:74
op
static grpc_op * op
Definition: test/core/fling/client.cc:47
platform
Definition: test_arm_regression.c:18
platform::size
size_t size
Definition: test_arm_regression.c:22
i
uint64_t i
Definition: abseil-cpp/absl/container/btree_benchmark.cc:230


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autogenerated on Thu Mar 13 2025 03:01:32