Go to the documentation of this file. 1 #ifndef CAPSTONE_ENGINE_H
2 #define CAPSTONE_ENGINE_H
13 #if defined(CAPSTONE_HAS_OSXKERNEL)
14 #include <libkern/libkern.h>
23 #pragma warning(disable:4201)
24 #pragma warning(disable:4100)
25 #define CAPSTONE_API __cdecl
26 #ifdef CAPSTONE_SHARED
27 #define CAPSTONE_EXPORT __declspec(dllexport)
28 #else // defined(CAPSTONE_STATIC)
29 #define CAPSTONE_EXPORT
33 #if defined(__GNUC__) && !defined(CAPSTONE_STATIC)
34 #define CAPSTONE_EXPORT __attribute__((visibility("default")))
35 #else // defined(CAPSTONE_STATIC)
36 #define CAPSTONE_EXPORT
41 #define CAPSTONE_DEPRECATED __attribute__((deprecated))
42 #elif defined(_MSC_VER)
43 #define CAPSTONE_DEPRECATED __declspec(deprecated)
45 #pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler")
46 #define CAPSTONE_DEPRECATED
50 #define CS_API_MAJOR 5
51 #define CS_API_MINOR 0
56 #define CS_NEXT_VERSION 5
59 #define CS_VERSION_MAJOR CS_API_MAJOR
60 #define CS_VERSION_MINOR CS_API_MINOR
61 #define CS_VERSION_EXTRA 0
65 #define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)
68 #define CS_MNEMONIC_SIZE 32
95 #define CS_SUPPORT_DIET (CS_ARCH_ALL + 1)
100 #define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2)
238 typedef struct cs_opt_skipdata {
242 const char *mnemonic;
288 typedef struct cs_detail {
317 typedef struct cs_insn {
360 #define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address)
365 typedef enum cs_err {
763 cs_regs regs_read,
uint8_t *regs_read_count,
764 cs_regs regs_write,
uint8_t *regs_write_count);
#define CS_MNEMONIC_SIZE
Maximum size of an instruction mnemonic string.
@ CS_MODE_MIPS2
Mips II ISA.
CAPSTONE_EXPORT int CAPSTONE_API cs_op_index(csh ud, const cs_insn *insn, unsigned int op_type, unsigned int post)
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
@ CS_OPT_SYNTAX_NOREGNAME
Prints register name with only number (CS_OPT_SYNTAX)
@ CS_OPT_MEM
User-defined dynamic memory related functions.
cs_opt_type
Runtime option for the disassembled engine.
@ CS_OPT_SYNTAX
Assembly output syntax.
@ CS_GRP_INVALID
uninitialized/invalid group.
@ CS_MODE_32
32-bit mode (X86)
@ CS_MODE_M680X_6800
M680X Motorola 6800,6802 mode.
@ CS_OP_INVALID
uninitialized/invalid operand.
@ CS_OP_IMM
Immediate operand.
unsigned int id
ID of instruction to be customized.
@ CS_GRP_JUMP
all jump instructions (conditional+direct+indirect jumps)
@ CS_OP_MEM
Memory operand.
@ CS_MODE_LITTLE_ENDIAN
little-endian mode (default mode)
@ CS_OPT_INVALID
No option specified.
@ CS_MODE_M680X_6805
M680X Motorola/Freescale 6805 mode.
@ CS_ARCH_M68K
68K architecture
@ CS_ARCH_MOS65XX
MOS65XX architecture (including MOS6502)
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
@ CS_MODE_M680X_CPU12
used on M68HC12/HCS12
@ CS_ARCH_PPC
PowerPC architecture.
@ CS_MODE_M680X_6801
M680X Motorola 6801,6803 mode.
cs_op_type
Common instruction operand types - to be consistent across all architectures.
@ CS_OPT_UNSIGNED
print immediate operands in unsigned form
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
@ CS_GRP_INT
all interrupt instructions (int+syscall)
cs_arch
Architecture type.
@ CS_OPT_SYNTAX_DEFAULT
Default asm syntax (CS_OPT_SYNTAX).
CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_write(csh ud, const cs_insn *insn, unsigned int reg_id)
void *(CAPSTONE_API * cs_realloc_t)(void *ptr, size_t size)
@ CS_GRP_BRANCH_RELATIVE
all relative branching instructions
@ CS_OPT_DETAIL
Break down instruction structure into details.
@ CS_MODE_M68K_060
M68K 68060 mode.
@ CS_OPT_SYNTAX_INTEL
X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
@ CS_OPT_OFF
Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED.
@ CS_MODE_M68K_000
M68K 68000 mode.
@ CS_MODE_16
16-bit mode (X86)
@ CS_OP_REG
Register operand.
@ CS_AC_READ
Operand read from memory or register.
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_regs_access(csh ud, const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count)
@ CS_ARCH_EVM
Ethereum architecture.
@ CS_ARCH_M680X
680X architecture
void(CAPSTONE_API * cs_free_t)(void *ptr)
@ CS_ARCH_TMS320C64X
TMS320C64x architecture.
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
@ CS_MODE_M68K_010
M68K 68010 mode.
@ CS_MODE_M680X_6808
M680X Motorola/Freescale/NXP 68HC08 mode.
@ CS_MODE_MICRO
MicroMips mode (MIPS)
CAPSTONE_EXPORT int CAPSTONE_API cs_op_count(csh ud, const cs_insn *insn, unsigned int op_type)
const CAPSTONE_EXPORT char *CAPSTONE_API cs_insn_name(csh ud, unsigned int insn)
The M68K instruction and it's operands.
cs_opt_value
Runtime option value (associated with option type above)
@ CS_ARCH_SYSZ
SystemZ architecture.
@ CS_MODE_QPX
Quad Processing eXtensions mode (PPC)
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
@ CS_ARCH_X86
X86 architecture (including x86 & x86-64)
unsigned __int64 uint64_t
const char * mnemonic
Customized instruction mnemonic.
@ CS_OPT_SYNTAX_ATT
X86 ATT asm syntax (CS_OPT_SYNTAX).
CAPSTONE_EXPORT bool CAPSTONE_API cs_support(int query)
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
@ CS_MODE_M68K_020
M68K 68020 mode.
@ CS_MODE_M68K_040
M68K 68040 mode.
@ CS_MODE_THUMB
ARM's Thumb mode, including Thumb-2.
@ CS_GRP_PRIVILEGE
all privileged instructions
static void callback(void *arg, int status, int timeouts, struct hostent *host)
@ CS_MODE_BIG_ENDIAN
big-endian mode
@ CS_MODE_MIPS32R6
Mips32r6 ISA.
@ CS_GRP_RET
all return instructions
@ CS_OPT_SKIPDATA
Skip data when disassembling. Then engine is in SKIPDATA mode.
@ CS_MODE_M68K_030
M68K 68030 mode.
@ CS_MODE_MCLASS
ARM's Cortex-M series.
The M680X instruction and it's operands.
@ CS_MODE_M680X_6809
M680X Motorola 6809 mode.
@ CS_OP_FP
Floating-Point operand.
CAPSTONE_EXPORT CAPSTONE_DEPRECATED size_t CAPSTONE_API cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
@ CS_AC_INVALID
Uninitialized/invalid access type.
@ CS_MODE_M680X_6309
M680X Hitachi 6309 mode.
@ CS_ARCH_SPARC
Sparc architecture.
@ CS_ARCH_MIPS
Mips architecture.
@ CS_MODE_M680X_HCS08
M680X Freescale/NXP HCS08 mode.
@ CS_GRP_CALL
all call instructions
The MOS65XX address mode and it's operands.
struct cs_opt_mem cs_opt_mem
CAPSTONE_EXPORT bool CAPSTONE_API cs_disasm_iter(csh ud, const uint8_t **code, size_t *size, uint64_t *address, cs_insn *insn)
@ CS_MODE_MIPS64
Mips64 ISA (Mips)
@ CS_MODE_64
64-bit mode (X86, PPC)
const CAPSTONE_EXPORT char *CAPSTONE_API cs_strerror(cs_err code)
void *(CAPSTONE_API * cs_calloc_t)(size_t nmemb, size_t size)
@ CS_OPT_SKIPDATA_SETUP
Setup user-defined function for SKIPDATA option.
@ CS_ARCH_ARM
ARM architecture (including Thumb, Thumb-2)
struct cs_opt_mnem cs_opt_mnem
const CAPSTONE_EXPORT char *CAPSTONE_API cs_group_name(csh ud, unsigned int group)
void *(CAPSTONE_API * cs_malloc_t)(size_t size)
CAPSTONE_EXPORT cs_insn *CAPSTONE_API cs_malloc(csh ud)
@ CS_MODE_MIPS3
Mips III ISA.
cs_group_type
Common instruction groups - to be consistent across all architectures.
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
@ CS_MODE_V9
SparcV9 mode (Sparc)
@ CS_MODE_M680X_6301
M680X Hitachi 6301,6303 mode.
@ CS_OPT_MODE
Change engine's mode at run-time.
@ CS_ARCH_ARM64
ARM-64, also called AArch64.
CAPSTONE_EXPORT bool CAPSTONE_API cs_insn_group(csh ud, const cs_insn *insn, unsigned int group_id)
@ CS_GRP_IRET
all interrupt return instructions
@ CS_MODE_MIPS32
Mips32 ISA (Mips)
@ CS_MODE_M680X_6811
M680X Motorola/Freescale/NXP 68HC11 mode.
@ CS_ARCH_XCORE
XCore architecture.
@ CS_MODE_V8
ARMv8 A32 encodings for ARM.
CAPSTONE_EXPORT unsigned int CAPSTONE_API cs_version(int *major, int *minor)
CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_read(csh ud, const cs_insn *insn, unsigned int reg_id)
@ CS_AC_WRITE
Operand write to memory or register.
@ CS_OPT_SYNTAX_MASM
X86 Intel Masm syntax (CS_OPT_SYNTAX).
int(CAPSTONE_API * cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap)
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_errno(csh handle)
@ CS_OPT_MNEMONIC
Customize instruction mnemonic.
#define CAPSTONE_DEPRECATED
grpc
Author(s):
autogenerated on Thu Mar 13 2025 02:58:43