test_mos65xx.c
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1 /* Capstone Disassembler Engine */
2 /* By Sebastian Macke <sebastian@macke.de>, 2018 */
3 
4 #include <stdio.h>
5 #include <stdlib.h>
6 
7 #include <capstone/platform.h>
8 #include <capstone/capstone.h>
9 
10 struct platform {
11  cs_arch arch;
12  cs_mode mode;
13  unsigned char *code;
14  size_t size;
15  const char *comment;
16 };
17 
18 static csh handle;
19 
20 static void print_string_hex(const char *comment, unsigned char *str, size_t len)
21 {
22  unsigned char *c;
23 
24  printf("%s", comment);
25  for (c = str; c < str + len; c++) {
26  printf(" 0x%02x", *c & 0xff);
27  }
28 
29  printf("\n");
30 }
31 
33 {
34  switch(mode) {
35  default:
36  case MOS65XX_AM_NONE:
37  return "No address mode";
38  case MOS65XX_AM_IMP:
39  return "implied addressing (no addressing mode)";
40  case MOS65XX_AM_ACC:
41  return "accumulator addressing";
42  case MOS65XX_AM_ABS:
43  return "absolute addressing";
44  case MOS65XX_AM_ZP:
45  return "zeropage addressing";
46  case MOS65XX_AM_IMM:
47  return "8 Bit immediate value";
48  case MOS65XX_AM_ABSX:
49  return "indexed absolute addressing by the X index register";
50  case MOS65XX_AM_ABSY:
51  return "indexed absolute addressing by the Y index register";
52  case MOS65XX_AM_INDX:
53  return "indexed indirect addressing by the X index register";
54  case MOS65XX_AM_INDY:
55  return "indirect indexed addressing by the Y index register";
56  case MOS65XX_AM_ZPX:
57  return "indexed zeropage addressing by the X index register";
58  case MOS65XX_AM_ZPY:
59  return "indexed zeropage addressing by the Y index register";
60  case MOS65XX_AM_REL:
61  return "relative addressing used by branches";
62  case MOS65XX_AM_IND:
63  return "absolute indirect addressing";
64  }
65 }
66 
67 
68 static void print_insn_detail(cs_insn *ins)
69 {
70  cs_mos65xx *mos65xx;
71  int i;
72 
73  // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
74  if (ins->detail == NULL)
75  return;
76 
77  mos65xx = &(ins->detail->mos65xx);
78 
79  // printf("insn_detail\n");
80  printf("\taddress mode: %s\n", get_am_name(mos65xx->am));
81  printf("\tmodifies flags: %s\n", mos65xx->modifies_flags ? "true": "false");
82 
83  if (mos65xx->op_count)
84  printf("\top_count: %u\n", mos65xx->op_count);
85 
86  for (i = 0; i < mos65xx->op_count; i++) {
87  cs_mos65xx_op *op = &(mos65xx->operands[i]);
88  switch((int)op->type) {
89  default:
90  break;
91  case MOS65XX_OP_REG:
92  printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
93  break;
94  case MOS65XX_OP_IMM:
95  printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
96  break;
97  case MOS65XX_OP_MEM:
98  printf("\t\toperands[%u].type: MEM = 0x%x\n", i, op->mem);
99  break;
100  }
101  }
102 }
103 
104 static void test()
105 {
106 #define MOS65XX_CODE "\x0d\x34\x12\x00\x81\x87\x6c\x01\x00\x85\xFF\x10\x00\x19\x42\x42\x00\x49\x42"
107 
108  struct platform platforms[] = {
109  {
111  0,
112  (unsigned char *)MOS65XX_CODE,
113  sizeof(MOS65XX_CODE) - 1,
114  "MOS65XX"
115  },
116  };
117 
118  uint64_t address = 0x1000;
119  cs_insn *insn;
120  int i;
121  size_t count;
122 
123  for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
124  cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
125  if (err) {
126  printf("Failed on cs_open() with error returned: %u\n", err);
127  abort();
128  }
129 
131 
132  count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
133 
134  if (count) {
135  size_t j;
136 
137  printf("****************\n");
138  printf("Platform: %s\n", platforms[i].comment);
140  printf("Disasm:\n");
141 
142  for (j = 0; j < count; j++) {
143  printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
144  print_insn_detail(&insn[j]);
145  puts("");
146  }
147  printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
148 
149  // free memory allocated by cs_disasm()
150  cs_free(insn, count);
151  } else {
152  printf("****************\n");
153  printf("Platform: %s\n", platforms[i].comment);
155  printf("ERROR: Failed to disasm given code!\n");
156  abort();
157  }
158 
159  printf("\n");
160 
161  cs_close(&handle);
162  }
163 }
164 
165 int main()
166 {
167  test();
168  return 0;
169 }
xds_interop_client.str
str
Definition: xds_interop_client.py:487
cs_close
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
Definition: cs.c:522
MOS65XX_AM_IMM
@ MOS65XX_AM_IMM
8 Bit immediate value
Definition: mos65xx.h:31
MOS65XX_AM_ABS
@ MOS65XX_AM_ABS
absolute addressing
Definition: mos65xx.h:29
MOS65XX_AM_INDX
@ MOS65XX_AM_INDX
indexed indirect addressing by the X index register
Definition: mos65xx.h:34
platform::code
unsigned char * code
Definition: test_arm_regression.c:21
CS_ARCH_MOS65XX
@ CS_ARCH_MOS65XX
MOS65XX architecture (including MOS6502)
Definition: capstone.h:87
MOS65XX_CODE
#define MOS65XX_CODE
cs_disasm
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
Definition: cs.c:822
printf
_Use_decl_annotations_ int __cdecl printf(const char *_Format,...)
Definition: cs_driver.c:91
cs_mos65xx::am
mos65xx_address_mode am
Definition: mos65xx.h:135
MOS65XX_AM_ZPX
@ MOS65XX_AM_ZPX
indexed zeropage addressing by the X index register
Definition: mos65xx.h:36
error_ref_leak.err
err
Definition: error_ref_leak.py:35
cs_open
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
Definition: cs.c:474
platform::mode
cs_mode mode
Definition: test_arm_regression.c:20
cs_arch
cs_arch
Architecture type.
Definition: capstone.h:74
mode
const char int mode
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:135
MOS65XX_AM_IMP
@ MOS65XX_AM_IMP
implied addressing (no addressing mode)
Definition: mos65xx.h:27
MOS65XX_AM_ABSX
@ MOS65XX_AM_ABSX
indexed absolute addressing by the X index register
Definition: mos65xx.h:32
CS_OPT_DETAIL
@ CS_OPT_DETAIL
Break down instruction structure into details.
Definition: capstone.h:172
main
int main()
Definition: test_mos65xx.c:165
test
static void test()
Definition: test_mos65xx.c:104
cs_option
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
Definition: cs.c:670
MOS65XX_AM_REL
@ MOS65XX_AM_REL
relative addressing used by branches
Definition: mos65xx.h:38
cs_mode
cs_mode
Mode type.
Definition: capstone.h:103
capstone.h
c
void c(T a)
Definition: miscompile_with_no_unique_address_test.cc:40
MOS65XX_AM_ZPY
@ MOS65XX_AM_ZPY
indexed zeropage addressing by the Y index register
Definition: mos65xx.h:37
MOS65XX_OP_REG
@ MOS65XX_OP_REG
= CS_OP_REG (Register operand).
Definition: mos65xx.h:118
MOS65XX_AM_NONE
@ MOS65XX_AM_NONE
No address mode.
Definition: mos65xx.h:26
cs_mos65xx::modifies_flags
bool modifies_flags
Definition: mos65xx.h:136
cs_reg_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
Definition: cs.c:1176
platform.h
uint64_t
unsigned __int64 uint64_t
Definition: stdint-msvc2008.h:90
CS_OPT_ON
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
Definition: capstone.h:184
MOS65XX_AM_ZP
@ MOS65XX_AM_ZP
zeropage addressing
Definition: mos65xx.h:30
platform::comment
char * comment
Definition: test_arm_regression.c:23
arch
cs_arch arch
Definition: cstool.c:13
platform::arch
cs_arch arch
Definition: test_arm_regression.c:19
MOS65XX_OP_MEM
@ MOS65XX_OP_MEM
= CS_OP_MEM (Memory operand).
Definition: mos65xx.h:120
get_am_name
static const char * get_am_name(mos65xx_address_mode mode)
Definition: test_mos65xx.c:32
cs_mos65xx::operands
cs_mos65xx_op operands[3]
operands for this instruction.
Definition: mos65xx.h:141
mos65xx_address_mode
mos65xx_address_mode
MOS65XX Addressing Modes.
Definition: mos65xx.h:25
csh
size_t csh
Definition: capstone.h:71
cs_mos65xx
The MOS65XX address mode and it's operands.
Definition: mos65xx.h:134
print_insn_detail
static void print_insn_detail(cs_insn *ins)
Definition: test_mos65xx.c:68
cs_mos65xx::op_count
uint8_t op_count
Definition: mos65xx.h:140
MOS65XX_AM_IND
@ MOS65XX_AM_IND
absolute indirect addressing
Definition: mos65xx.h:39
count
int * count
Definition: bloaty/third_party/googletest/googlemock/test/gmock_stress_test.cc:96
cs_mos65xx_op
Instruction operand.
Definition: mos65xx.h:124
handle
static csh handle
Definition: test_mos65xx.c:18
MOS65XX_OP_IMM
@ MOS65XX_OP_IMM
= CS_OP_IMM (Immediate operand).
Definition: mos65xx.h:119
cs_free
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
Definition: cs.c:1039
code
Definition: bloaty/third_party/zlib/contrib/infback9/inftree9.h:24
len
int len
Definition: abseil-cpp/absl/base/internal/low_level_alloc_test.cc:46
platforms
struct platform platforms[]
Definition: fuzz_diff.c:18
size
voidpf void uLong size
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:136
MOS65XX_AM_INDY
@ MOS65XX_AM_INDY
indirect indexed addressing by the Y index register
Definition: mos65xx.h:35
print_string_hex
static void print_string_hex(const char *comment, unsigned char *str, size_t len)
Definition: test_mos65xx.c:20
op
static grpc_op * op
Definition: test/core/fling/client.cc:47
platform
Definition: test_arm_regression.c:18
platform::size
size_t size
Definition: test_arm_regression.c:22
MOS65XX_AM_ACC
@ MOS65XX_AM_ACC
accumulator addressing
Definition: mos65xx.h:28
MOS65XX_AM_ABSY
@ MOS65XX_AM_ABSY
indexed absolute addressing by the Y index register
Definition: mos65xx.h:33
i
uint64_t i
Definition: abseil-cpp/absl/container/btree_benchmark.cc:230


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autogenerated on Fri May 16 2025 03:00:28