Go to the documentation of this file.
37 return "No address mode";
39 return "implied addressing (no addressing mode)";
41 return "accumulator addressing";
43 return "absolute addressing";
45 return "zeropage addressing";
47 return "8 Bit immediate value";
49 return "indexed absolute addressing by the X index register";
51 return "indexed absolute addressing by the Y index register";
53 return "indexed indirect addressing by the X index register";
55 return "indirect indexed addressing by the Y index register";
57 return "indexed zeropage addressing by the X index register";
59 return "indexed zeropage addressing by the Y index register";
61 return "relative addressing used by branches";
63 return "absolute indirect addressing";
74 if (ins->detail == NULL)
77 mos65xx = &(ins->detail->mos65xx);
88 switch((
int)
op->type) {
95 printf(
"\t\toperands[%u].type: IMM = 0x%x\n",
i,
op->imm);
98 printf(
"\t\toperands[%u].type: MEM = 0x%x\n",
i,
op->mem);
106 #define MOS65XX_CODE "\x0d\x34\x12\x00\x81\x87\x6c\x01\x00\x85\xFF\x10\x00\x19\x42\x42\x00\x49\x42"
126 printf(
"Failed on cs_open() with error returned: %u\n",
err);
137 printf(
"****************\n");
142 for (j = 0; j <
count; j++) {
143 printf(
"0x%" PRIx64
":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
147 printf(
"0x%" PRIx64
":\n", insn[j-1].address + insn[j-1].
size);
152 printf(
"****************\n");
155 printf(
"ERROR: Failed to disasm given code!\n");
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
@ MOS65XX_AM_IMM
8 Bit immediate value
@ MOS65XX_AM_ABS
absolute addressing
@ MOS65XX_AM_INDX
indexed indirect addressing by the X index register
@ CS_ARCH_MOS65XX
MOS65XX architecture (including MOS6502)
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
_Use_decl_annotations_ int __cdecl printf(const char *_Format,...)
@ MOS65XX_AM_ZPX
indexed zeropage addressing by the X index register
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
cs_arch
Architecture type.
@ MOS65XX_AM_IMP
implied addressing (no addressing mode)
@ MOS65XX_AM_ABSX
indexed absolute addressing by the X index register
@ CS_OPT_DETAIL
Break down instruction structure into details.
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
@ MOS65XX_AM_REL
relative addressing used by branches
@ MOS65XX_AM_ZPY
indexed zeropage addressing by the Y index register
@ MOS65XX_OP_REG
= CS_OP_REG (Register operand).
@ MOS65XX_AM_NONE
No address mode.
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
unsigned __int64 uint64_t
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
@ MOS65XX_AM_ZP
zeropage addressing
@ MOS65XX_OP_MEM
= CS_OP_MEM (Memory operand).
static const char * get_am_name(mos65xx_address_mode mode)
cs_mos65xx_op operands[3]
operands for this instruction.
mos65xx_address_mode
MOS65XX Addressing Modes.
The MOS65XX address mode and it's operands.
static void print_insn_detail(cs_insn *ins)
@ MOS65XX_AM_IND
absolute indirect addressing
@ MOS65XX_OP_IMM
= CS_OP_IMM (Immediate operand).
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
struct platform platforms[]
@ MOS65XX_AM_INDY
indirect indexed addressing by the Y index register
static void print_string_hex(const char *comment, unsigned char *str, size_t len)
@ MOS65XX_AM_ACC
accumulator addressing
@ MOS65XX_AM_ABSY
indexed absolute addressing by the Y index register
grpc
Author(s):
autogenerated on Fri May 16 2025 03:00:28