mos65xx_detail.c
Go to the documentation of this file.
1 /* Capstone testing regression */
2 /* By Do Minh Tuan <tuanit96@gmail.com>, 02-2019 */
3 
4 
5 #include "factory.h"
6 
8 {
9  switch(mode) {
10  default:
11  case MOS65XX_AM_NONE:
12  return "No address mode";
13  case MOS65XX_AM_IMP:
14  return "implied addressing (no addressing mode)";
15  case MOS65XX_AM_ACC:
16  return "accumulator addressing";
17  case MOS65XX_AM_ABS:
18  return "absolute addressing";
19  case MOS65XX_AM_ZP:
20  return "zeropage addressing";
21  case MOS65XX_AM_IMM:
22  return "8 Bit immediate value";
23  case MOS65XX_AM_ABSX:
24  return "indexed absolute addressing by the X index register";
25  case MOS65XX_AM_ABSY:
26  return "indexed absolute addressing by the Y index register";
27  case MOS65XX_AM_INDX:
28  return "indexed indirect addressing by the X index register";
29  case MOS65XX_AM_INDY:
30  return "indirect indexed addressing by the Y index register";
31  case MOS65XX_AM_ZPX:
32  return "indexed zeropage addressing by the X index register";
33  case MOS65XX_AM_ZPY:
34  return "indexed zeropage addressing by the Y index register";
35  case MOS65XX_AM_REL:
36  return "relative addressing used by branches";
37  case MOS65XX_AM_IND:
38  return "absolute indirect addressing";
39  }
40 }
41 
42 
43 char *get_detail_mos65xx(csh *handle, cs_mode mode, cs_insn *ins)
44 {
45  int i;
46  cs_mos65xx *mos65xx;
47  char *result;
48 
49  result = (char *)malloc(sizeof(char));
50  result[0] = '\0';
51 
52  if (ins->detail == NULL)
53  return result;
54 
55  mos65xx = &(ins->detail->mos65xx);
56  add_str(&result, " ; address mode: %s", get_am_name(mos65xx->am));
57  add_str(&result, " ; modifies flags: %s", mos65xx->modifies_flags ? "true": "false");
58 
59  if (mos65xx->op_count)
60  add_str(&result, " ; op_count: %u", mos65xx->op_count);
61 
62  for (i = 0; i < mos65xx->op_count; i++) {
63  cs_mos65xx_op *op = &(mos65xx->operands[i]);
64  switch((int)op->type) {
65  default:
66  break;
67  case MOS65XX_OP_REG:
68  add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg));
69  break;
70  case MOS65XX_OP_IMM:
71  add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm);
72  break;
73  case MOS65XX_OP_MEM:
74  add_str(&result, " ; operands[%u].type: MEM = 0x%x", i, op->mem);
75  break;
76  }
77  }
78  return result;
79 }
_gevent_test_main.result
result
Definition: _gevent_test_main.py:96
MOS65XX_AM_IMM
@ MOS65XX_AM_IMM
8 Bit immediate value
Definition: mos65xx.h:31
factory.h
MOS65XX_AM_ABS
@ MOS65XX_AM_ABS
absolute addressing
Definition: mos65xx.h:29
MOS65XX_AM_INDX
@ MOS65XX_AM_INDX
indexed indirect addressing by the X index register
Definition: mos65xx.h:34
get_am_name
static const char * get_am_name(mos65xx_address_mode mode)
Definition: mos65xx_detail.c:7
cs_mos65xx::am
mos65xx_address_mode am
Definition: mos65xx.h:135
MOS65XX_AM_ZPX
@ MOS65XX_AM_ZPX
indexed zeropage addressing by the X index register
Definition: mos65xx.h:36
mode
const char int mode
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:135
MOS65XX_AM_IMP
@ MOS65XX_AM_IMP
implied addressing (no addressing mode)
Definition: mos65xx.h:27
MOS65XX_AM_ABSX
@ MOS65XX_AM_ABSX
indexed absolute addressing by the X index register
Definition: mos65xx.h:32
MOS65XX_AM_REL
@ MOS65XX_AM_REL
relative addressing used by branches
Definition: mos65xx.h:38
cs_mode
cs_mode
Mode type.
Definition: capstone.h:103
MOS65XX_AM_ZPY
@ MOS65XX_AM_ZPY
indexed zeropage addressing by the Y index register
Definition: mos65xx.h:37
MOS65XX_OP_REG
@ MOS65XX_OP_REG
= CS_OP_REG (Register operand).
Definition: mos65xx.h:118
MOS65XX_AM_NONE
@ MOS65XX_AM_NONE
No address mode.
Definition: mos65xx.h:26
cs_mos65xx::modifies_flags
bool modifies_flags
Definition: mos65xx.h:136
cs_reg_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
Definition: cs.c:1176
MOS65XX_AM_ZP
@ MOS65XX_AM_ZP
zeropage addressing
Definition: mos65xx.h:30
add_str
void add_str(char **src, const char *format,...)
Definition: helper.c:89
MOS65XX_OP_MEM
@ MOS65XX_OP_MEM
= CS_OP_MEM (Memory operand).
Definition: mos65xx.h:120
cs_mos65xx::operands
cs_mos65xx_op operands[3]
operands for this instruction.
Definition: mos65xx.h:141
mos65xx_address_mode
mos65xx_address_mode
MOS65XX Addressing Modes.
Definition: mos65xx.h:25
csh
size_t csh
Definition: capstone.h:71
cs_mos65xx
The MOS65XX address mode and it's operands.
Definition: mos65xx.h:134
cs_mos65xx::op_count
uint8_t op_count
Definition: mos65xx.h:140
get_detail_mos65xx
char * get_detail_mos65xx(csh *handle, cs_mode mode, cs_insn *ins)
Definition: mos65xx_detail.c:43
MOS65XX_AM_IND
@ MOS65XX_AM_IND
absolute indirect addressing
Definition: mos65xx.h:39
cs_mos65xx_op
Instruction operand.
Definition: mos65xx.h:124
MOS65XX_OP_IMM
@ MOS65XX_OP_IMM
= CS_OP_IMM (Immediate operand).
Definition: mos65xx.h:119
handle
static csh handle
Definition: test_arm_regression.c:16
MOS65XX_AM_INDY
@ MOS65XX_AM_INDY
indirect indexed addressing by the Y index register
Definition: mos65xx.h:35
op
static grpc_op * op
Definition: test/core/fling/client.cc:47
MOS65XX_AM_ACC
@ MOS65XX_AM_ACC
accumulator addressing
Definition: mos65xx.h:28
MOS65XX_AM_ABSY
@ MOS65XX_AM_ABSY
indexed absolute addressing by the Y index register
Definition: mos65xx.h:33
i
uint64_t i
Definition: abseil-cpp/absl/container/btree_benchmark.cc:230


grpc
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autogenerated on Fri May 16 2025 02:59:30