fuzz_harness.c
Go to the documentation of this file.
1 #include <stdio.h>
2 #include <stdlib.h>
3 #include <inttypes.h>
4 #include <capstone.h>
5 
6 struct platform {
9  char *comment;
10 };
11 
12 int main(int argc, char **argv)
13 {
14  if (argc != 2) {
15  printf("Usage: %s <testcase>\n", argv[0]);
16  return 1;
17  }
18 
19  struct platform platforms[] = {
20  {
22  CS_MODE_32,
23  "X86 32 (Intel syntax)"
24  },
25  {
27  CS_MODE_64,
28  "X86 64 (Intel syntax)"
29  },
30  {
33  "ARM"
34  },
35  {
38  "THUMB-2"
39  },
40  {
43  "ARM: Cortex-A15 + NEON"
44  },
45  {
48  "THUMB"
49  },
50  {
53  "Thumb-MClass"
54  },
55  {
58  "Arm-V8"
59  },
60  {
63  "MIPS-32 (Big-endian)"
64  },
65  {
68  "MIPS-64-EL (Little-endian)"
69  },
70  {
73  "MIPS-32R6 | Micro (Big-endian)"
74  },
75  {
78  "MIPS-32R6 (Big-endian)"
79  },
80  {
83  "ARM-64"
84  },
85  {
88  "PPC-64"
89  },
90  {
93  "Sparc"
94  },
95  {
98  "SparcV9"
99  },
100  {
101  CS_ARCH_SYSZ,
102  (cs_mode)0,
103  "SystemZ"
104  },
105  {
107  (cs_mode)0,
108  "XCore"
109  },
110  {
111  CS_ARCH_M68K,
112  (cs_mode)0,
113  "M68K"
114  },
115  {
118  "M680X_M6809"
119  },
120  };
121 
122  // Read input
123  long bufsize = 0;
124  unsigned char *buf = NULL;
125  FILE *fp = fopen(argv[1], "r");
126 
127  if (fp == NULL) return 1;
128 
129  if (fseek(fp, 0L, SEEK_END) == 0) {
130  bufsize = ftell(fp);
131 
132  if (bufsize == -1) return 1;
133 
134  buf = malloc(bufsize + 1);
135 
136  if (buf == NULL) return 1;
137  if (fseek(fp, 0L, SEEK_SET) != 0) return 1;
138 
139  size_t len = fread(buf, sizeof(char), bufsize, fp);
140 
141  if (len == 0) return 2;
142  }
143  fclose(fp);
144 
145  // Disassemble
146  csh handle;
147  cs_insn *all_insn;
148  cs_detail *detail;
149  cs_err err;
150 
151  if (bufsize < 3) return 0;
152 
153  int platforms_len = sizeof(platforms)/sizeof(platforms[0]);
154  int i = (int)buf[0] % platforms_len;
155 
156  unsigned char *buf_ptr = buf + 1;
157  long buf_ptr_size = bufsize - 1;
158 
159  printf("Platform: %s (0x%.2x of 0x%.2x)\n", platforms[i].comment, i, platforms_len);
160 
162  if (err) {
163  printf("Failed on cs_open() with error returned: %u\n", err);
164  return 1;
165  }
166 
168 
169  uint64_t address = 0x1000;
170  size_t count = cs_disasm(handle, buf_ptr, buf_ptr_size, address, 0, &all_insn);
171 
172  if (count) {
173  size_t j;
174  int n;
175 
176  printf("Disasm:\n");
177 
178  for (j = 0; j < count; j++) {
179  cs_insn *i = &(all_insn[j]);
180  printf("0x%"PRIx64":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n",
181  i->address, i->mnemonic, i->op_str,
182  i->id, cs_insn_name(handle, i->id));
183 
184  detail = i->detail;
185 
186  if (detail->regs_read_count > 0) {
187  printf("\tImplicit registers read: ");
188  for (n = 0; n < detail->regs_read_count; n++) {
189  printf("%s ", cs_reg_name(handle, detail->regs_read[n]));
190  }
191  printf("\n");
192  }
193 
194  if (detail->regs_write_count > 0) {
195  printf("\tImplicit registers modified: ");
196  for (n = 0; n < detail->regs_write_count; n++) {
197  printf("%s ", cs_reg_name(handle, detail->regs_write[n]));
198  }
199  printf("\n");
200  }
201 
202  if (detail->groups_count > 0) {
203  printf("\tThis instruction belongs to groups: ");
204  for (n = 0; n < detail->groups_count; n++) {
205  printf("%s ", cs_group_name(handle, detail->groups[n]));
206  }
207  printf("\n");
208  }
209  }
210  printf("0x%"PRIx64":\n", all_insn[j-1].address + all_insn[j-1].size);
211  cs_free(all_insn, count);
212  } else {
213  printf("ERROR: Failed to disasm given code!\n");
214  }
215 
216  printf("\n");
217 
218  free(buf);
219  cs_close(&handle);
220 
221  return 0;
222 }
cs_close
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
Definition: cs.c:522
SEEK_END
#define SEEK_END
Definition: bloaty/third_party/zlib/contrib/minizip/zip.c:84
CS_MODE_32
@ CS_MODE_32
32-bit mode (X86)
Definition: capstone.h:107
CS_MODE_LITTLE_ENDIAN
@ CS_MODE_LITTLE_ENDIAN
little-endian mode (default mode)
Definition: capstone.h:104
CS_ARCH_M68K
@ CS_ARCH_M68K
68K architecture
Definition: capstone.h:83
CS_MODE_ARM
@ CS_MODE_ARM
32-bit ARM
Definition: capstone.h:105
cs_disasm
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
Definition: cs.c:822
CS_ARCH_PPC
@ CS_ARCH_PPC
PowerPC architecture.
Definition: capstone.h:79
buf
voidpf void * buf
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:136
printf
_Use_decl_annotations_ int __cdecl printf(const char *_Format,...)
Definition: cs_driver.c:91
error_ref_leak.err
err
Definition: error_ref_leak.py:35
cs_open
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
Definition: cs.c:474
platform::mode
cs_mode mode
Definition: test_arm_regression.c:20
cs_arch
cs_arch
Architecture type.
Definition: capstone.h:74
mode
const char int mode
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:135
CS_OPT_DETAIL
@ CS_OPT_DETAIL
Break down instruction structure into details.
Definition: capstone.h:172
detail
Definition: test_winkernel.cpp:39
main
int main(int argc, char **argv)
Definition: fuzz_harness.c:12
CS_ARCH_M680X
@ CS_ARCH_M680X
680X architecture
Definition: capstone.h:85
cs_option
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
Definition: cs.c:670
CS_MODE_MICRO
@ CS_MODE_MICRO
MicroMips mode (MIPS)
Definition: capstone.h:112
cs_mode
cs_mode
Mode type.
Definition: capstone.h:103
capstone.h
cs_insn_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_insn_name(csh ud, unsigned int insn)
Definition: cs.c:1188
xds_interop_client.int
int
Definition: xds_interop_client.py:113
CS_ARCH_SYSZ
@ CS_ARCH_SYSZ
SystemZ architecture.
Definition: capstone.h:81
cs_reg_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
Definition: cs.c:1176
CS_ARCH_X86
@ CS_ARCH_X86
X86 architecture (including x86 & x86-64)
Definition: capstone.h:78
uint64_t
unsigned __int64 uint64_t
Definition: stdint-msvc2008.h:90
CS_OPT_ON
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
Definition: capstone.h:184
CS_MODE_THUMB
@ CS_MODE_THUMB
ARM's Thumb mode, including Thumb-2.
Definition: capstone.h:109
platform::comment
char * comment
Definition: test_arm_regression.c:23
CS_MODE_BIG_ENDIAN
@ CS_MODE_BIG_ENDIAN
big-endian mode
Definition: capstone.h:124
CS_MODE_MIPS32R6
@ CS_MODE_MIPS32R6
Mips32r6 ISA.
Definition: capstone.h:114
CS_MODE_MCLASS
@ CS_MODE_MCLASS
ARM's Cortex-M series.
Definition: capstone.h:110
arch
cs_arch arch
Definition: cstool.c:13
CS_MODE_M680X_6809
@ CS_MODE_M680X_6809
M680X Motorola 6809 mode.
Definition: capstone.h:133
platform::arch
cs_arch arch
Definition: test_arm_regression.c:19
n
int n
Definition: abseil-cpp/absl/container/btree_test.cc:1080
CS_ARCH_SPARC
@ CS_ARCH_SPARC
Sparc architecture.
Definition: capstone.h:80
CS_ARCH_MIPS
@ CS_ARCH_MIPS
Mips architecture.
Definition: capstone.h:77
csh
size_t csh
Definition: capstone.h:71
benchmark.FILE
FILE
Definition: benchmark.py:21
CS_MODE_MIPS64
@ CS_MODE_MIPS64
Mips64 ISA (Mips)
Definition: capstone.h:126
count
int * count
Definition: bloaty/third_party/googletest/googlemock/test/gmock_stress_test.cc:96
CS_MODE_64
@ CS_MODE_64
64-bit mode (X86, PPC)
Definition: capstone.h:108
grpc::fclose
fclose(creds_file)
CS_ARCH_ARM
@ CS_ARCH_ARM
ARM architecture (including Thumb, Thumb-2)
Definition: capstone.h:75
cs_group_name
const CAPSTONE_EXPORT char *CAPSTONE_API cs_group_name(csh ud, unsigned int group)
Definition: cs.c:1200
L
lua_State * L
Definition: upb/upb/bindings/lua/main.c:35
cs_free
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
Definition: cs.c:1039
CS_MODE_V9
@ CS_MODE_V9
SparcV9 mode (Sparc)
Definition: capstone.h:116
handle
static csh handle
Definition: test_arm_regression.c:16
CS_ARCH_ARM64
@ CS_ARCH_ARM64
ARM-64, also called AArch64.
Definition: capstone.h:76
len
int len
Definition: abseil-cpp/absl/base/internal/low_level_alloc_test.cc:46
platforms
struct platform platforms[]
Definition: fuzz_diff.c:18
size
voidpf void uLong size
Definition: bloaty/third_party/zlib/contrib/minizip/ioapi.h:136
CS_MODE_MIPS32
@ CS_MODE_MIPS32
Mips32 ISA (Mips)
Definition: capstone.h:125
CS_ARCH_XCORE
@ CS_ARCH_XCORE
XCore architecture.
Definition: capstone.h:82
CS_MODE_V8
@ CS_MODE_V8
ARMv8 A32 encodings for ARM.
Definition: capstone.h:111
platform
Definition: test_arm_regression.c:18
SEEK_SET
#define SEEK_SET
Definition: bloaty/third_party/zlib/contrib/minizip/zip.c:88
i
uint64_t i
Definition: abseil-cpp/absl/container/btree_benchmark.cc:230
test_evm.detail
detail
Definition: test_evm.py:9


grpc
Author(s):
autogenerated on Thu Mar 13 2025 02:59:23