CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. This file contains the system clock configuration for STM32F4xx devices, and is generated by the clock configuration tool stm32f4xx_Clock_Configuration_V1.0.0.xls. More...
#include "stm32f4xx.h"
Go to the source code of this file.
Macros | |
#define | PLL_M 8 |
#define | PLL_N 336 |
#define | PLL_P 2 |
#define | PLL_Q 7 |
#define | VECT_TAB_OFFSET 0x00 |
Functions | |
static void | SetSysClock (void) |
Configures the System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers and Flash settings This function should be called only once the RCC clock configuration is reset to the default reset state (done in SystemInit() function). More... | |
void | SystemCoreClockUpdate (void) |
Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters. More... | |
void | SystemInit (void) |
Setup the microcontroller system Initialize the Embedded Flash Interface, the PLL and update the SystemFrequency variable. More... | |
Variables | |
__I uint8_t | AHBPrescTable [16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9} |
uint32_t | SystemCoreClock = 168000000 |
CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. This file contains the system clock configuration for STM32F4xx devices, and is generated by the clock configuration tool stm32f4xx_Clock_Configuration_V1.0.0.xls.
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Require 48MHz for USB OTG FS, | Enabled
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Definition in file system_stm32f4xx.c.