|
Modules | |
| CMSIS CM3 Core Register | |
| CMSIS CM3 Core Function Interface | |
| CMSIS CM3 Core Debug Interface | |
Macros | |
| #define | __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) |
| #define | __CM3_CMSIS_VERSION_MAIN (0x01) |
| #define | __CM3_CMSIS_VERSION_SUB (0x30) |
| #define | __CORTEX_M (0x03) |
| #define | __I volatile const |
| #define | __IO volatile |
| #define | __NVIC_PRIO_BITS 4 |
| #define | __O volatile |
Detailed Description
This file defines all structures and symbols for CMSIS core:
- CMSIS version number
- Cortex-M core registers and bitfields
- Cortex-M core peripheral base address
Macro Definition Documentation
| #define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) |
CMSIS HAL version number
Definition at line 86 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __CM3_CMSIS_VERSION_MAIN (0x01) |
[31:16] CMSIS HAL main version
Definition at line 84 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __CM3_CMSIS_VERSION_SUB (0x30) |
[15:0] CMSIS HAL sub version
Definition at line 85 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __CORTEX_M (0x03) |
Cortex core
Definition at line 88 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __I volatile const |
IO definitions
define access restrictions to peripheral registersdefines 'read only' permissions
Definition at line 113 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __IO volatile |
defines 'read / write' permissions
Definition at line 116 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __NVIC_PRIO_BITS 4 |
standard definition for NVIC Priority Bits
Definition at line 98 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define __O volatile |
defines 'write only' permissions
Definition at line 115 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.