#include <core_cm3.h>
Public Attributes | |
__I uint32_t | ICTR |
uint32_t | RESERVED0 |
uint32_t | RESERVED1 |
Definition at line 505 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
__I uint32_t InterruptType_Type::ICTR |
Offset: 0x04 Interrupt Control Type Register
Definition at line 508 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
uint32_t InterruptType_Type::RESERVED0 |
Definition at line 507 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
uint32_t InterruptType_Type::RESERVED1 |
Definition at line 512 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.