stm32f30x_syscfg.c

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/* Includes ------------------------------------------------------------------*/
#include "stm32f30x_syscfg.h"

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Reset value od SYSCFG_CFGR1 register */
#define CFGR1_CLEAR_MASK            ((uint32_t)0x7C000000)

/* ------------ SYSCFG registers bit address in the alias region -------------*/
#define SYSCFG_OFFSET                (SYSCFG_BASE - PERIPH_BASE)

/* --- CFGR1 Register ---*/
/* Alias word address of USB_IT_RMP bit */
#define CFGR1_OFFSET                 (SYSCFG_OFFSET + 0x00)
#define USBITRMP_BitNumber            0x05
#define CFGR1_USBITRMP_BB            (PERIPH_BB_BASE + (CFGR1_OFFSET * 32) + (USBITRMP_BitNumber * 4))

/* --- CFGR2 Register ---*/
/* Alias word address of BYP_ADDR_PAR bit */
#define CFGR2_OFFSET                 (SYSCFG_OFFSET + 0x18)
#define BYPADDRPAR_BitNumber          0x04
#define CFGR1_BYPADDRPAR_BB          (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (BYPADDRPAR_BitNumber * 4))

/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

void SYSCFG_DeInit(void)
{
  /* Reset SYSCFG_CFGR1 register to reset value without affecting MEM_MODE bits */
  SYSCFG->CFGR1 &= SYSCFG_CFGR1_MEM_MODE;
  /* Set FPU Interrupt Enable bits to default value */
  SYSCFG->CFGR1 |= 0x7C000000;
  /* Reset RAM Write protection bits to default value */
  SYSCFG->RCR = 0x00000000;
  /* Set EXTICRx registers to reset value */
  SYSCFG->EXTICR[0] = 0;
  SYSCFG->EXTICR[1] = 0;
  SYSCFG->EXTICR[2] = 0;
  SYSCFG->EXTICR[3] = 0;
  /* Set CFGR2 register to reset value */
  SYSCFG->CFGR2 = 0;
  /* Set CFGR3 register to reset value */
  SYSCFG->CFGR3 = 0;
}

void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap)
{
  uint32_t tmpcfgr1 = 0;

  /* Check the parameter */
  assert_param(IS_SYSCFG_MEMORY_REMAP(SYSCFG_MemoryRemap));

  /* Get CFGR1 register value */
  tmpcfgr1 = SYSCFG->CFGR1;

  /* Clear MEM_MODE bits */
  tmpcfgr1 &= (uint32_t) (~SYSCFG_CFGR1_MEM_MODE);

  /* Set the new MEM_MODE bits value */
  tmpcfgr1 |= (uint32_t) SYSCFG_MemoryRemap;

  /* Set CFGR1 register with the new memory remap configuration */
  SYSCFG->CFGR1 = tmpcfgr1;
}

void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_SYSCFG_DMA_REMAP(SYSCFG_DMARemap));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if ((SYSCFG_DMARemap & 0x80000000)!= 0x80000000)
  {
    if (NewState != DISABLE)
    {
      /* Remap the DMA channel */
      SYSCFG->CFGR1 |= (uint32_t)SYSCFG_DMARemap;
    }
    else
    {
      /* use the default DMA channel mapping */
      SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_DMARemap);
    }
  }
  else
  {
    if (NewState != DISABLE)
    {
      /* Remap the DMA channel */
      SYSCFG->CFGR3 |= (uint32_t)SYSCFG_DMARemap;
    }
    else
    {
      /* use the default DMA channel mapping */
      SYSCFG->CFGR3 &= (uint32_t)(~SYSCFG_DMARemap);
    }
  }
}

void SYSCFG_TriggerRemapConfig(uint32_t SYSCFG_TriggerRemap, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_SYSCFG_TRIGGER_REMAP(SYSCFG_TriggerRemap));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  
  if ((SYSCFG_TriggerRemap & 0x80000000)!= 0x80000000)
  {
    if (NewState != DISABLE)
    {
      /* Remap the trigger */
      SYSCFG->CFGR1 |= (uint32_t)SYSCFG_TriggerRemap;
    }
    else
    {
      /* Use the default trigger mapping */
      SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_TriggerRemap);
    }
  }
  else
  {
    if (NewState != DISABLE)
    {
      /* Remap the trigger */
      SYSCFG->CFGR3 |= (uint32_t)SYSCFG_TriggerRemap;
    }
    else
    {
      /* Use the default trigger mapping */
      SYSCFG->CFGR3 &= (uint32_t)(~SYSCFG_TriggerRemap);
    }
  }
}

void SYSCFG_EncoderRemapConfig(uint32_t SYSCFG_EncoderRemap)
{
  /* Check the parameter */
  assert_param(IS_SYSCFG_ENCODER_REMAP(SYSCFG_EncoderRemap));

  /* Reset the encoder mode remapping bits */
  SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_CFGR1_ENCODER_MODE);

  /* Set the selected configuration */
  SYSCFG->CFGR1 |= (uint32_t)(SYSCFG_EncoderRemap);
}

void SYSCFG_USBInterruptLineRemapCmd(FunctionalState NewState)
{
  /* Check the parameter */
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  /* Remap the USB interupt lines */
  *(__IO uint32_t *) CFGR1_USBITRMP_BB = (uint32_t)NewState;
}

void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_SYSCFG_I2C_FMP(SYSCFG_I2CFastModePlus));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable fast mode plus driving capability for selected I2C pin */
    SYSCFG->CFGR1 |= (uint32_t)SYSCFG_I2CFastModePlus;
  }
  else
  {
    /* Disable fast mode plus driving capability for selected I2C pin */
    SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_I2CFastModePlus);
  }
}

void SYSCFG_ITConfig(uint32_t SYSCFG_IT, FunctionalState NewState)  
{
  /* Check the parameters */
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  assert_param(IS_SYSCFG_IT(SYSCFG_IT)); 

  if (NewState != DISABLE)
  {
    /* Enable the selected SYSCFG interrupts */
    SYSCFG->CFGR1 |= SYSCFG_IT;
  }
  else
  {
    /* Disable the selected SYSCFG interrupts */
    SYSCFG->CFGR1 &= ((uint32_t)~SYSCFG_IT);
  }
}

void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
{
  uint32_t tmp = 0x00;

  /* Check the parameters */
  assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
  assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
  
  tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
  SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
  SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
}

void SYSCFG_BreakConfig(uint32_t SYSCFG_Break)
{
  /* Check the parameter */
  assert_param(IS_SYSCFG_LOCK_CONFIG(SYSCFG_Break));

  SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Break;
}

void SYSCFG_BypassParityCheckDisable(void)
{
  /* Disable the adddress parity check on RAM */
  *(__IO uint32_t *) CFGR1_BYPADDRPAR_BB = (uint32_t)0x00000001;
}

void SYSCFG_SRAMWRPEnable(uint32_t SYSCFG_SRAMWRP)
{
  /* Check the parameter */
  assert_param(IS_SYSCFG_PAGE(SYSCFG_SRAMWRP));

  /* Enable the write-protection on the selected ICODE SRAM page */
  SYSCFG->RCR |= (uint32_t)SYSCFG_SRAMWRP;
}

#ifdef __GNUC__
# pragma GCC diagnostic push
# pragma GCC diagnostic ignored "-Wunused-parameter"
#endif
FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag)
{
  FlagStatus bitstatus = RESET;

  /* Check the parameter */
  assert_param(IS_SYSCFG_FLAG(SYSCFG_Flag));

  /* Check the status of the specified SPI flag */
  if ((SYSCFG->CFGR2 & SYSCFG_CFGR2_SRAM_PE) != (uint32_t)RESET)
  {
    /* SYSCFG_Flag is set */
    bitstatus = SET;
  }
  else
  {
    /* SYSCFG_Flag is reset */
    bitstatus = RESET;
  }
  /* Return the SYSCFG_Flag status */
  return  bitstatus;
}
#ifdef __GNUC__
# pragma GCC diagnostic pop
#endif

void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag)
{
  /* Check the parameter */
  assert_param(IS_SYSCFG_FLAG(SYSCFG_Flag));

  SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Flag;
}

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/