24 #ifndef __STM32F10x_SDIO_H 25 #define __STM32F10x_SDIO_H 48 uint32_t SDIO_ClockEdge;
51 uint32_t SDIO_ClockBypass;
55 uint32_t SDIO_ClockPowerSave;
59 uint32_t SDIO_BusWide;
62 uint32_t SDIO_HardwareFlowControl;
65 uint8_t SDIO_ClockDiv;
72 uint32_t SDIO_Argument;
77 uint32_t SDIO_CmdIndex;
79 uint32_t SDIO_Response;
92 uint32_t SDIO_DataTimeOut;
94 uint32_t SDIO_DataLength;
96 uint32_t SDIO_DataBlockSize;
99 uint32_t SDIO_TransferDir;
103 uint32_t SDIO_TransferMode;
123 #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) 124 #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) 125 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ 126 ((EDGE) == SDIO_ClockEdge_Falling)) 135 #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) 136 #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) 137 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ 138 ((BYPASS) == SDIO_ClockBypass_Enable)) 147 #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) 148 #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) 149 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ 150 ((SAVE) == SDIO_ClockPowerSave_Enable)) 159 #define SDIO_BusWide_1b ((uint32_t)0x00000000) 160 #define SDIO_BusWide_4b ((uint32_t)0x00000800) 161 #define SDIO_BusWide_8b ((uint32_t)0x00001000) 162 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ 163 ((WIDE) == SDIO_BusWide_8b)) 173 #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) 174 #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) 175 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ 176 ((CONTROL) == SDIO_HardwareFlowControl_Enable)) 185 #define SDIO_PowerState_OFF ((uint32_t)0x00000000) 186 #define SDIO_PowerState_ON ((uint32_t)0x00000003) 187 #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) 197 #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) 198 #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) 199 #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) 200 #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) 201 #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) 202 #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) 203 #define SDIO_IT_CMDREND ((uint32_t)0x00000040) 204 #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) 205 #define SDIO_IT_DATAEND ((uint32_t)0x00000100) 206 #define SDIO_IT_STBITERR ((uint32_t)0x00000200) 207 #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) 208 #define SDIO_IT_CMDACT ((uint32_t)0x00000800) 209 #define SDIO_IT_TXACT ((uint32_t)0x00001000) 210 #define SDIO_IT_RXACT ((uint32_t)0x00002000) 211 #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) 212 #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) 213 #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) 214 #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) 215 #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) 216 #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) 217 #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) 218 #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) 219 #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) 220 #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) 221 #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) 230 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) 239 #define SDIO_Response_No ((uint32_t)0x00000000) 240 #define SDIO_Response_Short ((uint32_t)0x00000040) 241 #define SDIO_Response_Long ((uint32_t)0x000000C0) 242 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ 243 ((RESPONSE) == SDIO_Response_Short) || \ 244 ((RESPONSE) == SDIO_Response_Long)) 253 #define SDIO_Wait_No ((uint32_t)0x00000000) 254 #define SDIO_Wait_IT ((uint32_t)0x00000100) 255 #define SDIO_Wait_Pend ((uint32_t)0x00000200) 256 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ 257 ((WAIT) == SDIO_Wait_Pend)) 266 #define SDIO_CPSM_Disable ((uint32_t)0x00000000) 267 #define SDIO_CPSM_Enable ((uint32_t)0x00000400) 268 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) 277 #define SDIO_RESP1 ((uint32_t)0x00000000) 278 #define SDIO_RESP2 ((uint32_t)0x00000004) 279 #define SDIO_RESP3 ((uint32_t)0x00000008) 280 #define SDIO_RESP4 ((uint32_t)0x0000000C) 281 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ 282 ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) 291 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) 300 #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) 301 #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) 302 #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) 303 #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) 304 #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) 305 #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) 306 #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) 307 #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) 308 #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) 309 #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) 310 #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) 311 #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) 312 #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) 313 #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) 314 #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) 315 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ 316 ((SIZE) == SDIO_DataBlockSize_2b) || \ 317 ((SIZE) == SDIO_DataBlockSize_4b) || \ 318 ((SIZE) == SDIO_DataBlockSize_8b) || \ 319 ((SIZE) == SDIO_DataBlockSize_16b) || \ 320 ((SIZE) == SDIO_DataBlockSize_32b) || \ 321 ((SIZE) == SDIO_DataBlockSize_64b) || \ 322 ((SIZE) == SDIO_DataBlockSize_128b) || \ 323 ((SIZE) == SDIO_DataBlockSize_256b) || \ 324 ((SIZE) == SDIO_DataBlockSize_512b) || \ 325 ((SIZE) == SDIO_DataBlockSize_1024b) || \ 326 ((SIZE) == SDIO_DataBlockSize_2048b) || \ 327 ((SIZE) == SDIO_DataBlockSize_4096b) || \ 328 ((SIZE) == SDIO_DataBlockSize_8192b) || \ 329 ((SIZE) == SDIO_DataBlockSize_16384b)) 338 #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) 339 #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) 340 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ 341 ((DIR) == SDIO_TransferDir_ToSDIO)) 350 #define SDIO_TransferMode_Block ((uint32_t)0x00000000) 351 #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) 352 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ 353 ((MODE) == SDIO_TransferMode_Block)) 362 #define SDIO_DPSM_Disable ((uint32_t)0x00000000) 363 #define SDIO_DPSM_Enable ((uint32_t)0x00000001) 364 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) 373 #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) 374 #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) 375 #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) 376 #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) 377 #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) 378 #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) 379 #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) 380 #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) 381 #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) 382 #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) 383 #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) 384 #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) 385 #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) 386 #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) 387 #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) 388 #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) 389 #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) 390 #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) 391 #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) 392 #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) 393 #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) 394 #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) 395 #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) 396 #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) 397 #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ 398 ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ 399 ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ 400 ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ 401 ((FLAG) == SDIO_FLAG_TXUNDERR) || \ 402 ((FLAG) == SDIO_FLAG_RXOVERR) || \ 403 ((FLAG) == SDIO_FLAG_CMDREND) || \ 404 ((FLAG) == SDIO_FLAG_CMDSENT) || \ 405 ((FLAG) == SDIO_FLAG_DATAEND) || \ 406 ((FLAG) == SDIO_FLAG_STBITERR) || \ 407 ((FLAG) == SDIO_FLAG_DBCKEND) || \ 408 ((FLAG) == SDIO_FLAG_CMDACT) || \ 409 ((FLAG) == SDIO_FLAG_TXACT) || \ 410 ((FLAG) == SDIO_FLAG_RXACT) || \ 411 ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ 412 ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ 413 ((FLAG) == SDIO_FLAG_TXFIFOF) || \ 414 ((FLAG) == SDIO_FLAG_RXFIFOF) || \ 415 ((FLAG) == SDIO_FLAG_TXFIFOE) || \ 416 ((FLAG) == SDIO_FLAG_RXFIFOE) || \ 417 ((FLAG) == SDIO_FLAG_TXDAVL) || \ 418 ((FLAG) == SDIO_FLAG_RXDAVL) || \ 419 ((FLAG) == SDIO_FLAG_SDIOIT) || \ 420 ((FLAG) == SDIO_FLAG_CEATAEND)) 422 #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) 424 #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ 425 ((IT) == SDIO_IT_DCRCFAIL) || \ 426 ((IT) == SDIO_IT_CTIMEOUT) || \ 427 ((IT) == SDIO_IT_DTIMEOUT) || \ 428 ((IT) == SDIO_IT_TXUNDERR) || \ 429 ((IT) == SDIO_IT_RXOVERR) || \ 430 ((IT) == SDIO_IT_CMDREND) || \ 431 ((IT) == SDIO_IT_CMDSENT) || \ 432 ((IT) == SDIO_IT_DATAEND) || \ 433 ((IT) == SDIO_IT_STBITERR) || \ 434 ((IT) == SDIO_IT_DBCKEND) || \ 435 ((IT) == SDIO_IT_CMDACT) || \ 436 ((IT) == SDIO_IT_TXACT) || \ 437 ((IT) == SDIO_IT_RXACT) || \ 438 ((IT) == SDIO_IT_TXFIFOHE) || \ 439 ((IT) == SDIO_IT_RXFIFOHF) || \ 440 ((IT) == SDIO_IT_TXFIFOF) || \ 441 ((IT) == SDIO_IT_RXFIFOF) || \ 442 ((IT) == SDIO_IT_TXFIFOE) || \ 443 ((IT) == SDIO_IT_RXFIFOE) || \ 444 ((IT) == SDIO_IT_TXDAVL) || \ 445 ((IT) == SDIO_IT_RXDAVL) || \ 446 ((IT) == SDIO_IT_SDIOIT) || \ 447 ((IT) == SDIO_IT_CEATAEND)) 449 #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) 459 #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) 460 #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) 461 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ 462 ((MODE) == SDIO_ReadWaitMode_DATA2)) void SDIO_Init(SDIO_InitTypeDef *SDIO_InitStruct)
Initializes the SDIO peripheral according to the specified parameters in the SDIO_InitStruct.
void SDIO_StartSDIOReadWait(FunctionalState NewState)
Starts the SD I/O Read Wait operation.
void SDIO_WriteData(uint32_t Data)
Write one data word to Tx FIFO.
void SDIO_CmdStructInit(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
Fills each SDIO_CmdInitStruct member with its default value.
uint8_t SDIO_GetCommandResponse(void)
Returns command index of last command for which response received.
void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
Sets one of the two options of inserting read wait interval.
uint32_t SDIO_GetPowerState(void)
Gets the power status of the controller.
void SDIO_CommandCompletionCmd(FunctionalState NewState)
Enables or disables the command completion signal.
void SDIO_SetSDIOOperation(FunctionalState NewState)
Enables or disables the SD I/O Mode Operation.
void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
Enables or disables the SDIO interrupts.
void SDIO_DataStructInit(SDIO_DataInitTypeDef *SDIO_DataInitStruct)
Fills each SDIO_DataInitStruct member with its default value.
void SDIO_SetPowerState(uint32_t SDIO_PowerState)
Sets the power status of the controller.
void SDIO_SendCEATACmd(FunctionalState NewState)
Sends CE-ATA command (CMD61).
void SDIO_CEATAITCmd(FunctionalState NewState)
Enables or disables the CE-ATA interrupt.
void SDIO_DataConfig(SDIO_DataInitTypeDef *SDIO_DataInitStruct)
Initializes the SDIO data path according to the specified parameters in the SDIO_DataInitStruct.
uint32_t SDIO_ReadData(void)
Read one data word from Rx FIFO.
uint32_t SDIO_GetFIFOCount(void)
Returns the number of words left to be written to or read from FIFO.
FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
Checks whether the specified SDIO flag is set or not.
void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
Enables or disables the SD I/O Mode suspend command sending.
void SDIO_DMACmd(FunctionalState NewState)
Enables or disables the SDIO DMA request.
void SDIO_DeInit(void)
Deinitializes the SDIO peripheral registers to their default reset values.
void SDIO_ClearITPendingBit(uint32_t SDIO_IT)
Clears the SDIO's interrupt pending bits.
void SDIO_StopSDIOReadWait(FunctionalState NewState)
Stops the SD I/O Read Wait operation.
ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
Checks whether the specified SDIO interrupt has occurred or not.
CMSIS Cortex-M3 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...
uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
Returns response received from the card for the last command.
void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
Initializes the SDIO Command according to the specified parameters in the SDIO_CmdInitStruct and send...
uint32_t SDIO_GetDataCounter(void)
Returns number of remaining data bytes to be transferred.
void SDIO_StructInit(SDIO_InitTypeDef *SDIO_InitStruct)
Fills each SDIO_InitStruct member with its default value.
void SDIO_ClearFlag(uint32_t SDIO_FLAG)
Clears the SDIO's pending flags.
void SDIO_ClockCmd(FunctionalState NewState)
Enables or disables the SDIO Clock.