revo_f4.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2017, James Jackson
3  *
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * * Redistributions of source code must retain the above copyright notice, this
10  * list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * * Neither the name of the copyright holder nor the names of its
17  * contributors may be used to endorse or promote products derived from
18  * this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef REVO_F4_H
33 #define REVO_F4_H
34 
35 #include "system.h"
36 
41 
43 #define NUM_UART 3
44 //typedef struct {
45 // USART_TypeDef* dev;
46 // GPIO_TypeDef* GPIO;
47 // uint16_t Rx_Pin;
48 // uint16_t Tx_Pin;
49 // uint8_t Rx_PinSource;
50 // uint8_t Tx_PinSource;
51 // uint8_t GPIO_AF;
52 // IRQn_Type USART_IRQn;
53 // IRQn_Type Rx_DMA_IRQn;
54 // IRQn_Type Tx_DMA_IRQn;
55 // DMA_Stream_TypeDef* Rx_DMA_Stream;
56 // DMA_Stream_TypeDef* Tx_DMA_Stream;
57 // uint32_t DMA_CHannel;
58 // uint32_t DMA_Rx_IT_Bit;
59 // uint32_t DMA_Tx_IT_Bit;
60 //} uart_hardware_struct_t;
61 #define UART1 0
62 #define UART2 1
63 #define UART3 2
65 {
66  {
68  GPIO_AF_USART1, USART1_IRQn, DMA2_Stream5_IRQn, DMA2_Stream7_IRQn, DMA2_Stream5, //main port?
70  },
71  {
73  GPIO_AF_USART2, USART2_IRQn, DMA1_Stream5_IRQn, DMA1_Stream6_IRQn, DMA1_Stream5, //Flex-IO port?
75  },
76  {
78  GPIO_AF_USART3, USART3_IRQn, DMA1_Stream1_IRQn, DMA1_Stream3_IRQn, DMA1_Stream1, //Flexi port?
80  },
81 };
82 
83 #define SBUS_UART 0
84 #define SBUS_INV_GPIO GPIOC
85 #define SBUS_INV_PIN GPIO_Pin_0
86 
87 
89 #define NUM_SPI 3
90 //typedef struct {
91 // SPI_TypeDef* dev;
92 // GPIO_TypeDef* GPIO;
93 // uint8_t SCK_PinSource;
94 // uint16_t SCK_Pin;
95 // uint8_t MOSI_PinSource;
96 // uint16_t MOSI_Pin;
97 // uint8_t MISO_PinSource;
98 // uint16_t MISO_Pin;
99 // uint8_t GPIO_AF;
100 // IRQn_Type DMA_IRQn;
101 // DMA_Stream_TypeDef* Tx_DMA_Stream;
102 // DMA_Stream_TypeDef* Rx_DMA_Stream;
103 // uint32_t DMA_Channel;
104 // uint32_t Tx_DMA_TCIF;
105 // uint32_t Rx_DMA_TCIF;
106 //} spi_hardware_struct_t;
108 {
109  {
112  },
113  {
116  },
117  {
120  }
121 };
122 #define MPU6000_SPI 0
123 #define MPU6000_CS_GPIO GPIOA
124 #define MPU6000_CS_PIN GPIO_Pin_4
125 
126 #define FLASH_SPI 2
127 #define FLASH_CS_GPIO GPIOB
128 #define FLASH_CS_PIN GPIO_Pin_3
129 
131 #define NUM_I2C 2
133 {
134  {
135  I2C1, 400000, I2C1_EV_IRQn, I2C1_ER_IRQn, GPIOB, GPIO_AF_I2C1, GPIO_PinSource8, GPIO_Pin_8,
137  },
138  {
139  I2C2, 100000, I2C2_EV_IRQn, I2C2_ER_IRQn, GPIOB, GPIO_AF_I2C2, GPIO_PinSource10, GPIO_Pin_10,
141  }
142 };
143 #define MAG_I2C 0
144 #define BARO_I2C 0
145 #define EXTERNAL_I2C 1
146 
148 #define LED1_GPIO GPIOB
149 #define LED1_PIN GPIO_Pin_4
150 #define LED2_GPIO GPIOB
151 #define LED2_PIN GPIO_Pin_5
152 
154 #define PWM_NUM_CHANNELS 13
155 #define PWM_NUM_OUTPUTS 11
156 //typedef struct {
157 // GPIO_TypeDef* GPIO;
158 // uint16_t GPIO_Pin;
159 // uint8_t GPIO_PinSource;
160 // TIM_TypeDef* TIM;
161 // uint8_t TIM_Channel;
162 // uint8_t GIPO_AF_TIM;
163 // IRQn_Type TIM_IRQn;
164 // uint16_t TIM_IT_CC;
165 //} pwm_hardware_struct_t;
167 {
170  {GPIOA, GPIO_Pin_3, GPIO_PinSource3, TIM9, TIM_Channel_2, GPIO_AF_TIM9, TIM1_BRK_TIM9_IRQn, TIM_IT_CC2, }, // PWM3
174  {GPIOC, GPIO_Pin_9, GPIO_PinSource9, TIM8, TIM_Channel_4, GPIO_AF_TIM8, TIM8_CC_IRQn, TIM_IT_CC4, }, // RC 6 (Flexi-10)
175  {GPIOC, GPIO_Pin_8, GPIO_PinSource8, TIM8, TIM_Channel_3, GPIO_AF_TIM8, TIM8_CC_IRQn, TIM_IT_CC3, }, // RC 5 (Flexi-9)
176  {GPIOC, GPIO_Pin_7, GPIO_PinSource7, TIM8, TIM_Channel_2, GPIO_AF_TIM8, TIM8_CC_IRQn, TIM_IT_CC2, }, // RC 4 (Flexi-8)
177  {GPIOC, GPIO_Pin_6, GPIO_PinSource6, TIM8, TIM_Channel_1, GPIO_AF_TIM8, TIM8_CC_IRQn, TIM_IT_CC1, }, // RC 3 (Flexi-7)
178  {GPIOB, GPIO_Pin_15, GPIO_PinSource15, TIM12, TIM_Channel_2, GPIO_AF_TIM12, TIM8_BRK_TIM12_IRQn, TIM_IT_CC2, }, // RC2 (Flexi-6)
179  {GPIOB, GPIO_Pin_14, GPIO_PinSource14, TIM12, TIM_Channel_1, GPIO_AF_TIM12, TIM8_BRK_TIM12_IRQn, TIM_IT_CC1, }, // RC1 (Flexi-5) // Used for PPM RC
180  {GPIOA, GPIO_Pin_8, GPIO_PinSource8, TIM1, TIM_Channel_1, GPIO_AF_TIM1, TIM1_CC_IRQn, TIM_IT_CC1, }, // Buzzer
181 };
182 #define RC_PPM_PIN 11
183 #define PPM_RC_IQRHandler TIM8_BRK_TIM12_IRQHandler
184 
185 
186 
187 
188 #endif // REVO_F4_H
#define TIM_IT_CC3
#define DMA_IT_TCIF5
#define DMA1_Stream6
Definition: stm32f4xx.h:2131
#define TIM_IT_CC4
#define DMA1_Stream5
Definition: stm32f4xx.h:2130
#define GPIO_AF_TIM3
AF 2 selection.
#define SPI2
Definition: stm32f4xx.h:2050
#define DMA_FLAG_TCIF4
#define TIM1
Definition: stm32f4xx.h:2078
#define DMA_Channel_0
#define SPI1
Definition: stm32f4xx.h:2087
#define TIM_Channel_3
#define GPIOA
Definition: stm32f4xx.h:2110
#define SPI3
Definition: stm32f4xx.h:2051
#define TIM3
Definition: stm32f4xx.h:2038
#define TIM12
Definition: stm32f4xx.h:2043
#define TIM9
Definition: stm32f4xx.h:2091
#define GPIO_AF_TIM1
AF 1 selection.
#define TIM2
Definition: stm32f4xx.h:2037
#define TIM8
Definition: stm32f4xx.h:2079
#define DMA_FLAG_TCIF2
#define GPIOB
Definition: stm32f4xx.h:2111
#define DMA_IT_TCIF3
#define GPIO_AF_TIM8
AF 3 selection.
#define DMA1_Stream3
Definition: stm32f4xx.h:2128
#define TIM_Channel_2
#define DMA_Channel_4
#define DMA_IT_TCIF1
#define DMA_IT_TCIF7
#define GPIOC
Definition: stm32f4xx.h:2112
#define TIM_Channel_4
#define DMA_FLAG_TCIF3
#define DMA2_Stream3
Definition: stm32f4xx.h:2137
#define DMA1_Stream0
Definition: stm32f4xx.h:2125
#define USART1
Definition: stm32f4xx.h:2080
#define DMA1_Stream1
Definition: stm32f4xx.h:2126
#define DMA_FLAG_TCIF0
#define DMA_Channel_3
#define GPIO_AF_SPI3
AF 6 selection.
#define NUM_UART
Definition: revo_f4.h:43
#define TIM5
Definition: stm32f4xx.h:2040
#define TIM_IT_CC1
#define DMA_Channel_1
#define DMA2_Stream7
Definition: stm32f4xx.h:2141
#define DMA_Channel_7
const uart_hardware_struct_t uart_config[NUM_UART]
Definition: revo_f4.h:64
#define TIM_Channel_1
const pwm_hardware_struct_t pwm_config[PWM_NUM_CHANNELS]
Definition: revo_f4.h:166
#define GPIO_AF_USART1
AF 7 selection.
#define DMA2_Stream2
Definition: stm32f4xx.h:2136
#define DMA2_Stream5
Definition: stm32f4xx.h:2139
#define PWM_NUM_CHANNELS
Definition: revo_f4.h:154
#define DMA1_Stream2
Definition: stm32f4xx.h:2127
#define DMA_IT_TCIF6
#define TIM_IT_CC2
#define DMA_Channel_5
#define DMA_FLAG_TCIF5
#define DMA_IT_TCIF2
#define USART3
Definition: stm32f4xx.h:2057
#define GPIO_AF_I2C1
AF 4 selection.
#define DMA1_Stream4
Definition: stm32f4xx.h:2129
#define I2C2
Definition: stm32f4xx.h:2061
const spi_hardware_struct_t spi_config[NUM_SPI]
Definition: revo_f4.h:107
#define NUM_I2C
Definition: revo_f4.h:131
#define GPIO_AF_SPI1
AF 5 selection.
#define I2C1
Definition: stm32f4xx.h:2060
const i2c_hardware_struct_t i2c_config[NUM_I2C]
Definition: revo_f4.h:132
#define USART2
Definition: stm32f4xx.h:2056
#define NUM_SPI
Definition: revo_f4.h:89


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Wed Jul 3 2019 19:59:25