usbhs_otg.h
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1 
33 /*
34  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
35  */
36 
37 #ifndef USBHS_OTG_H_INCLUDED
38 #define USBHS_OTG_H_INCLUDED
39 
40 #include "compiler.h"
41 
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45 
46 /* Get USB VBus/ID pin configuration in board configuration */
47 #include "conf_board.h"
48 #include "board.h"
49 #include "ioport.h"
50 #include "pio.h"
51 #include "pio_handler.h"
52 
53 __always_inline static void otg_io_pin_init(uint32_t pin, uint32_t flags,
54  IRQn_Type port_irqn, uint8_t irq_level,
55  void (*handler)(uint32_t,uint32_t), uint32_t wkup)
56 {
57  // IOPORT must be initialized before by ioport_init(), \see ioport_group.
58  pio_handler_set_pin(pin, flags, handler);
60  NVIC_SetPriority(port_irqn, irq_level);
61  NVIC_EnableIRQ(port_irqn);
63  if (wkup) {
65  }
66 }
67 
73 
78 #ifndef USB_INT_LEVEL
79 # define USB_INT_LEVEL 5
80 #endif
81 
88 bool otg_dual_enable(void);
89 
94 void otg_dual_disable(void);
95 
96 
106 #define OTG_ID_DETECT (defined(CONF_BOARD_USB_PORT) && \
107  defined(CONF_BOARD_USB_ID_DETECT))
108 #define OTG_ID_IO (defined(USB_ID_PIN) && OTG_ID_DETECT)
109 
110 #if OTG_ID_IO
111 #define otg_id_init(handler) otg_io_pin_init(USB_ID_PIN, USB_ID_FLAGS, \
112  USB_ID_PIN_IRQn, USB_INT_LEVEL, handler, false)
113 # define otg_id_interrupt_enable() pio_enable_pin_interrupt(USB_ID_PIN)
114 # define otg_id_interrupt_disable() pio_disable_pin_interrupt(USB_ID_PIN)
115 # define Is_otg_id_device() ioport_get_pin_level(USB_ID_PIN)
116 # define Is_otg_id_host() (!Is_otg_id_device())
117 #endif
118 
119 #define otg_force_device_mode() (Set_bits(USBHS->USBHS_CTRL, USBHS_CTRL_UIMOD))
120 #define Is_otg_device_mode_forced() (Tst_bits(USBHS->USBHS_CTRL, USBHS_CTRL_UIMOD))
122 #define otg_force_host_mode() (Clr_bits(USBHS->USBHS_CTRL, USBHS_CTRL_UIMOD))
124 #define Is_otg_host_mode_forced() (!Tst_bits(USBHS->USBHS_CTRL, USBHS_CTRL_UIMOD))
126 
128 
139 #define OTG_VBUS_DETECT (defined(CONF_BOARD_USB_PORT) && \
140  defined(CONF_BOARD_USB_VBUS_DETECT))
141 #define OTG_VBUS_IO (defined(USB_VBUS_PIN) && OTG_VBUS_DETECT)
142 #ifndef USB_VBUS_WKUP
143 # define USB_VBUS_WKUP 0
144 #endif
145 
146 #define otg_vbus_init(handler) otg_io_pin_init(USB_VBUS_PIN, USB_VBUS_FLAGS, \
147  USB_VBUS_PIN_IRQn, USB_INT_LEVEL, handler, USB_VBUS_WKUP)
148 #define Is_otg_vbus_high() ioport_get_pin_level(USB_VBUS_PIN)
149 #define Is_otg_vbus_low() (!Is_otg_vbus_high())
150 #define otg_enable_vbus_interrupt() pio_enable_pin_interrupt(USB_VBUS_PIN)
151 #define otg_disable_vbus_interrupt() pio_disable_pin_interrupt(USB_VBUS_PIN)
152 
158 #define otg_reset() \
159  do { \
160  USBHS->USBHS_CTRL = 0; \
161  while( USBHS->USBHS_SR & 0x3FFF) {\
162  USBHS->USBHS_SCR = 0xFFFFFFFF;\
163  } \
164  } while (0)
165 #define otg_enable() (Set_bits(USBHS->USBHS_CTRL, USBHS_CTRL_USBE))
167 #define otg_disable() (Clr_bits(USBHS->USBHS_CTRL, USBHS_CTRL_USBE))
169 #define Is_otg_enabled() (Tst_bits(USBHS->USBHS_CTRL, USBHS_CTRL_USBE))
170 
173 #define Is_otg_clock_usable() (Tst_bits(USBHS->USBHS_SR, USBHS_SR_CLKUSABLE))
174 
176 #define otg_freeze_clock() (Set_bits(USBHS->USBHS_CTRL, USBHS_CTRL_FRZCLK))
177 #define otg_unfreeze_clock() (Clr_bits(USBHS->USBHS_CTRL, USBHS_CTRL_FRZCLK))
178 #define Is_otg_clock_frozen() (Tst_bits(USBHS->USBHS_CTRL, USBHS_CTRL_FRZCLK))
179 
181 #define otg_enable_rderr_interrupt() (Set_bits(USBHS->USBHS_CTRL, USBHS_CTRL_RDERRE))
182 #define otg_disable_rderr_interrupt() (Clr_bits(USBHS->USBHS_CTRL, USBHS_CTRL_RDERRE))
184 #define Is_otg_rderr_interrupt_enabled() (Tst_bits(USBHS->USBHS_CTRL, USBHS_CTRL_RDERRE))
185 #define otg_ack_rderr_interrupt() (USBHS->USBHS_SCR = USBHS_SCR_RDERRIC)
187 #define otg_raise_rderr_interrupt() (USBHS->USBHS_SFR = USBHS_SFR_RDERRIS)
189 #define Is_otg_rderr_interrupt() (Tst_bits(USBHS->USBHS_SR, USBHS_SR_RDERRI))
191 
194 
195 #ifdef __cplusplus
196 }
197 #endif
198 
199 
200 #endif /* USBHS_OTG_H_INCLUDED */
static __always_inline void otg_io_pin_init(uint32_t pin, uint32_t flags, IRQn_Type port_irqn, uint8_t irq_level, void(*handler)(uint32_t, uint32_t), uint32_t wkup)
Definition: usbhs_otg.h:53
void pio_enable_pin_interrupt(uint32_t ul_pin)
Enable interrupt for a GPIO pin.
Definition: pio.c:914
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
Set Interrupt Priority.
Definition: core_cm7.h:1766
Common IOPORT service main header file for AVR, UC3 and ARM architectures.
Commonly used includes, types and macros.
void pmc_set_fast_startup_input(uint32_t ul_inputs)
Set the wake-up inputs for fast startup mode registers (event generation).
Definition: pmc.c:1296
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
Definition: core_cm7.h:1683
uint32_t pio_handler_set_pin(uint32_t ul_pin, uint32_t ul_flag, void(*p_handler)(uint32_t, uint32_t))
Board configuration.
void otg_dual_disable(void)
Uninitialize the dual role This function is implemented in usbhs_host.c file.
Parallel Input/Output (PIO) interrupt handler for SAM.
enum IRQn IRQn_Type
bool otg_dual_enable(void)
Initialize the dual role This function is implemented in usbhs_host.c file.
Standard board header file.
static void ioport_set_pin_sense_mode(ioport_pin_t pin, enum ioport_sense pin_sense)
Set the pin sense mode of a single IOPORT pin.
Definition: ioport.h:350


inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:05