Type definitions for the Trace Port Interface (TPI) More...
|
Classes | |
| struct | TPI_Type |
| Structure type to access the Trace Port Interface Register (TPI). More... | |
Macros | |
| #define | TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) |
| #define | TPI_ACPR_PRESCALER_Pos 0 |
| #define | TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) |
| #define | TPI_DEVID_AsynClkIn_Pos 5 |
| #define | TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) |
| #define | TPI_DEVID_MANCVALID_Pos 10 |
| #define | TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) |
| #define | TPI_DEVID_MinBufSz_Pos 6 |
| #define | TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) |
| #define | TPI_DEVID_NrTraceInput_Pos 0 |
| #define | TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) |
| #define | TPI_DEVID_NRZVALID_Pos 11 |
| #define | TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) |
| #define | TPI_DEVID_PTINVALID_Pos 9 |
| #define | TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) |
| #define | TPI_DEVTYPE_MajorType_Pos 4 |
| #define | TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) |
| #define | TPI_DEVTYPE_SubType_Pos 0 |
| #define | TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) |
| #define | TPI_FFCR_EnFCont_Pos 1 |
| #define | TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) |
| #define | TPI_FFCR_TrigIn_Pos 8 |
| #define | TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) |
| #define | TPI_FFSR_FlInProg_Pos 0 |
| #define | TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) |
| #define | TPI_FFSR_FtNonStop_Pos 3 |
| #define | TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) |
| #define | TPI_FFSR_FtStopped_Pos 1 |
| #define | TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) |
| #define | TPI_FFSR_TCPresent_Pos 2 |
| #define | TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) |
| #define | TPI_FIFO0_ETM0_Pos 0 |
| #define | TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) |
| #define | TPI_FIFO0_ETM1_Pos 8 |
| #define | TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) |
| #define | TPI_FIFO0_ETM2_Pos 16 |
| #define | TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) |
| #define | TPI_FIFO0_ETM_ATVALID_Pos 26 |
| #define | TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) |
| #define | TPI_FIFO0_ETM_bytecount_Pos 24 |
| #define | TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) |
| #define | TPI_FIFO0_ITM_ATVALID_Pos 29 |
| #define | TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) |
| #define | TPI_FIFO0_ITM_bytecount_Pos 27 |
| #define | TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) |
| #define | TPI_FIFO1_ETM_ATVALID_Pos 26 |
| #define | TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) |
| #define | TPI_FIFO1_ETM_bytecount_Pos 24 |
| #define | TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) |
| #define | TPI_FIFO1_ITM0_Pos 0 |
| #define | TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) |
| #define | TPI_FIFO1_ITM1_Pos 8 |
| #define | TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) |
| #define | TPI_FIFO1_ITM2_Pos 16 |
| #define | TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) |
| #define | TPI_FIFO1_ITM_ATVALID_Pos 29 |
| #define | TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) |
| #define | TPI_FIFO1_ITM_bytecount_Pos 27 |
| #define | TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) |
| #define | TPI_ITATBCTR0_ATREADY_Pos 0 |
| #define | TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) |
| #define | TPI_ITATBCTR2_ATREADY_Pos 0 |
| #define | TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) |
| #define | TPI_ITCTRL_Mode_Pos 0 |
| #define | TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) |
| #define | TPI_SPPR_TXMODE_Pos 0 |
| #define | TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) |
| #define | TPI_TRIGGER_TRIGGER_Pos 0 |
Detailed Description
Type definitions for the Trace Port Interface (TPI)
Macro Definition Documentation
◆ TPI_ACPR_PRESCALER_Msk
| #define TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) |
TPI ACPR: PRESCALER Mask
Definition at line 1162 of file core_cm7.h.
◆ TPI_ACPR_PRESCALER_Pos
| #define TPI_ACPR_PRESCALER_Pos 0 |
TPI ACPR: PRESCALER Position
Definition at line 1161 of file core_cm7.h.
◆ TPI_DEVID_AsynClkIn_Msk
| #define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) |
TPI DEVID: AsynClkIn Mask
Definition at line 1262 of file core_cm7.h.
◆ TPI_DEVID_AsynClkIn_Pos
| #define TPI_DEVID_AsynClkIn_Pos 5 |
TPI DEVID: AsynClkIn Position
Definition at line 1261 of file core_cm7.h.
◆ TPI_DEVID_MANCVALID_Msk
| #define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) |
TPI DEVID: MANCVALID Mask
Definition at line 1253 of file core_cm7.h.
◆ TPI_DEVID_MANCVALID_Pos
| #define TPI_DEVID_MANCVALID_Pos 10 |
TPI DEVID: MANCVALID Position
Definition at line 1252 of file core_cm7.h.
◆ TPI_DEVID_MinBufSz_Msk
| #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) |
TPI DEVID: MinBufSz Mask
Definition at line 1259 of file core_cm7.h.
◆ TPI_DEVID_MinBufSz_Pos
| #define TPI_DEVID_MinBufSz_Pos 6 |
TPI DEVID: MinBufSz Position
Definition at line 1258 of file core_cm7.h.
◆ TPI_DEVID_NrTraceInput_Msk
| #define TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) |
TPI DEVID: NrTraceInput Mask
Definition at line 1265 of file core_cm7.h.
◆ TPI_DEVID_NrTraceInput_Pos
| #define TPI_DEVID_NrTraceInput_Pos 0 |
TPI DEVID: NrTraceInput Position
Definition at line 1264 of file core_cm7.h.
◆ TPI_DEVID_NRZVALID_Msk
| #define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) |
TPI DEVID: NRZVALID Mask
Definition at line 1250 of file core_cm7.h.
◆ TPI_DEVID_NRZVALID_Pos
| #define TPI_DEVID_NRZVALID_Pos 11 |
TPI DEVID: NRZVALID Position
Definition at line 1249 of file core_cm7.h.
◆ TPI_DEVID_PTINVALID_Msk
| #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) |
TPI DEVID: PTINVALID Mask
Definition at line 1256 of file core_cm7.h.
◆ TPI_DEVID_PTINVALID_Pos
| #define TPI_DEVID_PTINVALID_Pos 9 |
TPI DEVID: PTINVALID Position
Definition at line 1255 of file core_cm7.h.
◆ TPI_DEVTYPE_MajorType_Msk
| #define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) |
TPI DEVTYPE: MajorType Mask
Definition at line 1272 of file core_cm7.h.
◆ TPI_DEVTYPE_MajorType_Pos
| #define TPI_DEVTYPE_MajorType_Pos 4 |
TPI DEVTYPE: MajorType Position
Definition at line 1271 of file core_cm7.h.
◆ TPI_DEVTYPE_SubType_Msk
| #define TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) |
TPI DEVTYPE: SubType Mask
Definition at line 1269 of file core_cm7.h.
◆ TPI_DEVTYPE_SubType_Pos
| #define TPI_DEVTYPE_SubType_Pos 0 |
TPI DEVTYPE: SubType Position
Definition at line 1268 of file core_cm7.h.
◆ TPI_FFCR_EnFCont_Msk
| #define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) |
TPI FFCR: EnFCont Mask
Definition at line 1186 of file core_cm7.h.
◆ TPI_FFCR_EnFCont_Pos
| #define TPI_FFCR_EnFCont_Pos 1 |
TPI FFCR: EnFCont Position
Definition at line 1185 of file core_cm7.h.
◆ TPI_FFCR_TrigIn_Msk
| #define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) |
TPI FFCR: TrigIn Mask
Definition at line 1183 of file core_cm7.h.
◆ TPI_FFCR_TrigIn_Pos
| #define TPI_FFCR_TrigIn_Pos 8 |
TPI FFCR: TrigIn Position
Definition at line 1182 of file core_cm7.h.
◆ TPI_FFSR_FlInProg_Msk
| #define TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) |
TPI FFSR: FlInProg Mask
Definition at line 1179 of file core_cm7.h.
◆ TPI_FFSR_FlInProg_Pos
| #define TPI_FFSR_FlInProg_Pos 0 |
TPI FFSR: FlInProg Position
Definition at line 1178 of file core_cm7.h.
◆ TPI_FFSR_FtNonStop_Msk
| #define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) |
TPI FFSR: FtNonStop Mask
Definition at line 1170 of file core_cm7.h.
◆ TPI_FFSR_FtNonStop_Pos
| #define TPI_FFSR_FtNonStop_Pos 3 |
TPI FFSR: FtNonStop Position
Definition at line 1169 of file core_cm7.h.
◆ TPI_FFSR_FtStopped_Msk
| #define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) |
TPI FFSR: FtStopped Mask
Definition at line 1176 of file core_cm7.h.
◆ TPI_FFSR_FtStopped_Pos
| #define TPI_FFSR_FtStopped_Pos 1 |
TPI FFSR: FtStopped Position
Definition at line 1175 of file core_cm7.h.
◆ TPI_FFSR_TCPresent_Msk
| #define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) |
TPI FFSR: TCPresent Mask
Definition at line 1173 of file core_cm7.h.
◆ TPI_FFSR_TCPresent_Pos
| #define TPI_FFSR_TCPresent_Pos 2 |
TPI FFSR: TCPresent Position
Definition at line 1172 of file core_cm7.h.
◆ TPI_FIFO0_ETM0_Msk
| #define TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) |
TPI FIFO0: ETM0 Mask
Definition at line 1212 of file core_cm7.h.
◆ TPI_FIFO0_ETM0_Pos
| #define TPI_FIFO0_ETM0_Pos 0 |
TPI FIFO0: ETM0 Position
Definition at line 1211 of file core_cm7.h.
◆ TPI_FIFO0_ETM1_Msk
| #define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) |
TPI FIFO0: ETM1 Mask
Definition at line 1209 of file core_cm7.h.
◆ TPI_FIFO0_ETM1_Pos
| #define TPI_FIFO0_ETM1_Pos 8 |
TPI FIFO0: ETM1 Position
Definition at line 1208 of file core_cm7.h.
◆ TPI_FIFO0_ETM2_Msk
| #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) |
TPI FIFO0: ETM2 Mask
Definition at line 1206 of file core_cm7.h.
◆ TPI_FIFO0_ETM2_Pos
| #define TPI_FIFO0_ETM2_Pos 16 |
TPI FIFO0: ETM2 Position
Definition at line 1205 of file core_cm7.h.
◆ TPI_FIFO0_ETM_ATVALID_Msk
| #define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) |
TPI FIFO0: ETM_ATVALID Mask
Definition at line 1200 of file core_cm7.h.
◆ TPI_FIFO0_ETM_ATVALID_Pos
| #define TPI_FIFO0_ETM_ATVALID_Pos 26 |
TPI FIFO0: ETM_ATVALID Position
Definition at line 1199 of file core_cm7.h.
◆ TPI_FIFO0_ETM_bytecount_Msk
| #define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) |
TPI FIFO0: ETM_bytecount Mask
Definition at line 1203 of file core_cm7.h.
◆ TPI_FIFO0_ETM_bytecount_Pos
| #define TPI_FIFO0_ETM_bytecount_Pos 24 |
TPI FIFO0: ETM_bytecount Position
Definition at line 1202 of file core_cm7.h.
◆ TPI_FIFO0_ITM_ATVALID_Msk
| #define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) |
TPI FIFO0: ITM_ATVALID Mask
Definition at line 1194 of file core_cm7.h.
◆ TPI_FIFO0_ITM_ATVALID_Pos
| #define TPI_FIFO0_ITM_ATVALID_Pos 29 |
TPI FIFO0: ITM_ATVALID Position
Definition at line 1193 of file core_cm7.h.
◆ TPI_FIFO0_ITM_bytecount_Msk
| #define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) |
TPI FIFO0: ITM_bytecount Mask
Definition at line 1197 of file core_cm7.h.
◆ TPI_FIFO0_ITM_bytecount_Pos
| #define TPI_FIFO0_ITM_bytecount_Pos 27 |
TPI FIFO0: ITM_bytecount Position
Definition at line 1196 of file core_cm7.h.
◆ TPI_FIFO1_ETM_ATVALID_Msk
| #define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) |
TPI FIFO1: ETM_ATVALID Mask
Definition at line 1226 of file core_cm7.h.
◆ TPI_FIFO1_ETM_ATVALID_Pos
| #define TPI_FIFO1_ETM_ATVALID_Pos 26 |
TPI FIFO1: ETM_ATVALID Position
Definition at line 1225 of file core_cm7.h.
◆ TPI_FIFO1_ETM_bytecount_Msk
| #define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) |
TPI FIFO1: ETM_bytecount Mask
Definition at line 1229 of file core_cm7.h.
◆ TPI_FIFO1_ETM_bytecount_Pos
| #define TPI_FIFO1_ETM_bytecount_Pos 24 |
TPI FIFO1: ETM_bytecount Position
Definition at line 1228 of file core_cm7.h.
◆ TPI_FIFO1_ITM0_Msk
| #define TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) |
TPI FIFO1: ITM0 Mask
Definition at line 1238 of file core_cm7.h.
◆ TPI_FIFO1_ITM0_Pos
| #define TPI_FIFO1_ITM0_Pos 0 |
TPI FIFO1: ITM0 Position
Definition at line 1237 of file core_cm7.h.
◆ TPI_FIFO1_ITM1_Msk
| #define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) |
TPI FIFO1: ITM1 Mask
Definition at line 1235 of file core_cm7.h.
◆ TPI_FIFO1_ITM1_Pos
| #define TPI_FIFO1_ITM1_Pos 8 |
TPI FIFO1: ITM1 Position
Definition at line 1234 of file core_cm7.h.
◆ TPI_FIFO1_ITM2_Msk
| #define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) |
TPI FIFO1: ITM2 Mask
Definition at line 1232 of file core_cm7.h.
◆ TPI_FIFO1_ITM2_Pos
| #define TPI_FIFO1_ITM2_Pos 16 |
TPI FIFO1: ITM2 Position
Definition at line 1231 of file core_cm7.h.
◆ TPI_FIFO1_ITM_ATVALID_Msk
| #define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) |
TPI FIFO1: ITM_ATVALID Mask
Definition at line 1220 of file core_cm7.h.
◆ TPI_FIFO1_ITM_ATVALID_Pos
| #define TPI_FIFO1_ITM_ATVALID_Pos 29 |
TPI FIFO1: ITM_ATVALID Position
Definition at line 1219 of file core_cm7.h.
◆ TPI_FIFO1_ITM_bytecount_Msk
| #define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) |
TPI FIFO1: ITM_bytecount Mask
Definition at line 1223 of file core_cm7.h.
◆ TPI_FIFO1_ITM_bytecount_Pos
| #define TPI_FIFO1_ITM_bytecount_Pos 27 |
TPI FIFO1: ITM_bytecount Position
Definition at line 1222 of file core_cm7.h.
◆ TPI_ITATBCTR0_ATREADY_Msk
| #define TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) |
TPI ITATBCTR0: ATREADY Mask
Definition at line 1242 of file core_cm7.h.
◆ TPI_ITATBCTR0_ATREADY_Pos
| #define TPI_ITATBCTR0_ATREADY_Pos 0 |
TPI ITATBCTR0: ATREADY Position
Definition at line 1241 of file core_cm7.h.
◆ TPI_ITATBCTR2_ATREADY_Msk
| #define TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) |
TPI ITATBCTR2: ATREADY Mask
Definition at line 1216 of file core_cm7.h.
◆ TPI_ITATBCTR2_ATREADY_Pos
| #define TPI_ITATBCTR2_ATREADY_Pos 0 |
TPI ITATBCTR2: ATREADY Position
Definition at line 1215 of file core_cm7.h.
◆ TPI_ITCTRL_Mode_Msk
| #define TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) |
TPI ITCTRL: Mode Mask
Definition at line 1246 of file core_cm7.h.
◆ TPI_ITCTRL_Mode_Pos
| #define TPI_ITCTRL_Mode_Pos 0 |
TPI ITCTRL: Mode Position
Definition at line 1245 of file core_cm7.h.
◆ TPI_SPPR_TXMODE_Msk
| #define TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) |
TPI SPPR: TXMODE Mask
Definition at line 1166 of file core_cm7.h.
◆ TPI_SPPR_TXMODE_Pos
| #define TPI_SPPR_TXMODE_Pos 0 |
TPI SPPR: TXMODE Position
Definition at line 1165 of file core_cm7.h.
◆ TPI_TRIGGER_TRIGGER_Msk
| #define TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) |
TPI TRIGGER: TRIGGER Mask
Definition at line 1190 of file core_cm7.h.
◆ TPI_TRIGGER_TRIGGER_Pos
| #define TPI_TRIGGER_TRIGGER_Pos 0 |
TPI TRIGGER: TRIGGER Position
Definition at line 1189 of file core_cm7.h.