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airbourne
airbourne
lib
STM32_USB_OTG_Driver
inc
usb_defines.h
Go to the documentation of this file.
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __USB_DEF_H__
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#define __USB_DEF_H__
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/* Includes ------------------------------------------------------------------*/
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#include "
usb_conf.h
"
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#define USB_OTG_SPEED_PARAM_HIGH 0
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#define USB_OTG_SPEED_PARAM_HIGH_IN_FULL 1
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#define USB_OTG_SPEED_PARAM_FULL 3
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#define USB_OTG_SPEED_HIGH 0
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#define USB_OTG_SPEED_FULL 1
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#define USB_OTG_ULPI_PHY 1
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#define USB_OTG_EMBEDDED_PHY 2
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#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
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#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
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#define GAHBCFG_GLBINT_ENABLE 1
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#define GAHBCFG_INT_DMA_BURST_SINGLE 0
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#define GAHBCFG_INT_DMA_BURST_INCR 1
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#define GAHBCFG_INT_DMA_BURST_INCR4 3
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#define GAHBCFG_INT_DMA_BURST_INCR8 5
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#define GAHBCFG_INT_DMA_BURST_INCR16 7
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#define GAHBCFG_DMAENABLE 1
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#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
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#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
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#define GRXSTS_PKTSTS_IN 2
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#define GRXSTS_PKTSTS_IN_XFER_COMP 3
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#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
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#define GRXSTS_PKTSTS_CH_HALTED 7
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#define MODE_HNP_SRP_CAPABLE 0
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#define MODE_SRP_ONLY_CAPABLE 1
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#define MODE_NO_HNP_SRP_CAPABLE 2
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#define MODE_SRP_CAPABLE_DEVICE 3
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#define MODE_NO_SRP_CAPABLE_DEVICE 4
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#define MODE_SRP_CAPABLE_HOST 5
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#define MODE_NO_SRP_CAPABLE_HOST 6
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#define A_HOST 1
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#define A_SUSPEND 2
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#define A_PERIPHERAL 3
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#define B_PERIPHERAL 4
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#define B_HOST 5
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#define DEVICE_MODE 0
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#define HOST_MODE 1
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#define OTG_MODE 2
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#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
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#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
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#define DSTS_ENUMSPD_LS_PHY_6MHZ 2
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#define DSTS_ENUMSPD_FS_PHY_48MHZ 3
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#define DCFG_FRAME_INTERVAL_80 0
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#define DCFG_FRAME_INTERVAL_85 1
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#define DCFG_FRAME_INTERVAL_90 2
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#define DCFG_FRAME_INTERVAL_95 3
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#define DEP0CTL_MPS_64 0
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#define DEP0CTL_MPS_32 1
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#define DEP0CTL_MPS_16 2
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#define DEP0CTL_MPS_8 3
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#define EP_SPEED_LOW 0
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#define EP_SPEED_FULL 1
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#define EP_SPEED_HIGH 2
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#define EP_TYPE_CTRL 0
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#define EP_TYPE_ISOC 1
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#define EP_TYPE_BULK 2
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#define EP_TYPE_INTR 3
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#define EP_TYPE_MSK 3
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#define STS_GOUT_NAK 1
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#define STS_DATA_UPDT 2
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#define STS_XFER_COMP 3
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#define STS_SETUP_COMP 4
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#define STS_SETUP_UPDT 6
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#define HC_PID_DATA0 0
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#define HC_PID_DATA2 1
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#define HC_PID_DATA1 2
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#define HC_PID_SETUP 3
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#define HPRT0_PRTSPD_HIGH_SPEED 0
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#define HPRT0_PRTSPD_FULL_SPEED 1
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#define HPRT0_PRTSPD_LOW_SPEED 2
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#define HCFG_30_60_MHZ 0
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#define HCFG_48_MHZ 1
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#define HCFG_6_MHZ 2
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#define HCCHAR_CTRL 0
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#define HCCHAR_ISOC 1
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#define HCCHAR_BULK 2
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#define HCCHAR_INTR 3
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#ifndef MIN
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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typedef
enum
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{
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USB_OTG_HS_CORE_ID
= 0,
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USB_OTG_FS_CORE_ID
= 1
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}
USB_OTG_CORE_ID_TypeDef
;
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#define USB_OTG_READ_REG32(reg) (*(__IO uint32_t *)(reg))
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#define USB_OTG_WRITE_REG32(reg,value) (*(__IO uint32_t *)(reg) = (value))
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#define USB_OTG_MODIFY_REG32(reg,clear_mask,set_mask) \
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USB_OTG_WRITE_REG32((reg), (((USB_OTG_READ_REG32(reg)) & ~(clear_mask)) | (set_mask)) )
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/********************************************************************************
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ENUMERATION TYPE
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********************************************************************************/
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enum
USB_OTG_SPEED
{
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USB_SPEED_UNKNOWN
= 0,
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USB_SPEED_LOW
,
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USB_SPEED_FULL
,
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USB_SPEED_HIGH
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};
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#endif
/* __USB_DEFINES__H__ */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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USB_OTG_SPEED
USB_OTG_SPEED
Definition:
usb_defines.h:233
USB_OTG_FS_CORE_ID
Definition:
usb_defines.h:193
USB_OTG_HS_CORE_ID
Definition:
usb_defines.h:192
USB_OTG_CORE_ID_TypeDef
USB_OTG_CORE_ID_TypeDef
Definition:
usb_defines.h:190
USB_SPEED_UNKNOWN
Definition:
usb_defines.h:234
USB_SPEED_FULL
Definition:
usb_defines.h:236
USB_SPEED_LOW
Definition:
usb_defines.h:235
USB_SPEED_HIGH
Definition:
usb_defines.h:237
usb_conf.h
General low level driver configuration.
rosflight_firmware
Author(s): Daniel Koch
, James Jackson
autogenerated on Wed Jul 3 2019 19:59:26