usb_otg.c
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1 
28 /* Includes ------------------------------------------------------------------*/
29 #include "usb_defines.h"
30 #include "usb_regs.h"
31 #include "usb_core.h"
32 #include "usb_otg.h"
33 
82 
85 static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev);
86 
97 /* OTG Interrupt Handler */
98 
99 
107 {
108  uint32_t retval = 0;
109  USB_OTG_GINTSTS_TypeDef gintsts ;
110  gintsts.d32 = 0;
111 
112  gintsts.d32 = USB_OTG_Read_itr(pdev);
113  if (gintsts.d32 == 0)
114  {
115  return 0;
116  }
117  if (gintsts.b.otgintr)
118  {
119  retval |= USB_OTG_HandleOTG_ISR(pdev);
120  }
121  if (gintsts.b.conidstschng)
122  {
124  }
125  if (gintsts.b.sessreqintr)
126  {
127  retval |= USB_OTG_HandleSessionRequest_ISR(pdev);
128  }
129  return retval;
130 }
131 
132 
139 static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev)
140 {
141  USB_OTG_GINTSTS_TypeDef gintsts;
142  USB_OTG_GINTMSK_TypeDef gintmsk;
143  USB_OTG_GINTMSK_TypeDef gintmsk_common;
144 
145 
146  gintsts.d32 = 0;
147  gintmsk.d32 = 0;
148  gintmsk_common.d32 = 0;
149 
150  /* OTG interrupts */
151  gintmsk_common.b.sessreqintr = 1;
152  gintmsk_common.b.conidstschng = 1;
153  gintmsk_common.b.otgintr = 1;
154 
155  gintsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTSTS);
156  gintmsk.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTMSK);
157  return ((gintsts.d32 & gintmsk.d32 ) & gintmsk_common.d32);
158 }
159 
160 
168 {
169  USB_OTG_GOTGINT_TypeDef gotgint;
170  USB_OTG_GOTGCTL_TypeDef gotgctl;
171 
172 
173  gotgint.d32 = 0;
174  gotgctl.d32 = 0;
175 
176  gotgint.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGINT);
177  gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
178 
179  if (gotgint.b.sesenddet)
180  {
181  gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
182 
183 
184  if (USB_OTG_IsDeviceMode(pdev))
185  {
186 
187  }
188  else if (USB_OTG_IsHostMode(pdev))
189  {
190 
191  }
192  }
193 
194  /* ----> SRP SUCCESS or FAILURE INTERRUPT <---- */
195  if (gotgint.b.sesreqsucstschng)
196  {
197  gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
198  if (gotgctl.b.sesreqscs) /* Session request success */
199  {
200  if (USB_OTG_IsDeviceMode(pdev))
201  {
202 
203  }
204  /* Clear Session Request */
205  gotgctl.d32 = 0;
206  gotgctl.b.sesreq = 1;
207  USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GOTGCTL, gotgctl.d32, 0);
208  }
209  else /* Session request failure */
210  {
211  if (USB_OTG_IsDeviceMode(pdev))
212  {
213 
214  }
215  }
216  }
217  /* ----> HNP SUCCESS or FAILURE INTERRUPT <---- */
218  if (gotgint.b.hstnegsucstschng)
219  {
220  gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
221 
222  if (gotgctl.b.hstnegscs) /* Host negotiation success */
223  {
224  if (USB_OTG_IsHostMode(pdev)) /* The core AUTOMATICALLY sets the Host mode */
225  {
226 
227  }
228  }
229  else /* Host negotiation failure */
230  {
231 
232  }
233  gotgint.b.hstnegsucstschng = 1; /* Ack "Host Negotiation Success Status Change" interrupt. */
234  }
235  /* ----> HOST NEGOTIATION DETECTED INTERRUPT <---- */
236  if (gotgint.b.hstnegdet)
237  {
238  if (USB_OTG_IsDeviceMode(pdev)) /* The core AUTOMATICALLY sets the Host mode */
239  {
240 
241  }
242  else
243  {
244 
245  }
246  }
247  if (gotgint.b.adevtoutchng)
248  {}
249  if (gotgint.b.debdone)
250  {
251  USB_OTG_ResetPort(pdev);
252  }
253  /* Clear OTG INT */
254  USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
255  return 1;
256 }
257 
258 
266 {
267  USB_OTG_GINTMSK_TypeDef gintmsk;
268  USB_OTG_GOTGCTL_TypeDef gotgctl;
269  USB_OTG_GINTSTS_TypeDef gintsts;
270 
271  gintsts.d32 = 0 ;
272  gintmsk.d32 = 0 ;
273  gotgctl.d32 = 0 ;
274  gintmsk.b.sofintr = 1;
275 
276  USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GINTMSK, gintmsk.d32, 0);
277  gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
278 
279  /* B-Device connector (Device Mode) */
280  if (gotgctl.b.conidsts)
281  {
283  USB_OTG_CoreInitDev(pdev);
285  pdev->otg.OTG_State = B_PERIPHERAL;
286  }
287  else
288  {
290  USB_OTG_CoreInitHost(pdev);
292  pdev->otg.OTG_State = A_HOST;
293  }
294  /* Set flag and clear interrupt */
295  gintsts.b.conidstschng = 1;
296  USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
297  return 1;
298 }
299 
300 
308 {
309  USB_OTG_GINTSTS_TypeDef gintsts;
310  USB_OTG_GOTGCTL_TypeDef gotgctl;
311 
312 
313  gotgctl.d32 = 0;
314  gintsts.d32 = 0;
315 
316  gotgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
317  if (USB_OTG_IsDeviceMode(pdev) && (gotgctl.b.bsesvld))
318  {
319 
320  }
321  else if (gotgctl.b.asesvld)
322  {
323  }
324  /* Clear interrupt */
325  gintsts.d32 = 0;
326  gintsts.b.sessreqintr = 1;
327  USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
328  return 1;
329 }
330 
331 
339 {
341 
342  otgctl.d32 = 0;
343 
344  otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
345  if (otgctl.b.sesreq)
346  {
347  return; /* SRP in progress */
348  }
349  otgctl.b.sesreq = 1;
350  USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
351 }
352 
353 
360 void USB_OTG_InitiateHNP(USB_OTG_CORE_HANDLE *pdev , uint8_t state, uint8_t mode)
361 {
363  USB_OTG_HPRT0_TypeDef hprt0;
364 
365  otgctl.d32 = 0;
366  hprt0.d32 = 0;
367 
368  otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
369  if (mode)
370  { /* Device mode */
371  if (state)
372  {
373 
374  otgctl.b.devhnpen = 1; /* B-Dev has been enabled to perform HNP */
375  otgctl.b.hnpreq = 1; /* Initiate an HNP req. to the connected USB host*/
376  USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
377  }
378  }
379  else
380  { /* Host mode */
381  if (state)
382  {
383  otgctl.b.hstsethnpen = 1; /* A-Dev has enabled B-device for HNP */
384  USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
385  /* Suspend the bus so that B-dev will disconnect indicating the initial condition for HNP to DWC_Core */
386  hprt0.d32 = USB_OTG_ReadHPRT0(pdev);
387  hprt0.b.prtsusp = 1; /* The core clear this bit when disconnect interrupt generated (GINTSTS.DisconnInt = '1') */
388  USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
389  }
390  }
391 }
392 
393 
401 {
402  return pdev->otg.OTG_State;
403 }
404 
405 
418 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
static uint32_t USB_OTG_HandleSessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_HandleSessionRequest_ISR Initiating the Session Request Protocol.
Definition: usb_otg.c:307
#define A_HOST
Definition: usb_defines.h:105
uint32_t STM32_USBO_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev)
STM32_USBO_OTG_ISR_Handler.
Definition: usb_otg.c:106
#define B_PERIPHERAL
Definition: usb_defines.h:108
struct _USB_OTG_GINTMSK_TypeDef::@64 b
USB_OTG_STS USB_OTG_DisableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_DisableGlobalInt Enables the controller&#39;s Global Int in the AHB Config reg.
Definition: usb_core.c:464
__IO uint32_t GINTMSK
Definition: usb_regs.h:91
struct _USB_OTG_GINTSTS_TypeDef::@65 b
static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_Read_itr returns the Core Interrupt register.
Definition: usb_otg.c:139
__IO uint32_t GOTGINT
Definition: usb_regs.h:86
hardware registers
__IO uint32_t GOTGCTL
Definition: usb_regs.h:85
struct _USB_OTG_HPRT0_TypeDef::@88 b
void USB_OTG_InitiateHNP(USB_OTG_CORE_HANDLE *pdev, uint8_t state, uint8_t mode)
USB_OTG_InitiateHNP Initiate HNP.
Definition: usb_otg.c:360
#define USB_OTG_WRITE_REG32(reg, value)
Definition: usb_defines.h:226
struct _USB_OTG_GOTGINT_TypeDef::@60 b
void USB_OTG_InitiateSRP(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_InitiateSRP Initiate an srp session.
Definition: usb_otg.c:338
#define USB_OTG_READ_REG32(reg)
Definition: usb_defines.h:225
USB_OTG_GREGS * GREGS
Definition: usb_regs.h:224
Header of the Core Layer.
uint32_t USB_OTG_HandleOTG_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_HandleOTG_ISR handles the OTG Interrupts.
Definition: usb_otg.c:167
__IO uint32_t GINTSTS
Definition: usb_regs.h:90
OTG Core Header.
struct _USB_OTG_GOTGCTL_TypeDef::@59 b
USB_OTG_STS USB_OTG_EnableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_EnableGlobalInt Enables the controller&#39;s Global Int in the AHB Config reg.
Definition: usb_core.c:446
Header of the Core Layer.
uint32_t USB_OTG_GetCurrentState(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_GetCurrentState Return current OTG State.
Definition: usb_otg.c:400
static uint32_t USB_OTG_HandleConnectorIDStatusChange_ISR(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_HandleConnectorIDStatusChange_ISR handles the Connector ID Status Change Interrupt.
Definition: usb_otg.c:265
uint8_t USB_OTG_IsDeviceMode(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_IsDeviceMode : Check if it is device mode.
Definition: usb_core.c:587
uint8_t USB_OTG_IsHostMode(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_IsHostMode : Check if it is host mode.
Definition: usb_core.c:598
USB_OTG_CORE_REGS regs
Definition: usb_core.h:290
__IO uint32_t * HPRT0
Definition: usb_regs.h:230
#define USB_OTG_MODIFY_REG32(reg, clear_mask, set_mask)
Definition: usb_defines.h:227


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:20